IPU isShimNOCTile is wrong for 5x4 designs.

[makslevental]

Physically I believe the (0,0) tile is the Shim PL Tile; if you set the partition start column to the 0th column, then aie-rt identifies that tile as the shim PL tile. This is an issue for 5x4 designs because our isShimNOCTile does not take into account "virtualization" i.e. partition start column, and thus a legal shim dma on (4,0) is "illegal":

%23 = "aie.tile"() <{col = 4 : i32, row = 0 : i32}> : () -> index
...
E       aie._mlir_libs._site_initialize.<locals>.MLIRError: Verification failed:
E       error: unknown: 'aie.shim_dma' op failed to verify that op exists in a shim tile with NOC connection
E        note: unknown: see current operation: 
E         %105 = "aie.shim_dma"(%23) ({
E           %106 = "aie.dma"() <{channel_dir = 0 : i32, channel_index = 0 : i32, loop = false, repeat_count = 4 : i32}> ({
E             "aie.use_lock"(%104) <{action = 0 : i32}> : (index) -> ()
E             "aie.dma_bd"(%97) : (memref<32xi32>) -> ()
E             "aie.use_lock"(%104) <{action = 1 : i32, value = 0 : i32}> : (index) -> ()
E           }) : () -> i1
E           "aie.end"() : () -> ()
E         }) : (index) -> index

. Not sure what the fix is without extending the Target model to capture partition start.

[jgmelber]

Yes, currently we consider the IPU target a virtualized 4x4 device to limit the complexity. The device model would need to be extended, perhaps with a special case for 5 column designs if we decide that this is something we want to support.