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Add v80 #1170

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merged 2 commits into from
Aug 22, 2024
Merged

Add v80 #1170

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188bf17
[Util] Add v80 to versal list
auphelia Jun 20, 2024
380d2ac
[RTL MVAU] Allow for 4bit compute with dsp48 for versal devices
auphelia Jul 8, 2024
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5 changes: 4 additions & 1 deletion src/finn/custom_op/fpgadataflow/rtl/matrixvectoractivation_rtl.py
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Original file line number Diff line number Diff line change
Expand Up @@ -208,7 +208,10 @@ def _resolve_impl_style(self, dsp_block):
weight_width = self.get_input_datatype(1).bitwidth()

if dsp_block == "DSP58":
return "mvu_vvu_8sx9_dsp58"
if act_width <= 4 and weight_width <= 4:
return "mvu_4sx4u_dsp48e2"
else:
return "mvu_vvu_8sx9_dsp58"
else:
if act_width <= 4 and weight_width <= 4:
if dsp_block == "DSP48E1":
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8 changes: 4 additions & 4 deletions src/finn/util/basic.py
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Expand Up @@ -292,10 +292,10 @@ def memutil(req_mem_spec, primitive_spec):

def is_versal(fpgapart):
"""Returns whether board is part of the Versal family"""
return (
fpgapart[0:4] in ["xcvc", "xcve", "xcvp", "xcvm", "xqvc", "xqvm"]
or fpgapart[0:5] == "xqrvc"
)
return fpgapart[0:4] in ["xcvc", "xcve", "xcvp", "xcvm", "xqvc", "xqvm"] or fpgapart[0:5] in [
"xqrvc",
"xcv80",
]


def get_dsp_block(fpgapart):
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