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[clang][HLSL] Add sign intrinsic part 3 (llvm#101989)
partially fixes llvm#70078 ### Changes - Implemented `sign` clang builtin - Linked `sign` clang builtin with `hlsl_intrinsics.h` - Added sema checks for `sign` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp` - Add codegen for `sign` to `EmitHLSLBuiltinExpr` in `CGBuiltin.cpp` - Add codegen tests to `clang/test/CodeGenHLSL/builtins/sign.hlsl` - Add sema tests to `clang/test/SemaHLSL/BuiltIns/sign-errors.hlsl` ### Related PRs - llvm#101987 - llvm#101988 ### Discussion - Should there be a `usign` intrinsic that handles the unsigned cases?
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| Original file line number | Diff line number | Diff line change |
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| // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ | ||
| // RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ | ||
| // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ | ||
| // RUN: --check-prefixes=CHECK,NATIVE_HALF \ | ||
| // RUN: -DTARGET=dx -DFNATTRS=noundef | ||
| // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ | ||
| // RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \ | ||
| // RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \ | ||
| // RUN: -DTARGET=dx -DFNATTRS=noundef | ||
| // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ | ||
| // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \ | ||
| // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ | ||
| // RUN: --check-prefixes=CHECK,NATIVE_HALF \ | ||
| // RUN: -DTARGET=spv -DFNATTRS="spir_func noundef" | ||
| // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ | ||
| // RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ | ||
| // RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \ | ||
| // RUN: -DTARGET=spv -DFNATTRS="spir_func noundef" | ||
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| // NATIVE_HALF: define [[FNATTRS]] i32 @ | ||
| // NATIVE_HALF: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.f16( | ||
| // NATIVE_HALF: ret i32 %hlsl.sign | ||
| // NO_HALF: define [[FNATTRS]] i32 @ | ||
| // NO_HALF: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.f32( | ||
| // NO_HALF: ret i32 %hlsl.sign | ||
| int test_sign_half(half p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <2 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2f16( | ||
| // NATIVE_HALF: ret <2 x i32> %hlsl.sign | ||
| // NO_HALF: define [[FNATTRS]] <2 x i32> @ | ||
| // NO_HALF: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2f32( | ||
| // NO_HALF: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_half2(half2 p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <3 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3f16( | ||
| // NATIVE_HALF: ret <3 x i32> %hlsl.sign | ||
| // NO_HALF: define [[FNATTRS]] <3 x i32> @ | ||
| // NO_HALF: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3f32( | ||
| // NO_HALF: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_half3(half3 p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <4 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4f16( | ||
| // NATIVE_HALF: ret <4 x i32> %hlsl.sign | ||
| // NO_HALF: define [[FNATTRS]] <4 x i32> @ | ||
| // NO_HALF: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4f32( | ||
| // NO_HALF: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_half4(half4 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] i32 @ | ||
| // CHECK: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.f32( | ||
| // CHECK: ret i32 %hlsl.sign | ||
| int test_sign_float(float p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <2 x i32> @ | ||
| // CHECK: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2f32( | ||
| // CHECK: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_float2(float2 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <3 x i32> @ | ||
| // CHECK: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3f32( | ||
| // CHECK: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_float3(float3 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <4 x i32> @ | ||
| // CHECK: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4f32( | ||
| // CHECK: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_float4(float4 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] i32 @ | ||
| // CHECK: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.f64( | ||
| // CHECK: ret i32 %hlsl.sign | ||
| int test_sign_double(double p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <2 x i32> @ | ||
| // CHECK: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2f64( | ||
| // CHECK: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_double2(double2 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <3 x i32> @ | ||
| // CHECK: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3f64( | ||
| // CHECK: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_double3(double3 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <4 x i32> @ | ||
| // CHECK: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4f64( | ||
| // CHECK: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_double4(double4 p0) { return sign(p0); } | ||
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| #ifdef __HLSL_ENABLE_16_BIT | ||
| // NATIVE_HALF: define [[FNATTRS]] i32 @ | ||
| // NATIVE_HALF: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.i16( | ||
| // NATIVE_HALF: ret i32 %hlsl.sign | ||
| int test_sign_int16_t(int16_t p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <2 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2i16( | ||
| // NATIVE_HALF: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_int16_t2(int16_t2 p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <3 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3i16( | ||
| // NATIVE_HALF: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_int16_t3(int16_t3 p0) { return sign(p0); } | ||
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| // NATIVE_HALF: define [[FNATTRS]] <4 x i32> @ | ||
| // NATIVE_HALF: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4i16( | ||
| // NATIVE_HALF: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_int16_t4(int16_t4 p0) { return sign(p0); } | ||
| #endif // __HLSL_ENABLE_16_BIT | ||
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| // CHECK: define [[FNATTRS]] i32 @ | ||
| // CHECK: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.i32( | ||
| // CHECK: ret i32 %hlsl.sign | ||
| int test_sign_int(int p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <2 x i32> @ | ||
| // CHECK: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2i32( | ||
| // CHECK: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_int2(int2 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <3 x i32> @ | ||
| // CHECK: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3i32( | ||
| // CHECK: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_int3(int3 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <4 x i32> @ | ||
| // CHECK: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4i32( | ||
| // CHECK: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_int4(int4 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] i32 @ | ||
| // CHECK: %hlsl.sign = call i32 @llvm.[[TARGET]].sign.i64( | ||
| // CHECK: ret i32 %hlsl.sign | ||
| int test_sign_int64_t(int64_t p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <2 x i32> @ | ||
| // CHECK: %hlsl.sign = call <2 x i32> @llvm.[[TARGET]].sign.v2i64( | ||
| // CHECK: ret <2 x i32> %hlsl.sign | ||
| int2 test_sign_int64_t2(int64_t2 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <3 x i32> @ | ||
| // CHECK: %hlsl.sign = call <3 x i32> @llvm.[[TARGET]].sign.v3i64( | ||
| // CHECK: ret <3 x i32> %hlsl.sign | ||
| int3 test_sign_int64_t3(int64_t3 p0) { return sign(p0); } | ||
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| // CHECK: define [[FNATTRS]] <4 x i32> @ | ||
| // CHECK: %hlsl.sign = call <4 x i32> @llvm.[[TARGET]].sign.v4i64( | ||
| // CHECK: ret <4 x i32> %hlsl.sign | ||
| int4 test_sign_int64_t4(int64_t4 p0) { return sign(p0); } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,16 @@ | ||
| // RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.6-library %s -fnative-half-type -emit-llvm-only -disable-llvm-passes -verify -verify-ignore-unexpected | ||
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| bool test_too_few_arg() { | ||
| return __builtin_hlsl_elementwise_sign(); | ||
| // expected-error@-1 {{too few arguments to function call, expected 1, have 0}} | ||
| } | ||
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| bool2 test_too_many_arg(float2 p0) { | ||
| return __builtin_hlsl_elementwise_sign(p0, p0); | ||
| // expected-error@-1 {{too many arguments to function call, expected 1, have 2}} | ||
| } | ||
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| bool builtin_bool_to_float_type_promotion(bool p1) { | ||
| return __builtin_hlsl_elementwise_sign(p1); | ||
| // expected-error@-1 {passing 'bool' to parameter of incompatible type 'float'}} | ||
| } |