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Test flatten option #53
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Rather than using travis, could we just use readthedocs here? |
I wanted to run the same file with multiple sphinx configurations, which is hard to achieve on readthedocs. In example, this would allow testing the extension with diagrams format (global setting) set once to If this does not convince you, we can limit ourselves to one Sphinx configuration and create the second RTD project for tests. This should work fine too and should give the direct preview in the CI. This PR should be merged after the #52. The previous PR is much less controversial. |
Thanks for the explanation! You can set up github actions which allow for "test deployments" of github pages stuff. I have never done that however... |
I've checked the GitHub Actions available in the GitHub market, but it seems that none of them offers the test deployment functionality. This might be related to the GitHub pages limitation - it only allows for publishing one version of the website. |
I believe that we should create a Kokoro setup or upload the artifacts to i.e. |
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I think pushing to github pages is fine. I'm pretty sure we don't need to use monolith though?
@rw1nkler Can you also split the CI change from the other changes? |
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This is going to need a rebase now. |
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This commit adds a basic test for the flatten option in the verilog-diagram directive. Signed-off-by: Robert Winkler <[email protected]>
This commit changes the HTML tag which is used for SVG images from <object> to <img>. This fixes scalability of images on websites. Signed-off-by: Robert Winkler <[email protected]>
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@mithro I rebased the PR |
This PR adds the basic tests for the flatten option in the verilog-diagram directive. The test consists of the Sphinx run in which the module black boxes should be resolved (with the flatten option) for all types of diagrams. The example uses the full adder circuit, which consists of two half adder modules.
The GitHub Pages functionality has been moved to #58
Here is the flatten test preview:
https://rw1nkler.github.io/sphinxcontrib-verilog-diagrams/test_flatten.html
Resolves: #3
#52 should be merged first