come on!

SolDev69 · Nov 27, 2023 · 7c7c288 · 7c7c288
1 parent f92b1ae
commit 7c7c288
Show file tree

Hide file tree

Showing 2 changed files with 12 additions and 9 deletions.
diff --git a/src/freedreno/ir3/ir3_disk_cache.c b/src/freedreno/ir3/ir3_disk_cache.c
@@ -54,13 +54,16 @@ ir3_disk_cache_init(struct ir3_compiler *compiler)
    const char *renderer = fd_dev_name(compiler->dev_id);
    const struct build_id_note *note =
       build_id_find_nhdr_for_addr(ir3_disk_cache_init);
-   assert(note && build_id_length(note) == 20); /* sha1 */
-
-   const uint8_t *id_sha1 = build_id_data(note);
-   assert(id_sha1);
-
-   char timestamp[41];
-   _mesa_sha1_format(timestamp, id_sha1);
+   if (note != NULL)
+   {
+      assert(note && build_id_length(note) == 20); /* sha1 */
+
+      const uint8_t *id_sha1 = build_id_data(note);
+      assert(id_sha1);
+
+      char timestamp[41];
+      _mesa_sha1_format(timestamp, id_sha1);
+   }
 
    uint64_t driver_flags = ir3_shader_debug;
    if (compiler->options.robust_buffer_access2)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc b/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc
@@ -158,9 +158,9 @@ fd6_screen_init(struct pipe_screen *pscreen)
    screen->max_rts = A6XX_MAX_RENDER_TARGETS;
 
    printf("FD6: ccu\n");
-   screen->ccu_offset_bypass = screen->info->num_ccu * A6XX_CCU_DEPTH_SIZE;
+   screen->ccu_offset_bypass = 1 * A6XX_CCU_DEPTH_SIZE;
    screen->ccu_offset_gmem = (screen->gmemsize_bytes -
-         screen->info->num_ccu * A6XX_CCU_GMEM_COLOR_SIZE);
+         1 * A6XX_CCU_GMEM_COLOR_SIZE);
 
    /* Currently only FB_READ forces GMEM path, mostly because we'd have to
     * deal with cmdstream patching otherwise..