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Changes to make questa-uvm compile
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MarioOpenHWGroup committed Mar 18, 2024
1 parent 3bf7cb4 commit f1c73af
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Showing 12 changed files with 54 additions and 24 deletions.
2 changes: 2 additions & 0 deletions verif/env/uvme/cov/uvme_exception_covg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@ covergroup cg_exception(
option.per_instance = 1;
option.name = name;

`ifndef QUESTA
cp_exception: coverpoint instr.cause {
bins NO_EXCEPTION = {0} iff (!instr.trap);

Expand Down Expand Up @@ -159,6 +160,7 @@ covergroup cg_exception(
ignore_bins IGN_EXC = !binsof(cp_exception) intersect{6};
ignore_bins IGN_ADD = binsof(cp_add_mem) intersect{0};
}
`endif

endgroup : cg_exception

Expand Down
10 changes: 5 additions & 5 deletions verif/env/uvme/cov/uvme_illegal_instr_covg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -31,13 +31,13 @@ covergroup cg_illegal_i(
}

cp_illegal_funct3: coverpoint instr.rvfi.insn[14:12] { // if the instruction has funct3
bins ILLEGAL_FUNCT3[3] = {[0:$]} iff (instr.rvfi.insn[6:0] inside legal_i_opcode); //with the right opcode
bins ILLEGAL_NOPCODE_FUNCT3[3] = {[0:$]} iff (!(instr.rvfi.insn[6:0] inside legal_i_opcode)); //with the wrong opcode
bins ILLEGAL_FUNCT3[3] = {[0:$]} iff (instr.rvfi.insn[6:0] inside {legal_i_opcode}); //with the right opcode
bins ILLEGAL_NOPCODE_FUNCT3[3] = {[0:$]} iff (!(instr.rvfi.insn[6:0] inside {legal_i_opcode})); //with the wrong opcode
}

cp_illegal_funct7: coverpoint instr.rvfi.insn[31:25] { // if the instruction has funct7
bins ILLEGAL_FUNCT7[3] = {[0:$]} with (!(item inside legal_i_funct7)) iff (instr.rvfi.insn[6:0] inside legal_i_opcode); //with the right opcode
bins ILLEGAL_NOPCODE_FUNCT7[3] = {[0:$]} with (!(item inside legal_i_funct7)) iff (!(instr.rvfi.insn[6:0] inside legal_i_opcode)); //with the wrong opcode
bins ILLEGAL_FUNCT7[3] = {[0:$]} with (!(item inside {legal_i_funct7})) iff (instr.rvfi.insn[6:0] inside {legal_i_opcode}); //with the right opcode
bins ILLEGAL_NOPCODE_FUNCT7[3] = {[0:$]} with (!(item inside {legal_i_funct7})) iff (!(instr.rvfi.insn[6:0] inside {legal_i_opcode})); //with the wrong opcode
}

cp_is_illegal: coverpoint instr.cause {
Expand All @@ -63,7 +63,7 @@ covergroup cg_illegal_m(
}

cp_illegal_funct3: coverpoint instr.rvfi.insn[14:12] { // if the instruction has funct3
bins ILLEGAL_FUNCT3[3] = {[0:$]} iff (!(instr.rvfi.insn[6:0] == 7'b0110011 &
bins ILLEGAL_FUNCT3[3] = {[0:$]} iff (!(instr.rvfi.insn[6:0] == 7'b0110011 &
instr.rvfi.insn[31:25] == 7'b0000001)); //with the wrong opcode or the wrong funct7
}

Expand Down
5 changes: 5 additions & 0 deletions verif/env/uvme/uvme_cva6_macros.sv
Original file line number Diff line number Diff line change
Expand Up @@ -23,5 +23,10 @@

`define per_instance_fcov `ifndef DSIM option.per_instance = 1; `endif

`ifdef UNSUPPORTED_WITH //TODO - Remove ifdef when the issue in VCS simulator is fixed
`define WITH iff
`else
`define WITH with
`endif

`endif // __UVME_CVA6_MACROS_SV__
2 changes: 1 addition & 1 deletion verif/env/uvme/vseq/uvme_axi_fw_preload_seq.sv
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ endclass : uvme_axi_fw_preload_seq_c
function uvme_axi_fw_preload_seq_c::new(string name="uvma_axi_fw_preload_seq");

super.new(name);
mem = uvml_mem_c::type_id::create("mem");
mem = uvml_mem_c#()::type_id::create("mem");
mem.mem_default = MEM_DEFAULT_0;

endfunction : new
Expand Down
9 changes: 6 additions & 3 deletions verif/sim/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -281,16 +281,18 @@ questa_uvm_comp:
@echo "[QUESTA] Building Model"
mkdir -p $(VSIM_WORK_DIR)
vlib $(VSIM_WORK_DIR)
vlog -64 $(COMMON_COMP_UVM_FLAGS) \
vlog -sv -64 $(COMMON_COMP_UVM_FLAGS) \
+incdir+$(QUESTASIM_HOME)/verilog_src/uvm-1.2/src/ \
$(QUESTASIM_HOME)/verilog_src/uvm-1.2/src/uvm_pkg.sv \
-timescale "1ns / 1ps" \
-timescale "1ns / 1ns" +acc=+rb \
-incr -64 -nologo -quiet -permissive -svinputport=compat -pedanticerror \
$(issrun_opts) \
+jtag_rbb_enable=0 \
-work $(VSIM_WORK_DIR) \
-f $(FLIST_CORE) -f $(FLIST_TB) \
-f $(CVA6_UVMT_DIR)/uvmt_cva6.flist \
-suppress vlog-2745 -suppress vlog-8386 \
-suppress vlog-8607 \
+define+UNSUPPORTED_WITH+ \
+define+QUESTA+ \
$(cov-comp-opt) $(isscomp_opts)
Expand All @@ -303,8 +305,9 @@ questa_uvm_run:
$(COMMON_RUN_UVM_FLAGS) \
-sv_lib $(QUESTASIM_HOME)/uvm-1.2/linux_x86_64/uvm_dpi \
-c -do "log -r /*; run -all; " \
-work $(VSIM_WORK_DIR) -t 1ps \
-work $(VSIM_WORK_DIR) -t 1ns \
-suppress vsim-8451 \
+permissive \
$(cov-comp-opt) +define+UNSUPPORTED_WITH+ $(isscomp_opts)\
uvmt_cva6_tb_opt

Expand Down
2 changes: 1 addition & 1 deletion verif/sim/cva6.py
Original file line number Diff line number Diff line change
Expand Up @@ -1054,7 +1054,7 @@ def check_spike_version():

if user_spike_version.returncode != 0:
incorrect_version_exit("Spike", "- unknown -", spike_version)

logging.info(f"Spike Version: {user_spike_version_string}")

if user_spike_version_string != spike_version:
Expand Down
8 changes: 6 additions & 2 deletions verif/tb/uvmt/cva6_tb_wrapper.sv
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,13 @@ import uvm_pkg::*;

`include "uvm_macros.svh"

import "DPI-C" function read_elf(input string filename);
`ifndef DPI_FESVR_SPIKE_UTILS
`define DPI_FESVR_SPIKE_UTILS
import "DPI-C" function void read_elf(input string filename);
import "DPI-C" function byte read_symbol(input string symbol_name, inout longint unsigned address);
import "DPI-C" function byte get_section(output longint address, output longint len);
import "DPI-C" context function void read_section_sv(input longint address, inout byte buffer[]);
`endif

module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
Expand Down Expand Up @@ -70,7 +74,7 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
rvfi_csr_t rvfi_csr;
assign rvfi_o = rvfi_instr;
assign rvfi_csr_o = rvfi_csr;

cva6 #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_probes_instr_t ( rvfi_probes_instr_t ),
Expand Down
2 changes: 2 additions & 0 deletions verif/tb/uvmt/uvmt_cva6_axi_assert.sv
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@

// *************************** AXI features supported by CVA6 ************************** //

`include "uvm_macros.svh"

module uvmt_cva6_axi_assert (uvma_axi_intf axi_assert_if);

import uvm_pkg::*;
Expand Down
11 changes: 7 additions & 4 deletions verif/tb/uvmt/uvmt_cva6_tb.sv
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,8 @@
`define __UVMT_CVA6_TB_SV__

`include "rvfi_types.svh"
`include "uvm_macros.svh"
`include "uvmt_cva6_macros.sv"

/**
* Module encapsulating the CVA6 DUT wrapper, and associated SV interfaces.
Expand Down Expand Up @@ -96,9 +98,9 @@ module uvmt_cva6_tb;
.rvfi_csr_t ( rvfi_csr_t )
) rvfi_if(
.rvfi_o(),
.rvfi_csr_o(),
.tb_exit_o()
.rvfi_csr_o()
); // Status information generated by the Virtual Peripherals in the DUT WRAPPER memory.
uvmt_tb_exit_if tb_exit_if ( .tb_exit_o());

rvfi_instr_t [CVA6Cfg.NrCommitPorts-1:0] rvfi_instr_q;
/**
Expand All @@ -123,7 +125,7 @@ module uvmt_cva6_tb;
.axi_switch_vif (axi_switch_vif),
.default_inputs_vif (default_inputs_vif),
.core_cntrl_if(core_cntrl_if),
.tb_exit_o(rvfi_if.tb_exit_o),
.tb_exit_o(tb_exit_if.tb_exit_o),
.rvfi_o(rvfi_instr_q),
.rvfi_csr_o(rvfi_if.rvfi_csr_o)
);
Expand Down Expand Up @@ -373,8 +375,9 @@ module uvmt_cva6_tb;
uvm_config_db#(virtual uvma_cvxif_intf )::set(.cntxt(null), .inst_name("*.env.cvxif_agent"), .field_name("vif"), .value(cvxif_if) );
uvm_config_db#(virtual uvma_axi_intf )::set(.cntxt(null), .inst_name("*"), .field_name("axi_vif"), .value(axi_if));
uvm_config_db#(virtual uvmt_axi_switch_intf )::set(.cntxt(null), .inst_name("*.env"), .field_name("axi_switch_vif"), .value(axi_switch_vif));
uvm_config_db#(virtual uvmt_rvfi_if )::set(.cntxt(null), .inst_name("*"), .field_name("rvfi_vif"), .value(rvfi_if));
uvm_config_db#(virtual uvmt_rvfi_if#( .CVA6Cfg(CVA6Cfg), .rvfi_instr_t(rvfi_instr_t), .rvfi_csr_t (rvfi_csr_t)))::set(.cntxt(null), .inst_name("*"), .field_name("rvfi_vif"), .value(rvfi_if));
uvm_config_db#(virtual uvme_cva6_core_cntrl_if)::set(.cntxt(null), .inst_name("*"), .field_name("core_cntrl_vif"), .value(core_cntrl_if));
uvm_config_db#(virtual uvmt_tb_exit_if)::set(.cntxt(null), .inst_name("*"), .field_name("tb_exit_vif"), .value(tb_exit_if));

// DUT and ENV parameters
uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_INSTR_ADDR_WIDTH"), .value(ENV_PARAM_INSTR_ADDR_WIDTH) );
Expand Down
12 changes: 10 additions & 2 deletions verif/tb/uvmt/uvmt_cva6_tb_ifs.sv
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,7 @@ interface uvmt_rvfi_if #(
parameter type rvfi_csr_t = logic
) (
output rvfi_instr_t [CVA6Cfg.NrCommitPorts-1:0] rvfi_o,
output rvfi_csr_t rvfi_csr_o,
output logic[31:0] tb_exit_o
output rvfi_csr_t rvfi_csr_o
);

import uvm_pkg::*;
Expand All @@ -40,4 +39,13 @@ interface uvmt_rvfi_if #(
endinterface : uvmt_rvfi_if


interface uvmt_tb_exit_if (
output logic[31:0] tb_exit_o
);

initial begin
end
endinterface : uvmt_tb_exit_if


`endif // __UVMT_CVA6_TB_IFS_SV__
11 changes: 7 additions & 4 deletions verif/tests/uvmt/base-tests/uvmt_cva6_base_test.sv
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ class uvmt_cva6_base_test_c extends uvm_test;
} uvma_axi_version_enum;

// Handles testbench interfaces
virtual uvmt_rvfi_if rvfi_vif; // virtual peripheral status
virtual uvmt_tb_exit_if tb_exit_vif; // Exit vif
// virtual uvmt_cva6_core_cntrl_if core_cntrl_vif; // control inputs to the core

// Default sequences
Expand Down Expand Up @@ -342,11 +342,11 @@ endfunction : phase_ended

function void uvmt_cva6_base_test_c::retrieve_vifs();

if (!uvm_config_db#(virtual uvmt_rvfi_if)::get(this, "", "rvfi_vif", rvfi_vif)) begin
`uvm_fatal("VIF", $sformatf("Could not find rvfi_vif handle of type %s in uvm_config_db", $typename(rvfi_vif)))
if (!uvm_config_db#(virtual uvmt_tb_exit_if)::get(this, "", "tb_exit_vif", tb_exit_vif)) begin
`uvm_fatal("VIF", $sformatf("Could not find tb_exit_vif handle of type %s in uvm_config_db", $typename(tb_exit_vif)))
end
else begin
`uvm_info("VIF", $sformatf("Found rvfi_vif handle of type %s in uvm_config_db", $typename(rvfi_vif)), UVM_DEBUG)
`uvm_info("VIF", $sformatf("Found tb_exit_vif handle of type %s in uvm_config_db", $typename(tb_exit_vif)), UVM_DEBUG)
end

endfunction : retrieve_vifs
Expand All @@ -365,6 +365,9 @@ function void uvmt_cva6_base_test_c::pkg_to_cfg();
st_core_cntrl_cfg st = env_cfg.to_struct();
st = cva6pkg_to_core_cntrl_cfg(st);

// TODO Remove when the functionality works
st.disable_all_csr_checks = 1;

env_cfg.from_struct(st);

env_cfg.post_randomize();
Expand Down
4 changes: 2 additions & 2 deletions verif/tests/uvmt/compliance-tests/uvmt_cva6_firmware_test.sv
Original file line number Diff line number Diff line change
Expand Up @@ -160,12 +160,12 @@ task uvmt_cva6_firmware_test_c::run_phase(uvm_phase phase);
// The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral.
// The format of rvfi_vif.tb_exit_o is { wire[31:1] exit_code, wire test_finished }.
wait (
(rvfi_vif.tb_exit_o[0] == 1'b1)
(tb_exit_vif.tb_exit_o[0] == 1'b1)
);
`uvm_info("TEST", "Test FINISHED", UVM_NONE)
// Set sim_finished (otherwise tb will flag that sim was aborted)
uvm_config_db#(bit)::set(null, "", "sim_finished", 1);
uvm_config_db#(int)::set(null, "", "test_exit_code", { 0'b0, rvfi_vif.tb_exit_o[31:1] });
uvm_config_db#(int)::set(null, "", "test_exit_code", { 0'b0, tb_exit_vif.tb_exit_o[31:1] });
// Let the termination-triggering instruction appear in the log.
@(posedge env_cntxt.clknrst_cntxt.vif.clk);
// Allow termination from now on.
Expand Down

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