Fix UVM_VERBOSITY

MarioOpenHWGroup · Apr 10, 2024 · 3b56a96 · 3b56a96
1 parent 13bb21a
commit 3b56a96
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Showing 3 changed files with 15 additions and 10 deletions.
diff --git a/verif/regress/coremark.sh b/verif/regress/coremark.sh
@@ -31,11 +31,9 @@ if ! [ -n "$DV_SIMULATORS" ]; then
 fi
 
 if ! [ -n "$UVM_VERBOSITY" ]; then
-    UVM_VERBOSITY=UVM_NONE
+    export UVM_VERBOSITY=UVM_NONE
 fi
 
-export DV_OPTS="$DV_OPTS --issrun_opts=\"+UVM_VERBOSITY=$UVM_VERBOSITY\""
-
 make clean
 make -C verif/sim clean_all
 

diff --git a/verif/regress/smoke-tests.sh b/verif/regress/smoke-tests.sh
@@ -33,10 +33,10 @@ if ! [ -n "$DV_SIMULATORS" ]; then
 fi
 
 if ! [ -n "$UVM_VERBOSITY" ]; then
-    UVM_VERBOSITY=UVM_NONE
+    export UVM_VERBOSITY=UVM_NONE
 fi
 
-export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1+UVM_VERBOSITY=$UVM_VERBOSITY"
+export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1"
 
 cd verif/sim/
 python3 cva6.py --testlist=../tests/testlist_riscv-compliance-cv64a6_imafdc_sv39.yaml --test rv32i-I-ADD-01 --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS

diff --git a/verif/sim/Makefile b/verif/sim/Makefile
@@ -144,7 +144,7 @@ vcs-testharness:
 veri-testharness:
 	make -C $(path_var) verilate verilator="verilator --no-timing" target=$(target) defines=$(subst +define+,,$(isscomp_opts))
 	$(path_var)/work-ver/Variane_testharness $(if $(TRACE_COMPACT), -f verilator.fst) $(if $(TRACE_FAST), -v verilator.vcd) $(elf) $(issrun_opts) \
-	  +elf_file=$(elf) +tohost_addr=$(shell $$RISCV/bin/${CV_SW_PREFIX}nm -B $(elf) | grep -w tohost | cut -d' ' -f1)
+	  $(COMMON_PLUS_ARGS)
 	# If present, move default waveform files to log directory.
 	# Keep track of target in waveform file name.
 	[ ! -f verilator.fst ] || mv verilator.fst `dirname $(log)`/`basename $(log) .log`.fst
@@ -206,15 +206,22 @@ COMMON_COMP_UVM_FLAGS = \
 	  +incdir+$(CVA6_REPO_DIR)/verif/env/uvme +incdir+$(CVA6_REPO_DIR)/verif/tb/uvmt \
 	  $(if $(spike-tandem), +define+SPIKE_TANDEM=1)
 
-COMMON_RUN_UVM_FLAGS = \
-	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libriscv \
-	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libfesvr \
-	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libdisasm \
+COMMON_PLUS_ARGS = \
 	++$(elf) \
 	+elf_file=$(elf) \
 	+tohost_addr=$(shell $$RISCV/bin/$(CV_SW_PREFIX)nm -B $(elf) | grep -w tohost | cut -d' ' -f1) \
 	+signature=$(elf).signature_output  +UVM_TESTNAME=uvmt_cva6_firmware_test_c
 
+ifneq ($(UVM_VERBOSITY),)
+COMMON_PLUS_ARGS += +UVM_VERBOSITY=$(UVM_VERBOSITY)
+endif
+
+COMMON_RUN_UVM_FLAGS = \
+	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libriscv \
+	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libfesvr \
+	-sv_lib $(SPIKE_INSTALL_DIR)/lib/libdisasm \
+	$(COMMON_PLUS_ARGS)
+
 ALL_UVM_FLAGS   = -lca -sverilog +incdir+$(VCS_HOME)/etc/uvm/src \
 	  $(VCS_HOME)/etc/uvm/src/uvm_pkg.sv -ntb_opts uvm-1.2 -timescale=1ns/1ps \
 	  -assert svaext -race=all -ignore unique_checks -full64 -q +incdir+$(VCS_HOME)/etc/uvm/src \