RISCV basic support

Dockerfile

@@ -12,7 +12,8 @@ RUN apt update && apt upgrade -y && apt install -y build-essential clang curl gi
 # libcapstone >= 4.0.x
 RUN cd /tmp && \
     curl -o cap.tgz -L https://github.com/aquynh/capstone/archive/4.0.2.tar.gz && \
-    tar xvf cap.tgz && cd capstone-4.0.2/ && ./make.sh && make install && rm -rf /tmp/cap* \
+    tar xvf cap.tgz && cd capstone-4.0.2/ && CAPSTONE_ARCHS="arm aarch64 riscv x86" ./make.sh && \
+    make install && rm -rf /tmp/cap* \
     && ln -s /usr/lib/libcapstone.so.4 /usr/lib/x86_64-linux-gnu/libcapstone.so
 
 # libbitwuzla >= 0.2.0

src/libtriton/CMakeLists.txt

@@ -32,6 +32,10 @@ set(LIBTRITON_SOURCE_FILES
     arch/memoryAccess.cpp
     arch/operandWrapper.cpp
     arch/register.cpp
+    arch/riscv/riscv32Cpu.cpp
+    arch/riscv/riscv64Cpu.cpp
+    arch/riscv/riscvSemantics.cpp
+    arch/riscv/riscvSpecifications.cpp
     arch/x86/x8664Cpu.cpp
     arch/x86/x86Cpu.cpp
     arch/x86/x86Semantics.cpp
@@ -118,6 +122,12 @@ set(LIBTRITON_HEADER_FILES
     includes/triton/pathConstraint.hpp
     includes/triton/pathManager.hpp
     includes/triton/register.hpp
+    includes/triton/riscv32.spec
+    includes/triton/riscv64.spec
+    includes/triton/riscv32Cpu.hpp
+    includes/triton/riscv64Cpu.hpp
+    includes/triton/riscvSemantics.hpp
+    includes/triton/riscvSpecifications.hpp
     includes/triton/semanticsInterface.hpp
     includes/triton/shortcutRegister.hpp
     includes/triton/solverEngine.hpp

src/libtriton/arch/architecture.cpp

@@ -16,6 +16,9 @@
 #include <triton/x8664Cpu.hpp>
 #include <triton/x86Cpu.hpp>
 #include <triton/x86Specifications.hpp>
+#include <triton/riscv64Cpu.hpp>
+#include <triton/riscv32Cpu.hpp>
+#include <triton/riscvSpecifications.hpp>
 
 
 
@@ -54,6 +57,8 @@ namespace triton {
         case triton::arch::ARCH_X86:     this->cpu.reset(new(std::nothrow) triton::arch::x86::x86Cpu(this->callbacks));              break;
         case triton::arch::ARCH_AARCH64: this->cpu.reset(new(std::nothrow) triton::arch::arm::aarch64::AArch64Cpu(this->callbacks)); break;
         case triton::arch::ARCH_ARM32:   this->cpu.reset(new(std::nothrow) triton::arch::arm::arm32::Arm32Cpu(this->callbacks));     break;
+        case triton::arch::ARCH_RV64:    this->cpu.reset(new(std::nothrow) triton::arch::riscv::riscv64Cpu(this->callbacks));        break;
+        case triton::arch::ARCH_RV32:    this->cpu.reset(new(std::nothrow) triton::arch::riscv::riscv32Cpu(this->callbacks));        break;
         default:
           throw triton::exceptions::Architecture("Architecture::setArchitecture(): Architecture not supported.");
       }
@@ -394,6 +399,10 @@ namespace triton {
         case triton::arch::ARCH_X86_64:
           return triton::arch::x86::nop;
 
+        case triton::arch::ARCH_RV64:
+        case triton::arch::ARCH_RV32:
+          return triton::arch::riscv::nop;
+
         default:
           throw triton::exceptions::Architecture("Architecture::getNopInstruction(): Invalid architecture.");
       }

src/libtriton/arch/irBuilder.cpp

@@ -16,6 +16,7 @@
 #include <triton/operandWrapper.hpp>
 #include <triton/register.hpp>
 #include <triton/x86Semantics.hpp>
+#include <triton/riscvSemantics.hpp>
 
 
 
@@ -44,8 +45,9 @@ namespace triton {
       this->aarch64Isa           = new(std::nothrow) triton::arch::arm::aarch64::AArch64Semantics(architecture, symbolicEngine, taintEngine, astCtxt);
       this->arm32Isa             = new(std::nothrow) triton::arch::arm::arm32::Arm32Semantics(architecture, symbolicEngine, taintEngine, astCtxt);
       this->x86Isa               = new(std::nothrow) triton::arch::x86::x86Semantics(architecture, symbolicEngine, taintEngine, modes, astCtxt);
+      this->riscvIsa             = new(std::nothrow) triton::arch::riscv::riscvSemantics(architecture, symbolicEngine, taintEngine, modes, astCtxt);
 
-      if (this->x86Isa == nullptr || this->aarch64Isa == nullptr || this->arm32Isa == nullptr)
+      if (this->x86Isa == nullptr || this->aarch64Isa == nullptr || this->arm32Isa == nullptr || this->riscvIsa == nullptr)
         throw triton::exceptions::IrBuilder("IrBuilder::IrBuilder(): Not enough memory.");
     }
 
@@ -54,6 +56,7 @@ namespace triton {
       delete this->aarch64Isa;
       delete this->arm32Isa;
       delete this->x86Isa;
+      delete this->riscvIsa;
     }
 
 
@@ -89,6 +92,11 @@ namespace triton {
           ret = this->x86Isa->buildSemantics(inst);
           break;
 
+        case triton::arch::ARCH_RV64:
+        case triton::arch::ARCH_RV32:
+          ret = this->riscvIsa->buildSemantics(inst);
+          break;
+
         default:
           throw triton::exceptions::IrBuilder("IrBuilder::buildSemantics(): Architecture not supported.");
           break;