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Update: modeling to be in-line
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Suke0811 committed Sep 25, 2024
1 parent 2eb1b63 commit 5a5df49
Showing 1 changed file with 7 additions and 10 deletions.
17 changes: 7 additions & 10 deletions edg/parts/Ina219.py
Original file line number Diff line number Diff line change
Expand Up @@ -13,20 +13,17 @@ def __init__(self):
))
self.gnd = self.Port(Ground())

dio_model = DigitalBidir.from_supply(
self.i2c = self.Port(I2cTarget(DigitalBidir.empty(), addresses=[0x40]))
self.i2c.sda.init_from(DigitalBidir.from_supply(
self.gnd, self.vs,
voltage_limit_tolerance=(-0.3, 0.3) * Volt,
voltage_limit_abs=(-0.3, 6.0) * Volt,
input_threshold_factor=(0.3, 0.7)
)
dio_sda_model = DigitalBidir.from_supply(
))
self.i2c.scl.init_from(DigitalSink.from_supply(
self.gnd, self.vs,
voltage_limit_abs=(-0.3 * Volt, 6.0 * Volt),
voltage_limit_tolerance=(-0.3, 0.3) * Volt,
input_threshold_factor=(0.3, 0.7)
)

self.i2c = self.Port(I2cTarget(DigitalBidir.empty(), addresses=[0x40]))
self.i2c.sda.init_from(dio_sda_model)
self.i2c.scl.init_from(DigitalSink.from_bidir(dio_model))
))

self.in_pos = self.Port(AnalogSink(voltage_limits=(-0.3, 26) * Volt))
self.in_neg = self.Port(AnalogSink(voltage_limits=(-0.3, 26) * Volt))
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