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N-bit-Multiplier-in-Verilog

This project is designed as an n-bit multiplier of two numbers. The multiplication is performed using the shift and add method of multiplying two numbers.

Once the multiplication is completed, the output result is also converted to its binary-coded decimal (BCD) representation.

This is done using the double dabble method of converting binary numbers to binary-coded decimal(BCD) .

In the output, both the binary and the binary-coded decimal (BCD) representation is shown.

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