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c6678.h
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c6678.h
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/*
* c6678.h
*
* Created on: 2012-3-31
* Author: wangjie
*/
#ifndef C6678_H_
#define C6678_H_
/********************************************************************
* 包含的库文件
*******************************************************************/
#include "types.h"
#include "csl_types.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "csl_chip.h"
#include "csl_chipAux.h"
#include "csl_semAux.h"
#include "cslr_device.h"
#include "cslr_psc.h"
#include "csl_psc.h"
#include "cslr_emif16.h"
#include "csl_emif4f.h"
#include "csl_emif4fAux.h"
#include "csl_bootcfg.h"
#include "cslr_i2c.h"
#include "csl_cpsw.h"
#include "csl_cpsgmii.h"
#include "csl_cpsgmiiAux.h"
#include "csl_mdio.h"
#include "csl_mdioAux.h"
#include "cslr_uart.h"
#include "csl_gpioAux.h"
#include "csl_pscAux.h"
#include "csl_bootcfg.h"
#include "csl_bootcfgAux.h"
#include "cslr_spi.h"
#include "csl_pllcAux.h"
#include "csl_xmcAux.h"
#include "csl_msmcAux.h"
#include "csl_tsc.h"
/* PCIE LLD include */
#include <ti/drv/pcie/pcie.h>
/*cache*/
#include <csl_cache.h>
#include <csl_cacheAux.h>
/* CSL SRIO Functional Layer */
#include <csl_srio.h>
#include <csl_srioAux.h>
#include <csl_srioAuxPhyLayer.h>
#include <ti/drv/hyplnk/hyplnk.h>
/*intc*/
#include <csl_intc.h>
#include <csl_intcAux.h>
#include <tistdtypes.h>
#include <csl_cpIntcAux.h>
#include <cerrno>
/* CSL CPINTC Include Files. */
#include<csl_cpIntc.h>
/*sem2*/
#include <soc.h>
#include <csl_semAux.h>
/*edma3*/
#include <csl_edma3.h>
#include <csl_edma3Aux.h>
/*timer*/
#include <csl_tmr.h>
/*IPC*/
#include<csl_ipcAux.h>
#include"interrupt_nest.h"
/********************************************************************
* 可修改的全局变量
*******************************************************************/
#define DEVICE_IS_DEVICE1
#define DEVICE1 1//主控端
#define DEVICE0 0//被控端
#ifdef DEVICE_IS_DEVICE1
#define DEVICE DEVICE1
#else
#define DEVICE DEVICE0
#endif
/********************************************************************
* PLL部分
*******************************************************************/
/* Default PLL PLLM value (100/1*(20/2)) = 1.0GHz) */
#define PLATFORM_PLL1_PLLM_val (20)//通过该参数可设置核的时钟频率(20:1.0GHz)(25:1.25GHz)
/********************************************************************
* DDR3部分
*******************************************************************/
// ddr3 clock = ddr3clockin*(PLL PLLM value+1)/pll PLLD value/2
/* (100MHz*(9+1)/1/2)*2= 1.0GHz)*/
#define PLLM_DDR3 15 //通过配置该参数可设置DDR3跑的时钟频率
//C6678_4DSP_DDR_V1.1板卡目前支持5(600MHz)和6(700MHz),其他暂不支持,如需要请提需求 //qqb 2017_01_11
//C6678_4DSP_DDR_V2.0板卡目前支持5(600MHz)、6(700MHz)、7(800MHz)和9(1000MHz),其他暂不支持,如需要请提需求 //qqb 2017_01_11
//ku_m2板卡_1600版目前支持7(800MHz)和9(1000MHz),其他暂不支持,如需要请提需求
#define DDR3_TYPE_1BANK_2Gb 0 //只有一个BANK,只有正面贴了4片DDR, ddr是美光1333芯片,每片DDR为2Gb,位宽为16bit,v1.0板卡,,目前芯片和板卡均停产,只有老板卡会用
#define DDR3_TYPE_1BANK_4Gb 1 //只有一个BANK,只有正面贴了4片DDR, ddr是美光1333芯片,每片DDR为4Gb,位宽为16bit,v1.0板卡,目前芯片和板卡均停产,只有老板卡会用
#define DDR3_TYPE_2BANK_2Gb 2 //有两个BANK, 正反面均贴了DDR,共8片,ddr是美光1333芯片,每片2Gb,位宽为16bit,v1.0板卡,目前芯片和板卡均停产,只有老板卡会用
#define DDR3_TYPE_2BANK_4Gb 3 //有两个BANK, 正反面均贴了DDR,共8片,ddr是美光1333芯片,每片4Gb,位宽为16bit,v1.0板卡,目前芯片和板卡均停产,只有老板卡会用
#define DDR3_TYPE_2BANK_8Gb 4 //有两个BANK, 正反面均贴了DDR,共8片,ddr是美光1600芯片,每片8Gb,位宽为8bit(x2),v2.0板卡,目前只应用在SD项目中
#define DDR3_TYPE_2BANK_4Gb_1600 5 //有两个BANK, 正反面均贴了DDR,共8片, ddr是美光1600芯片,每片4Gb,位宽为16bit,v1.0板卡_1600版,通用款
#define DDR3_TYPE_1BANK_2Gb_1600 6 //只有一个BANK,只有正面贴了4片DDR, ddr是美光1600芯片,每片2Gb,位宽为16bit,只应用在ku_m2项目板卡_1600版
#define DDR3_TYPE_2BANK_2Gb_1600 7 //有两个BANK, 正反面均贴了DDR,共8片, ddr是美光1600芯片,每片2Gb,位宽为16bit,v1.0板卡_1600版,目前只应用在h9项目中
#define DDR3_TYPE_2BANK_8Gb_1600_PM 8 //有两个BANK, 正反面均贴了DDR,共8片, ddr是ProMOS的芯片,每片4Gb,位宽为16bit,v1.0板卡_1600版,通用试用版
#define DDR3_TYPE_1BANK_4Gb_2P_1600 9 //只有一个BANK,只有正面贴了2片DDR,共2片,ddr是美光1600芯片,每片4Gb,位宽为16bit,IO_DZS_Fiber_VPX C6678板卡
#define DDR3_TYPE_2BANK_2Gb_1P_1600 10 //有两个BANK, 正反面均贴了1片DDR,共2片,ddr是美光1600芯片,每片2Gb,位宽为16bit,IO_DZS_Fiber_VPX C6678板卡
#define DDR3_TYPE_1BANK_4Gb_4P_1600 11 //只有一个BANK,只有正面贴了4片DDR,共4片,ddr是美光1600芯片,每片4Gb,位宽为16bit,2DSP_3U_VPX C6678板卡
#define DDR3_TYPE_2BANK_4Gb_2P_1600 12 //有两个BANK,正反面均贴了1片DDR,共2片,ddr是美光1600芯片,每片2Gb,位宽为16bit,FMC_Carrier_KA C6678板卡
#define DDR3_TYPE_2BANK_8Gb_8P_1600_LRM 13 //有两个BANK, 正反面均贴了DDR,共8片,ddr是美光1600芯片,每片8Gb,位宽为16bit,ASAAC板卡1600MTs
#define DDR3_TYPE_2BANK_8Gb_8P_1600_3U 14 //有两个BANK, 正反面均贴了DDR,共8片,ddr是美光1600芯片,每片8Gb,位宽为16bit,3U处理板1600MTs
#define DDR3_TYPE_1BANK_8Gb_2P_1600_3U_SW 15 //只有一个BANK, 只有正面贴了DDR,共2片,ddr是美光1600芯片,每片8Gb,位宽为16bit,3U交换板1600MTs
#define DDR3_TYPE DDR3_TYPE_1BANK_4Gb_4P_1600 //根据自己板子的情况来选择DDR3的类型
/********************************************************************
* i2c_eeprom部分
*******************************************************************/
typedef uint16_t I2C_RET;
// Bus release
enum {
I2C_RELEASE_BUS,
I2C_DO_NOT_RELEASE_BUS
};
/********************************************************************
* spi_norflash部分
*******************************************************************/
typedef enum {
RADAR_DEVICE_NAND,
/**<NAND Flash*/
RADAR_DEVICE_NOR,
/**<NOR Flash*/
RADAR_DEVICE_EEPROM,
/**<NOR Flash*/
RADAR_DEVICE_MAX
/**<End of devices*/
} RADAR_DEVICE_TYPE;
typedef uint32_t RADAR_DEVHANDLE;
typedef struct {
int32_t manufacturer_id; /**<manufacturer ID*/
int32_t device_id; /**<Manufacturers device ID*/
RADAR_DEVICE_TYPE type; /**<Type of device */
int32_t width; /**<Width in bits*/
int32_t block_count; /**<Total blocks. First block starts at 0. */
int32_t page_count; /**<Page count per block*/
int32_t page_size; /**<Number of bytes in a page including spare area*/
int32_t spare_size; /**<Spare area size in bytes*/
RADAR_DEVHANDLE handle; /**<Handle to the block device as returned by Open. Handle is Opaque, do not interpret or modify */
int32_t bboffset; /**<Offset into spare area to check for a bad block */
uint32_t column; /**<Column for a NAND device */
uint32_t flags; /**<Flags is a copy of the flags that were used to open the device */
void *internal; /**<Do not use. Used internally by the platform library */
uint8_t *bblist; /** <Bad Block list or NULL if device does not support one */
} RADAR_DEVICE_info;
/* ------------------------------------------------------------------------ *
* NOR Error Status *
* ------------------------------------------------------------------------ */
#define NOR_STATUS Uint32 /* NOR status error code */
#define NOR_EFAIL ((NOR_STATUS)-1) /* General failure code */
#define NOR_EOK 0 /* General success code */
static struct platform_mcb_t {
uint32_t frequency;
int32_t board_version;
int32_t mastercore;
} platform_mcb = {0, 0, 0};
/********************************************************************
* timecounter部分
*******************************************************************/
//typedef unsigned long long int Uint64;
/********************************************************************
* gpio部分
*******************************************************************/
typedef enum _GpioDirection
{
GPIO_OUT = 0,
GPIO_IN
}GpioDirection;
/********************************************************************
* emif16_nandflash部分
*******************************************************************/
typedef struct _NAND_ADDR
{
uint32_t uiColumnAddr;
uint32_t uiPageAddr;
uint32_t uiBlockAddr;
} NAND_ADDR;
/********************************************************************
* pcie部分
*******************************************************************/
/* Global config variable that controls
the PCIe mode. It is global so it can be poked
from CCS. It should be set either to EP or RC. */
//注意:RC应该先启动pcie_init()等待连接,否则连不上
#ifdef DEVICE_IS_DEVICE1
#define PCIEMODE pcie_EP_MODE//pcie_RC_MODE////配置成RC或者EP
#else
#define PCIEMODE pcie_RC_MODE//pcie_RC_MODE////配置成RC或者EP
#endif
/********************************************************************
*srio部分
*******************************************************************/
#define SRIO_SEND 0
#define SRIO_RECV 1
#ifdef DEVICE_IS_DEVICE1
#define SRIOMODE SRIO_SEND//SRIO_RECV////配置成发送端或者接受端
#define SRIO_SEND_ID
#else
#define SRIOMODE SRIO_RECV//SRIO_RECV////配置成发送端或者接受端
#endif
#ifdef SRIO_SEND_ID
#define DEVICE_ID1_16BIT 0xBEEF//0xBEEF
#define DEVICE_ID1_8BIT 0x86//0xCD//0xABAB//66//
#define DEVICE_ID2_16BIT 0x4560//0x4560//
#define DEVICE_ID2_8BIT 0x8d//0XF1//0xAB//0xCDCD//99//
#define DEVICE_ID3_16BIT 0x1234
#define DEVICE_ID3_8BIT 0xf1
#define DEVICE_ID4_16BIT 0x5678
#define DEVICE_ID4_8BIT 0x56
#define DEVICE0_TYPE9_COS 0
#define DEVICE0_TYPE9_STREAMID 5
#define DEVICE1_TYPE9_COS 3
#define DEVICE1_TYPE9_STREAMID 10
#else
/* These are the device identifiers used in the test Application */
#define DEVICE_ID1_16BIT 0x4560
#define DEVICE_ID1_8BIT 0x8d//0xCD
#define DEVICE_ID2_16BIT 0xBEEF
#define DEVICE_ID2_8BIT 0x86//0xAB
#define DEVICE_ID3_16BIT 0x9abc
#define DEVICE_ID3_8BIT 0x12
#define DEVICE_ID4_16BIT 0xdef0
#define DEVICE_ID4_8BIT 0x56
#define DEVICE0_TYPE9_COS 3
#define DEVICE0_TYPE9_STREAMID 10
#define DEVICE1_TYPE9_COS 0
#define DEVICE1_TYPE9_STREAMID 5
#endif
#define SRIO_2p50 2
#define SRIO_1p25 1
#define SRIO_5p00 4
#define SRIO_3p15 3
#define SRIO_RATE SRIO_3p15
/**
* @brief
* Enumeration Type which describes the socket.
*
* @details
* There can be different kinds of SRIO sockets which can be used to
* send and receive data. These enumerations define the supported
* types.
*/
typedef enum Srio_SocketType
{
/**
* @brief Type9 Sockets
*/
Srio_SocketType_TYPE9 = 0x1,
/**
* @brief Type9 RAW Sockets
*/
Srio_SocketType_RAW_TYPE9 = 0x2,
/**
* @brief Type11 Sockets
*/
Srio_SocketType_TYPE11 = 0x3,
/**
* @brief Type11 RAW Sockets
*/
Srio_SocketType_RAW_TYPE11 = 0x4,
/**
* @brief Direct IO Socket.
*/
Srio_SocketType_DIO = 0x5,
Srio_SocketType_NULL = 0
}Srio_SocketType;
/**
* @brief
* SRIO Socket Type11 Address Information.
*
* @details
* The structure describes the address information required to send &
* receive a Type11 message over a Type11 socket. This is populated to
* indicate the remote endpoint where the message has to be sent.
*/
typedef struct sSrio_Type11AddrInfo
{
/**
* @brief Transport Type; 16 bit or 8 bit identifiers.
*/
uint16_t tt;
/**
* @brief This is the 8 bit or 16 bit SRIO identifier
*/
uint16_t id;
/**
* @brief Letter Identifier
*/
uint16_t letter;
/**
* @brief Mailbox number
*/
uint16_t mbox;
}Srio_Type11AddrInfo;
/**
* @brief
* SRIO Socket Type9 Information.
*
* @details
* The structure describes the address information required to send &
* receive a Type11 message over a Type11 socket. This is populated to
* indicate the remote endpoint where the message has to be sent.
*/
typedef struct sSrio_Type9AddrInfo
{
/**
* @brief Transport Type; 16 bit or 8 bit identifiers.
*/
uint16_t tt;
/**
* @brief This is the 8 bit or 16 bit SRIO identifier
*/
uint16_t id;
/**
* @brief Class of service
*/
uint8_t cos;
/**
* @brief Stream identifier.
*/
uint16_t streamId;
}Srio_Type9AddrInfo;
/**
* @brief
* SRIO Socket DIO Information
*
* @details
* The structure describes the DIO request which has to be sent to the remote
* endpoint.
*/
typedef struct sSrio_DioAddrInfo
{
/**
* @brief 32b Ext Address Fields 锟絇acket Types 2,5, and 6
*/
uint32_t rapidIOMSB;
/**
* @brief 32b Address 锟絇acket Types 2,5, and 6
*/
uint32_t rapidIOLSB;
/*
* @brief RapidIO destinationID field specifying target device
*/
uint16_t dstID;
/*
* @brief Transaction Type
*/
uint8_t ttype;
/*
* @brief FType for packets
*/
uint8_t ftype;
}Srio_DioAddrInfo;
/**
* @brief
* SRIO Socket Address Information
*
* @details
* The structure describes the various address socket type address characteristics
* which are used while sending & receiving data over the specific SRIO socket type.
*/
typedef union sSrio_SockAddrInfo
{
Srio_Type11AddrInfo type11;
Srio_Type9AddrInfo type9;
Srio_DioAddrInfo dio;
}Srio_SockAddrInfo;
/**
* @brief
* RIO Format Type
*
* @details
* This enumberation describes the SRIO Packet Ftype field which is present in the
* RIO packet. These are as per the Rapid IO Standard specifications.
*/
typedef enum
{
/*
* @brief Type 2 Packet Format (Request Class)
*/
Srio_Ftype_REQUEST = 2,
/*
* @brief Type 5 Packet Format (Write Class)
*/
Srio_Ftype_WRITE = 5,
/*
* @brief Type 6 Packet Format (Streaming Write Class)
*/
Srio_Ftype_SWRITE = 6,
/*
* @brief Type 7 Packet Format (Congestion Class)
*/
Srio_Ftype_CONGESTION = 7,
/*
* @brief Type 8 Packet Format (Maintenance)
*/
Srio_Ftype_MAINTENANCE = 8,
/*
* @brief Type 9 Packet Format (Data Streaming)
*/
Srio_Ftype_DATA_STREAMING = 9,
/*
* @brief Type 10 Packet Format (Doorbell)
*/
Srio_Ftype_DOORBELL = 10,
/*
* @brief Type 11 Packet Format (Doorbell)
*/
Srio_Ftype_MESSAGE = 11,
/*
* @brief Type 13 Packet Format Response)
*/
Srio_Ftype_RESPONSE = 13
} Srio_Ftype;
/**
* @brief
* RIO Transaction Type for Type5 Packet Format
*
* @details
* This enumberation describes the SRIO Packet Ttype field which is present in the
* RIO packet. These are as per the Rapid IO Standard specifications.
*/
typedef enum
{
/*
* @brief NWRITE Transaction
*/
Srio_Ttype_Write_NWRITE = 4,
/*
* @brief NWRITE_R Transaction
*/
Srio_Ttype_Write_NWRITE_R = 5,
/*
* @brief Atomic Test and Set Transaction
*/
Srio_Ttype_Write_ATOMIC_TEST_SET = 14
}Srio_Ttype_Write;
/**
* @brief
* SRIO Socket Type11 Binding Information.
*
* @details
* The structure describes the address information required for binding
* a Type11 socket. This includes information which describes the Type11
* endpoint characteristics and is used to describe the local characteristics
* of the endpoint.
*/
typedef struct sSrio_Type11BindAddrInfo
{
/**
* @brief Transport Type; 16 bit or 8 bit identifiers.
*/
uint16_t tt;
/**
* @brief This is the 8 bit or 16 bit SRIO identifier
*/
uint16_t id;
/**
* @brief Letter Identifier
*/
uint16_t letter;
/**
* @brief Mailbox number
*/
uint16_t mbox;
/**
* @brief Segmentation Mapping Set to 0 for single segment and 1 for multi segment.
*/
uint16_t segMap;
}Srio_Type11BindAddrInfo;
/**
* @brief
* SRIO Socket Type9 Binding Information.
*
* @details
* The structure describes the address information required for binding
* a Type9 socket. This includes information which describes the Type9
* endpoint characteristics and is used to describe the local characteristics
* of the endpoint.
*/
typedef Srio_Type9AddrInfo Srio_Type9BindAddrInfo;
/**
* @brief
* SRIO Socket DIO Binding Information.
*
* @details
* The structure describes the address information required for binding
* a DIO socket. This includes information which describes the DIO
* endpoint characteristics and is used to describe the local characteristics
* of the endpoint.
*/
typedef struct sSrio_DioBindAddrInfo
{
/**
* @brief Indicates if doorbell information needs to be sent out or not.
*/
uint8_t doorbellValid;
/**
* @brief CPU controlled request bit used for interrupt generation
*/
uint8_t intrRequest;
/**
* @brief Supress good interrupt.
*/
uint8_t supInt;
/**
* @brief RapidIO xambs field specifying extended address
*/
uint8_t xambs;
/**
* @brief Packet Priority
*/
uint8_t priority;
/*
* @brief Indicates the output port number for the packet to be transmitted
*/
uint8_t outPortID;
/*
* @brief RapidIO tt field specifying 8 or 16bit DeviceIDs
*/
uint8_t idSize;
/*
* @brief Defines which sourceID register to be used for this transaction
*/
uint8_t srcIDMap;
/*
* @brief RapidIO hop_count field specified for Type 8 Maintenance packets
*/
uint8_t hopCount;
/*
* @brief RapidIO doorbell info: This is the doorbell register which is to be written
* There are 4 registers so this should have a value from 0 - 3.
*/
uint8_t doorbellReg;
/*
* @brief RapidIO doorbell info: This is the doorbell bit which is to be set. There
* are 16 doorbell bits so this should have a value from 0-15.
*/
uint8_t doorbellBit;
}Srio_DioBindAddrInfo;
/**
* @brief
* SRIO Socket Bind Information
*
* @details
* There are different types of sockets and this union explains the different
* types of binding information required.
*/
typedef union sSrio_SockBindAddrInfo
{
Srio_Type11BindAddrInfo type11;
Srio_Type9BindAddrInfo type9;
Srio_DioBindAddrInfo dio;
}Srio_SockBindAddrInfo;
typedef struct srio_enumeration
{
int C6678_Num;
int C6678_EnumID[256];
int FPGA_Num;
int FPGA_EnumID[256];
}Srio_Enum;
/********************************************************************
* edma3部分
*******************************************************************/
typedef struct
{
Uint32 Addr; //传输原/目的地址
int Acnt; //A方向传输的长度(取值范围 为1 - 65535)
int Bcnt; //B方向传输的长度(取值范围 为1 - 65535)
int Ccnt; //C方向的传输的长度(取值范围 为1 - 65535)
int DAStride; //A方向的步进长度(取值范围为-32768 - +32767)
int DBStride; //B方向的步进长度(取值范围为-32768 - +32767)
}DmaTranParam;
typedef struct
{
Uint32 sAddr; //传输的源地址
Uint32 dAddr; //传输的目的地址,目的与源均为RAM;
Uint32 High; //数据矩阵纵向的长度
Uint32 Width; //数据矩阵横向的长度
Uint8 Unit; //数据元素的单位:=0:字; =1:双字; =x:(x-1)字
Bool Mod; //旋转的方向:=0:顺时针;=1:逆时针
Bool IntrEn; // =1:DMA中断使能,不等待DMA传输结束;=0:无DMA中断,等待DMA传输结束再退出;
// =其他值:无DMA中断,不等待DMA传输结束。
}DmaSortTranParam;
typedef struct
{
Uint32 ChannelCtrlNum; //DMA的控制器号
Uint32 ChannelNum; //DMA的通道号
Uint8 TCNum; //DMA的通道号对应的TC号
Int8 ShadowRegion; //该DMA通道对应的ShadowRegion
Uint32 FirstParamNum; //第一个PARAM号
Uint32 ExternalAddr; //外部地址
Uint32 PingAddr; //Ping buffer 地址
Uint32 PongAddr; //Pong buffer 地址
Uint32 BufferSize_KB; //buffer 的长度(单位:KB)
Bool Mod; //发送/接收
Bool DstIsFifo; //=1:目的为fifo;=0:源为fifo;=其他值:目的与源均为RAM;
}DmaPingPongInitParam;
typedef struct
{
Uint32 sAddr; //传输的源地址
Uint32 dAddr; //传输的目的地址
Uint32 High; //原数据矩阵纵向的长度
Uint32 Width; //原数据矩阵横向的长度
Uint32 Hoffset; //目标数据矩阵纵向的偏移量
Uint32 Woffset; //目标数据矩阵横向的偏移量
Uint32 Hlength; //目标数据矩阵纵向的长度
Uint32 Wlength; //目标数据矩阵纵向的长度
Bool Unit; //数据元素的单位:=0:字,=1:双字
Bool DstIsFifo; //=1:目的为fifo;=0:源为fifo;=其他值:目的与源均为RAM;
Bool IntrEn; // =1:DMA中断使能,不等待DMA传输结束;=0:无DMA中断,等待DMA传输结束再退出;
//=其他值:无DMA中断,不等待DMA传输结束。
}DmaSubFrameExtractTranParam;
typedef struct {
Uint32 infoL;
Uint32 infoH;
}Uint64edmaTccInfo;
typedef struct
{
Uint32 ChannelNum; //DMA的通道号
Uint32 ParamNum; //PARAM号
Uint8 TCNum; //该DMA通道对应的TC号
Int8 ShadowRegion; //该DMA通道对应的ShadowRegion
}DmaChainParam;
/********************************************************************
* timer部分
*******************************************************************/
typedef struct {
Uint32 CntLo;
Uint32 CntHi;
}Uint64Cnt;
typedef struct {
Uint32 PrdLo;
Uint32 PrdHi;
}Uint64Prd;
typedef struct {
Uint8 PrescaleCnt;
Uint8 PrescalePrd;
} Uint4Prescale;
/********************************************************************
* Hyperlink部分
*******************************************************************/
#define HYPERLINK_ADDR 0x40000000//本地hyperlink的地址空间
/*****************************************************************************
* Select a serial rate
*****************************************************************************/
#define hyplnk_EXAMPLE_SERRATE_01p250 1//1.25gbps
#define hyplnk_EXAMPLE_SERRATE_03p125 2//3.125gbps
#define hyplnk_EXAMPLE_SERRATE_06p250 3//6.25gbps
#define hyplnk_EXAMPLE_SERRATE_07p500 4//7.5gbps
#define hyplnk_EXAMPLE_SERRATE_10p000 5//10.00gbps
#define hyplnk_EXAMPLE_SERRATE_12p500 6//12.5gbps
#define hyplnk_EXAMPLE_SERRATE_05p000 7//5.00gbps
#define HYPLNK_RATE hyplnk_EXAMPLE_SERRATE_07p500//输出速率可改
/*****************************************************************************
* Match the reference clock on your board
*
* The value hyplnk_EXAMPLE_REFCLK_USE_PLATCFG uses the reference clock
* defined through hyplnk_EXAMPLE_HYPLNK_PLATCFG_REF_CLK_MHZ
* in hyplnkPlatCfg.h.
*
* hyplnk_EXAMPLE_REFCLK_USE_PLATCFG can be commented out and the specific
* value specified below.
*****************************************************************************/
//#define hyplnk_EXAMPLE_REFCLK_USE_PLATCFG
#define hyplnk_EXAMPLE_REFCLK_156p25//输入固定,不能改
//#define hyplnk_EXAMPLE_REFCLK_250p00
//#define hyplnk_EXAMPLE_REFCLK_312p50
typedef struct
{
Uint32 SegSize; //映射的每一个区域的大小
/************************
* 值:区域大小
* 0:0x400000(4MB)
* 1:0x800000(8MB)
* 2:0x1000000(16MB)
* 3:0x2000000(32MB)
* 4:0x4000000(64MB)
* 5:0x8000000(128MB)
* 6:0x10000000(256MB)
************************/
Uint32 SegSel[64]; //每一个区域首地址(必须是区域大小的整倍数)
}HyplnkAddrMapParam;
/********************************************************************
* navigator部分
*******************************************************************/
#define NAVIGATOR_SRIO_FLOWID_NUM0 9
#define NAVIGATOR_SRIO_FLOWID_NUM1 10
#define NAVIGATOR_SRIO_FLOWID_NUM2 11
/********************************************************************
* sem2部分(该部分不能改)
*******************************************************************/
#define CPPI_HW_SEM 1
#define QMSS_HW_SEM 2
#define SRIO_HW_SEM 3
#define RADAR_SPI_HW_SEM 4
#define SPI_SW_SEM 5
#define I2C_SW_SEM 6
#define EMIF16_SW_SEM 7
#define DDR_SW_SEM 8
#define PCIE_SW_SEM 9
#define HYPERLINK_SW_SEM 10
#define SRIO_SW_SEM 11
#define IPC_SW_SEM 12
#define SEM_MULTICORE_SYN 20
/********************************************************************
* intc部分(该部分不能改)
*******************************************************************/
//中断向量号
//#define HWINT_SRIO_MSG_RX 7
//#define HWINT_SRIO_DOORBELL 9
//#define HWINT_SRIO_OVER 8
//给每个核发送的中断对应的核级事件号
#define CIC0_OUT2_OR_CIC1_OUT2_EVTID 62
#define CIC0_OUT3_OR_CIC1_OUT3_EVTID 63
#define CIC0_OUT4_OR_CIC1_OUT4_EVTID 92
//通道对应核级事件号(所有核都有的)
#define CIC0_OUT0_OR_CIC1_OUT0_EVTID 102
#define CIC0_OUT1_OR_CIC1_OUT1_EVTID 103
#define CIC0_OUT8_OR_CIC1_OUT8_EVTID 104
#define CIC0_OUT9_OR_CIC1_OUT9_EVTID 105
#define CIC0_OUT16_OR_CIC1_OUT16_EVTID 106
#define CIC0_OUT17_OR_CIC1_OUT17_EVTID 107
#define CIC0_OUT24_OR_CIC1_OUT24_EVTID 108
#define CIC0_OUT25_OR_CIC1_OUT25_EVTID 109
//二级事件通道号
#define EDMA3_CONTROLLER_NUM0_CHANNEL_EVTID CIC0_OUT0_OR_CIC1_OUT0_EVTID
#define EDMA3_CONTROLLER_NUM0_CHANNELID 0
#define EDMA3_CONTROLLER_NUM1_CHANNEL_EVTID CIC0_OUT1_OR_CIC1_OUT1_EVTID
#define EDMA3_CONTROLLER_NUM1_CHANNELID 1
#define EDMA3_CONTROLLER_NUM2_CHANNEL_EVTID CIC0_OUT8_OR_CIC1_OUT8_EVTID
#define EDMA3_CONTROLLER_NUM2_CHANNELID 8
#define SRIO_OVER_CHANNEL_EVTID CIC0_OUT9_OR_CIC1_OUT9_EVTID
#define SRIO_OVER_CHANNELID 9
#define HYPER_INT_CHANNEL_EVTID CIC0_OUT16_OR_CIC1_OUT16_EVTID
#define HYPER_INT_CHANNELID 16
typedef struct {
unsigned int irp_value;
unsigned int nrp_value;
unsigned int pgie_value;
unsigned int itsr_value;
}InterrputRegInfo;
/********************************************************************
* other部分
*******************************************************************/
typedef struct {
Uint32 Low32bit;
Uint8 High4bit;
}Phy36bit;
/********************************************************************
函数声明
所在文件: drive_version.c
作者: qqb
函数名:
char *drive_version()
函数说明:
本函数是返回驱动库版本信息
参数说明:
无
返回值:
无
备注:
*********************************************************************/
char *drive_version();
/********************************************************************
文件说明: 以下这部分函数是pll.c中函数的声明
pll的相关操作
*********************************************************************/
/********************************************************************
函数声明
所在文件: pll.c
作者: wj
函数名:
Bool C6678_Pll_Init(unsigned int Pllm);
函数说明:
本函数是初始化pll
参数说明:
Pllm:
PLATFORM_PLL1_PLLM_val(具体值见c6678.h)
返回值:
true:初始化正常
false:初始化失败
备注: 无
*********************************************************************/
Bool C6678_Pll_Init(unsigned int Pll1Pllm);
/********************************************************************
函数声明
所在文件: pll.c
作者: wj
函数名:
void C6678_Pll_Delay(uint32_t num);
函数说明:
本函数是delay一段时间
参数说明:
num:delay多少个10ns
返回值:
true:初始化正常
false:初始化失败
备注: 无
*********************************************************************/
void C6678_Pll_Delay(uint32_t num);
/********************************************************************
文件说明: 以下这部分函数是ddr.c中函数的声明
ddr的相关操作
*********************************************************************/
/********************************************************************
函数声明
所在文件: ddr.c
作者: wj
函数名:
Bool C6678_Ddr3_Init(int Ddr3Pllm,int Ddr3Type);
函数说明:
本函数是初始化ddr
参数说明:
Ddr3Pllm:
PLLM_DDR3(具体值见c6678.h)
Ddr3Type:
DDR3_TYPE(具体值见c6678.h)
返回值:
true:初始化正常
false:初始化失败
备注: 无
*********************************************************************/
Bool C6678_Ddr3_Init(int Ddr3Pllm,int Ddr3Type);
/********************************************************************
函数声明
所在文件: ddr.c
作者: wj
函数名:
Bool C6678_Ddr3_MapSelect(Uint32 MapIndex);
函数说明:
本函数是将内存的0x80000000到0xffffffff的2GB内存空间映射到外挂的DDR3的不同的区域
参数说明:
MapIndex:外挂DDR3的区域号(0~3)目前外挂ddr3的大小最大为8GB
MapIndex值 内存地址 外挂DDR3的区域地址
0 0x80000000到0xffffffff 0x000000000到0x07fffffff
1 0x80000000到0xffffffff 0x080000000到0x0ffffffff
2 0x80000000到0xffffffff 0x100000000到0x17fffffff
3 0x80000000到0xffffffff 0x180000000到0x1ffffffff
返回值:
true:初始化正常
false:初始化失败
备注: 无
*********************************************************************/
Bool C6678_Ddr3_MapSelect(Uint32 MapIndex);
/********************************************************************
文件说明: 以下这部分函数是timecounter.c中函数的声明
timecounter的相关操作
*********************************************************************/
/********************************************************************
函数声明
所在文件: timecounter.c
作者: wj
函数名:
void C6678_TimeCounter_Enable(void);
函数说明:
本函数是使时钟计时开始
参数说明:
无
返回值: