From eeea4ea53abf2ee14b5b68dd888f011eb32bf3a3 Mon Sep 17 00:00:00 2001 From: Andriy Gelman Date: Sat, 11 May 2024 17:45:18 -0400 Subject: [PATCH] drivers: flash: spi_nor: Set 4-byte addr mode via Bank Addr Reg Some flash devices enable entering the 4-byte address mode by setting BIT(7) in the Bank Address register (0x17). The support for this method is indicated in BIT(3) of Enter 4-Byte Addressing byte in 16th DWORD of the JEDEC Basic Flash Parameter Table. Infineon's S25FL512S is an example flash device with this feature. Signed-off-by: Andriy Gelman --- drivers/flash/spi_nor.c | 22 ++++++++++++++++------ drivers/flash/spi_nor.h | 1 + 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/flash/spi_nor.c b/drivers/flash/spi_nor.c index 236955887ab1f36..13c0ca9aaa2e55d 100644 --- a/drivers/flash/spi_nor.c +++ b/drivers/flash/spi_nor.c @@ -1093,14 +1093,23 @@ static int spi_nor_set_address_mode(const struct device *dev, } /* This currently only supports command 0xB7 (Enter 4-Byte - * Address Mode), with or without preceding WREN. + * Address Mode), with or without preceding WREN. Or by setting BIT(7) + * in the Bank Address Register 0x17, when BIT(3) in enter_4byte_addr + * is set. */ - if ((enter_4byte_addr & 0x03) == 0) { + if ((enter_4byte_addr & 0x0b) == 0) { return -ENOTSUP; } acquire_device(dev); + if ((enter_4byte_addr & 0x08) != 0) { + uint8_t sr = BIT(7); + + ret = spi_nor_access(dev, SPI_NOR_CMD_BRWR, NOR_ACCESS_WRITE, 0, &sr, sizeof(sr)); + goto done; + } + if ((enter_4byte_addr & 0x02) != 0) { /* Enter after WREN. */ ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_WREN); @@ -1108,12 +1117,13 @@ static int spi_nor_set_address_mode(const struct device *dev, if (ret == 0) { ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_4BA); + } - if (ret == 0) { - struct spi_nor_data *data = dev->data; +done: + if (ret == 0) { + struct spi_nor_data *data = dev->data; - data->flag_access_32bit = true; - } + data->flag_access_32bit = true; } release_device(dev); diff --git a/drivers/flash/spi_nor.h b/drivers/flash/spi_nor.h index 5f38c98289f886e..e0e66ce82eee7b1 100644 --- a/drivers/flash/spi_nor.h +++ b/drivers/flash/spi_nor.h @@ -35,6 +35,7 @@ #define SPI_NOR_CMD_PP_1_1_4 0x32 /* Quad Page program (1-1-4) */ #define SPI_NOR_CMD_PP_1_4_4 0x38 /* Quad Page program (1-4-4) */ #define SPI_NOR_CMD_RDCR 0x15 /* Read control register */ +#define SPI_NOR_CMD_BRWR 0x17 /* Bank address register write */ #define SPI_NOR_CMD_SE 0x20 /* Sector erase */ #define SPI_NOR_CMD_SE_4B 0x21 /* Sector erase 4 byte address*/ #define SPI_NOR_CMD_BE_32K 0x52 /* Block erase 32KB */