From cf41d269f4b0466b343ba3a234cca9aa27712a67 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Tue, 27 Feb 2024 17:15:13 +0100 Subject: [PATCH] ADSP: align a variable on a cache-line size border power_down() locks the cache line, containing the address, passed to the function in its second argument. However, current builds cause an "alloca" DSP exception when trying to lock that cache line. Aligning that variable on a cache-line size border fixes the problem. Signed-off-by: Guennadi Liakhovetski --- soc/xtensa/intel_adsp/ace/power.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/soc/xtensa/intel_adsp/ace/power.c b/soc/xtensa/intel_adsp/ace/power.c index 02646e1614cee5..6494e5c1cb0fa9 100644 --- a/soc/xtensa/intel_adsp/ace/power.c +++ b/soc/xtensa/intel_adsp/ace/power.c @@ -303,7 +303,7 @@ void pm_state_set(enum pm_state state, uint8_t substate_id) (void *)rom_entry; sys_cache_data_flush_range(imr_layout, sizeof(*imr_layout)); #endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */ - uint32_t hpsram_mask = 0; + uint32_t hpsram_mask __aligned(64) = 0; #ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM /* turn off all HPSRAM banks - get a full bitmap */ uint32_t ebb_banks = ace_hpsram_get_bank_count();