From 7802fffc7f2a1cc3be5ac660e4b53293b3cce730 Mon Sep 17 00:00:00 2001 From: Jimmy Zheng Date: Mon, 8 Jul 2024 13:43:34 +0800 Subject: [PATCH] drivers: interrupt_controller: nuclei_eclic: do not modifiy trap entry RISC-V trap entry is handled in soc/common/riscv-privileged/vector.S. Remove the redundant modification in CLIC driver. Signed-off-by: Jimmy Zheng --- drivers/interrupt_controller/intc_nuclei_eclic.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/interrupt_controller/intc_nuclei_eclic.c b/drivers/interrupt_controller/intc_nuclei_eclic.c index 265b584bbe1a60..6915338de6b7d4 100644 --- a/drivers/interrupt_controller/intc_nuclei_eclic.c +++ b/drivers/interrupt_controller/intc_nuclei_eclic.c @@ -83,9 +83,6 @@ struct CLICCTRL { volatile uint8_t INTCTRL; }; -/** ECLIC Mode mask for MTVT CSR Register */ -#define ECLIC_MODE_MTVEC_Msk 3U - /** CLIC INTATTR: TRIG Mask */ #define CLIC_INTATTR_TRIG_Msk 0x3U @@ -178,8 +175,6 @@ static int nuclei_eclic_init(const struct device *dev) ECLIC_CTRL[i] = (struct CLICCTRL) { 0 }; } - csr_write(mtvec, ((csr_read(mtvec) & 0xFFFFFFC0) | ECLIC_MODE_MTVEC_Msk)); - nlbits = ECLIC_CFG.b.nlbits; intctlbits = ECLIC_INFO.b.intctlbits; max_prio = mask8(intctlbits - nlbits);