From 8820501653adcc02a1ae7dd5be4f91d9c19bf3fb Mon Sep 17 00:00:00 2001
From: serge-sans-paille <serge.guelton@telecom-bretagne.eu>
Date: Mon, 26 Feb 2024 20:15:37 +0100
Subject: [PATCH] arm-support

---
 include/xsimd/arch/xsimd_neon.hpp | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp
index 54f09fb66..2c3fb1aef 100644
--- a/include/xsimd/arch/xsimd_neon.hpp
+++ b/include/xsimd/arch/xsimd_neon.hpp
@@ -744,6 +744,24 @@ namespace xsimd
             return dispatcher.apply(register_type(lhs), register_type(rhs));
         }
 
+        /*******
+         * avg *
+         *******/
+
+        WRAP_BINARY_INT_EXCLUDING_64(vrhaddq, detail::identity_return_type)
+
+        template <class A, class T, detail::exclude_int64_neon_t<T> = 0>
+        inline batch<T, A> avg(batch<T, A> const& lhs, batch<T, A> const& rhs, requires_arch<neon>) noexcept
+        {
+            using register_type = typename batch<T, A>::register_type;
+            const detail::neon_dispatcher::binary dispatcher = {
+                std::make_tuple(wrap::vrhaddq_u8, wrap::vrhaddq_s8, wrap::vrhaddq_u16, wrap::vrhaddq_s16,
+                                wrap::vrhaddq_u32, wrap::vrhaddq_s32)
+            };
+            return dispatcher.apply(register_type(lhs), register_type(rhs));
+        }
+
+
         /********
          * sadd *
          ********/