From 69235677e505c6cd419b50d7930b9c7008ee0c00 Mon Sep 17 00:00:00 2001 From: William Durand Date: Tue, 21 Dec 2021 16:00:24 +0100 Subject: [PATCH] build: do not depend on `nasm` anymore --- Makefile | 5 +- README.md | 3 +- src/kernel/arch/aarch32/Makefile.include | 1 - src/kernel/arch/aarch64/Makefile.include | 1 - src/kernel/arch/x86_64/Makefile.include | 10 +- src/kernel/arch/x86_64/asm/boot.asm | 414 +++++++++--------- src/kernel/arch/x86_64/asm/isr.asm | 92 ++-- src/kernel/arch/x86_64/asm/k_syscall.asm | 13 +- .../arch/x86_64/asm/multiboot_header.asm | 64 +-- src/kernel/arch/x86_64/asm/proc.asm | 7 +- src/kernel/arch/x86_64/linker.ld | 10 +- src/libc/asm/x86_64/crt0.asm | 17 +- src/libc/asm/x86_64/syscall.asm | 18 +- tools/install-linux-deps | 1 - 14 files changed, 327 insertions(+), 329 deletions(-) diff --git a/Makefile b/Makefile index 32a4bc0bb..676841b5d 100644 --- a/Makefile +++ b/Makefile @@ -306,7 +306,7 @@ $(kernel): $(linker_ld) $(libk_asm_objects) $(libk_c_objects) $(libk_extra_objec $(libk_asm_objects): $(libk_objs_dir)/%.o: %.asm $(progress) "CC" $< $(MKDIR) -p $(dir $@) - $(ASM) $(KERNEL_ASM_FLAGS) $< -o $@ + $(CC) $(KERNEL_ASM_FLAGS) $< -o $@ $(libk_c_objects): $(libk_objs_dir)/%.o: %.c $(progress) "CC" $< @@ -321,7 +321,7 @@ $(libc_c_objects): $(lib_objs_dir)/%.o: %.c $(libc_asm_objects): $(lib_objs_dir)/%.o: %.asm $(progress) "CC" $< $(MKDIR) -p $(dir $@) - $(ASM) $(LIBC_ASM_FLAGS) $< -o $@ + $(CC) $(LIBC_ASM_FLAGS) $< -o $@ $(libc): $(libc_asm_objects) $(libc_c_objects) | $(dist_dir) $(progress) "AR" $@ @@ -409,7 +409,6 @@ fmt: ## automatically format the code with clang-format version: ## print tool versions $(CC) --version - $(ASM) --version $(LD) --version $(AR) --version $(QEMU) --version diff --git a/README.md b/README.md index ed9bcf6a8..6dc032f6c 100644 --- a/README.md +++ b/README.md @@ -65,7 +65,6 @@ The following dependencies are required to build this project: If you want to work on the `x86_64` architecture, you'll need the following extra dependencies: -- `nasm` - `grub-mkrescue` - `xorriso` @@ -134,7 +133,7 @@ depending on the architecture and board configured. Install [Homebrew](https://brew.sh/), then run the following commands: ``` -$ brew install nasm xorriso qemu llvm u-boot-tools +$ brew install xorriso qemu llvm u-boot-tools ``` #### Linux diff --git a/src/kernel/arch/aarch32/Makefile.include b/src/kernel/arch/aarch32/Makefile.include index 9ad88e4cb..edd73a47b 100644 --- a/src/kernel/arch/aarch32/Makefile.include +++ b/src/kernel/arch/aarch32/Makefile.include @@ -14,7 +14,6 @@ log_file = $(log_dir)/$(ARCH)-$(BOARD)-$(BUILD_MODE).log QEMU = qemu-system-arm ARM_GCC = arm-none-eabi-gcc -ASM = $(CC) ############################################################################### # Options for the different tools diff --git a/src/kernel/arch/aarch64/Makefile.include b/src/kernel/arch/aarch64/Makefile.include index 544bd0d18..f179ac433 100644 --- a/src/kernel/arch/aarch64/Makefile.include +++ b/src/kernel/arch/aarch64/Makefile.include @@ -13,7 +13,6 @@ log_file = $(log_dir)/$(ARCH)-$(BOARD)-$(BUILD_MODE).log ############################################################################### QEMU = qemu-system-aarch64 -ASM = $(CC) ############################################################################### # Options for the different tools diff --git a/src/kernel/arch/x86_64/Makefile.include b/src/kernel/arch/x86_64/Makefile.include index f9e963a14..80630f2f6 100644 --- a/src/kernel/arch/x86_64/Makefile.include +++ b/src/kernel/arch/x86_64/Makefile.include @@ -20,7 +20,6 @@ vbe_bpp = 32 # Tools ############################################################################### -ASM = nasm QEMU = qemu-system-x86_64 ############################################################################### @@ -60,14 +59,15 @@ libk_extra_objects += $(kernel_console_font) # Flags ############################################################################### -LD_TARGET = elf_x86_64 -LIBC_ASM_FLAGS += -f elf64 -LIBC_CFLAGS += --target=x86_64 -fstack-protector-strong +X86_64_CFLAGS += --target=x86_64 +LIBC_ASM_FLAGS += -c $(X86_64_CFLAGS) +LIBC_CFLAGS += $(X86_64_CFLAGS) -fstack-protector-strong LIBC_CFLAGS += -mno-mmx -mno-sse -mno-sse2 -mno-avx -mno-avx2 -KERNEL_ASM_FLAGS += -f elf64 +KERNEL_ASM_FLAGS += -c $(X86_64_CFLAGS) KERNEL_ASM_FLAGS += -dVBE_WIDTH=$(vbe_width) -dVBE_HEIGHT=$(vbe_height) -dVBE_BPP=$(vbe_bpp) KERNEL_CFLAGS += -mno-red-zone KERNEL_INCLUDES += -I$(external_dir)/scalable-font2/ +LD_TARGET = elf_x86_64 ############################################################################### # Arch-specific targets diff --git a/src/kernel/arch/x86_64/asm/boot.asm b/src/kernel/arch/x86_64/asm/boot.asm index 9c2823167..50f38cb14 100644 --- a/src/kernel/arch/x86_64/asm/boot.asm +++ b/src/kernel/arch/x86_64/asm/boot.asm @@ -1,31 +1,33 @@ -; The content of this file is based on two projects: -; -; 1. intermezzOS [1], released under the MIT license - Copyright (c) 2016 -; intermezzOS Developer -; 2. Philipp Oppermann's OS [2], released under the MIT License - Copyright -; (c) 2019 Philipp Oppermann -; -; [1]: https://intermezzos.github.io/book/first-edition/hello-world.html -; [2]: https://os.phil-opp.com/edition-1/ - -global start ; exports a label (makes it public). As start will be the entry - ; point of our kernel, it needs to be public. -global gdt64 ; exports the GDT as well -global tss ; ...and the TSS - -section .text ; executable code -bits 32 ; specifies that the following lines are 32-bit instructions. - ; It's needed because the CPU is still in Protected mode when - ; GRUB starts our kernel. When we switch to Long mode, we can - ; use bits 64 (64-bit instructions). +// The content of this file is based on two projects: +// +// 1. intermezzOS [1], released under the MIT license - Copyright (c) 2016 +// intermezzOS Developer +// 2. Philipp Oppermann's OS [2], released under the MIT License - Copyright +// (c) 2019 Philipp Oppermann +// +// [1]: https://intermezzos.github.io/book/first-edition/hello-world.html +// [2]: https://os.phil-opp.com/edition-1/ + +.intel_syntax noprefix + +.global start // exports a label (makes it public). As start will be the entry + // point of our kernel, it needs to be public. +.global gdt64 // exports the GDT as well +.global tss // ...and the TSS + +.section ".text" // executable code +.code32 // specifies that the following lines are 32-bit instructions. + // It's needed because the CPU is still in Protected mode when + // GRUB starts our kernel. When we switch to Long mode, we can + // use .code64 (64-bit instructions). start: - mov esp, stack_top + mov esp, offset stack_top mov ebp, 0 - ; `ebx` points to a boot information structure. We move it to `edi` to - ; pass it to our kernel. + // `ebx` points to a boot information structure. We move it to `edi` to + // pass it to our kernel. mov edi, ebx - ; various checks before we can move on. + // various checks before we can move on. call check_multiboot call check_cpuid call check_long_mode @@ -33,262 +35,258 @@ start: call set_up_page_tables call enable_paging - ; load the 64-bit GDT - lgdt [gdt64.pointer] + // load the 64-bit GDT + lgdt gdt64.pointer - jmp gdt64.kernel_code:long_mode_start - - ; Should not be reached. - hlt + // far-return to go to long mode + push offset gdt64.kernel_code + mov eax, offset long_mode_start + push eax + retf -; ----------------------------------------------------------------------------- -; make sure the kernel was really loaded by a Multiboot compliant bootloader -%define MULTIBOOT2_MAGIC_VALUE 0x36d76289 +// ----------------------------------------------------------------------------- +// make sure the kernel was really loaded by a Multiboot compliant bootloader +.equ MULTIBOOT2_MAGIC_VALUE, 0x36d76289 check_multiboot: cmp eax, MULTIBOOT2_MAGIC_VALUE - jne .no_multiboot + jne no_multiboot ret -.no_multiboot: - mov al, "0" +no_multiboot: + mov al, '0' jmp error -; ----------------------------------------------------------------------------- -; CPUID check -; cf. http://wiki.osdev.org/Setting_Up_Long_Mode#Detection_of_CPUID +// ----------------------------------------------------------------------------- +// CPUID check +// cf. http://wiki.osdev.org/Setting_Up_Long_Mode#Detection_of_CPUID check_cpuid: - ; Check if CPUID is supported by attempting to flip the ID bit (bit 21) - ; in the FLAGS register. If we can flip it, CPUID is available. + // Check if CPUID is supported by attempting to flip the ID bit (bit 21) + // in the FLAGS register. If we can flip it, CPUID is available. - ; Copy FLAGS in to EAX via stack + // Copy FLAGS in to EAX via stack pushfd pop eax - ; Copy to ECX as well for comparing later on + // Copy to ECX as well for comparing later on mov ecx, eax - ; Flip the ID bit + // Flip the ID bit xor eax, 1 << 21 - ; Copy EAX to FLAGS via the stack + // Copy EAX to FLAGS via the stack push eax popfd - ; Copy FLAGS back to EAX (with the flipped bit if CPUID is supported) + // Copy FLAGS back to EAX (with the flipped bit if CPUID is supported) pushfd pop eax - ; Restore FLAGS from the old version stored in ECX (i.e. flipping the ID - ; bit back if it was ever flipped). + // Restore FLAGS from the old version stored in ECX (i.e. flipping the ID + // bit back if it was ever flipped). push ecx popfd - ; Compare EAX and ECX. If they are equal then that means the bit wasn't - ; flipped, and CPUID isn't supported. + // Compare EAX and ECX. If they are equal then that means the bit wasn't + // flipped, and CPUID isn't supported. cmp eax, ecx - je .no_cpuid + je no_cpuid ret -.no_cpuid: - mov al, "1" +no_cpuid: + mov al, '1' jmp error -; ----------------------------------------------------------------------------- -; Long Mode check +// ----------------------------------------------------------------------------- +// Long Mode check check_long_mode: - ; test if extended processor info in available - mov eax, 0x80000000 ; implicit argument for cpuid - cpuid ; get highest supported argument - cmp eax, 0x80000001 ; it needs to be at least 0x80000001 - jb .no_long_mode ; if it's less, the CPU is too old for long mode - - ; use extended info to test if long mode is available - mov eax, 0x80000001 ; argument for extended processor info - cpuid ; returns various feature bits in ecx and edx - test edx, 1 << 29 ; test if the LM-bit is set in the D-register - jz .no_long_mode ; If it's not set, there is no long mode + // test if extended processor info in available + mov eax, 0x80000000 // implicit argument for cpuid + cpuid // get highest supported argument + cmp eax, 0x80000001 // it needs to be at least 0x80000001 + jb no_long_mode // if it's less, the CPU is too old for long mode + + // use extended info to test if long mode is available + mov eax, 0x80000001 // argument for extended processor info + cpuid // returns various feature bits in ecx and edx + test edx, 1 << 29 // test if the LM-bit is set in the D-register + jz no_long_mode // If it's not set, there is no long mode ret -.no_long_mode: - mov al, "2" +no_long_mode: + mov al, '2' jmp error -; ----------------------------------------------------------------------------- -; Paging: we identity map the first gigabyte of our kernel with 512 2MiB pages. -; See: https://os.phil-opp.com/entering-longmode/#paging +// ----------------------------------------------------------------------------- +// Paging: we identity map the first gigabyte of our kernel with 512 2MiB pages. +// See: https://os.phil-opp.com/entering-longmode/#paging set_up_page_tables: - ; See: https://os.phil-opp.com/page-tables/#implementation - mov eax, p4_table - or eax, 11b ; present + writable + // See: https://os.phil-opp.com/page-tables/#implementation + mov eax, offset p4_table + or eax, 0b11 // present + writable mov [p4_table + 511 * 8], eax - ; Point the first entry of the level 4 page table to the first entry in the - ; p3 table. - mov eax, p3_table - or eax, 11b ; present + writable - mov dword [p4_table], eax - - ; Point the first entry of the level 3 page table to the first entry in the - ; p2 table. - mov eax, p2_table - or eax, 11b ; present + writable - mov dword [p3_table], eax - - ; Point each page table level two entry to a page. - mov ecx, 0 ; counter variable -.map_p2_table: - ; Map ecx-th P2 entry to a huge page that starts at address 2MiB*ecx. - mov eax, 0x200000 ; 2MiB - mul ecx ; start address of ecx-th page - or eax, 10000011b ; present + writable + huge - mov [p2_table + ecx * 8], eax ; map ecx-th entry - - inc ecx ; increase counter - cmp ecx, 512 ; if counter == 512, the whole P2 table is mapped - jne .map_p2_table ; else map the next entry + // Point the first entry of the level 4 page table to the first entry in the + // p3 table. + mov eax, offset p3_table + or eax, 0b11 // present + writable + mov [p4_table], eax + + // Point the first entry of the level 3 page table to the first entry in the + // p2 table. + mov eax, offset p2_table + or eax, 0b11 // present + writable + mov [p3_table], eax + + // Point each page table level two entry to a page. + mov ecx, 0 // counter variable +map_p2_table: + // Map ecx-th P2 entry to a huge page that starts at address 2MiB*ecx. + mov eax, 0x200000 // 2MiB + mul ecx // start address of ecx-th page + or eax, 0b10000011 // present + writable + huge + mov [p2_table + ecx * 8], eax // map ecx-th entry + + inc ecx // increase counter + cmp ecx, 512 // if counter == 512, the whole P2 table is mapped + jne map_p2_table // else map the next entry ret -; ----------------------------------------------------------------------------- -; Enable paging to enter long-mode. +// ----------------------------------------------------------------------------- +// Enable paging to enter long-mode. enable_paging: - ; load P4 to cr3 register (cpu uses this to access the P4 table) - mov eax, p4_table + // load P4 to cr3 register (cpu uses this to access the P4 table) + mov eax, offset p4_table mov cr3, eax - ; enable PAE-flag in cr4 (Physical Address Extension) + // enable PAE-flag in cr4 (Physical Address Extension) mov eax, cr4 or eax, 1 << 5 mov cr4, eax - ; set the long mode bit in the EFER MSR (model specific register) + // set the long mode bit in the EFER MSR (model specific register) mov ecx, 0xC0000080 rdmsr or eax, 1 << 8 wrmsr - ; enable paging in the cr0 register + // enable paging in the cr0 register mov eax, cr0 or eax, 1 << 31 mov cr0, eax ret -; ----------------------------------------------------------------------------- -; Prints `ERR: ` and the given error code to screen and hangs. -; -; Parameter: error code (in ascii) in al -; -; 0 = no multiboot -; 1 = no CPUID -; 2 = no long mode +// ----------------------------------------------------------------------------- +// Prints `ERR: ` and the given error code to screen and hangs. +// +// Parameter: error code (in ascii) in al +// +// 0 = no multiboot +// 1 = no CPUID +// 2 = no long mode error: - mov dword [0xb8000], 0x4f524f45 - mov dword [0xb8004], 0x4f3a4f52 - mov dword [0xb8008], 0x4f204f20 - mov byte [0xb800a], al + mov dword ptr [0xb8000], 0x4f524f45 + mov dword ptr [0xb8004], 0x4f3a4f52 + mov dword ptr [0xb8008], 0x4f204f20 + mov byte ptr [0xb800a], al hlt -; ----------------------------------------------------------------------------- -section .bss -; This ensures that the page tables are page aligned. -align 4096 +// ----------------------------------------------------------------------------- +.section ".bss" +// This ensures that the page tables are page aligned. +.align 4096 p4_table: - ; `resb` means 'reserves bytes' - resb 4096 + .space 4096 p3_table: - resb 4096 + .space 4096 p2_table: - resb 4096 -; cf. http://os.phil-opp.com/allocating-frames.html -; the stack now has 64kB + .space 4096 stack_bottom: - resb 4096 * 16 +// cf. http://os.phil-opp.com/allocating-frames.html +// the stack now has 64kB + .space 4096 * 16 stack_top: -; ----------------------------------------------------------------------------- -section .data +// ----------------------------------------------------------------------------- +.section ".data" -; The processor is still in a 32-bit compatibility submode. To actually execute -; 64-bit code, we need to set up a new Global Descriptor Table. +// The processor is still in a 32-bit compatibility submode. To actually execute +// 64-bit code, we need to set up a new Global Descriptor Table. gdt64: - ; .null_1 / 0x00 - dq 0 -.kernel_code: equ $ - gdt64 ; 0x08 - dw 0 - dw 0 - db 0 - db 10011010b - db 10100000b - db 0 -.kernel_data: equ $ - gdt64 ; 0x10 - dw 0 - dw 0 - db 0 - db 10010010b - db 10000000b - db 0 -.null_2: equ $ - gdt64 ; 0x18 - dq 0 -.user_data: equ $ - gdt64 ; 0x20 - dw 0 - dw 0 - db 0 - db 11110010b - db 10000000b - db 0 -.user_code: equ $ - gdt64 ; 0x28 - dw 0 - dw 0 - db 0 - db 11111010b - db 10100000b - db 0 -.tss: equ $ - gdt64 ; 0x30 - ; We only set type and flags below. Other values will be set in `tss_init()`. - ; low - dw 0 ; limit 15:0 - dw 0 ; base 15:0 - db 0 ; base 23:16 - db 10001001b ; type - db 10100000b ; limit 19:16 and flags - db 0 ; base 31:24 - ; high - dq 0 -.pointer: - dw .pointer - gdt64 - 1 - dq gdt64 - -; TSS + // .null_1 / 0x00 + .quad 0 +gdt64.kernel_code = . - gdt64 // 0x08 + .word 0 + .word 0 + .byte 0 + .byte 0b10011010 + .byte 0b10100000 + .byte 0 +gdt64.kernel_data = . - gdt64 // 0x10 + .word 0 + .word 0 + .byte 0 + .byte 0b10010010 + .byte 0b10000000 + .byte 0 +gdt64.null_2 = . - gdt64 // 0x18 + .quad 0 +gdt64.user_data = . - gdt64 // 0x20 + .word 0 + .word 0 + .byte 0 + .byte 0b11110010 + .byte 0b10000000 + .byte 0 +gdt64.user_code = . - gdt64 // 0x28 + .word 0 + .word 0 + .byte 0 + .byte 0b11111010 + .byte 0b10100000 + .byte 0 +gdt64.tss = . - gdt64 // 0x30 + // We only set type and flags below. Other values will be set in `tss_init()`. + // low + .word 0 // limit 15:0 + .word 0 // base 15:0 + .byte 0 // base 23:16 + .byte 0b10001001 // type + .byte 0b10100000 // limit 19:16 and flags + .byte 0 // base 31:24 + // high + .quad 0 +gdt64.pointer: + .word gdt64.pointer - gdt64 - 1 + .quad gdt64 + +// TSS tss: -; We don't load the TSS right now, we create it here and we'll finish the -; initialization in `tss_init()`. -.base: equ 0 - dd 0 ; reserved0 - dq 0 ; rsp0 (Privilege Stack Table) - dq 0 ; rsp1 - dq 0 ; rsp2 - dq 0 ; reserved1 - dq 0 ; ist1 (Interrupt Stack Table) - dq 0 ; ist2 - dq 0 ; ist3 - dq 0 ; ist4 - dq 0 ; ist5 - dq 0 ; ist6 - dq 0 ; ist7 - dq 0 ; reserved2 - dw 0 ; reserved3 - dw 0 ; iopb_offset (I/O Map Base Address) -.size: equ $ - tss - -; ----------------------------------------------------------------------------- -; 64-bit code below -extern kmain - -section .text -bits 64 +// We don't load the TSS right now, we create it here and we'll finish the +// initialization in `tss_init()`. + .long 0 // reserved0 + .quad 0 // rsp0 (Privilege Stack Table) + .quad 0 // rsp1 + .quad 0 // rsp2 + .quad 0 // reserved1 + .quad 0 // ist1 (Interrupt Stack Table) + .quad 0 // ist2 + .quad 0 // ist3 + .quad 0 // ist4 + .quad 0 // ist5 + .quad 0 // ist6 + .quad 0 // ist7 + .quad 0 // reserved2 + .word 0 // reserved3 + .word 0 // iopb_offset (I/O Map Base Address) + +// ----------------------------------------------------------------------------- +// 64-bit code below +.section ".text" +.code64 long_mode_start: - ; load 0 into all data segment registers + // load 0 into all data segment registers mov ax, 0 mov ss, ax mov ds, ax @@ -298,6 +296,6 @@ long_mode_start: call kmain - ; Should not happen. + // Should not happen. cli hlt diff --git a/src/kernel/arch/x86_64/asm/isr.asm b/src/kernel/arch/x86_64/asm/isr.asm index d0af2ff7e..5b8cf2a9c 100644 --- a/src/kernel/arch/x86_64/asm/isr.asm +++ b/src/kernel/arch/x86_64/asm/isr.asm @@ -1,52 +1,54 @@ -; The code samples from "The little book about OS development" - which is where -; the macros in this file are coming from - are in the public domain. -%macro def_exception_handler 1 - global exc%1 - exc%1: +.intel_syntax noprefix + +// The code samples from "The little book about OS development" - which is where +// the macros in this file are coming from - are in the public domain. +.macro def_exception_handler, id + .global "exc\id" + exc\id: cli - push dword 0 - push dword %1 + push 0 + push \id jmp int_common_stub -%endmacro +.endm -; See: https://github.com/littleosbook/littleosbook/blob/e90faeb24c5c9fed8cde9a35974893706e81cbbf/interrupts.md -; -; +------------+ -; +40 | %SS | -; +32 | %RSP | -; +24 | %CPU FLAGS | -; +16 | %CS | -; +8 | %IP | -; 0 | ERROR CODE | <-- %RSP -; +------------+ -; -%macro def_exception_handler_err 1 - global exc%1 - exc%1: +// See: https://github.com/littleosbook/littleosbook/blob/e90faeb24c5c9fed8cde9a35974893706e81cbbf/interrupts.md +// +// +------------+ +// +40 | %SS | +// +32 | %RSP | +// +24 | %CPU FLAGS | +// +16 | %CS | +// +8 | %IP | +// 0 | ERROR CODE | <-- %RSP +// +------------+ +// +.macro def_exception_handler_err, id + .global "exc\id" + exc\id: cli - push dword %1 + push \id jmp int_common_stub -%endmacro +.endm -%macro def_irq_handler 1 - global irq%1 - irq%1: +.macro def_irq_handler, id + .global "irq\id" + irq\id: cli - push dword 0 - push dword (32 + %1) + push 0 + push (32 + \id) jmp irq_common_stub -%endmacro +.endm -%macro def_int_handler 1 - global int%1 - int%1: +.macro def_int_handler, id + .global "int\id" + int\id: cli - push dword 0 - push dword %1 + push 0 + push \id jmp int_common_stub -%endmacro +.endm -%macro save_registers 0 +.macro save_registers push rax push rbx push rcx @@ -62,9 +64,9 @@ push r13 push r14 push r15 -%endmacro +.endm -%macro restore_registers 0 +.macro restore_registers pop r15 pop r14 pop r13 @@ -80,11 +82,10 @@ pop rcx pop rbx pop rax -%endmacro +.endm int_common_stub: save_registers - extern isr_int_handler call isr_int_handler restore_registers add rsp, 16 @@ -93,15 +94,14 @@ int_common_stub: irq_common_stub: save_registers - extern isr_irq_handler call isr_irq_handler restore_registers add rsp, 16 sti iretq -; define exceptions -; should be keep in sync with src/arch/x86_64/core/isr.h +// define exceptions +// should be keep in sync with src/arch/x86_64/core/isr.h def_exception_handler 0 def_exception_handler 1 def_exception_handler 2 @@ -135,8 +135,8 @@ def_exception_handler 29 def_exception_handler 30 def_exception_handler 31 -; define hardware interrupts -; should be keep in sync with src/arch/x86_64/core/isr.h +// define hardware interrupts +// should be keep in sync with src/arch/x86_64/core/isr.h def_irq_handler 0 def_irq_handler 1 def_irq_handler 2 diff --git a/src/kernel/arch/x86_64/asm/k_syscall.asm b/src/kernel/arch/x86_64/asm/k_syscall.asm index b75b4afb2..1fe301410 100644 --- a/src/kernel/arch/x86_64/asm/k_syscall.asm +++ b/src/kernel/arch/x86_64/asm/k_syscall.asm @@ -1,10 +1,12 @@ -global syscall_handler +.intel_syntax noprefix + +.global "syscall_handler" syscall_handler: sti - push rcx ; save the return address - push r11 ; save the flags + push rcx // save the return address + push r11 // save the flags push rbp push rbx push rdx @@ -18,9 +20,8 @@ syscall_handler: push r14 push r15 - mov rcx, r10 ; fix 3rd syscall arg + mov rcx, r10 // fix 3rd syscall arg - extern syscall_handlers call [rax * 8 + syscall_handlers] pop r15 @@ -39,4 +40,4 @@ syscall_handler: pop rcx cli - o64 sysret + sysret diff --git a/src/kernel/arch/x86_64/asm/multiboot_header.asm b/src/kernel/arch/x86_64/asm/multiboot_header.asm index 4a8c1fa98..5e0c16c4f 100644 --- a/src/kernel/arch/x86_64/asm/multiboot_header.asm +++ b/src/kernel/arch/x86_64/asm/multiboot_header.asm @@ -1,39 +1,41 @@ -; This is a Multiboot-compliant header file in assembly code, based on Philipp -; Oppermann's OS [1], which was released under the MIT License - Copyright (c) -; 2019 Philipp Oppermann. -; -; [1]: https://os.phil-opp.com/edition-1/ +// This is a Multiboot-compliant header file in assembly code, based on Philipp +// Oppermann's OS [1], which was released under the MIT License - Copyright (c) +// 2019 Philipp Oppermann. +// +// [1]: https://os.phil-opp.com/edition-1/ -section .multiboot_header -align 8 +.intel_syntax noprefix -%define MULTIBOOT2_MAGIC_NUMBER 0xe85250d6 -%define PROTECTED_MODE_CODE 0 ; architecture 0 (protected mode i386) - ; architecture 4 (MIPS) +.section ".multiboot_header" +.align 8 + +.equ MULTIBOOT2_MAGIC_NUMBER, 0xe85250d6 +.equ PROTECTED_MODE_CODE, 0 // architecture 0 (protected mode i386) + // architecture 4 (MIPS) header_start: - ; `dd` means 'define double word' - dd MULTIBOOT2_MAGIC_NUMBER ; magic number - dd PROTECTED_MODE_CODE ; architecture - dd header_end - header_start ; header length + // long = double word + .long MULTIBOOT2_MAGIC_NUMBER // magic number + .long PROTECTED_MODE_CODE // architecture + .long header_end - header_start // header length - ; checksum - dd 0x100000000 - (MULTIBOOT2_MAGIC_NUMBER + 0 + (header_end - header_start)) + // checksum + .long 0x100000000 - (MULTIBOOT2_MAGIC_NUMBER + 0 + (header_end - header_start)) -%ifdef ENABLE_FRAMEBUFFER - ; framebuffer - dw 5 - dw 0 - dd 20 - dd VBE_WIDTH - dd VBE_HEIGHT - dd VBE_BPP - dd 0 -%endif +.ifdef ENABLE_FRAMEBUFFER + // framebuffer + .word 5 + .word 0 + .long 20 + .long VBE_WIDTH + .long VBE_HEIGHT + .long VBE_BPP + .long 0 +.endif - ; required end tag - ; `dw` means 'define word' (word = 16 bits on x86_64) - dw 0 ; type - dw 0 ; flags - dd 8 ; size + // required end tag + // word = 16 bits on x86_64 + .word 0 // type + .word 0 // flags + .long 8 // size header_end: diff --git a/src/kernel/arch/x86_64/asm/proc.asm b/src/kernel/arch/x86_64/asm/proc.asm index 34ec1bb0b..240e2053b 100644 --- a/src/kernel/arch/x86_64/asm/proc.asm +++ b/src/kernel/arch/x86_64/asm/proc.asm @@ -1,5 +1,7 @@ -global arch_task_switch -global ret_from_fork +.intel_syntax noprefix + +.global arch_task_switch +.global ret_from_fork arch_task_switch: push rbp @@ -26,7 +28,6 @@ arch_task_switch: ret_from_fork: pop r12 - extern task_schedule_tail call task_schedule_tail call r12 diff --git a/src/kernel/arch/x86_64/linker.ld b/src/kernel/arch/x86_64/linker.ld index 92dc068a7..8b8b0363e 100644 --- a/src/kernel/arch/x86_64/linker.ld +++ b/src/kernel/arch/x86_64/linker.ld @@ -11,7 +11,7 @@ SECTIONS { /* ensure that the multiboot header is at the beginning */ KEEP(*(.multiboot_header)) *(.text .text.*) - . = ALIGN(4K); + . = ALIGN(4096); } /* this section contains initcall functions as defined in @@ -21,27 +21,27 @@ SECTIONS { __initcall_start = .; *(SORT_BY_NAME(.initcall_fn_[1-5][1-5])) __initcall_end = .; - . = ALIGN(4K); + . = ALIGN(4096); } .rodata : { *(.rodata .rodata.*) - . = ALIGN(4K); + . = ALIGN(4096); } /* read-write data (initialized) */ .data : { *(.data .data.*) - . = ALIGN(4K); + . = ALIGN(4096); } /* read-write data (uninitialized) and stack */ .bss : { *(.bss .bss.*) - . = ALIGN(4K); + . = ALIGN(4096); } /* get rid of unnecessary gcc bits */ diff --git a/src/libc/asm/x86_64/crt0.asm b/src/libc/asm/x86_64/crt0.asm index 35ac8c6d3..89c5dbe6c 100644 --- a/src/libc/asm/x86_64/crt0.asm +++ b/src/libc/asm/x86_64/crt0.asm @@ -1,13 +1,12 @@ -global _start +.intel_syntax noprefix -extern main +.section ".text" -section .text -_start: - ; Prepare the arguments for `start_main()`. - mov rdi, main ; `main()` - pop rsi ; argc - mov rdx, rsp ; argv +.global _start - extern start_main +_start: + // Prepare the arguments for `start_main()`. + mov rdi, offset main // `main()` + pop rsi // `argc` + pop rdx // `argv` call start_main diff --git a/src/libc/asm/x86_64/syscall.asm b/src/libc/asm/x86_64/syscall.asm index adb22d44d..1bdbd0285 100644 --- a/src/libc/asm/x86_64/syscall.asm +++ b/src/libc/asm/x86_64/syscall.asm @@ -1,12 +1,14 @@ -global syscall +.intel_syntax noprefix + +.global syscall syscall: - mov rax, rdi ; syscall number - mov rdi, rsi ; 1st arg - mov rsi, rdx ; 2nd arg - mov rdx, rcx ; 3rd arg - mov r10, r8 ; 4th arg - mov r8, r9 ; 5th arg - mov r9, [rsp + 8] ; 6th arg + mov rax, rdi // syscall number + mov rdi, rsi // 1st arg + mov rsi, rdx // 2nd arg + mov rdx, rcx // 3rd arg + mov r10, r8 // 4th arg + mov r8, r9 // 5th arg + mov r9, [rsp + 8] // 6th arg syscall ret diff --git a/tools/install-linux-deps b/tools/install-linux-deps index 4234d6403..119dae71a 100755 --- a/tools/install-linux-deps +++ b/tools/install-linux-deps @@ -10,7 +10,6 @@ apt-get install -y \ software-properties-common \ lsb-release \ build-essential \ - nasm \ xorriso \ grub2-common \ grub-pc-bin \