From ec35f15a51f3ca2a2841cd5240aab975445a7779 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Mon, 9 Oct 2023 14:53:57 +0200 Subject: [PATCH] altera,efinix,gowin,xilinx: Fix 'Flash SRAM' -> 'Load SRAM' --- src/altera.cpp | 2 +- src/gowin.cpp | 2 +- src/xilinx.cpp | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/altera.cpp b/src/altera.cpp index 3458779e43..553c3906c0 100644 --- a/src/altera.cpp +++ b/src/altera.cpp @@ -97,7 +97,7 @@ void Altera::programMem(RawParser &_bit) _jtag->set_state(Jtag::RUN_TEST_IDLE); _jtag->toggleClk(1000000/clk_period); /* write */ - ProgressBar progress("Flash SRAM", byte_length, 50, _quiet); + ProgressBar progress("Load SRAM", byte_length, 50, _quiet); int xfer_len = 512; int tx_len; diff --git a/src/gowin.cpp b/src/gowin.cpp index b435e5cb7c..47f9b283c2 100644 --- a/src/gowin.cpp +++ b/src/gowin.cpp @@ -636,7 +636,7 @@ bool Gowin::flashSRAM(const uint8_t *data, int length) Jtag::tapState_t tx_end; int byte_length = length / 8; - ProgressBar progress("Flash SRAM", byte_length, 50, _quiet); + ProgressBar progress("Load SRAM", byte_length, 50, _quiet); /* UG704 3.4.3 */ if (is_gw5a) { diff --git a/src/xilinx.cpp b/src/xilinx.cpp index 256a40ba4e..9b5924ff3c 100644 --- a/src/xilinx.cpp +++ b/src/xilinx.cpp @@ -577,7 +577,7 @@ void Xilinx::program_mem(ConfigBitstreamParser *bitfile) Jtag::tapState_t tx_end; int burst_len = byte_length / 100; - ProgressBar progress("Flash SRAM", byte_length, 50, _quiet); + ProgressBar progress("Load SRAM", byte_length, 50, _quiet); for (int i=0; i < byte_length; i+=burst_len) { if (i + burst_len > byte_length) { @@ -733,7 +733,7 @@ bool Xilinx::xc3s_flow_program(ConfigBitstreamParser *bit) const uint8_t *data = bit->getData(); int tx_len = burst_len * 8; Jtag::tapState_t tx_end = Jtag::SHIFT_DR; - ProgressBar progress("Flash SRAM", byte_length, 50, _quiet); + ProgressBar progress("Load SRAM", byte_length, 50, _quiet); flow_enable();