diff --git a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_power.h b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_power.h
index 6efcde4a491300..594fc414bbc734 100644
--- a/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_power.h
+++ b/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/adsp_power.h
@@ -88,5 +88,14 @@ static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num)
 	return (ACE_PWRSTS->dsphpxpgs & BIT(cpu_num)) == BIT(cpu_num);
 }
 
+/**
+ * @brief Retrieve node identifier for Intel ADSP HOST power domain.
+ */
+#define INTEL_ADSP_HST_DOMAIN_DTNODE DT_NODELABEL(hst_domain)
+
+/**
+ * @brief Intel ADSP HOST power domain pointer.
+ */
+#define INTEL_ADSP_HST_DOMAIN_DEV DEVICE_DT_GET(INTEL_ADSP_HST_DOMAIN_DTNODE)
 
 #endif /* ZEPHYR_SOC_INTEL_ADSP_POWER_H_ */
diff --git a/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/adsp_power.h b/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/adsp_power.h
index 60631945da30cc..5d12c79fdcb1aa 100644
--- a/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/adsp_power.h
+++ b/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/adsp_power.h
@@ -88,4 +88,14 @@ static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num)
 	return (ACE_PWRSTS->dsphpxpgs & BIT(cpu_num)) == BIT(cpu_num);
 }
 
+/**
+ * @brief Retrieve node identifier for Intel ADSP HOST power domain.
+ */
+#define INTEL_ADSP_HST_DOMAIN_DTNODE DT_NODELABEL(hst_domain)
+
+/**
+ * @brief Intel ADSP HOST power domain pointer.
+ */
+#define INTEL_ADSP_HST_DOMAIN_DEV DEVICE_DT_GET(INTEL_ADSP_HST_DOMAIN_DTNODE)
+
 #endif /* ZEPHYR_SOC_INTEL_ADSP_POWER_H_ */
diff --git a/soc/xtensa/intel_adsp/ace/multiprocessing.c b/soc/xtensa/intel_adsp/ace/multiprocessing.c
index 750dc06d74e7a3..08a0aab16c4685 100644
--- a/soc/xtensa/intel_adsp/ace/multiprocessing.c
+++ b/soc/xtensa/intel_adsp/ace/multiprocessing.c
@@ -9,6 +9,7 @@
 #include <zephyr/sys/check.h>
 #include <zephyr/arch/cpu.h>
 #include <zephyr/pm/pm.h>
+#include <zephyr/pm/device_runtime.h>
 
 #include <soc.h>
 #include <adsp_boot.h>
@@ -79,6 +80,11 @@ void soc_mp_init(void)
 		IDC[i].agents[0].ipc.ctl = BIT(0); /* IPCTBIE */
 	}
 
+	int ret = pm_device_runtime_get(INTEL_ADSP_HST_DOMAIN_DEV);
+
+	ARG_UNUSED(ret);
+	__ASSERT_NO_MSG(ret == 0);
+
 	/* Set the core 0 active */
 	soc_cpus_active[0] = true;
 }
diff --git a/soc/xtensa/intel_adsp/ace/power.c b/soc/xtensa/intel_adsp/ace/power.c
index cee8047d4a277d..7c50923abdd62e 100644
--- a/soc/xtensa/intel_adsp/ace/power.c
+++ b/soc/xtensa/intel_adsp/ace/power.c
@@ -5,6 +5,7 @@
  */
 #include <zephyr/kernel.h>
 #include <zephyr/pm/pm.h>
+#include <zephyr/pm/device_runtime.h>
 #include <zephyr/device.h>
 #include <zephyr/debug/sparse.h>
 #include <zephyr/cache.h>
@@ -234,6 +235,9 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
 {
 	ARG_UNUSED(substate_id);
 	uint32_t cpu = arch_proc_id();
+	int ret = 0;
+
+	ARG_UNUSED(ret);
 
 	/* save interrupt state and turn off all interrupts */
 	core_desc[cpu].intenable = XTENSA_RSR("INTENABLE");
@@ -296,6 +300,8 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
 			hpsram_mask = (1 << ebb_banks) - 1;
 #endif /* CONFIG_ADSP_POWER_DOWN_HPSRAM */
 			/* do power down - this function won't return */
+			ret = pm_device_runtime_put(INTEL_ADSP_HST_DOMAIN_DEV);
+			__ASSERT_NO_MSG(ret == 0);
 			power_down(true, uncache_to_cache(&hpsram_mask),
 				   true);
 		} else {
@@ -311,6 +317,9 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
 			battr |= (DSPBR_BATTR_LPSCTL_RESTORE_BOOT & LPSCTL_BATTR_MASK);
 			DSPCS.bootctl[cpu].battr = battr;
 		}
+
+		ret = pm_device_runtime_put(INTEL_ADSP_HST_DOMAIN_DEV);
+		__ASSERT_NO_MSG(ret == 0);
 		power_gate_entry(cpu);
 	} else {
 		__ASSERT(false, "invalid argument - unsupported power state");
@@ -323,6 +332,13 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
 	ARG_UNUSED(substate_id);
 	uint32_t cpu = arch_proc_id();
 
+	if (cpu == 0) {
+		int ret = pm_device_runtime_get(INTEL_ADSP_HST_DOMAIN_DEV);
+
+		ARG_UNUSED(ret);
+		__ASSERT_NO_MSG(ret == 0);
+	}
+
 	if (state == PM_STATE_SOFT_OFF) {
 		/* restore clock gating state */
 		DSPCS.bootctl[cpu].bctl |=