From fd8bcbbf3332f473242624a1ad2e6efac3de2211 Mon Sep 17 00:00:00 2001 From: Daniel Leung Date: Fri, 3 Nov 2023 11:57:30 -0700 Subject: [PATCH] zephyr: use k_smp_cpu_start/_resume for secondary core power up This changes the secondary core power up routine to use the newly introduced k_smp_cpu_start() and k_smp_cpu_resume(). This removes the need to mirror part of the SMP start up code from Zephyr, and no longer need to call into Zephyr private kernel code. West update includes : eefaeee061c8 kernel: smp: introduce k_smp_cpu_resume 042cb6ac4e00 soc: intel_adsp: enable DfTTS-based time stamping on ACE platforms 6a0b1da158a4 soc: intel_adsp: call framework callback function for restore e7217925c93e ace: use a 'switch' statement in pm_state_set() c99a604bbf2c ace: remove superfluous variable initialisation a0ac2faf9bde intel_adsp: ace: enable power domain 4204ca9bcb3f ace: fix DSP panic during startup (fixes c3a6274bf5e4) d4b0273ab0c4 cmake: sparse.template: add COMMAND_ERROR_IS_FATAL ca12fd13c6d3 xtensa: intel_adsp: fix a cache handling error 0ee1e28a2f5f xtensa: polish doxygen and add to missing doc 035c8d8ceb4b xtensa: remove sys_define_gpr_with_alias() a64eec6aaeec xtensa: remove XTENSA_ERR_NORET Signed-off-by: Daniel Leung Signed-off-by: Rander Wang --- west.yml | 2 +- zephyr/lib/cpu.c | 80 ++++++++++-------------------------------------- 2 files changed, 18 insertions(+), 64 deletions(-) diff --git a/west.yml b/west.yml index 610f7d3f1c7b..ef95ddc0459d 100644 --- a/west.yml +++ b/west.yml @@ -43,7 +43,7 @@ manifest: - name: zephyr repo-path: zephyr - revision: d7af6f371034f31b9440b27c694b0be3c87491d3 + revision: 04de43b1a119665532b6b2a0c6bbcbefd47eb7d6 remote: zephyrproject # Import some projects listed in zephyr/west.yml@revision diff --git a/zephyr/lib/cpu.c b/zephyr/lib/cpu.c index 3dde19dc38bc..6a896255795a 100644 --- a/zephyr/lib/cpu.c +++ b/zephyr/lib/cpu.c @@ -19,6 +19,7 @@ /* Zephyr includes */ #include #include +#include #include #include @@ -27,37 +28,9 @@ extern K_KERNEL_STACK_ARRAY_DEFINE(z_interrupt_stacks, CONFIG_MP_MAX_NUM_CPUS, CONFIG_ISR_STACK_SIZE); -static atomic_t start_flag; -static atomic_t ready_flag; - -/* Zephyr kernel_internal.h interface */ -extern void smp_timer_init(void); - -static FUNC_NORETURN void secondary_init(void *arg) +static void secondary_init(void *arg) { - struct k_thread dummy_thread; - - /* - * This is an open-coded version of zephyr/kernel/smp.c - * smp_init_top(). We do this so that we can call SOF - * secondary_core_init() for each core. - */ - - atomic_set(&ready_flag, 1); - z_smp_thread_init(arg, &dummy_thread); - smp_timer_init(); - secondary_core_init(sof_get()); - -#ifdef CONFIG_THREAD_STACK_INFO - dummy_thread.stack_info.start = (uintptr_t)z_interrupt_stacks + - arch_curr_cpu()->id * Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE); - dummy_thread.stack_info.size = Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE); -#endif - - z_smp_thread_swap(); - - CODE_UNREACHABLE; /* LCOV_EXCL_LINE */ } #if CONFIG_ZEPHYR_NATIVE_DRIVERS @@ -113,7 +86,6 @@ void cpu_notify_state_exit(enum pm_state state) /* Notifying primary core that secondary core successfully exit the D3 * state and is back in the Idle thread. */ - atomic_set(&ready_flag, 1); return; } #endif @@ -142,26 +114,17 @@ int cpu_enable_core(int id) if (arch_cpu_active(id)) return 0; -#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE /* During kernel initialization, the next pm state is set to ACTIVE. By checking this * value, we determine if this is the first core boot, if not, we need to skip idle thread * initialization. By reinitializing the idle thread, we would overwrite the kernel structs * and the idle thread stack. */ - if (pm_state_next_get(id)->state == PM_STATE_ACTIVE) - z_init_cpu(id); -#endif - - atomic_clear(&start_flag); - atomic_clear(&ready_flag); - - arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, - secondary_init, &start_flag); - - while (!atomic_get(&ready_flag)) - k_busy_wait(100); + if (pm_state_next_get(id)->state == PM_STATE_ACTIVE) { + k_smp_cpu_start(id, secondary_init, NULL); + return 0; + } - atomic_set(&start_flag, 1); + k_smp_cpu_resume(id, secondary_init, NULL, true, false); return 0; } @@ -239,29 +202,20 @@ int cpu_enable_core(int id) int cpu_enable_secondary_core(int id) { - /* - * This is an open-coded version of zephyr/kernel/smp.c - * z_smp_start_cpu(). We do this, so we can use a customized - * secondary_init() for SOF. - */ - if (arch_cpu_active(id)) return 0; -#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE - z_init_cpu(id); -#endif - - atomic_clear(&start_flag); - atomic_clear(&ready_flag); - - arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE, - secondary_init, &start_flag); - - while (!atomic_get(&ready_flag)) - k_busy_wait(100); + /* During kernel initialization, the next pm state is set to ACTIVE. By checking this + * value, we determine if this is the first core boot, if not, we need to skip idle thread + * initialization. By reinitializing the idle thread, we would overwrite the kernel structs + * and the idle thread stack. + */ + if (pm_state_next_get(id)->state == PM_STATE_ACTIVE) { + k_smp_cpu_start(id, secondary_init, NULL); + return 0; + } - atomic_set(&start_flag, 1); + k_smp_cpu_resume(id, secondary_init, NULL, true, false); return 0; }