diff --git a/VLSI24/submitted_notebooks/Open3DFlow/Open3DFlow.ipynb b/VLSI24/submitted_notebooks/Open3DFlow/Open3DFlow.ipynb index 9925a4e..3d81b9a 100755 --- a/VLSI24/submitted_notebooks/Open3DFlow/Open3DFlow.ipynb +++ b/VLSI24/submitted_notebooks/Open3DFlow/Open3DFlow.ipynb @@ -203,32 +203,28 @@ }, { "cell_type": "code", - "execution_count": 1, + "execution_count": 47, "metadata": {}, "outputs": [ { "name": "stdout", "output_type": "stream", "text": [ - "Cloning into 'Open3DFlow'...\n", - "remote: Enumerating objects: 809, done.\u001b[K\n", - "remote: Counting objects: 100% (19/19), done.\u001b[K\n", - "remote: Compressing objects: 100% (14/14), done.\u001b[K\n", - "remote: Total 809 (delta 3), reused 14 (delta 3), pack-reused 790\u001b[K\n", - "Receiving objects: 100% (809/809), 113.76 MiB | 4.19 MiB/s, done.\n", - "Resolving deltas: 100% (193/193), done.\n", - "Updating files: 100% (780/780), done.\n", - "remote: Enumerating objects: 10, done.\u001b[K\n", - "remote: Counting objects: 100% (9/9), done.\u001b[K\n", - "remote: Compressing objects: 100% (6/6), done.\u001b[K\n", - "remote: Total 6 (delta 3), reused 0 (delta 0), pack-reused 0\u001b[K\n", - "Unpacking objects: 100% (6/6), 2.75 KiB | 100.00 KiB/s, done.\n", - "From https://github.com/b224hisl/RIOS-code-a-chip-submission\n", - " 5807d04..f631cdb main -> origin/main\n", - "Updating 5807d04..f631cdb\n", - "Fast-forward\n", - " README.md | 4 \u001b[32m++\u001b[m\u001b[31m--\u001b[m\n", - " 1 file changed, 2 insertions(+), 2 deletions(-)\n" + "Cloning into 'Open3DFlow'...\n" + ] + }, + { + "name": "stdout", + "output_type": "stream", + "text": [ + "remote: Enumerating objects: 824, done.\u001b[K\n", + "remote: Counting objects: 100% (34/34), done.\u001b[K\n", + "remote: Compressing objects: 100% (27/27), done.\u001b[K\n", + "remote: Total 824 (delta 7), reused 27 (delta 5), pack-reused 790\u001b[K\n", + "Receiving objects: 100% (824/824), 113.77 MiB | 2.58 MiB/s, done.\n", + "Resolving deltas: 100% (197/197), done.\n", + "Updating files: 100% (787/787), done.\n", + "Already up to date.\n" ] } ], @@ -331,7 +327,7 @@ }, { "cell_type": "code", - "execution_count": 3, + "execution_count": 48, "metadata": {}, "outputs": [ { @@ -384,7 +380,7 @@ }, { "cell_type": "code", - "execution_count": 4, + "execution_count": 49, "metadata": {}, "outputs": [ { @@ -528,7 +524,7 @@ }, { "cell_type": "code", - "execution_count": 1, + "execution_count": 50, "metadata": {}, "outputs": [], "source": [ @@ -538,14 +534,14 @@ }, { "cell_type": "code", - "execution_count": 17, + "execution_count": 51, "metadata": {}, "outputs": [ { "name": "stdout", "output_type": "stream", "text": [ - "Overwriting Results/script.sh\n" + "Writing Results/script.sh\n" ] } ], @@ -581,45120 +577,1307 @@ }, { "cell_type": "code", - "execution_count": 20, + "execution_count": 52, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "4e4ea0b4f5d90f5747a8f5050e69c3db79f725fc5adf4817109e1c71a7ade9b6\n" + ] + } + ], + "source": [ + "!docker run -d --rm --name Open3DFlow_s -e DISPALY=${DISPLAY} -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Open3DFlow:/Flow -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script.sh && echo succeed!\"" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "\n", + "The docker script runs for a relatively long time in the background (about 30 minutes), and you could use the following codes to monitor whether the harden process has ended:" + ] + }, + { + "cell_type": "code", + "execution_count": 53, "metadata": {}, "outputs": [ { "name": "stdout", "output_type": "stream", "text": [ - "rm -f ./results/130_180/riscv32i_3d/80MHz/1_*.v ./results/130_180/riscv32i_3d/80MHz/1_synth.sdc\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/synth_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/1_*\n", - "rm -f ./objects/130_180/riscv32i_3d/80MHz/mark_hier_stop_modules.tcl\n", - "rm -rf _tmp_yosys-abc-*\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/2_*floorplan*.odb ./results/130_180/riscv32i_3d/80MHz/2_floorplan.sdc ./results/130_180/riscv32i_3d/80MHz/2_*.v ./results/130_180/riscv32i_3d/80MHz/2_*.def\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/2_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/2_*\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_*place*.odb\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_place.sdc\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_*.def ./results/130_180/riscv32i_3d/80MHz/3_*.v\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/3_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/3_*\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/4_*cts*.odb ./results/130_180/riscv32i_3d/80MHz/4_cts.sdc ./results/130_180/riscv32i_3d/80MHz/4_*.v ./results/130_180/riscv32i_3d/80MHz/4_*.def\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/4_*\n", - "rm -rf ./logs/130_180/riscv32i_3d/80MHz/4_*\n", - "rm -rf output*/ results*.out.dmp layer_*.mps\n", - "rm -rf *.gdid *.log *.met *.sav *.res.dmp\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/route.guide ./results/130_180/riscv32i_3d/80MHz/output_guide.mod ./results/130_180/riscv32i_3d/80MHz/updated_clks.sdc\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/5_*.odb ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/5_*.def ./results/130_180/riscv32i_3d/80MHz/5_*.v\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/5_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/5_*\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/6_*.gds ./results/130_180/riscv32i_3d/80MHz/6_*.oas ./results/130_180/riscv32i_3d/80MHz/6_*.odb ./results/130_180/riscv32i_3d/80MHz/6_*.v ./results/130_180/riscv32i_3d/80MHz/6_*.def ./results/130_180/riscv32i_3d/80MHz/6_*.sdc ./results/130_180/riscv32i_3d/80MHz/6_*.spef\n", - "rm -rf ./reports/130_180/riscv32i_3d/80MHz/6_*.rpt\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/6_*\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/metadata-80MHz-check.log\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/metadata-80MHz.json\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/core_without_dmem.lib ./results/130_180/riscv32i_3d/80MHz/core_without_dmem.lef\n", - "rm -rf ./objects/130_180/riscv32i_3d/80MHz\n", - "/Flow/util/markDontUse.py -p \"sky130_fd_sc_hd__probe_p_8 sky130_fd_sc_hd__probec_p_8 sky130_fd_sc_hd__lpflow_bleeder_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_16 sky130_fd_sc_hd__lpflow_clkbufkapwr_2 sky130_fd_sc_hd__lpflow_clkbufkapwr_4 sky130_fd_sc_hd__lpflow_clkbufkapwr_8 sky130_fd_sc_hd__lpflow_clkinvkapwr_1 sky130_fd_sc_hd__lpflow_clkinvkapwr_16 sky130_fd_sc_hd__lpflow_clkinvkapwr_2 sky130_fd_sc_hd__lpflow_clkinvkapwr_4 sky130_fd_sc_hd__lpflow_clkinvkapwr_8 sky130_fd_sc_hd__lpflow_decapkapwr_12 sky130_fd_sc_hd__lpflow_decapkapwr_3 sky130_fd_sc_hd__lpflow_decapkapwr_4 sky130_fd_sc_hd__lpflow_decapkapwr_6 sky130_fd_sc_hd__lpflow_decapkapwr_8 sky130_fd_sc_hd__lpflow_inputiso0n_1 sky130_fd_sc_hd__lpflow_inputiso0p_1 sky130_fd_sc_hd__lpflow_inputiso1n_1 sky130_fd_sc_hd__lpflow_inputiso1p_1 sky130_fd_sc_hd__lpflow_inputisolatch_1 sky130_fd_sc_hd__lpflow_isobufsrc_1 sky130_fd_sc_hd__lpflow_isobufsrc_16 sky130_fd_sc_hd__lpflow_isobufsrc_2 sky130_fd_sc_hd__lpflow_isobufsrc_4 sky130_fd_sc_hd__lpflow_isobufsrc_8 sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4\" -i /Flow/platforms/130_180/lib/sky130_fd_sc_hd__tt_025C_1v80.lib -o objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "Opening file for replace: /Flow/platforms/130_180/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "Marked 36 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 0\n", - "Writing replaced file: objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth_hier_report.tcl) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/1_1_yosys_hier_report.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/adder.v\n", - "2. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/alu.v\n", - "3. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/aludec.v\n", - "4. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/controller.v\n", - "5. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/core_without_dmem.v\n", - "6. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/datapath.v\n", - "7. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_communicate.v\n", - "8. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopenr.v\n", - "9. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopens.v\n", - "10. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopr.v\n", - "11. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/inverter.v\n", - "12. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2b.v\n", - "13. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2c.v\n", - "14. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare32.v\n", - "15. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/maindec.v\n", - "16. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux2.v\n", - "17. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux3.v\n", - "18. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux4.v\n", - "19. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux5.v\n", - "20. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux8.v\n", - "21. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/regfile.v\n", - "22. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/riscv.v\n", - "23. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/rom.v\n", - "24. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/shifter.v\n", - "25. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/signext.v\n", - "26. Executing Liberty frontend: ./objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "27. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_clkgate_hd.v\n", - "finish synth_preamble\n", - "28. Executing SYNTH pass.\n", - "28.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "28.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\core_without_dmem'.\n", - "28.2.1. Analyzing design hierarchy..\n", - "28.2.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem_communicate'.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:30.9-30.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:31.9-31.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:32.9-32.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:33.9-33.38.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:39.9-39.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:41.9-41.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:43.9-43.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:45.9-45.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:47.9-47.25.\n", - "28.2.3. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.4. Executing AST frontend in derive mode using pre-parsed AST for module `\\ROM'.\n", - "28.2.5. Executing AST frontend in derive mode using pre-parsed AST for module `\\riscv'.\n", - "28.2.6. Analyzing design hierarchy..\n", - "28.2.7. Executing AST frontend in derive mode using pre-parsed AST for module `\\datapath'.\n", - "28.2.8. Executing AST frontend in derive mode using pre-parsed AST for module `\\controller'.\n", - "28.2.9. Analyzing design hierarchy..\n", - "28.2.10. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.11. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.12. Executing AST frontend in derive mode using pre-parsed AST for module `\\aludec'.\n", - "28.2.13. Executing AST frontend in derive mode using pre-parsed AST for module `\\maindec'.\n", - "28.2.14. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux3'.\n", - "28.2.15. Executing AST frontend in derive mode using pre-parsed AST for module `\\shifter'.\n", - "28.2.16. Executing AST frontend in derive mode using pre-parsed AST for module `\\alu'.\n", - "28.2.17. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare32'.\n", - "28.2.18. Executing AST frontend in derive mode using pre-parsed AST for module `\\adder'.\n", - "28.2.19. Executing AST frontend in derive mode using pre-parsed AST for module `\\signext'.\n", - "28.2.20. Executing AST frontend in derive mode using pre-parsed AST for module `\\regfile'.\n", - "28.2.21. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.22. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopr'.\n", - "28.2.23. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopenr'.\n", - "28.2.24. Analyzing design hierarchy..\n", - "28.2.25. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux5'.\n", - "28.2.26. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2c'.\n", - "28.2.27. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2b'.\n", - "28.2.28. Analyzing design hierarchy..\n", - "28.2.29. Analyzing design hierarchy..\n", - "28.3. Executing PROC pass (convert processes to netlists).\n", - "28.3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "28.3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "28.3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "28.3.4. Executing PROC_INIT pass (extract init attributes).\n", - "28.3.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "28.3.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "28.3.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "28.3.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "28.3.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "28.3.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "28.3.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "28.3.12. Executing OPT_EXPR pass (perform const folding).\n", - "28.4. Executing OPT_EXPR pass (perform const folding).\n", - "28.5. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.6. Executing CHECK pass (checking for obvious problems).\n", - "28.7. Executing OPT pass (performing simple optimizations).\n", - "28.7.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.7.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.7.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.7.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.7.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.7.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.7.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.7.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.7.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.8. Executing FSM pass (extract and optimize FSM).\n", - "28.8.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "28.8.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "28.8.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "28.8.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.8.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "28.8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "28.8.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "28.8.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "28.9. Executing OPT pass (performing simple optimizations).\n", - "28.9.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.9.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.9.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.9.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.9.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.9.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.9.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.9.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.9.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.10. Executing WREDUCE pass (reducing word size of cells).\n", - "28.11. Executing PEEPOPT pass (run peephole optimizers).\n", - "28.12. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.13. Executing ALUMACC pass (create $alu and $macc cells).\n", - "28.14. Executing SHARE pass (SAT-based resource sharing).\n", - "28.15. Executing OPT pass (performing simple optimizations).\n", - "28.15.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.15.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.15.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.15.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.15.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.15.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.15.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.15.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.15.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.15.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.16. Executing MEMORY pass.\n", - "28.16.1. Executing OPT_MEM pass (optimize memories).\n", - "28.16.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "28.16.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "28.16.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "28.16.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "28.16.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.16.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "28.16.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "28.16.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.16.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "28.17. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.18. Executing OPT pass (performing simple optimizations).\n", - "28.18.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.18.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.18.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.18.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.18.5. Finished fast OPT passes.\n", - "28.19. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "28.20. Executing OPT pass (performing simple optimizations).\n", - "28.20.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.6. Executing OPT_SHARE pass.\n", - "28.20.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.9. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.10. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.20.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.13. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.14. Executing OPT_SHARE pass.\n", - "28.20.15. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.17. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.18. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.20.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.21. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.22. Executing OPT_SHARE pass.\n", - "28.20.23. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.24. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.25. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.26. Finished OPT passes. (There is nothing left to do.)\n", - "28.21. Executing TECHMAP pass (map to technology primitives).\n", - "28.21.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "28.21.2. Continuing TECHMAP pass.\n", - "28.22. Executing OPT pass (performing simple optimizations).\n", - "28.22.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.22.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.22.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.22.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.22.5. Finished fast OPT passes.\n", - "28.23. Executing ABC pass (technology mapping using ABC).\n", - "28.23.1. Extracting gate netlist of module `$paramod\\flopenr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.2. Extracting gate netlist of module `$paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.3. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001' to `/input.blif'..\n", - "28.23.4. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100' to `/input.blif'..\n" + "Waiting for the script to complete. Checking again after 20 seconds...\n" ] }, { "name": "stdout", "output_type": "stream", "text": [ - "28.23.5. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101' to `/input.blif'..\n", - "28.23.6. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.7. Extracting gate netlist of module `$paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.8. Extracting gate netlist of module `$paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.9. Extracting gate netlist of module `\\ROM' to `/input.blif'..\n", - "28.23.10. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "28.23.11. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "28.23.12. Extracting gate netlist of module `\\aludec' to `/input.blif'..\n", - "28.23.13. Extracting gate netlist of module `\\controller' to `/input.blif'..\n", - "28.23.14. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "28.23.15. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "28.23.16. Extracting gate netlist of module `\\dmem_communicate' to `/input.blif'..\n", - "28.23.17. Extracting gate netlist of module `\\magcompare2b' to `/input.blif'..\n", - "28.23.18. Extracting gate netlist of module `\\magcompare2c' to `/input.blif'..\n", - "28.23.19. Extracting gate netlist of module `\\magcompare32' to `/input.blif'..\n", - "28.23.20. Extracting gate netlist of module `\\maindec' to `/input.blif'..\n", - "28.23.21. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "28.23.22. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "28.23.23. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "28.23.24. Extracting gate netlist of module `\\signext' to `/input.blif'..\n", - "28.24. Executing OPT pass (performing simple optimizations).\n", - "28.24.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.24.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.24.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.24.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.24.5. Finished fast OPT passes.\n", - "28.25. Executing HIERARCHY pass (managing design hierarchy).\n", - "28.25.1. Analyzing design hierarchy..\n", - "28.25.2. Analyzing design hierarchy..\n", - "28.26. Printing statistics.\n", - "28.27. Executing CHECK pass (checking for obvious problems).\n", - "29. Executing TECHMAP pass (map to technology primitives).\n", - "29.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_adders_hd.v\n", - "29.2. Continuing TECHMAP pass.\n", - "30. Executing TECHMAP pass (map to technology primitives).\n", - "30.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "30.2. Continuing TECHMAP pass.\n", - "31. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_4' - skipping.\n", - "31.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "32. Executing ABC pass (technology mapping using ABC).\n", - "32.1. Extracting gate netlist of module `$paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.1.1. Executing ABC.\n", - "32.1.2. Re-integrating ABC results.\n", - "32.2. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001' to `/input.blif'..\n", - "32.2.1. Executing ABC.\n", - "32.2.2. Re-integrating ABC results.\n", - "32.3. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100' to `/input.blif'..\n", - "32.3.1. Executing ABC.\n", - "32.3.2. Re-integrating ABC results.\n", - "32.4. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101' to `/input.blif'..\n", - "32.4.1. Executing ABC.\n", - "32.4.2. Re-integrating ABC results.\n", - "32.5. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.5.1. Executing ABC.\n", - "32.5.2. Re-integrating ABC results.\n", - "32.6. Extracting gate netlist of module `$paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.6.1. Executing ABC.\n", - "32.6.2. Re-integrating ABC results.\n", - "32.7. Extracting gate netlist of module `$paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.7.1. Executing ABC.\n", - "32.7.2. Re-integrating ABC results.\n", - "32.8. Extracting gate netlist of module `\\ROM' to `/input.blif'..\n", - "32.8.1. Executing ABC.\n", - "32.8.2. Re-integrating ABC results.\n", - "32.9. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "32.9.1. Executing ABC.\n", - "32.9.2. Re-integrating ABC results.\n", - "32.10. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "32.10.1. Executing ABC.\n", - "32.10.2. Re-integrating ABC results.\n", - "32.11. Extracting gate netlist of module `\\aludec' to `/input.blif'..\n", - "32.11.1. Executing ABC.\n", - "32.11.2. Re-integrating ABC results.\n", - "32.12. Extracting gate netlist of module `\\controller' to `/input.blif'..\n", - "32.12.1. Executing ABC.\n", - "32.12.2. Re-integrating ABC results.\n", - "32.13. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "32.13.1. Executing ABC.\n", - "32.13.2. Re-integrating ABC results.\n", - "32.14. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "32.14.1. Executing ABC.\n", - "32.14.2. Re-integrating ABC results.\n", - "32.15. Extracting gate netlist of module `\\dmem_communicate' to `/input.blif'..\n", - "32.15.1. Executing ABC.\n", - "32.15.2. Re-integrating ABC results.\n", - "32.16. Extracting gate netlist of module `\\magcompare2b' to `/input.blif'..\n", - "32.16.1. Executing ABC.\n", - "32.16.2. Re-integrating ABC results.\n", - "32.17. Extracting gate netlist of module `\\magcompare2c' to `/input.blif'..\n", - "32.17.1. Executing ABC.\n", - "32.17.2. Re-integrating ABC results.\n", - "32.18. Extracting gate netlist of module `\\magcompare32' to `/input.blif'..\n", - "32.18.1. Executing ABC.\n", - "32.18.2. Re-integrating ABC results.\n", - "32.19. Extracting gate netlist of module `\\maindec' to `/input.blif'..\n", - "32.19.1. Executing ABC.\n", - "32.19.2. Re-integrating ABC results.\n", - "32.20. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "32.20.1. Executing ABC.\n", - "32.20.2. Re-integrating ABC results.\n", - "32.21. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "32.22. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "32.22.1. Executing ABC.\n", - "32.22.2. Re-integrating ABC results.\n", - "32.23. Extracting gate netlist of module `\\signext' to `/input.blif'..\n", - "33. Printing statistics.\n", - "Ungroup modules of size 1000\n", - "haha\n", - "34. Executing HIERARCHY pass (managing design hierarchy).\n", - "34.1. Analyzing design hierarchy..\n", - "34.2. Analyzing design hierarchy..\n", - "Found module core_without_dmem\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module ROM\n", - "Found module dmem_communicate\n", - "Found module riscv\n", - "Found module controller\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100\n", - "Found module aludec\n", - "Found module maindec\n", - "Found module datapath\n", - "Found module $paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module $paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module adder\n", - "Found module alu\n", - "Found module magcompare32\n", - "Found module magcompare2b\n", - "Found module magcompare2c\n", - "Found module regfile\n", - "Found module shifter\n", - "Found module signext\n", - "Found module $paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000\n", - "35. Printing statistics.\n", - "Area of module \\core_without_dmem is 66959.219200\n", - "Preserving hierarchical module: \\core_without_dmem\n", - "36. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000 is 394.128000\n", - "37. Printing statistics.\n", - "Area of module \\ROM is 95.091200\n", - "38. Printing statistics.\n", - "Area of module \\dmem_communicate is 228.969600\n", - "39. Printing statistics.\n", - "Area of module \\riscv is 66237.276800\n", - "Preserving hierarchical module: \\riscv\n", - "40. Printing statistics.\n", - "Area of module \\controller is 466.697600\n", - "41. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001 is 15.014400\n", - "42. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100 is 45.043200\n", - "43. Printing statistics.\n", - "Area of module \\aludec is 185.177600\n", - "44. Printing statistics.\n", - "Area of module \\maindec is 135.129600\n", - "45. Printing statistics.\n", - "Area of module \\datapath is 65770.579200\n", - "Preserving hierarchical module: \\datapath\n", - "46. Printing statistics.\n", - "Area of module $paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000 is 954.665600\n", - "47. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101 is 56.304000\n", - "48. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000 is 394.128000\n", - "49. Printing statistics.\n", - "Area of module $paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000 is 714.435200\n", - "50. Printing statistics.\n", - "Area of module \\adder is 1046.003200\n", - "Preserving hierarchical module: \\adder\n", - "51. Printing statistics.\n", - "Area of module \\alu is 2351.004800\n", - "Preserving hierarchical module: \\alu\n", - "52. Printing statistics.\n", - "Area of module \\magcompare32 is 984.694400\n", - "53. Printing statistics.\n", - "Area of module \\magcompare2b is 42.540800\n", - "54. Printing statistics.\n", - "Area of module \\magcompare2c is 20.019200\n", - "55. Printing statistics.\n", - "Area of module \\regfile is 49531.254400\n", - "Preserving hierarchical module: \\regfile\n", - "56. Printing statistics.\n", - "Area of module \\shifter is 3943.782400\n", - "Preserving hierarchical module: \\shifter\n", - "57. Printing statistics.\n", - "Area of module \\signext is 825.792000\n", - "58. Printing statistics.\n", - "Area of module $paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000 is 825.792000\n", - "Warnings: 35 unique messages, 243 total\n", - "End of script. Logfile hash: eec7668f33, CPU: user 6.10s system 0.20s, MEM: 51.65 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 67% 2x abc (11 sec), 21% 26x stat (3 sec), ...\n", - "Elapsed time: 0:17.85[h:]min:sec. CPU time: user 16.53 sys 1.25 (99%). Peak memory: 52896KB.\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth.tcl) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/1_1_yosys.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/adder.v\n", - "2. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/alu.v\n", - "3. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/aludec.v\n", - "4. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/controller.v\n", - "5. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/core_without_dmem.v\n", - "6. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/datapath.v\n", - "7. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_communicate.v\n", - "8. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopenr.v\n", - "9. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopens.v\n", - "10. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopr.v\n", - "11. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/inverter.v\n", - "12. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2b.v\n", - "13. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2c.v\n", - "14. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare32.v\n", - "15. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/maindec.v\n", - "16. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux2.v\n", - "17. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux3.v\n", - "18. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux4.v\n", - "19. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux5.v\n", - "20. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux8.v\n", - "21. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/regfile.v\n", - "22. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/riscv.v\n", - "23. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/rom.v\n", - "24. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/shifter.v\n", - "25. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/signext.v\n", - "26. Executing Liberty frontend: ./objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "27. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_clkgate_hd.v\n", - "finish synth_preamble\n", - "Sourcing ./objects/130_180/riscv32i_3d/80MHz/mark_hier_stop_modules.tcl\n", - "28. Executing HIERARCHY pass (managing design hierarchy).\n", - "29. Executing AST frontend in derive mode using pre-parsed AST for module `\\core_without_dmem'.\n", - "29.1. Analyzing design hierarchy..\n", - "29.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem_communicate'.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:30.9-30.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:31.9-31.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:32.9-32.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:33.9-33.38.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:39.9-39.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:41.9-41.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:43.9-43.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:45.9-45.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:47.9-47.25.\n", - "29.3. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.4. Executing AST frontend in derive mode using pre-parsed AST for module `\\ROM'.\n", - "29.5. Executing AST frontend in derive mode using pre-parsed AST for module `\\riscv'.\n", - "29.6. Analyzing design hierarchy..\n", - "29.7. Executing AST frontend in derive mode using pre-parsed AST for module `\\datapath'.\n", - "29.8. Executing AST frontend in derive mode using pre-parsed AST for module `\\controller'.\n", - "29.9. Analyzing design hierarchy..\n", - "29.10. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.11. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.12. Executing AST frontend in derive mode using pre-parsed AST for module `\\aludec'.\n", - "29.13. Executing AST frontend in derive mode using pre-parsed AST for module `\\maindec'.\n", - "29.14. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux3'.\n", - "29.15. Executing AST frontend in derive mode using pre-parsed AST for module `\\shifter'.\n", - "29.16. Executing AST frontend in derive mode using pre-parsed AST for module `\\alu'.\n", - "29.17. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare32'.\n", - "29.18. Executing AST frontend in derive mode using pre-parsed AST for module `\\adder'.\n", - "29.19. Executing AST frontend in derive mode using pre-parsed AST for module `\\signext'.\n", - "29.20. Executing AST frontend in derive mode using pre-parsed AST for module `\\regfile'.\n", - "29.21. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.22. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopr'.\n", - "29.23. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopenr'.\n", - "29.24. Analyzing design hierarchy..\n", - "29.25. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux5'.\n", - "29.26. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2c'.\n", - "29.27. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2b'.\n", - "29.28. Analyzing design hierarchy..\n", - "29.29. Analyzing design hierarchy..\n", - "30. Executing SYNTH pass.\n", - "30.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "30.1.1. Analyzing design hierarchy..\n", - "30.1.2. Analyzing design hierarchy..\n", - "30.2. Executing PROC pass (convert processes to netlists).\n", - "30.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "30.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "30.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "30.2.4. Executing PROC_INIT pass (extract init attributes).\n", - "30.2.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "30.2.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "30.2.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "30.2.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "30.2.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "30.2.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "30.2.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "30.2.12. Executing OPT_EXPR pass (perform const folding).\n", - "30.3. Executing FLATTEN pass (flatten design).\n", - "30.4. Executing OPT_EXPR pass (perform const folding).\n", - "30.5. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.6. Executing CHECK pass (checking for obvious problems).\n", - "30.7. Executing OPT pass (performing simple optimizations).\n", - "30.7.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.7.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.7.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.7.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.7.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.7.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.7.12. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.7.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.7.15. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.16. Finished OPT passes. (There is nothing left to do.)\n", - "30.8. Executing FSM pass (extract and optimize FSM).\n", - "30.8.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "30.8.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "30.8.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "30.8.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.8.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "30.8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "30.8.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "30.8.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "30.9. Executing OPT pass (performing simple optimizations).\n", - "30.9.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.9.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.9.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.9.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.9.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.9.9. Finished OPT passes. (There is nothing left to do.)\n", - "30.10. Executing WREDUCE pass (reducing word size of cells).\n", - "30.11. Executing PEEPOPT pass (run peephole optimizers).\n", - "30.12. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.13. Executing ALUMACC pass (create $alu and $macc cells).\n", - "30.14. Executing SHARE pass (SAT-based resource sharing).\n", - "30.15. Executing OPT pass (performing simple optimizations).\n", - "30.15.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.15.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.15.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.15.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.15.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.15.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.15.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.15.12. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.15.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.15.15. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.16. Finished OPT passes. (There is nothing left to do.)\n", - "30.16. Executing MEMORY pass.\n", - "30.16.1. Executing OPT_MEM pass (optimize memories).\n", - "30.16.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "30.16.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "30.16.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "30.16.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "30.16.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.16.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "30.16.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "30.16.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.16.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "30.17. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.18. Executing OPT pass (performing simple optimizations).\n", - "30.18.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.18.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.18.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.18.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.18.5. Finished fast OPT passes.\n", - "30.19. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "30.20. Executing OPT pass (performing simple optimizations).\n", - "30.20.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.6. Executing OPT_SHARE pass.\n", - "30.20.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.9. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.10. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.20.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.13. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.14. Executing OPT_SHARE pass.\n", - "30.20.15. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.17. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.18. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.20.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.21. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.22. Executing OPT_SHARE pass.\n", - "30.20.23. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.24. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.25. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.26. Finished OPT passes. (There is nothing left to do.)\n", - "30.21. Executing TECHMAP pass (map to technology primitives).\n", - "30.21.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "30.21.2. Continuing TECHMAP pass.\n", - "30.22. Executing OPT pass (performing simple optimizations).\n", - "30.22.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.22.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.22.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.22.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.22.5. Finished fast OPT passes.\n", - "30.23. Executing ABC pass (technology mapping using ABC).\n", - "30.23.1. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "30.23.2. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "30.23.3. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "30.23.4. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "30.23.5. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "30.23.6. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "30.23.7. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "30.24. Executing OPT pass (performing simple optimizations).\n", - "30.24.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.24.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.24.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.24.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.24.5. Finished fast OPT passes.\n", - "30.25. Executing HIERARCHY pass (managing design hierarchy).\n", - "30.25.1. Analyzing design hierarchy..\n", - "30.25.2. Analyzing design hierarchy..\n", - "30.26. Printing statistics.\n", - "30.27. Executing CHECK pass (checking for obvious problems).\n", - "31. Executing OPT pass (performing simple optimizations).\n", - "31.1. Executing OPT_EXPR pass (perform const folding).\n", - "31.2. Executing OPT_MERGE pass (detect identical cells).\n", - "31.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "31.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "31.5. Executing OPT_MERGE pass (detect identical cells).\n", - "31.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "31.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "31.8. Executing OPT_EXPR pass (perform const folding).\n", - "31.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "31.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "31.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "31.12. Executing OPT_MERGE pass (detect identical cells).\n", - "31.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "31.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "31.15. Executing OPT_EXPR pass (perform const folding).\n", - "31.16. Finished OPT passes. (There is nothing left to do.)\n", - "32. Executing EXTRACT_FA pass (find and extract full/half adders).\n", - "33. Executing TECHMAP pass (map to technology primitives).\n", - "33.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_adders_hd.v\n", - "33.2. Continuing TECHMAP pass.\n", - "34. Executing TECHMAP pass (map to technology primitives).\n", - "34.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "34.2. Continuing TECHMAP pass.\n", - "35. Executing OPT pass (performing simple optimizations).\n", - "35.1. Executing OPT_EXPR pass (perform const folding).\n", - "35.2. Executing OPT_MERGE pass (detect identical cells).\n", - "35.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "35.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "35.5. Finished fast OPT passes.\n", - "36. Executing TECHMAP pass (map to technology primitives).\n", - "36.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_latch_hd.v\n", - "36.2. Continuing TECHMAP pass.\n", - "37. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_4' - skipping.\n", - "37.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "38. Executing OPT pass (performing simple optimizations).\n", - "38.1. Executing OPT_EXPR pass (perform const folding).\n", - "38.2. Executing OPT_MERGE pass (detect identical cells).\n", - "38.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "38.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "38.5. Executing OPT_MERGE pass (detect identical cells).\n", - "38.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "38.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "38.8. Executing OPT_EXPR pass (perform const folding).\n", - "38.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "38.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "38.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "38.12. Executing OPT_MERGE pass (detect identical cells).\n", - "38.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "38.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "38.15. Executing OPT_EXPR pass (perform const folding).\n", - "38.16. Finished OPT passes. (There is nothing left to do.)\n", - "Using ABC speed script.\n", - "[FLOW] Set ABC_CLOCK_PERIOD_IN_PS to: 12.5\n", - "39. Executing ABC pass (technology mapping using ABC).\n", - "39.1. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "39.1.1. Executing ABC.\n", - "39.1.2. Re-integrating ABC results.\n", - "39.2. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "39.2.1. Executing ABC.\n", - "39.2.2. Re-integrating ABC results.\n", - "39.3. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "39.3.1. Executing ABC.\n", - "39.3.2. Re-integrating ABC results.\n", - "39.4. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "39.4.1. Executing ABC.\n", - "39.4.2. Re-integrating ABC results.\n", - "39.5. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "39.5.1. Executing ABC.\n", - "39.5.2. Re-integrating ABC results.\n", - "39.6. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "39.6.1. Executing ABC.\n", - "39.6.2. Re-integrating ABC results.\n", - "39.7. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "39.7.1. Executing ABC.\n", - "39.7.2. Re-integrating ABC results.\n", - "40. Executing SETUNDEF pass (replace undef values with defined constants).\n", - "41. Executing SPLITNETS pass (splitting up multi-bit signals).\n", - "42. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "43. Executing HILOMAP pass (mapping to constant drivers).\n", - "44. Executing INSBUF pass (insert buffer cells for connected wires).\n", - "45. Executing CHECK pass (checking for obvious problems).\n", - "46. Printing statistics.\n", - "47. Executing Verilog backend.\n", - "Warnings: 35 unique messages, 243 total\n", - "End of script. Logfile hash: a905321bee, CPU: user 4.55s system 0.06s, MEM: 51.45 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 71% 2x abc (10 sec), 5% 34x opt_expr (0 sec), ...\n", - "Elapsed time: 0:14.61[h:]min:sec. CPU time: user 13.89 sys 0.68 (99%). Peak memory: 52732KB.\n", - "cp ./designs/130_180/riscv32i_3d/constraint.sdc ./results/130_180/riscv32i_3d/80MHz/1_synth.sdc\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "cp results/130_180/riscv32i_3d/80MHz/1_1_yosys.v results/130_180/riscv32i_3d/80MHz/1_synth.v\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/floorplan.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef\n", - "[INFO ODB-0223] Created 15 technology layers\n", - "[INFO ODB-0224] Created 30 technology vias\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd_merged.lef\n", - "[INFO ODB-0225] Created 441 library cells\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd_merged.lef\n", - "\n", - "==========================================================================\n", - "Floorplan check_setup\n", - "--------------------------------------------------------------------------\n", - "number instances in verilog is 5626\n", - "[WARNING IFP-0028] Core area lower left (20.000, 20.000) snapped to (20.240, 21.760).\n", - "[INFO IFP-0001] Added 352 rows of 2521 site unithd with height 1.\n", - "[INFO RSZ-0026] Removed 561 buffers.\n", - "Default units for flow\n", - " time 1ns\n", - " capacitance 1pF\n", - " resistance 1kohm\n", - " voltage 1v\n", - " current 1mA\n", - " power 1nW\n", - " distance 1um\n", - "\n", - "==========================================================================\n", - "floorplan final check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "floorplan final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -23932.58\n", - "\n", - "==========================================================================\n", - "floorplan final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -23.35\n", - "\n", - "==========================================================================\n", - "floorplan final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -23.35\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.55 0.55 library removal time\n", - " 0.55 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.55 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.12 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.00 0.02 0.07 0.07 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.02 0.00 0.07 ^ ready (out)\n", - " 0.07 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.07 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.02 12.48 library recovery time\n", - " 12.48 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.48 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.81 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4862_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.06 0.31 0.57 0.57 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 0.31 0.00 0.57 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.21 0.24 0.81 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 0.21 0.00 0.81 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.03 0.43 0.39 1.21 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.43 0.00 1.21 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.02 0.48 0.56 1.77 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.48 0.00 1.77 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.13 0.14 1.91 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 1.91 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.02 0.15 0.18 2.09 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.15 0.00 2.09 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.10 0.46 0.41 2.50 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.46 0.00 2.50 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 1.44 25.36 18.51 21.01 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 25.36 0.00 21.01 ^ riscv/dp/rf/_2820_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.00 0.56 2.41 23.42 ^ riscv/dp/rf/_2820_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1484_ (net)\n", - " 0.56 0.00 23.42 ^ riscv/dp/rf/_2821_/A1 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.45 0.14 23.56 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 0.45 0.00 23.56 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.00 0.04 0.35 23.92 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.04 0.00 23.92 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.03 2.10 1.65 25.57 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 2.10 0.00 25.57 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.08 0.49 26.06 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.08 0.00 26.06 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.00 0.06 0.06 26.12 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.06 0.00 26.12 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.12 0.12 26.24 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.12 0.00 26.24 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.10 0.11 26.35 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.10 0.00 26.35 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.10 0.30 26.65 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.10 0.00 26.65 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.05 0.15 26.81 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.05 0.00 26.81 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.06 0.07 26.88 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.06 0.00 26.88 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.31 8.89 6.69 33.56 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 8.89 0.00 33.56 ^ riscv/dp/_0576_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.79 0.31 33.87 v riscv/dp/_0576_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0228_ (net)\n", - " 0.79 0.00 33.87 v riscv/dp/_0582_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.06 1.68 1.58 35.45 ^ riscv/dp/_0582_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[0] (net)\n", - " 1.68 0.00 35.45 ^ riscv/dp/rf/_3655_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.07 0.34 35.79 ^ riscv/dp/rf/_3655_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0128_ (net)\n", - " 0.07 0.00 35.79 ^ riscv/dp/rf/_4862_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 35.79 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_4862_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -35.79 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -23.35 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.02 12.48 library recovery time\n", - " 12.48 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.48 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.81 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4862_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.06 0.31 0.57 0.57 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 0.31 0.00 0.57 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.21 0.24 0.81 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 0.21 0.00 0.81 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.03 0.43 0.39 1.21 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.43 0.00 1.21 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.02 0.48 0.56 1.77 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.48 0.00 1.77 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.13 0.14 1.91 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 1.91 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.02 0.15 0.18 2.09 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.15 0.00 2.09 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.10 0.46 0.41 2.50 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.46 0.00 2.50 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 1.44 25.36 18.51 21.01 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 25.36 0.00 21.01 ^ riscv/dp/rf/_2820_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.00 0.56 2.41 23.42 ^ riscv/dp/rf/_2820_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1484_ (net)\n", - " 0.56 0.00 23.42 ^ riscv/dp/rf/_2821_/A1 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.45 0.14 23.56 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 0.45 0.00 23.56 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.00 0.04 0.35 23.92 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.04 0.00 23.92 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.03 2.10 1.65 25.57 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 2.10 0.00 25.57 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.08 0.49 26.06 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.08 0.00 26.06 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.00 0.06 0.06 26.12 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.06 0.00 26.12 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.12 0.12 26.24 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.12 0.00 26.24 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.10 0.11 26.35 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.10 0.00 26.35 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.10 0.30 26.65 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.10 0.00 26.65 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.05 0.15 26.81 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.05 0.00 26.81 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.06 0.07 26.88 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.06 0.00 26.88 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.31 8.89 6.69 33.56 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 8.89 0.00 33.56 ^ riscv/dp/_0576_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.79 0.31 33.87 v riscv/dp/_0576_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0228_ (net)\n", - " 0.79 0.00 33.87 v riscv/dp/_0582_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.06 1.68 1.58 35.45 ^ riscv/dp/_0582_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[0] (net)\n", - " 1.68 0.00 35.45 ^ riscv/dp/rf/_3655_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.07 0.34 35.79 ^ riscv/dp/rf/_3655_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0128_ (net)\n", - " 0.07 0.00 35.79 ^ riscv/dp/rf/_4862_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 35.79 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_4862_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -35.79 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -23.35 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 79.7%\n", - "Combinational 4.43e-04 4.34e-04 1.64e-08 8.78e-04 20.3%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.88e-03 4.34e-04 2.50e-08 4.32e-03 100.0%\n", - " 89.9% 10.1% 0.0%\n", - "\n", - "==========================================================================\n", - "floorplan final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 63008 u^2 6% utilization.\n", - "\n", - "Elapsed time: 0:01.65[h:]min:sec. CPU time: user 1.46 sys 0.08 (93%). Peak memory: 106756KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_1_floorplan.odb ./results/130_180/riscv32i_3d/80MHz/2_2_floorplan_io.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_2_floorplan_io.odb ./results/130_180/riscv32i_3d/80MHz/2_3_floorplan_tdms.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/macro_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "No macros found: Skipping macro_placement\n", - "Elapsed time: 0:00.58[h:]min:sec. CPU time: user 0.46 sys 0.09 (96%). Peak memory: 114164KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/tapcell.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO TAP-0005] Inserted 14868 tapcells.\n", - "Elapsed time: 0:00.67[h:]min:sec. CPU time: user 0.56 sys 0.05 (90%). Peak memory: 94568KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/pdn.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting PDN generation\n", - "[INFO PDN-0001] Inserting grid: grid\n", - "Starting PDN generation\n", - "Elapsed time: 0:00.90[h:]min:sec. CPU time: user 0.76 sys 0.06 (91%). Peak memory: 102328KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.odb ./results/130_180/riscv32i_3d/80MHz/2_floorplan.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place_skip_io.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting global placement without IO\n", - "miemie\n", - "henhen\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[WARNING GPL-0001] ce_mem[0] toplevel port is not placed!\n", - " Replace will regard ce_mem[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[1] toplevel port is not placed!\n", - " Replace will regard ce_mem[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[2] toplevel port is not placed!\n", - " Replace will regard ce_mem[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[3] toplevel port is not placed!\n", - " Replace will regard ce_mem[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] clk toplevel port is not placed!\n", - " Replace will regard clk is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[0] toplevel port is not placed!\n", - " Replace will regard dataadr[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[1] toplevel port is not placed!\n", - " Replace will regard dataadr[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[2] toplevel port is not placed!\n", - " Replace will regard dataadr[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[3] toplevel port is not placed!\n", - " Replace will regard dataadr[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[4] toplevel port is not placed!\n", - " Replace will regard dataadr[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[5] toplevel port is not placed!\n", - " Replace will regard dataadr[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[6] toplevel port is not placed!\n", - " Replace will regard dataadr[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[7] toplevel port is not placed!\n", - " Replace will regard dataadr[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[0] toplevel port is not placed!\n", - " Replace will regard instr[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[10] toplevel port is not placed!\n", - " Replace will regard instr[10] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[11] toplevel port is not placed!\n", - " Replace will regard instr[11] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[12] toplevel port is not placed!\n", - " Replace will regard instr[12] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[13] toplevel port is not placed!\n", - " Replace will regard instr[13] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[14] toplevel port is not placed!\n", - " Replace will regard instr[14] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[15] toplevel port is not placed!\n", - " Replace will regard instr[15] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[16] toplevel port is not placed!\n", - " Replace will regard instr[16] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[17] toplevel port is not placed!\n", - " Replace will regard instr[17] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[18] toplevel port is not placed!\n", - " Replace will regard instr[18] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[19] toplevel port is not placed!\n", - " Replace will regard instr[19] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[1] toplevel port is not placed!\n", - " Replace will regard instr[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[20] toplevel port is not placed!\n", - " Replace will regard instr[20] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[21] toplevel port is not placed!\n", - " Replace will regard instr[21] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[22] toplevel port is not placed!\n", - " Replace will regard instr[22] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[23] toplevel port is not placed!\n", - " Replace will regard instr[23] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[24] toplevel port is not placed!\n", - " Replace will regard instr[24] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[25] toplevel port is not placed!\n", - " Replace will regard instr[25] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[26] toplevel port is not placed!\n", - " Replace will regard instr[26] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[27] toplevel port is not placed!\n", - " Replace will regard instr[27] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[28] toplevel port is not placed!\n", - " Replace will regard instr[28] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[29] toplevel port is not placed!\n", - " Replace will regard instr[29] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[2] toplevel port is not placed!\n", - " Replace will regard instr[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[30] toplevel port is not placed!\n", - " Replace will regard instr[30] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[31] toplevel port is not placed!\n", - " Replace will regard instr[31] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[3] toplevel port is not placed!\n", - " Replace will regard instr[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[4] toplevel port is not placed!\n", - " Replace will regard instr[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[5] toplevel port is not placed!\n", - " Replace will regard instr[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[6] toplevel port is not placed!\n", - " Replace will regard instr[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[7] toplevel port is not placed!\n", - " Replace will regard instr[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[8] toplevel port is not placed!\n", - " Replace will regard instr[8] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[9] toplevel port is not placed!\n", - " Replace will regard instr[9] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] memwrite toplevel port is not placed!\n", - " Replace will regard memwrite is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[0] toplevel port is not placed!\n", - " Replace will regard pc[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[10] toplevel port is not placed!\n", - " Replace will regard pc[10] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[11] toplevel port is not placed!\n", - " Replace will regard pc[11] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[12] toplevel port is not placed!\n", - " Replace will regard pc[12] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[13] toplevel port is not placed!\n", - " Replace will regard pc[13] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[14] toplevel port is not placed!\n", - " Replace will regard pc[14] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[15] toplevel port is not placed!\n", - " Replace will regard pc[15] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[16] toplevel port is not placed!\n", - " Replace will regard pc[16] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[17] toplevel port is not placed!\n", - " Replace will regard pc[17] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[18] toplevel port is not placed!\n", - " Replace will regard pc[18] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[19] toplevel port is not placed!\n", - " Replace will regard pc[19] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[1] toplevel port is not placed!\n", - " Replace will regard pc[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[20] toplevel port is not placed!\n", - " Replace will regard pc[20] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[21] toplevel port is not placed!\n", - " Replace will regard pc[21] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[22] toplevel port is not placed!\n", - " Replace will regard pc[22] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[23] toplevel port is not placed!\n", - " Replace will regard pc[23] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[24] toplevel port is not placed!\n", - " Replace will regard pc[24] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[25] toplevel port is not placed!\n", - " Replace will regard pc[25] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[26] toplevel port is not placed!\n", - " Replace will regard pc[26] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[27] toplevel port is not placed!\n", - " Replace will regard pc[27] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[28] toplevel port is not placed!\n", - " Replace will regard pc[28] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[29] toplevel port is not placed!\n", - " Replace will regard pc[29] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[2] toplevel port is not placed!\n", - " Replace will regard pc[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[30] toplevel port is not placed!\n", - " Replace will regard pc[30] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[31] toplevel port is not placed!\n", - " Replace will regard pc[31] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[3] toplevel port is not placed!\n", - " Replace will regard pc[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[4] toplevel port is not placed!\n", - " Replace will regard pc[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[5] toplevel port is not placed!\n", - " Replace will regard pc[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[6] toplevel port is not placed!\n", - " Replace will regard pc[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[7] toplevel port is not placed!\n", - " Replace will regard pc[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[8] toplevel port is not placed!\n", - " Replace will regard pc[8] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[9] toplevel port is not placed!\n", - " Replace will regard pc[9] is placed in (0, 0)\n", - "[WARNING GPL-0001] ready toplevel port is not placed!\n", - " Replace will regard ready is placed in (0, 0)\n", - "[WARNING GPL-0001] reset toplevel port is not placed!\n", - " Replace will regard reset is placed in (0, 0)\n", - "[WARNING GPL-0001] suspend toplevel port is not placed!\n", - " Replace will regard suspend is placed in (0, 0)\n", - "[WARNING GPL-0001] valid toplevel port is not placed!\n", - " Replace will regard valid is placed in (0, 0)\n", - "[WARNING GPL-0001] valid_reg toplevel port is not placed!\n", - " Replace will regard valid_reg is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[0] toplevel port is not placed!\n", - " Replace will regard we_mem[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[1] toplevel port is not placed!\n", - " Replace will regard we_mem[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[2] toplevel port is not placed!\n", - " Replace will regard we_mem[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[3] toplevel port is not placed!\n", - " Replace will regard we_mem[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[0] toplevel port is not placed!\n", - " Replace will regard writedata[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[1] toplevel port is not placed!\n", - " Replace will regard writedata[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[2] toplevel port is not placed!\n", - " Replace will regard writedata[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[3] toplevel port is not placed!\n", - " Replace will regard writedata[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[4] toplevel port is not placed!\n", - " Replace will regard writedata[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[5] toplevel port is not placed!\n", - " Replace will regard writedata[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[6] toplevel port is not placed!\n", - " Replace will regard writedata[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[7] toplevel port is not placed!\n", - " Replace will regard writedata[7] is placed in (0, 0)\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 73528\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 1.00\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 14942267\n", - "[INFO GPL-0026] IdealBinCnt: 74306\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 256 256\n", - "[INFO GPL-0029] BinSize: 4530 3740\n", - "[INFO GPL-0030] NumBins: 65536\n", - "aa\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20587\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 14628\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20587\n", - "[INFO GPL-0023] TargetDensity: 0.20\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 74964224\n", - "[INFO GPL-0026] IdealBinCnt: 14811\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 64 64\n", - "[INFO GPL-0029] BinSize: 18120 14960\n", - "[INFO GPL-0030] NumBins: 4096\n", - "[NesterovSolve] Iter: 1 overflow: 0.997108 HPWL: 16341346\n", - "[NesterovSolve] Iter: 10 overflow: 0.996962 HPWL: 8055736\n", - "[NesterovSolve] Iter: 20 overflow: 0.997059 HPWL: 7925699\n", - "[NesterovSolve] Iter: 30 overflow: 0.997026 HPWL: 7889535\n", - "[NesterovSolve] Iter: 40 overflow: 0.996855 HPWL: 7862205\n", - "[NesterovSolve] Iter: 50 overflow: 0.996431 HPWL: 7845889\n", - "[NesterovSolve] Iter: 60 overflow: 0.995915 HPWL: 7841907\n", - "[NesterovSolve] Iter: 70 overflow: 0.995686 HPWL: 7850601\n", - "[NesterovSolve] Iter: 80 overflow: 0.995683 HPWL: 7868845\n", - "[NesterovSolve] Iter: 90 overflow: 0.995677 HPWL: 7899971\n", - "[NesterovSolve] Iter: 100 overflow: 0.99566 HPWL: 7949717\n", - "[NesterovSolve] Iter: 110 overflow: 0.995515 HPWL: 8049690\n", - "[NesterovSolve] Iter: 120 overflow: 0.994272 HPWL: 8292064\n", - "[NesterovSolve] Iter: 130 overflow: 0.993953 HPWL: 8974211\n", - "[NesterovSolve] Iter: 140 overflow: 0.993578 HPWL: 10894534\n", - "[NesterovSolve] Iter: 150 overflow: 0.991915 HPWL: 15317766\n", - "[NesterovSolve] Iter: 160 overflow: 0.987364 HPWL: 22556841\n", - "[NesterovSolve] Iter: 170 overflow: 0.974851 HPWL: 34093945\n", - "[NesterovSolve] Iter: 180 overflow: 0.952973 HPWL: 46429828\n", - "[NesterovSolve] Iter: 190 overflow: 0.945298 HPWL: 52126369\n", - "[NesterovSolve] Iter: 200 overflow: 0.931198 HPWL: 59644764\n", - "[NesterovSolve] Iter: 210 overflow: 0.903559 HPWL: 74125749\n", - "[NesterovSolve] Iter: 220 overflow: 0.869349 HPWL: 87010969\n", - "[NesterovSolve] Iter: 230 overflow: 0.84556 HPWL: 97773601\n", - "[NesterovSolve] Iter: 240 overflow: 0.806427 HPWL: 111527656\n", - "[NesterovSolve] Iter: 250 overflow: 0.765486 HPWL: 123987198\n", - "[NesterovSolve] Iter: 260 overflow: 0.725056 HPWL: 133995788\n", - "[NesterovSolve] Iter: 270 overflow: 0.678261 HPWL: 144097506\n", - "[NesterovSolve] Iter: 280 overflow: 0.632655 HPWL: 154629267\n", - "[NesterovSolve] Iter: 290 overflow: 0.584717 HPWL: 163015366\n", - "[NesterovSolve] Iter: 300 overflow: 0.534802 HPWL: 167677731\n", - "[NesterovSolve] Iter: 310 overflow: 0.489636 HPWL: 173610907\n", - "[NesterovSolve] Iter: 320 overflow: 0.450549 HPWL: 179334660\n", - "[NesterovSolve] Iter: 330 overflow: 0.401905 HPWL: 182686103\n", - "[NesterovSolve] Iter: 340 overflow: 0.353443 HPWL: 188131976\n", - "[NesterovSolve] Iter: 350 overflow: 0.31267 HPWL: 191868947\n", - "[NesterovSolve] Iter: 360 overflow: 0.283072 HPWL: 193941211\n", - "[NesterovSolve] Iter: 370 overflow: 0.251722 HPWL: 195365531\n", - "[NesterovSolve] Iter: 380 overflow: 0.221333 HPWL: 197017662\n", - "[NesterovSolve] Iter: 390 overflow: 0.198235 HPWL: 198169738\n", - "[NesterovSolve] Iter: 400 overflow: 0.179627 HPWL: 198673726\n", - "[NesterovSolve] Iter: 410 overflow: 0.155951 HPWL: 199622965\n", - "[NesterovSolve] Iter: 420 overflow: 0.140848 HPWL: 200563351\n", - "[NesterovSolve] Iter: 430 overflow: 0.123813 HPWL: 201715302\n", - "[NesterovSolve] Iter: 440 overflow: 0.104607 HPWL: 202396252\n", - "[NesterovSolve] Finished with Overflow: 0.097488\n", - "Elapsed time: 0:02.98[h:]min:sec. CPU time: user 2.79 sys 0.10 (97%). Peak memory: 129116KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/io_placement.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO PPL-0060] Restrict pins [writedata[0] writedata[1] writedata[2] writedata[3] writedata[4] writedata[5] writedata[6] writedata[7]] to region (20.0u, 20.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [ce_mem[0] ce_mem[1] ce_mem[2] ce_mem[3] we_mem[0] we_mem[1] we_mem[2] we_mem[3]] to region (20.0u, 20.0u)-(40.0u, 40.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [dataadr[0] dataadr[1] dataadr[2] dataadr[3] dataadr[4] dataadr[5] dataadr[6] dataadr[7]] to region (20.0u, 960.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [inter_dmem0[0] inter_dmem0[1] inter_dmem0[2] inter_dmem0[3] inter_dmem0[4] inter_dmem0[5] inter_dmem0[6] inter_dmem0[7] inter_dmem1[0] inter_dmem1[1] inter_dmem1[2] inter_dmem1[3] inter_dmem1[4] inter_dmem1[5] inter_dmem1[6] inter_dmem1[7] inter_dmem2[0] inter_dmem2[1] inter_dmem2[2] inter_dmem2[3] inter_dmem2[4] inter_dmem2[5] inter_dmem2[6] inter_dmem2[7] inter_dmem3[0] inter_dmem3[1] inter_dmem3[2] inter_dmem3[3] inter_dmem3[4] inter_dmem3[5] inter_dmem3[6] inter_dmem3[7]] to region (1100.0u, 20.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "Found 0 macro blocks.\n", - "Using 2 tracks default min distance between IO pins.\n", - "[INFO PPL-0010] Tentative 0 to set up sections.\n", - "[INFO PPL-0001] Number of slots 1628\n", - "[INFO PPL-0062] Number of top layer slots 11136\n", - "[INFO PPL-0002] Number of I/O 127\n", - "[INFO PPL-0003] Number of I/O w/sink 126\n", - "[INFO PPL-0004] Number of I/O w/o sink 1\n", - "[INFO PPL-0005] Slots per section 200\n", - "[INFO PPL-0006] Slots increase factor 0.01\n", - "[INFO PPL-0008] Successfully assigned pins to sections.\n", - "[INFO PPL-0012] I/O nets HPWL: 58136.85 um.\n", - "begin generation pin location file\n", - "wd=writedata[0]\n", - "wd=writedata[1]\n", - "wd=writedata[2]\n", - "wd=writedata[3]\n", - "wd=writedata[4]\n", - "wd=writedata[5]\n", - "wd=writedata[6]\n", - "wd=writedata[7]\n", - "dataadr=dataadr[0]\n", - "dataadr=dataadr[1]\n", - "dataadr=dataadr[2]\n", - "dataadr=dataadr[3]\n", - "dataadr=dataadr[4]\n", - "dataadr=dataadr[5]\n", - "dataadr=dataadr[6]\n", - "dataadr=dataadr[7]\n", - "inter_dmem=inter_dmem0[0]\n", - "inter_dmem=inter_dmem0[1]\n", - "inter_dmem=inter_dmem0[2]\n", - "inter_dmem=inter_dmem0[3]\n", - "inter_dmem=inter_dmem0[4]\n", - "inter_dmem=inter_dmem0[5]\n", - "inter_dmem=inter_dmem0[6]\n", - "inter_dmem=inter_dmem0[7]\n", - "inter_dmem=inter_dmem1[0]\n", - "inter_dmem=inter_dmem1[1]\n", - "inter_dmem=inter_dmem1[2]\n", - "inter_dmem=inter_dmem1[3]\n", - "inter_dmem=inter_dmem1[4]\n", - "inter_dmem=inter_dmem1[5]\n", - "inter_dmem=inter_dmem1[6]\n", - "inter_dmem=inter_dmem1[7]\n", - "inter_dmem=inter_dmem2[0]\n", - "inter_dmem=inter_dmem2[1]\n", - "inter_dmem=inter_dmem2[2]\n", - "inter_dmem=inter_dmem2[3]\n", - "inter_dmem=inter_dmem2[4]\n", - "inter_dmem=inter_dmem2[5]\n", - "inter_dmem=inter_dmem2[6]\n", - "inter_dmem=inter_dmem2[7]\n", - "inter_dmem=inter_dmem3[0]\n", - "inter_dmem=inter_dmem3[1]\n", - "inter_dmem=inter_dmem3[2]\n", - "inter_dmem=inter_dmem3[3]\n", - "inter_dmem=inter_dmem3[4]\n", - "inter_dmem=inter_dmem3[5]\n", - "inter_dmem=inter_dmem3[6]\n", - "inter_dmem=inter_dmem3[7]\n", - "e_mem=ce_mem[0]\n", - "e_mem=ce_mem[1]\n", - "e_mem=ce_mem[2]\n", - "e_mem=ce_mem[3]\n", - "e_mem=we_mem[0]\n", - "e_mem=we_mem[1]\n", - "e_mem=we_mem[2]\n", - "e_mem=we_mem[3]\n", - "end generating pin location file\n", - "Elapsed time: 0:00.67[h:]min:sec. CPU time: user 0.52 sys 0.07 (88%). Peak memory: 105840KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 73528\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 1.00\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 14942267\n", - "[INFO GPL-0026] IdealBinCnt: 74306\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 256 256\n", - "[INFO GPL-0029] BinSize: 4530 3740\n", - "[INFO GPL-0030] NumBins: 65536\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[InitialPlace] Iter: 1 CG residual: 0.00000915 HPWL: 292812822\n", - "[InitialPlace] Iter: 2 CG residual: 0.00000201 HPWL: 122367514\n", - "[InitialPlace] Iter: 3 CG residual: 0.00000623 HPWL: 121901227\n", - "[InitialPlace] Iter: 4 CG residual: 0.00008770 HPWL: 121047584\n", - "[InitialPlace] Iter: 5 CG residual: 0.00008030 HPWL: 119459080\n", - "[InitialPlace] Iter: 6 CG residual: 0.00005638 HPWL: 117120683\n", - "[InitialPlace] Iter: 7 CG residual: 0.00002268 HPWL: 114528872\n", - "[InitialPlace] Iter: 8 CG residual: 0.00001497 HPWL: 112812481\n", - "[InitialPlace] Iter: 9 CG residual: 0.00000231 HPWL: 111804363\n", - "[INFO GPL-0031] FillerInit: NumGCells: 14016\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 0.19\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 78229192\n", - "[INFO GPL-0026] IdealBinCnt: 14192\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 64 64\n", - "[INFO GPL-0029] BinSize: 18120 14960\n", - "[INFO GPL-0030] NumBins: 4096\n", - "[NesterovSolve] Iter: 1 overflow: 0.977864 HPWL: 78550553\n", - "[NesterovSolve] Iter: 10 overflow: 0.933936 HPWL: 114236175\n", - "[NesterovSolve] Iter: 20 overflow: 0.90914 HPWL: 123178890\n", - "[NesterovSolve] Iter: 30 overflow: 0.900862 HPWL: 126937013\n", - "[NesterovSolve] Iter: 40 overflow: 0.901119 HPWL: 127289711\n", - "[NesterovSolve] Iter: 50 overflow: 0.901975 HPWL: 127142643\n", - "[NesterovSolve] Iter: 60 overflow: 0.902329 HPWL: 127054539\n", - "[NesterovSolve] Iter: 70 overflow: 0.903432 HPWL: 126306706\n", - "[NesterovSolve] Iter: 80 overflow: 0.9056 HPWL: 125005206\n", - "[NesterovSolve] Iter: 90 overflow: 0.908611 HPWL: 123782512\n", - "[NesterovSolve] Iter: 100 overflow: 0.911652 HPWL: 122999599\n", - "[NesterovSolve] Iter: 110 overflow: 0.913357 HPWL: 122728969\n", - "[NesterovSolve] Iter: 120 overflow: 0.912377 HPWL: 122979653\n", - "[NesterovSolve] Iter: 130 overflow: 0.912757 HPWL: 123640007\n", - "[NesterovSolve] Iter: 140 overflow: 0.9134 HPWL: 124747049\n", - "[NesterovSolve] Iter: 150 overflow: 0.911017 HPWL: 126522675\n", - "[NesterovSolve] Iter: 160 overflow: 0.906435 HPWL: 129427211\n", - "[NesterovSolve] Iter: 170 overflow: 0.89966 HPWL: 134022065\n", - "[NesterovSolve] Iter: 180 overflow: 0.889301 HPWL: 139611480\n", - "[NesterovSolve] Iter: 190 overflow: 0.877256 HPWL: 145558364\n", - "[NesterovSolve] Iter: 200 overflow: 0.862431 HPWL: 152617260\n", - "[NesterovSolve] Iter: 210 overflow: 0.836523 HPWL: 161797220\n", - "[NesterovSolve] Iter: 220 overflow: 0.8059 HPWL: 172096219\n", - "[INFO GPL-0100] worst slack -1.61e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 230 overflow: 0.771419 HPWL: 181338070\n", - "[NesterovSolve] Iter: 240 overflow: 0.742774 HPWL: 188529753\n", - "[NesterovSolve] Iter: 250 overflow: 0.697721 HPWL: 197538595\n", - "[NesterovSolve] Iter: 260 overflow: 0.653876 HPWL: 204226465\n", - "[INFO GPL-0100] worst slack -3.07e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 270 overflow: 0.615828 HPWL: 211088430\n", - "[NesterovSolve] Snapshot saved at iter = 272\n", - "[NesterovSolve] Iter: 280 overflow: 0.558622 HPWL: 216418487\n", - "[NesterovSolve] Iter: 290 overflow: 0.51533 HPWL: 220685728\n", - "[INFO GPL-0100] worst slack -2.18e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 300 overflow: 0.47452 HPWL: 226502326\n", - "[NesterovSolve] Iter: 310 overflow: 0.437822 HPWL: 228777212\n", - "[NesterovSolve] Iter: 320 overflow: 0.385584 HPWL: 231723065\n", - "[NesterovSolve] Iter: 330 overflow: 0.343404 HPWL: 235337966\n", - "[NesterovSolve] Iter: 340 overflow: 0.314844 HPWL: 236737577\n", - "[INFO GPL-0100] worst slack -1.91e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 350 overflow: 0.276182 HPWL: 239093792\n", - "[NesterovSolve] Iter: 360 overflow: 0.243931 HPWL: 239372701\n", - "[NesterovSolve] Iter: 370 overflow: 0.220396 HPWL: 239681163\n", - "[INFO GPL-0100] worst slack -1.58e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[INFO GPL-0075] Routability numCall: 1 inflationIterCnt: 1 bloatIterCnt: 0\n", - "[INFO GPL-0036] TileLxLy: 0 0\n", - "[INFO GPL-0037] TileSize: 6900 6900\n", - "[INFO GPL-0038] TileCnt: 173 144\n", - "[INFO GPL-0039] numRoutingLayers: 7\n", - "[INFO GPL-0040] NumTiles: 24912\n", - "[INFO GPL-0063] TotalRouteOverflowH2: 0.0\n", - "[INFO GPL-0064] TotalRouteOverflowV2: 0.0\n", - "[INFO GPL-0065] OverflowTileCnt2: 0\n", - "[INFO GPL-0066] 0.5%RC: 0.9924932957973941\n", - "[INFO GPL-0067] 1.0%RC: 0.9384718482999316\n", - "[INFO GPL-0068] 2.0%RC: 0.8475519785298987\n", - "[INFO GPL-0069] 5.0%RC: 0.7687056235492951\n", - "[INFO GPL-0070] 0.5rcK: 1.0\n", - "[INFO GPL-0071] 1.0rcK: 1.0\n", - "[INFO GPL-0072] 2.0rcK: 0.0\n", - "[INFO GPL-0073] 5.0rcK: 0.0\n", - "[INFO GPL-0074] FinalRC: 0.9654826\n", - "[NesterovSolve] Iter: 380 overflow: 0.195001 HPWL: 239777500\n", - "[NesterovSolve] Iter: 390 overflow: 0.174195 HPWL: 240314160\n", - "[NesterovSolve] Iter: 400 overflow: 0.155183 HPWL: 240750335\n", - "[INFO GPL-0100] worst slack -2.09e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 410 overflow: 0.135264 HPWL: 241374082\n", - "[NesterovSolve] Iter: 420 overflow: 0.116892 HPWL: 242505701\n", - "[NesterovSolve] Iter: 430 overflow: 0.10169 HPWL: 243051499\n", - "[NesterovSolve] Finished with Overflow: 0.099698\n", - "\n", - "==========================================================================\n", - "global place check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -67003.80\n", - "\n", - "==========================================================================\n", - "global place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -68.07\n", - "\n", - "==========================================================================\n", - "global place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -68.07\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.00 1.67 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.94 0.94 library removal time\n", - " 0.94 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.94 data required time\n", - " -1.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.73 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.01 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.08 0.08 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.03 0.00 0.08 ^ ready (out)\n", - " 0.08 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.08 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 64.9%\n", - "Combinational 5.89e-04 1.28e-03 1.64e-08 1.86e-03 35.1%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.03e-03 1.28e-03 2.50e-08 5.31e-03 100.0%\n", - " 76.0% 24.0% 0.0%\n", - "\n", - "==========================================================================\n", - "global place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 81611 u^2 7% utilization.\n", - "\n", - "Elapsed time: 0:54.79[h:]min:sec. CPU time: user 3426.41 sys 3.35 (6259%). Peak memory: 254088KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/resize.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "\n", - "==========================================================================\n", - "resizer pre check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer pre report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -67003.80\n", - "\n", - "==========================================================================\n", - "resizer pre report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -68.07\n", - "\n", - "==========================================================================\n", - "resizer pre report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -68.07\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.00 1.67 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.94 0.94 library removal time\n", - " 0.94 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.94 data required time\n", - " -1.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.73 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.01 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.08 0.08 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.03 0.00 0.08 ^ ready (out)\n", - " 0.08 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.08 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 64.9%\n", - "Combinational 5.89e-04 1.28e-03 1.64e-08 1.86e-03 35.1%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.03e-03 1.28e-03 2.50e-08 5.31e-03 100.0%\n", - " 76.0% 24.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer pre report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 81611 u^2 7% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "19933\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "20591\n", - "\n", - "Perform port buffering...\n", - "[INFO RSZ-0027] Inserted 66 input buffers.\n", - "[INFO RSZ-0028] Inserted 59 output buffers.\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "[INFO RSZ-0034] Found 226 slew violations.\n", - "[INFO RSZ-0036] Found 51 capacitance violations.\n", - "[INFO RSZ-0038] Inserted 161 buffers in 226 nets.\n", - "[INFO RSZ-0039] Resized 2607 instances.\n", - "Repair tie lo fanout...\n", - "[INFO RSZ-0042] Inserted 165 tie sky130_fd_sc_hd__conb_1 instances.\n", - "Repair tie hi fanout...\n", - "[INFO RSZ-0042] Inserted 2 tie sky130_fd_sc_hd__conb_1 instances.\n", - "\n", - "==========================================================================\n", - "report_floating_nets\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1190.19\n", - "\n", - "==========================================================================\n", - "resizer report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.63\n", - "\n", - "==========================================================================\n", - "resizer report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.63\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.35 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 0.35 library removal time\n", - " 0.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.35 data required time\n", - " -0.35 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 v input66/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.07 0.07 v input66/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net66 (net)\n", - " 0.03 0.00 0.07 v _145_/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.09 0.16 v _145_/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net112 (net)\n", - " 0.03 0.00 0.16 v output112/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.09 0.25 v output112/X (sky130_fd_sc_hd__clkbuf_1)\n", - " ready (net)\n", - " 0.03 0.00 0.25 v ready (out)\n", - " 0.25 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.25 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.25 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.24 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5131_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.97 0.89 1.44 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.98 0.01 1.45 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.07 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.07 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.64 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.64 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.79 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.79 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.07 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.07 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.35 0.25 0.27 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.25 0.00 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.77 0.69 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.77 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.18 0.23 4.54 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.56 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.19 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.13 0.63 6.17 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.13 0.00 6.17 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.23 0.27 6.44 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.23 0.00 6.44 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.75 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.75 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 6.84 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.85 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.07 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.08 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 7.63 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 7.63 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 7.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 8.13 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.13 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 8.54 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 8.54 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.83 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.83 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.11 0.12 8.95 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.11 0.00 8.95 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 9.19 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 9.19 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 9.42 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 9.42 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.17 0.18 9.59 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.17 0.00 9.59 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 9.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 9.73 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.53 10.26 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.31 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.31 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.34 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.62 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.04 11.66 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.76 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.76 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.95 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.96 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.12 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.12 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.60 0.51 12.62 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.60 0.00 12.62 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.15 0.25 12.87 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.88 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.10 0.09 12.97 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.10 0.00 12.97 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.83 13.80 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.10 0.03 13.83 ^ riscv/dp/rf/_4027_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 14.07 ^ riscv/dp/rf/_4027_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0397_ (net)\n", - " 0.07 0.00 14.07 ^ riscv/dp/rf/_5131_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5131_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.63 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.24 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5131_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.97 0.89 1.44 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.98 0.01 1.45 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.07 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.07 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.64 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.64 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.79 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.79 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.07 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.07 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.35 0.25 0.27 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.25 0.00 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.77 0.69 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.77 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.18 0.23 4.54 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.56 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.19 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.13 0.63 6.17 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.13 0.00 6.17 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.23 0.27 6.44 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.23 0.00 6.44 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.75 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.75 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 6.84 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.85 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.07 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.08 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 7.63 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 7.63 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 7.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 8.13 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.13 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 8.54 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 8.54 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.83 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.83 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.11 0.12 8.95 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.11 0.00 8.95 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 9.19 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 9.19 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 9.42 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 9.42 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.17 0.18 9.59 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.17 0.00 9.59 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 9.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 9.73 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.53 10.26 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.31 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.31 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.34 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.62 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.04 11.66 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.76 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.76 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.95 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.96 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.12 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.12 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.60 0.51 12.62 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.60 0.00 12.62 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.15 0.25 12.87 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.88 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.10 0.09 12.97 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.10 0.00 12.97 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.83 13.80 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.10 0.03 13.83 ^ riscv/dp/rf/_4027_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 14.07 ^ riscv/dp/rf/_4027_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0397_ (net)\n", - " 0.07 0.00 14.07 ^ riscv/dp/rf/_5131_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5131_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.63 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.027497228235006332\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0183\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.0030674519948661327\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0137\n", - "\n", - "==========================================================================\n", - "resizer max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "resizer setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 992\n", - "\n", - "==========================================================================\n", - "resizer hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 2\n", - "\n", - "==========================================================================\n", - "resizer critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0690\n", - "\n", - "==========================================================================\n", - "resizer critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.6346\n", - "\n", - "==========================================================================\n", - "resizer slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-11.618452\n", - "\n", - "==========================================================================\n", - "resizer report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.53e-09 3.44e-03 66.5%\n", - "Combinational 5.64e-04 1.17e-03 2.50e-08 1.73e-03 33.5%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.00e-03 1.17e-03 3.35e-08 5.17e-03 100.0%\n", - " 77.4% 22.6% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 95982 u^2 9% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "20382\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "21489\n", - "\n", - "Elapsed time: 0:04.99[h:]min:sec. CPU time: user 4.75 sys 0.14 (98%). Peak memory: 145128KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 14501.5 u\n", - "average displacement 0.7 u\n", - "max displacement 19.4 u\n", - "original HPWL 289472.3 u\n", - "legalized HPWL 302734.0 u\n", - "delta HPWL 5 %\n", - "\n", - "Detailed placement improvement.\n", - "Importing netlist into detailed improver.\n", - "[INFO DPO-0100] Creating network with 20382 cells, 127 terminals, 5752 edges and 21449 pins.\n", - "[INFO DPO-0109] Network stats: inst 20509, edges 5752, pins 21449\n", - "[INFO DPO-0110] Number of regions is 1\n", - "[INFO DPO-0401] Setting random seed to 1.\n", - "[INFO DPO-0402] Setting maximum displacement 5 1 to 13600 2720 units.\n", - "[INFO DPO-0320] Collected 14995 fixed cells (excluded terminal_NI).\n", - "[INFO DPO-0318] Collected 5514 single height cells.\n", - "[INFO DPO-0321] Collected 0 wide cells.\n", - "[INFO DPO-0322] Image (20240, 21760) - (1179900, 979200)\n", - "[INFO DPO-0310] Assigned 5514 cells into segments. Movement in X-direction is 5980.000000, movement in Y-direction is 2720.000000.\n", - "[WARNING DPO-0200] Unexpected displacement during legalization.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "[INFO DPO-0303] Running algorithm for independent set matching.\n", - "[INFO DPO-0300] Set matching objective is wirelength.\n", - "[INFO DPO-0301] Pass 1 of matching; objective is 3.033191e+08.\n", - "[INFO DPO-0302] End of matching; objective is 3.028057e+08, improvement is 0.17 percent.\n", - "[INFO DPO-0303] Running algorithm for global swaps.\n", - "[INFO DPO-0306] Pass 1 of global swaps; hpwl is 2.986619e+08.\n", - "[INFO DPO-0306] Pass 2 of global swaps; hpwl is 2.978684e+08.\n", - "[INFO DPO-0307] End of global swaps; objective is 2.978684e+08, improvement is 1.63 percent.\n", - "[INFO DPO-0303] Running algorithm for vertical swaps.\n", - "[INFO DPO-0308] Pass 1 of vertical swaps; hpwl is 2.968698e+08.\n", - "[INFO DPO-0309] End of vertical swaps; objective is 2.968698e+08, improvement is 0.34 percent.\n", - "[INFO DPO-0303] Running algorithm for reordering.\n", - "[INFO DPO-0304] Pass 1 of reordering; objective is 2.968066e+08.\n", - "[INFO DPO-0305] End of reordering; objective is 2.968066e+08, improvement is 0.02 percent.\n", - "[INFO DPO-0303] Running algorithm for random improvement.\n", - "[INFO DPO-0324] Random improver is using displacement generator.\n", - "[INFO DPO-0325] Random improver is using hpwl objective.\n", - "[INFO DPO-0326] Random improver cost string is (a).\n", - "[INFO DPO-0332] End of pass, Generator displacement called 110280 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 110280, swaps 9744, moves 39241 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 2.950980e+08, Scratch cost 2.919564e+08, Incremental cost 2.919564e+08, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 2.919564e+08.\n", - "[INFO DPO-0327] Pass 1 of random improver; improvement in cost is 1.06 percent.\n", - "[INFO DPO-0332] End of pass, Generator displacement called 110280 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 220560, swaps 19042, moves 78126 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 2.919564e+08, Scratch cost 2.908662e+08, Incremental cost 2.908662e+08, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 2.908662e+08.\n", - "[INFO DPO-0327] Pass 2 of random improver; improvement in cost is 0.37 percent.\n", - "[INFO DPO-0328] End of random improver; improvement is 1.434023 percent.\n", - "[INFO DPO-0380] Cell flipping.\n", - "[INFO DPO-0382] Changed 2713 cell orientations for row compatibility.\n", - "[INFO DPO-0383] Performed 1302 cell flips.\n", - "[INFO DPO-0384] End of flipping; objective is 2.894378e+08, improvement is 1.07 percent.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "Detailed Improvement Results\n", - "------------------------------------------\n", - "Original HPWL 302734.0 u\n", - "Final HPWL 288682.3 u\n", - "Delta HPWL -4.6 %\n", - "\n", - "[INFO DPL-0020] Mirrored 328 instances\n", - "[INFO DPL-0021] HPWL before 288682.3 u\n", - "[INFO DPL-0022] HPWL after 288322.8 u\n", - "[INFO DPL-0023] HPWL delta -0.1 %\n", - "[INFO FLW-0012] Placement violations .\n", - "\n", - "==========================================================================\n", - "detailed place check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "detailed place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1161.83\n", - "\n", - "==========================================================================\n", - "detailed place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.61\n", - "\n", - "==========================================================================\n", - "detailed place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.61\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1152_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.19 0.01 0.34 ^ riscv/dp/_1152_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.34 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1152_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 0.35 library removal time\n", - " 0.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.35 data required time\n", - " -0.34 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.01 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 v input66/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.02 0.07 0.07 v input66/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net66 (net)\n", - " 0.02 0.00 0.07 v _145_/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.02 0.07 0.14 v _145_/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net112 (net)\n", - " 0.02 0.00 0.14 v output112/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.08 0.22 v output112/X (sky130_fd_sc_hd__clkbuf_1)\n", - " ready (net)\n", - " 0.03 0.00 0.22 v ready (out)\n", - " 0.22 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.22 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.22 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.25 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5581_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.95 0.87 1.42 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.95 0.01 1.43 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.05 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.06 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.62 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.62 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.77 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.77 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.05 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.05 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 4.53 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.55 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 6.14 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 6.14 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 6.41 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 6.41 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.71 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.71 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 6.81 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.82 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.04 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.04 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 7.60 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 7.60 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 7.94 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.94 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 8.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 8.49 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 8.49 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.78 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.78 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 8.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 8.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 9.15 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 9.15 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 9.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 9.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 9.55 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 9.55 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 9.68 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 9.68 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 10.20 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.25 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.25 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.28 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.56 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 11.60 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.71 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.71 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.90 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.91 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 12.06 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.06 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 12.57 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 12.57 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 12.82 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.83 ^ riscv/dp/_0663_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 12.93 v riscv/dp/_0663_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0285_ (net)\n", - " 0.11 0.00 12.93 v riscv/dp/_0666_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.84 13.76 ^ riscv/dp/_0666_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[15] (net)\n", - " 1.11 0.03 13.80 ^ riscv/dp/rf/_4536_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.25 14.04 ^ riscv/dp/rf/_4536_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0847_ (net)\n", - " 0.07 0.00 14.04 ^ riscv/dp/rf/_5581_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.04 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5581_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.61 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.25 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5581_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.95 0.87 1.42 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.95 0.01 1.43 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.05 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.06 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.62 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.62 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.77 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.77 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.05 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.05 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 4.53 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.55 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 6.14 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 6.14 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 6.41 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 6.41 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.71 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.71 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 6.81 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.82 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.04 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.04 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 7.60 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 7.60 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 7.94 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.94 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 8.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 8.49 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 8.49 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.78 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.78 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 8.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 8.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 9.15 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 9.15 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 9.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 9.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 9.55 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 9.55 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 9.68 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 9.68 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 10.20 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.25 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.25 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.28 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.56 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 11.60 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.71 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.71 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.90 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.91 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 12.06 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.06 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 12.57 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 12.57 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 12.82 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.83 ^ riscv/dp/_0663_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 12.93 v riscv/dp/_0663_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0285_ (net)\n", - " 0.11 0.00 12.93 v riscv/dp/_0666_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.84 13.76 ^ riscv/dp/_0666_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[15] (net)\n", - " 1.11 0.03 13.80 ^ riscv/dp/rf/_4536_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.25 14.04 ^ riscv/dp/rf/_4536_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0847_ (net)\n", - " 0.07 0.00 14.04 ^ riscv/dp/rf/_5581_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.04 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5581_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.61 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "detailed place setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 992\n", - "\n", - "==========================================================================\n", - "detailed place hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 14\n", - "\n", - "==========================================================================\n", - "detailed place critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0448\n", - "\n", - "==========================================================================\n", - "detailed place critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.6119\n", - "\n", - "==========================================================================\n", - "detailed place slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-11.476846\n", - "\n", - "==========================================================================\n", - "detailed place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.53e-09 3.44e-03 61.5%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 38.5%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.11e-03 1.48e-03 3.36e-08 5.59e-03 100.0%\n", - " 73.5% 26.5% 0.0%\n", - "\n", - "==========================================================================\n", - "detailed place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 95982 u^2 9% utilization.\n", - "\n", - "Elapsed time: 0:03.93[h:]min:sec. CPU time: user 3.70 sys 0.12 (97%). Peak memory: 160732KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/3_5_place_dp.odb ./results/130_180/riscv32i_3d/80MHz/3_place.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_floorplan.sdc ./results/130_180/riscv32i_3d/80MHz/3_place.sdc\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.tmp.log ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/cts.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Finsh adding delay caused by TSV\n", - "[INFO CTS-0049] Characterization buffer is: sky130_fd_sc_hd__clkbuf_4.\n", - "[INFO CTS-0039] Number of created patterns = 12240.\n", - "[INFO CTS-0084] Compiling LUT.\n", - "Min. len Max. len Min. cap Max. cap Min. slew Max. slew\n", - "2 8 1 36 1 12 \n", - "[WARNING CTS-0043] 1632 wires are pure wire and no slew degradation.\n", - "TritonCTS forced slew degradation on these wires.\n", - "[INFO CTS-0046] Number of wire segments: 12240.\n", - "[INFO CTS-0047] Number of keys in characterization LUT: 1648.\n", - "[INFO CTS-0048] Actual min input cap: 1.\n", - "[INFO CTS-0007] Net \"clk\" found for clock \"clk\".\n", - "[INFO CTS-0010] Clock net \"clk\" has 1056 sinks.\n", - "[INFO CTS-0008] TritonCTS found 1 clock nets.\n", - "[INFO CTS-0097] Characterization used 1 buffer(s) types.\n", - "[INFO CTS-0200] 0 placement blockages have been identified.\n", - "[INFO CTS-0201] 0 placed hard macros will be treated like blockages.\n", - "[INFO CTS-0027] Generating H-Tree topology for net clk.\n", - "[INFO CTS-0028] Total number of sinks: 1056.\n", - "[INFO CTS-0029] Sinks will be clustered in groups of up to 30 and with maximum cluster diameter of 100.0 um.\n", - "[INFO CTS-0030] Number of static layers: 0.\n", - "[INFO CTS-0020] Wire segment unit: 13600 dbu (13 um).\n", - "[INFO CTS-0019] Total number of sinks after clustering: 79.\n", - "[INFO CTS-0024] Normalized sink region: [(22.3322, 7.46957), (74.8202, 47.2733)].\n", - "[INFO CTS-0025] Width: 52.4881.\n", - "[INFO CTS-0026] Height: 39.8037.\n", - " Level 1\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 40\n", - " Sub-region size: 26.2440 X 39.8037\n", - "[INFO CTS-0034] Segment length (rounded): 14.\n", - " Key: 252 inSlew: 1 inCap: 2 outSlew: 1 load: 1 length: 8 delay: 8\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Key: 156 inSlew: 1 inCap: 2 outSlew: 2 load: 1 length: 6 delay: 1\n", - " Level 2\n", - " Direction: Vertical\n", - " Sinks per sub-region: 20\n", - " Sub-region size: 26.2440 X 19.9019\n", - "[INFO CTS-0034] Segment length (rounded): 10.\n", - " Key: 253 inSlew: 2 inCap: 2 outSlew: 1 load: 1 length: 8 delay: 10\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Key: 2 inSlew: 3 inCap: 1 outSlew: 1 load: 1 length: 2 delay: 12\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Level 3\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 10\n", - " Sub-region size: 13.1220 X 19.9019\n", - "[INFO CTS-0034] Segment length (rounded): 6.\n", - " Key: 156 inSlew: 1 inCap: 2 outSlew: 2 load: 1 length: 6 delay: 1\n", - "[INFO CTS-0032] Stop criterion found. Max number of sinks is 15.\n", - "[INFO CTS-0035] Number of sinks covered: 79.\n", - "[INFO CTS-0018] Created 98 clock buffers.\n", - "[INFO CTS-0012] Minimum number of buffers in the clock path: 6.\n", - "[INFO CTS-0013] Maximum number of buffers in the clock path: 6.\n", - "[INFO CTS-0015] Created 98 clock nets.\n", - "[INFO CTS-0016] Fanout distribution for the current clock = 4:2, 5:1, 6:1, 7:2, 8:3, 9:3, 10:10, 11:13, 12:9, 13:8, 14:7, 15:6, 16:4, 17:5, 18:5, 19:2, 20:1, 22:4, 23:1..\n", - "[INFO CTS-0017] Max level of the clock tree: 3.\n", - "[INFO CTS-0098] Clock net \"clk\"\n", - "[INFO CTS-0099] Sinks 1056\n", - "[INFO CTS-0100] Leaf buffers 79\n", - "[INFO CTS-0101] Average sink wire length 1774.83 um\n", - "[INFO CTS-0102] Path depth 6 - 6\n", - "\n", - "==========================================================================\n", - "cts pre-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1173.51\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.72\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.72\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.60\n", - "riscv/dp/rf/_5389_/CLK ^\n", - " 1.95 0.00 -0.36\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.77 ^ riscv/dp/_1158_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.77 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.42 2.34 library removal time\n", - " 2.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.34 data required time\n", - " -0.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.56 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[2] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1160_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[2] (in)\n", - " instr[2] (net)\n", - " 0.00 0.00 0.38 v input23/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.08 0.08 0.15 0.52 v input23/X (sky130_fd_sc_hd__buf_6)\n", - " net23 (net)\n", - " 0.08 0.02 0.54 v _067_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.11 0.13 0.67 ^ _067_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _016_ (net)\n", - " 0.11 0.00 0.67 ^ _068_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 8 0.04 0.11 0.13 0.79 v _068_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[2] (net)\n", - " 0.11 0.00 0.80 v riscv/_119_/A (sky130_fd_sc_hd__nand3_4)\n", - " 3 0.03 0.11 0.13 0.93 ^ riscv/_119_/Y (sky130_fd_sc_hd__nand3_4)\n", - " riscv/_000_ (net)\n", - " 0.11 0.00 0.93 ^ riscv/_138_/B1 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.06 0.14 0.19 1.11 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.14 0.00 1.12 v riscv/dp/_0556_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.10 0.17 1.29 ^ riscv/dp/_0556_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0216_ (net)\n", - " 0.10 0.00 1.29 ^ riscv/dp/_0558_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.08 1.37 v riscv/dp/_0558_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[30] (net)\n", - " 0.05 0.00 1.37 v riscv/dp/_1160_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.37 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1160_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.00 1.91 library hold time\n", - " 1.91 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.91 data required time\n", - " -1.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.54 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts pre-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 1000\n", - "\n", - "==========================================================================\n", - "cts pre-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 572\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.7749\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.7238\n", - "\n", - "==========================================================================\n", - "cts pre-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-10.927486\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.1%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 28.7%\n", - "Clock 3.59e-04 1.60e-03 4.51e-10 1.96e-03 26.2%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.08e-03 3.40e-08 7.48e-03 100.0%\n", - " 58.8% 41.2% 0.0%\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 96718 u^2 9% utilization.\n", - "\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "\n", - "==========================================================================\n", - "cts post-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts post-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1173.51\n", - "\n", - "==========================================================================\n", - "cts post-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.72\n", - "\n", - "==========================================================================\n", - "cts post-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.72\n", - "\n", - "==========================================================================\n", - "cts post-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.60\n", - "riscv/dp/rf/_5389_/CLK ^\n", - " 1.95 0.00 -0.36\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.77 ^ riscv/dp/_1158_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.77 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.42 2.34 library removal time\n", - " 2.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.34 data required time\n", - " -0.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.56 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[2] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1160_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[2] (in)\n", - " instr[2] (net)\n", - " 0.00 0.00 0.38 v input23/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.08 0.08 0.15 0.52 v input23/X (sky130_fd_sc_hd__buf_6)\n", - " net23 (net)\n", - " 0.08 0.02 0.54 v _067_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.11 0.13 0.67 ^ _067_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _016_ (net)\n", - " 0.11 0.00 0.67 ^ _068_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 8 0.04 0.11 0.13 0.79 v _068_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[2] (net)\n", - " 0.11 0.00 0.80 v riscv/_119_/A (sky130_fd_sc_hd__nand3_4)\n", - " 3 0.03 0.11 0.13 0.93 ^ riscv/_119_/Y (sky130_fd_sc_hd__nand3_4)\n", - " riscv/_000_ (net)\n", - " 0.11 0.00 0.93 ^ riscv/_138_/B1 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.06 0.14 0.19 1.11 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.14 0.00 1.12 v riscv/dp/_0556_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.10 0.17 1.29 ^ riscv/dp/_0556_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0216_ (net)\n", - " 0.10 0.00 1.29 ^ riscv/dp/_0558_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.08 1.37 v riscv/dp/_0558_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[30] (net)\n", - " 0.05 0.00 1.37 v riscv/dp/_1160_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.37 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1160_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.00 1.91 library hold time\n", - " 1.91 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.91 data required time\n", - " -1.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.54 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts post-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 1000\n", - "\n", - "==========================================================================\n", - "cts post-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 572\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.7749\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.7238\n", - "\n", - "==========================================================================\n", - "cts post-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-10.927486\n", - "\n", - "==========================================================================\n", - "cts post-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.1%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 28.7%\n", - "Clock 3.59e-04 1.60e-03 4.51e-10 1.96e-03 26.2%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.08e-03 3.40e-08 7.48e-03 100.0%\n", - " 58.8% 41.2% 0.0%\n", - "\n", - "==========================================================================\n", - "cts post-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 96718 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 126.8 u\n", - "average displacement 0.0 u\n", - "max displacement 5.2 u\n", - "original HPWL 302482.1 u\n", - "legalized HPWL 306401.0 u\n", - "delta HPWL 1 %\n", - "\n", - "Repair setup and hold violations...\n", - "TNS end percent 100\n", - "[INFO RSZ-0094] Found 1000 endpoints with setup violations.\n", - "[INFO RSZ-0045] Inserted 19 buffers, 1 to split loads.\n", - "[INFO RSZ-0041] Resized 4 instances.\n", - "[INFO RSZ-0043] Swapped pins on 1 instances.\n", - "[INFO RSZ-0049] Cloned 5 instances.\n", - "[INFO RSZ-0046] Found 603 endpoints with hold violations.\n", - "[INFO RSZ-0032] Inserted 52 hold buffers.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 312.4 u\n", - "average displacement 0.0 u\n", - "max displacement 11.1 u\n", - "original HPWL 310970.3 u\n", - "legalized HPWL 311226.4 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "cts final check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -0.00\n", - "\n", - "==========================================================================\n", - "cts final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "cts final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 0.01\n", - "\n", - "==========================================================================\n", - "cts final report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5003_/CLK ^\n", - " 1.95\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.61 0.00 0.34\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1159_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.81 ^ riscv/dp/_1159_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.81 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.51 0.51 1.51 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.51 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.91 ^ riscv/dp/_1159_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.91 clock reconvergence pessimism\n", - " 0.44 2.35 library removal time\n", - " 2.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.35 data required time\n", - " -2.81 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.45 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem1[6] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5700_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem1[6] (in)\n", - " inter_dmem1[6] (net)\n", - " 0.00 0.00 0.38 ^ input47/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.02 0.12 0.15 0.52 ^ input47/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net47 (net)\n", - " 0.12 0.00 0.52 ^ _138_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.06 0.10 0.62 v _138_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _044_ (net)\n", - " 0.06 0.00 0.62 v _140_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.01 0.13 0.25 0.87 ^ _140_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " dmem_communicate.mem_out[6] (net)\n", - " 0.13 0.00 0.87 ^ riscv/dp/_0611_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.21 1.07 ^ riscv/dp/_0611_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0251_ (net)\n", - " 0.13 0.00 1.08 ^ riscv/dp/_0612_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.08 0.12 1.19 v riscv/dp/_0612_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0252_ (net)\n", - " 0.08 0.00 1.19 v riscv/dp/_0613_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.18 0.56 0.41 1.60 ^ riscv/dp/_0613_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[6] (net)\n", - " 0.57 0.04 1.64 ^ riscv/dp/rf/_4670_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.04 0.21 1.85 ^ riscv/dp/rf/_4670_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0966_ (net)\n", - " 0.04 0.00 1.85 ^ riscv/dp/rf/_5700_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.18 0.26 1.01 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.18 0.00 1.01 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.15 0.44 0.47 1.48 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.44 0.00 1.48 ^ clkbuf_leaf_56_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.38 1.86 ^ clkbuf_leaf_56_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_56_clk (net)\n", - " 0.22 0.00 1.86 ^ riscv/dp/rf/_5700_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.86 clock reconvergence pessimism\n", - " -0.01 1.85 library hold time\n", - " 1.85 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.85 data required time\n", - " -1.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.84 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.84 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 14.21 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 14.21 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.21 clock reconvergence pessimism\n", - " 0.16 14.38 library recovery time\n", - " 14.38 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.38 data required time\n", - " -2.84 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.54 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5004_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 0.98 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 0.98 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 1.39 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 1.39 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 1.71 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 1.71 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.31 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.31 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.96 0.87 3.19 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.96 0.01 3.20 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.35 0.39 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.35 0.00 3.59 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.39 0.49 4.08 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.39 0.00 4.08 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.14 4.23 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.23 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.50 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.51 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 4.79 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 4.80 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.15 0.24 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.15 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.20 5.24 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.25 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.48 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 5.50 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 5.73 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 5.74 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.98 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.99 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.24 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 6.25 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.47 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.49 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.10 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.10 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.37 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.37 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.15 0.30 7.67 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.15 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 7.78 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.00 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 8.56 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 8.56 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 8.91 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 8.91 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.06 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.06 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 9.47 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 9.47 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.76 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.76 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 9.88 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 9.88 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.13 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.13 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.07 0.21 10.34 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 10.34 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.07 0.08 10.43 v riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.07 0.00 10.43 v riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.19 0.18 10.61 ^ riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.19 0.00 10.61 ^ riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.34 0.55 0.55 11.16 ^ riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.56 0.05 11.21 ^ _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.01 0.11 0.11 11.32 v _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.11 0.00 11.32 v rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.06 0.19 11.50 v rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.08 0.03 11.53 v wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.08 0.17 11.70 v wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.11 0.04 11.74 v _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.20 0.22 11.96 ^ _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.20 0.00 11.96 ^ _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.17 0.16 12.12 v _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.17 0.01 12.12 v riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.29 ^ riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.29 ^ riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.15 0.14 12.43 v riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.15 0.00 12.43 v load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.08 0.21 12.64 v load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.08 0.01 12.65 v riscv/dp/_0658_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 3 0.05 0.95 0.75 13.39 ^ riscv/dp/_0658_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0282_ (net)\n", - " 0.95 0.00 13.40 ^ clone21/A1 (sky130_fd_sc_hd__o22ai_2)\n", - " 7 0.03 0.23 0.32 13.72 v clone21/Y (sky130_fd_sc_hd__o22ai_2)\n", - " net474 (net)\n", - " 0.23 0.00 13.72 v riscv/dp/rf/_3849_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.35 14.07 v riscv/dp/rf/_3849_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0270_ (net)\n", - " 0.06 0.00 14.07 v riscv/dp/rf/_5004_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.83 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.83 ^ clkbuf_leaf_37_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 14 0.06 0.19 0.33 14.16 ^ clkbuf_leaf_37_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_37_clk (net)\n", - " 0.19 0.00 14.16 ^ riscv/dp/rf/_5004_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.16 clock reconvergence pessimism\n", - " -0.08 14.08 library setup time\n", - " 14.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.08 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.01 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.84 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.84 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 14.21 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 14.21 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.21 clock reconvergence pessimism\n", - " 0.16 14.38 library recovery time\n", - " 14.38 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.38 data required time\n", - " -2.84 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.54 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5004_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 0.98 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 0.98 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 1.39 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 1.39 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 1.71 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 1.71 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.31 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.31 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.96 0.87 3.19 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.96 0.01 3.20 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.35 0.39 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.35 0.00 3.59 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.39 0.49 4.08 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.39 0.00 4.08 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.14 4.23 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.23 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.50 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.51 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 4.79 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 4.80 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.15 0.24 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.15 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.20 5.24 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.25 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.48 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 5.50 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 5.73 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 5.74 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.98 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.99 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.24 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 6.25 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.47 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.49 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.10 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.10 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.37 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.37 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.15 0.30 7.67 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.15 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 7.78 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.00 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 8.56 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 8.56 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 8.91 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 8.91 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.06 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.06 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 9.47 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 9.47 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.76 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.76 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 9.88 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 9.88 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.13 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.13 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.07 0.21 10.34 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 10.34 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.07 0.08 10.43 v riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.07 0.00 10.43 v riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.19 0.18 10.61 ^ riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.19 0.00 10.61 ^ riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.34 0.55 0.55 11.16 ^ riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.56 0.05 11.21 ^ _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.01 0.11 0.11 11.32 v _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.11 0.00 11.32 v rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.06 0.19 11.50 v rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.08 0.03 11.53 v wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.08 0.17 11.70 v wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.11 0.04 11.74 v _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.20 0.22 11.96 ^ _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.20 0.00 11.96 ^ _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.17 0.16 12.12 v _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.17 0.01 12.12 v riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.29 ^ riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.29 ^ riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.15 0.14 12.43 v riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.15 0.00 12.43 v load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.08 0.21 12.64 v load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.08 0.01 12.65 v riscv/dp/_0658_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 3 0.05 0.95 0.75 13.39 ^ riscv/dp/_0658_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0282_ (net)\n", - " 0.95 0.00 13.40 ^ clone21/A1 (sky130_fd_sc_hd__o22ai_2)\n", - " 7 0.03 0.23 0.32 13.72 v clone21/Y (sky130_fd_sc_hd__o22ai_2)\n", - " net474 (net)\n", - " 0.23 0.00 13.72 v riscv/dp/rf/_3849_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.35 14.07 v riscv/dp/rf/_3849_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0270_ (net)\n", - " 0.06 0.00 14.07 v riscv/dp/rf/_5004_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.83 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.83 ^ clkbuf_leaf_37_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 14 0.06 0.19 0.33 14.16 ^ clkbuf_leaf_37_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_37_clk (net)\n", - " 0.19 0.00 14.16 ^ riscv/dp/rf/_5004_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.16 clock reconvergence pessimism\n", - " -0.08 14.08 library setup time\n", - " 14.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.08 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.01 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.52 -0.03 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.03251943364739418\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0217\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.006477809976786375\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0289\n", - "\n", - "==========================================================================\n", - "cts final max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts final setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "cts final hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts final critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0654\n", - "\n", - "==========================================================================\n", - "cts final critical path slack\n", - "--------------------------------------------------------------------------\n", - "0.0111\n", - "\n", - "==========================================================================\n", - "cts final slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "0.078917\n", - "\n", - "==========================================================================\n", - "cts final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.4%\n", - "Combinational 6.68e-04 1.44e-03 2.56e-08 2.11e-03 28.4%\n", - "Clock 3.59e-04 1.59e-03 4.51e-10 1.95e-03 26.3%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.03e-03 3.46e-08 7.43e-03 100.0%\n", - " 59.2% 40.8% 0.0%\n", - "\n", - "==========================================================================\n", - "cts final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 97589 u^2 9% utilization.\n", - "\n", - "Elapsed time: 0:36.26[h:]min:sec. CPU time: user 35.93 sys 0.13 (99%). Peak memory: 184572KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/4_1_cts.odb ./results/130_180/riscv32i_3d/80MHz/4_cts.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_route.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GRT-0020] Min routing layer: met1\n", - "[INFO GRT-0021] Max routing layer: Metal4\n", - "[INFO GRT-0022] Global adjustment: 0%\n", - "[INFO GRT-0023] Grid origin: (0, 0)\n", - "[INFO GRT-0043] No OR_DEFAULT vias defined.\n", - "[INFO GRT-0088] Layer li1 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3400\n", - "[INFO GRT-0088] Layer met1 Track-Pitch = 0.3400 line-2-Via Pitch: 0.3400\n", - "[INFO GRT-0088] Layer met2 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3500\n", - "[INFO GRT-0088] Layer met3 Track-Pitch = 0.6800 line-2-Via Pitch: 0.6150\n", - "[INFO GRT-0088] Layer met4 Track-Pitch = 0.9200 line-2-Via Pitch: 1.0400\n", - "[INFO GRT-0088] Layer met5 Track-Pitch = 3.4000 line-2-Via Pitch: 3.1100\n", - "[INFO GRT-0088] Layer Metal4 Track-Pitch = 0.9000 line-2-Via Pitch: 1.4100\n", - "[INFO GRT-0019] Found 99 clock nets.\n", - "[WARNING GRT-0036] Pin instr[0] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[10] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[11] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[12] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[13] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[14] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[15] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[16] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[17] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[18] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[19] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[1] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[20] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[21] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[22] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[23] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[24] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[25] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[26] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[27] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[28] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[29] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[2] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[30] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[31] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[3] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[4] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[5] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[6] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[7] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[8] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[9] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[24] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[25] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[26] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[27] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[28] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[29] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[30] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[31] is outside die area.\n", - "[WARNING GRT-0036] Pin ready is outside die area.\n", - "[WARNING GRT-0036] Pin suspend is outside die area.\n", - "[WARNING GRT-0036] Pin valid is outside die area.\n", - "[WARNING GRT-0036] Pin valid_reg is outside die area.\n", - "[INFO GRT-0001] Minimum degree: 2\n", - "[INFO GRT-0002] Maximum degree: 94\n", - "[INFO GRT-0003] Macros: 0\n", - "[INFO GRT-0004] Blockages: 27881\n", - "\n", - "[INFO GRT-0053] Routing resources analysis:\n", - " Routing Original Derated Resource\n", - "Layer Direction Resources Resources Reduction (%)\n", - "---------------------------------------------------------------\n", - "li1 Vertical 0 0 0.00%\n", - "met1 Horizontal 502107 337932 32.70%\n", - "met2 Vertical 375117 298298 20.48%\n", - "met3 Horizontal 250967 199348 20.57%\n", - "met4 Vertical 150450 99957 33.56%\n", - "met5 Horizontal 50055 24888 50.28%\n", - "Metal4 Vertical 100972 53182 47.33%\n", - "---------------------------------------------------------------\n", - "\n", - "[INFO GRT-0197] Via related to pin nodes: 28655\n", - "[INFO GRT-0198] Via related Steiner nodes: 1716\n", - "[INFO GRT-0199] Via filling finished.\n", - "[INFO GRT-0111] Final number of vias: 33688\n", - "[INFO GRT-0112] Final usage 3D: 159953\n", - "\n", - "[INFO GRT-0096] Final congestion report:\n", - "Layer Resource Demand Usage (%) Max H / Max V / Total Overflow\n", - "---------------------------------------------------------------------------------------\n", - "li1 0 0 0.00% 0 / 0 / 0\n", - "met1 337932 27802 8.23% 0 / 0 / 0\n", - "met2 298298 27064 9.07% 0 / 0 / 0\n", - "met3 199348 3045 1.53% 0 / 0 / 0\n", - "met4 99957 950 0.95% 0 / 0 / 0\n", - "met5 24888 12 0.05% 0 / 0 / 0\n", - "Metal4 53182 16 0.03% 0 / 0 / 0\n", - "---------------------------------------------------------------------------------------\n", - "Total 1013605 58889 5.81% 0 / 0 / 0\n", - "\n", - "[INFO GRT-0018] Total wirelength: 532514 um\n", - "[INFO GRT-0014] Routed nets: 5868\n", - "\n", - "==========================================================================\n", - "global route pre repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -212.74\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.90\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.90\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.85 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.57 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem0[5] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5571_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem0[5] (in)\n", - " inter_dmem0[5] (net)\n", - " 0.00 0.00 0.38 ^ input38/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.01 0.07 0.09 0.46 ^ input38/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net38 (net)\n", - " 0.07 0.00 0.46 ^ _136_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.07 0.10 0.56 v _136_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _043_ (net)\n", - " 0.07 0.00 0.56 v _137_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 1 0.03 0.12 0.12 0.68 ^ _137_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[5] (net)\n", - " 0.12 0.00 0.68 ^ riscv/dp/_0606_/A_N (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.14 0.18 0.86 ^ riscv/dp/_0606_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0248_ (net)\n", - " 0.14 0.00 0.87 ^ riscv/dp/_0607_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.04 0.13 0.16 1.02 v riscv/dp/_0607_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0249_ (net)\n", - " 0.13 0.00 1.03 v riscv/dp/_0608_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.24 0.74 0.52 1.54 ^ riscv/dp/_0608_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[5] (net)\n", - " 0.77 0.11 1.65 ^ riscv/dp/rf/_4525_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.24 1.90 ^ riscv/dp/rf/_4525_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0837_ (net)\n", - " 0.05 0.00 1.90 ^ riscv/dp/rf/_5571_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.90 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 0.95 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 0.95 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 1.37 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 1.37 ^ clkbuf_leaf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 19 0.08 0.25 0.39 1.76 ^ clkbuf_leaf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_0_clk (net)\n", - " 0.25 0.00 1.77 ^ riscv/dp/rf/_5571_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.77 clock reconvergence pessimism\n", - " 0.00 1.76 library hold time\n", - " 1.76 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.76 data required time\n", - " -1.90 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.14 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.88 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.88 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.88 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.40 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.37 0.41 3.65 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.37 0.00 3.65 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.52 4.18 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.18 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.33 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.33 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.32 0.29 4.62 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.32 0.01 4.63 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.38 0.27 0.29 4.91 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.01 4.93 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.16 0.25 5.18 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.16 0.00 5.18 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.21 5.39 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.41 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.64 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.66 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.88 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.91 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.14 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.15 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.40 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.02 6.41 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.64 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.66 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.27 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.27 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.55 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.55 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.31 7.85 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.85 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.95 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.96 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.18 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.19 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.75 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.75 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.11 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.11 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.26 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.26 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.68 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.68 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.97 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.97 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.13 0.13 10.10 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.13 0.00 10.10 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.35 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.35 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.58 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.58 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.78 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.78 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.93 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.93 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.45 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.50 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.25 0.34 11.84 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.25 0.00 11.84 ^ rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.13 0.21 12.05 ^ rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.14 0.03 12.08 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.16 0.19 0.23 12.31 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.32 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.43 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.43 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.62 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.63 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.80 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.80 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.38 0.35 13.15 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.38 0.00 13.15 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.13 0.15 0.23 13.38 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 13.39 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.12 0.10 13.49 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.12 0.00 13.49 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.39 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.42 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.08 0.27 14.69 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.08 0.00 14.69 ^ hold49/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.07 0.56 15.24 ^ hold49/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net502 (net)\n", - " 0.07 0.00 15.24 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.24 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.24 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.90 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.88 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.88 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.88 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.40 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.37 0.41 3.65 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.37 0.00 3.65 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.52 4.18 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.18 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.33 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.33 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.32 0.29 4.62 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.32 0.01 4.63 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.38 0.27 0.29 4.91 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.01 4.93 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.16 0.25 5.18 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.16 0.00 5.18 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.21 5.39 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.41 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.64 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.66 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.88 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.91 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.14 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.15 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.40 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.02 6.41 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.64 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.66 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.27 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.27 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.55 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.55 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.31 7.85 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.85 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.95 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.96 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.18 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.19 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.75 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.75 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.11 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.11 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.26 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.26 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.68 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.68 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.97 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.97 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.13 0.13 10.10 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.13 0.00 10.10 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.35 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.35 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.58 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.58 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.78 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.78 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.93 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.93 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.45 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.50 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.25 0.34 11.84 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.25 0.00 11.84 ^ rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.13 0.21 12.05 ^ rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.14 0.03 12.08 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.16 0.19 0.23 12.31 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.32 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.43 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.43 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.62 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.63 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.80 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.80 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.38 0.35 13.15 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.38 0.00 13.15 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.13 0.15 0.23 13.38 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 13.39 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.12 0.10 13.49 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.12 0.00 13.49 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.39 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.42 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.08 0.27 14.69 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.08 0.00 14.69 ^ hold49/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.07 0.56 15.24 ^ hold49/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net502 (net)\n", - " 0.07 0.00 15.24 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.24 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.24 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.90 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4630_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3483_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4666_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4702_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4232_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4306_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4594_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3836_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4450_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3618_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4558_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3550_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3725_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4522_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4196_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3950_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4087_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4051_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4015_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4414_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4270_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4378_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4342_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3910_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3659_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3762_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3873_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3799_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4159_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4123_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4486_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/_0593_/Y 1.49 1.56 -0.06 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.24 -0.01 (VIOLATED)\n", - "riscv/dp/_0593_/Y 0.22 0.24 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.07038803398609161\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0469\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.011564317159354687\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0516\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 64\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 2\n", - "\n", - "==========================================================================\n", - "global route pre repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 842\n", - "\n", - "==========================================================================\n", - "global route pre repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.2444\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.9028\n", - "\n", - "==========================================================================\n", - "global route pre repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-5.922175\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 44.0%\n", - "Combinational 6.95e-04 1.58e-03 2.54e-08 2.27e-03 29.6%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.4%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.43e-03 3.25e-03 3.44e-08 7.68e-03 100.0%\n", - " 57.7% 42.3% 0.0%\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 97589 u^2 9% utilization.\n", - "\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "[INFO RSZ-0034] Found 2 slew violations.\n", - "[INFO RSZ-0036] Found 2 capacitance violations.\n", - "[INFO RSZ-0038] Inserted 2 buffers in 2 nets.\n", - "[INFO RSZ-0039] Resized 327 instances.\n", - "\n", - "==========================================================================\n", - "global route post repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -259.58\n", - "\n", - "==========================================================================\n", - "global route post repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.74\n", - "\n", - "==========================================================================\n", - "global route post repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.74\n", - "\n", - "==========================================================================\n", - "global route post repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 1.59 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.59 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -1.59 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.69 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[14] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1159_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[14] (in)\n", - " instr[14] (net)\n", - " 0.01 0.00 0.38 v input6/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.07 0.07 0.14 0.52 v input6/X (sky130_fd_sc_hd__buf_6)\n", - " net6 (net)\n", - " 0.08 0.01 0.53 v _087_/B (sky130_fd_sc_hd__and2_4)\n", - " 15 0.08 0.11 0.25 0.78 v _087_/X (sky130_fd_sc_hd__and2_4)\n", - " pcmux.y[14] (net)\n", - " 0.11 0.01 0.79 v riscv/_131_/A (sky130_fd_sc_hd__nor2_1)\n", - " 1 0.01 0.21 0.22 1.01 ^ riscv/_131_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_003_ (net)\n", - " 0.21 0.00 1.01 ^ riscv/_138_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 4 0.04 0.10 0.17 1.18 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.10 0.00 1.18 v hold36/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.04 0.09 0.21 1.39 v hold36/X (sky130_fd_sc_hd__clkbuf_4)\n", - " net489 (net)\n", - " 0.09 0.00 1.40 v riscv/dp/_0553_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.12 0.16 1.56 ^ riscv/dp/_0553_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0214_ (net)\n", - " 0.12 0.00 1.56 ^ riscv/dp/_0555_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.09 1.65 v riscv/dp/_0555_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[29] (net)\n", - " 0.05 0.00 1.65 v riscv/dp/_1159_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.65 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.08 0.24 0.40 1.82 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.24 0.00 1.82 ^ riscv/dp/_1159_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.65 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.17 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 1.62 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -1.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.66 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.38 0.42 3.66 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.38 0.00 3.66 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.53 4.19 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.19 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.34 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.34 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.33 0.30 4.64 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.33 0.01 4.65 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.39 0.28 0.29 4.94 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.02 4.95 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.32 5.27 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.27 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.50 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.51 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.74 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.77 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.99 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 6.01 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.25 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.26 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.51 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.53 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.74 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.77 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.39 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.39 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.64 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.64 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.92 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.92 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 8.02 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 8.03 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.25 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.26 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.82 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.82 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.18 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.18 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.33 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.33 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.75 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.75 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 10.05 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 10.05 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 10.15 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 10.15 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.38 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.38 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.61 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.61 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.81 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.81 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.96 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.96 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.48 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.53 v _112_/B (sky130_fd_sc_hd__nor3b_2)\n", - " 2 0.02 0.39 0.43 11.97 ^ _112_/Y (sky130_fd_sc_hd__nor3b_2)\n", - " net68 (net)\n", - " 0.39 0.00 11.97 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.13 0.22 12.18 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 12.21 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.45 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.56 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.56 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.77 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.94 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.94 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 13.28 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 13.28 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.53 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.18 0.01 13.54 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_2)\n", - " 1 0.01 0.09 0.08 13.62 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0279_ (net)\n", - " 0.09 0.00 13.62 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.51 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.54 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.09 0.27 14.81 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.09 0.00 14.81 ^ hold49/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.06 0.27 15.08 ^ hold49/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net502 (net)\n", - " 0.06 0.00 15.08 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.74 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 1.62 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -1.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.66 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.38 0.42 3.66 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.38 0.00 3.66 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.53 4.19 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.19 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.34 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.34 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.33 0.30 4.64 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.33 0.01 4.65 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.39 0.28 0.29 4.94 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.02 4.95 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.32 5.27 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.27 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.50 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.51 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.74 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.77 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.99 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 6.01 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.25 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.26 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.51 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.53 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.74 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.77 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.39 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.39 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.64 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.64 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.92 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.92 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 8.02 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 8.03 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.25 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.26 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.82 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.82 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.18 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.18 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.33 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.33 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.75 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.75 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 10.05 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 10.05 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 10.15 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 10.15 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.38 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.38 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.61 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.61 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.81 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.81 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.96 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.96 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.48 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.53 v _112_/B (sky130_fd_sc_hd__nor3b_2)\n", - " 2 0.02 0.39 0.43 11.97 ^ _112_/Y (sky130_fd_sc_hd__nor3b_2)\n", - " net68 (net)\n", - " 0.39 0.00 11.97 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.13 0.22 12.18 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 12.21 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.45 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.56 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.56 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.77 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.94 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.94 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 13.28 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 13.28 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.53 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.18 0.01 13.54 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_2)\n", - " 1 0.01 0.09 0.08 13.62 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0279_ (net)\n", - " 0.09 0.00 13.62 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.51 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.54 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.09 0.27 14.81 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.09 0.00 14.81 ^ hold49/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.06 0.27 15.08 ^ hold49/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net502 (net)\n", - " 0.06 0.00 15.08 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.74 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.1321367472410202\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0881\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.019596710801124573\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0874\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 781\n", - "\n", - "==========================================================================\n", - "global route post repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 82\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.0806\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.7371\n", - "\n", - "==========================================================================\n", - "global route post repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-4.887737\n", - "\n", - "==========================================================================\n", - "global route post repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 43.9%\n", - "Combinational 7.11e-04 1.57e-03 2.52e-08 2.28e-03 29.7%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.4%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.24e-03 3.42e-08 7.69e-03 100.0%\n", - " 57.8% 42.2% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98039 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 256.2 u\n", - "average displacement 0.0 u\n", - "max displacement 9.1 u\n", - "original HPWL 311353.5 u\n", - "legalized HPWL 311594.3 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "[INFO RSZ-0094] Found 776 endpoints with setup violations.\n", - "[INFO RSZ-0040] Inserted 3 buffers.\n", - "[INFO RSZ-0041] Resized 12 instances.\n", - "[INFO RSZ-0043] Swapped pins on 1 instances.\n", - "[INFO RSZ-0049] Cloned 23 instances.\n", - "[INFO RSZ-0046] Found 86 endpoints with hold violations.\n", - "[INFO RSZ-0032] Inserted 17 hold buffers.\n", - "\n", - "==========================================================================\n", - "global route post repair timing check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_tns\n", - "--------------------------------------------------------------------------\n", - "tns 0.00\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 0.06\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.69 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.69 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.41 slack (MET)\n", - "\n", - "\n", - "Startpoint: instr[1] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[1] (in)\n", - " instr[1] (net)\n", - " 0.01 0.00 0.38 v input12/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.07 0.07 0.14 0.52 v input12/X (sky130_fd_sc_hd__buf_6)\n", - " net12 (net)\n", - " 0.08 0.01 0.53 v _065_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.00 0.06 0.08 0.61 ^ _065_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _015_ (net)\n", - " 0.06 0.00 0.61 ^ _066_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.06 0.08 0.69 v _066_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " pcmux.y[1] (net)\n", - " 0.06 0.00 0.69 v riscv/_069_/C (sky130_fd_sc_hd__and4bb_2)\n", - " 4 0.02 0.09 0.28 0.98 v riscv/_069_/X (sky130_fd_sc_hd__and4bb_2)\n", - " riscv/_020_ (net)\n", - " 0.09 0.00 0.98 v riscv/_089_/A (sky130_fd_sc_hd__nand2_2)\n", - " 4 0.03 0.15 0.15 1.13 ^ riscv/_089_/Y (sky130_fd_sc_hd__nand2_2)\n", - " riscv/_039_ (net)\n", - " 0.15 0.00 1.13 ^ riscv/_138_/A1 (sky130_fd_sc_hd__o31ai_4)\n", - " 4 0.04 0.06 0.12 1.25 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.06 0.00 1.25 v hold36/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 3 0.03 0.07 0.18 1.43 v hold36/X (sky130_fd_sc_hd__clkbuf_4)\n", - " net489 (net)\n", - " 0.07 0.00 1.43 v load_slew137/A (sky130_fd_sc_hd__buf_8)\n", - " 11 0.11 0.08 0.18 1.61 v load_slew137/X (sky130_fd_sc_hd__buf_8)\n", - " net137 (net)\n", - " 0.08 0.00 1.62 v riscv/dp/_0550_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.11 0.15 1.77 ^ riscv/dp/_0550_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0212_ (net)\n", - " 0.11 0.00 1.77 ^ riscv/dp/_0552_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.09 1.85 v riscv/dp/_0552_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[28] (net)\n", - " 0.05 0.00 1.85 v riscv/dp/_1158_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.08 0.24 0.40 1.82 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.24 0.00 1.82 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.03 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.71 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.71 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.56 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5152_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.50 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.10 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.30 0.28 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.01 4.54 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.11 0.12 0.16 4.70 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.12 0.00 4.70 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.26 4.97 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 4.97 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.19 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.21 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.44 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.46 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.69 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.71 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.95 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.95 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.20 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.22 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.44 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.46 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.09 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.09 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.33 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.33 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.62 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.62 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.72 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.72 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.95 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.95 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.51 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.51 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.87 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.87 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.03 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.03 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.44 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.44 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.74 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.74 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.84 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.84 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.08 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.08 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.30 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.30 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.57 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.57 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.16 10.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.73 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.08 0.35 0.51 11.24 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.36 0.02 11.26 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.20 0.27 0.63 11.88 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.27 0.01 11.89 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.17 0.26 12.15 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.17 0.00 12.15 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.12 0.11 12.26 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.12 0.00 12.26 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.08 0.61 12.87 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.08 0.00 12.87 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.25 13.12 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.13 0.00 13.13 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.25 0.15 13.27 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.25 0.00 13.28 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.19 0.16 13.44 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.19 0.00 13.44 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.26 0.13 0.27 13.71 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.14 0.03 13.74 v riscv/dp/rf/_4051_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.33 14.07 v riscv/dp/rf/_4051_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0418_ (net)\n", - " 0.06 0.00 14.08 v riscv/dp/rf/_5152_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 13.45 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 13.45 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 13.87 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 13.87 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.06 0.19 0.34 14.22 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.19 0.00 14.22 ^ riscv/dp/rf/_5152_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.22 clock reconvergence pessimism\n", - " -0.08 14.13 library setup time\n", - " 14.13 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.13 data required time\n", - " -14.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.06 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.71 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.71 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.56 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5152_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.50 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.10 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.30 0.28 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.01 4.54 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.11 0.12 0.16 4.70 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.12 0.00 4.70 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.26 4.97 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 4.97 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.19 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.21 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.44 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.46 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.69 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.71 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.95 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.95 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.20 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.22 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.44 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.46 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.09 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.09 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.33 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.33 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.62 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.62 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.72 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.72 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.95 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.95 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.51 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.51 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.87 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.87 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.03 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.03 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.44 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.44 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.74 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.74 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.84 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.84 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.08 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.08 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.30 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.30 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.57 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.57 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.16 10.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.73 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.08 0.35 0.51 11.24 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.36 0.02 11.26 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.20 0.27 0.63 11.88 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.27 0.01 11.89 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.17 0.26 12.15 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.17 0.00 12.15 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.12 0.11 12.26 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.12 0.00 12.26 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.08 0.61 12.87 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.08 0.00 12.87 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.25 13.12 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.13 0.00 13.13 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.25 0.15 13.27 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.25 0.00 13.28 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.19 0.16 13.44 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.19 0.00 13.44 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.26 0.13 0.27 13.71 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.14 0.03 13.74 v riscv/dp/rf/_4051_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.33 14.07 v riscv/dp/rf/_4051_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0418_ (net)\n", - " 0.06 0.00 14.08 v riscv/dp/rf/_5152_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 13.45 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 13.45 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 13.87 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 13.87 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.06 0.19 0.34 14.22 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.19 0.00 14.22 ^ riscv/dp/rf/_5152_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.22 clock reconvergence pessimism\n", - " -0.08 14.13 library setup time\n", - " 14.13 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.13 data required time\n", - " -14.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.06 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 1.50 1.57 -0.08 (VIOLATED)\n", - "clone37/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0699_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0667_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0737_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0731_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0684_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0743_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0749_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0755_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0761_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0767_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0773_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 0.15 0.17 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.07971657067537308\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.4951449632644653\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0533\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.011798640713095665\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.1538189947605133\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0767\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 13\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "global route post repair timing setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0751\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path slack\n", - "--------------------------------------------------------------------------\n", - "0.0591\n", - "\n", - "==========================================================================\n", - "global route post repair timing slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "0.419890\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 44.2%\n", - "Combinational 7.12e-04 1.52e-03 2.54e-08 2.24e-03 29.3%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.6%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.19e-03 3.44e-08 7.64e-03 100.0%\n", - " 58.2% 41.8% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98565 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 164.1 u\n", - "average displacement 0.0 u\n", - "max displacement 6.9 u\n", - "original HPWL 325296.1 u\n", - "legalized HPWL 325400.1 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "check_antennas\n", - "--------------------------------------------------------------------------\n", - "[INFO GRT-0012] Found 61 antenna violations.\n", - "[INFO GRT-0015] Inserted 82 diodes.\n", - "[INFO GRT-0012] Found 8 antenna violations.\n", - "[INFO GRT-0015] Inserted 8 diodes.\n", - "[INFO GRT-0012] Found 1 antenna violations.\n", - "[INFO GRT-0015] Inserted 1 diodes.\n", - "[INFO GRT-0012] Found 1 antenna violations.\n", - "[INFO GRT-0015] Inserted 1 diodes.\n", - "[INFO GRT-0012] Found 0 antenna violations.\n", - "[WARNING ANT-0011] -report_violating_nets is deprecated.\n", - "[INFO ANT-0002] Found 0 net violations.\n", - "[INFO ANT-0001] Found 0 pin violations.\n", - "\n", - "==========================================================================\n", - "global route check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -50.57\n", - "\n", - "==========================================================================\n", - "global route report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.34\n", - "\n", - "==========================================================================\n", - "global route report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.34\n", - "\n", - "==========================================================================\n", - "global route report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.70 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.43 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem3[3] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5313_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem3[3] (in)\n", - " inter_dmem3[3] (net)\n", - " 0.00 0.00 0.38 ^ input60/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.01 0.08 0.09 0.46 ^ input60/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net60 (net)\n", - " 0.08 0.00 0.46 ^ _129_/B1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.07 0.08 0.54 v _129_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _038_ (net)\n", - " 0.07 0.00 0.54 v _131_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 1 0.01 0.09 0.19 0.73 ^ _131_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " dmem_communicate.mem_out[3] (net)\n", - " 0.09 0.00 0.73 ^ riscv/dp/_0596_/A_N (sky130_fd_sc_hd__nand2b_4)\n", - " 1 0.04 0.13 0.20 0.93 ^ riscv/dp/_0596_/Y (sky130_fd_sc_hd__nand2b_4)\n", - " riscv/dp/_0242_ (net)\n", - " 0.13 0.00 0.94 ^ riscv/dp/_0597_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.04 0.13 0.15 1.09 v riscv/dp/_0597_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0243_ (net)\n", - " 0.13 0.00 1.09 v riscv/dp/_0598_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.20 0.65 0.47 1.56 ^ riscv/dp/_0598_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[3] (net)\n", - " 0.66 0.07 1.63 ^ riscv/dp/rf/_4233_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.04 0.23 1.86 ^ riscv/dp/rf/_4233_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0579_ (net)\n", - " 0.04 0.00 1.86 ^ riscv/dp/rf/_5313_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.86 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 0.95 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 0.95 ^ clkbuf_3_1__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.14 0.41 0.44 1.39 ^ clkbuf_3_1__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_1__leaf_clk (net)\n", - " 0.41 0.00 1.39 ^ clkbuf_leaf_69_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.29 0.42 1.82 ^ clkbuf_leaf_69_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_69_clk (net)\n", - " 0.29 0.00 1.82 ^ riscv/dp/rf/_5313_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.86 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.04 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.73 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.73 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.55 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4846_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.60 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.51 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.11 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.31 0.29 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.31 0.01 4.55 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.18 0.15 0.20 4.75 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.15 0.01 4.75 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.27 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.25 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.27 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.50 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.52 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.75 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.77 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.01 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.01 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.26 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.28 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.50 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.52 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.15 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.15 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.39 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.39 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.68 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.79 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.01 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.57 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.57 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.93 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.93 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.50 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.51 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.80 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.81 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.14 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.14 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.63 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.63 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.17 10.80 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.80 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 11 0.30 0.25 0.53 11.33 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.25 0.02 11.35 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.29 0.36 11.70 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.29 0.00 11.71 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.12 0.21 11.91 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 11.94 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.17 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.19 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.14 0.11 12.29 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.14 0.00 12.29 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.38 0.19 12.48 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.38 0.01 12.49 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.65 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.65 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 12.98 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 12.99 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.24 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.19 0.02 13.26 ^ load_slew128/A (sky130_fd_sc_hd__buf_16)\n", - " 10 0.14 0.16 0.21 13.47 ^ load_slew128/X (sky130_fd_sc_hd__buf_16)\n", - " net128 (net)\n", - " 0.16 0.02 13.49 ^ riscv/dp/_0682_/B2 (sky130_fd_sc_hd__o221ai_4)\n", - " 3 0.09 0.42 0.31 13.80 v riscv/dp/_0682_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/_0302_ (net)\n", - " 0.42 0.00 13.80 v riscv/dp/_0683_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 16 0.12 0.82 0.45 14.25 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 0.83 0.03 14.28 ^ riscv/dp/rf/_3633_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.08 0.26 14.54 ^ riscv/dp/rf/_3633_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0112_ (net)\n", - " 0.08 0.00 14.54 ^ riscv/dp/rf/_4846_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.54 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_2__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 12 0.15 0.45 0.46 13.90 ^ clkbuf_3_2__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_2__leaf_clk (net)\n", - " 0.45 0.00 13.90 ^ clkbuf_leaf_22_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.05 0.16 0.34 14.24 ^ clkbuf_leaf_22_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_22_clk (net)\n", - " 0.16 0.00 14.24 ^ riscv/dp/rf/_4846_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.24 clock reconvergence pessimism\n", - " -0.05 14.20 library setup time\n", - " 14.20 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.20 data required time\n", - " -14.54 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.34 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.73 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.73 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.55 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4846_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.60 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.51 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.11 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.31 0.29 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.31 0.01 4.55 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.18 0.15 0.20 4.75 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.15 0.01 4.75 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.27 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.25 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.27 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.50 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.52 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.75 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.77 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.01 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.01 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.26 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.28 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.50 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.52 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.15 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.15 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.39 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.39 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.68 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.79 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.01 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.57 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.57 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.93 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.93 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.50 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.51 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.80 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.81 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.14 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.14 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.63 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.63 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.17 10.80 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.80 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 11 0.30 0.25 0.53 11.33 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.25 0.02 11.35 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.29 0.36 11.70 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.29 0.00 11.71 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.12 0.21 11.91 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 11.94 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.17 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.19 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.14 0.11 12.29 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.14 0.00 12.29 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.38 0.19 12.48 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.38 0.01 12.49 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.65 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.65 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 12.98 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 12.99 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.24 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.19 0.02 13.26 ^ load_slew128/A (sky130_fd_sc_hd__buf_16)\n", - " 10 0.14 0.16 0.21 13.47 ^ load_slew128/X (sky130_fd_sc_hd__buf_16)\n", - " net128 (net)\n", - " 0.16 0.02 13.49 ^ riscv/dp/_0682_/B2 (sky130_fd_sc_hd__o221ai_4)\n", - " 3 0.09 0.42 0.31 13.80 v riscv/dp/_0682_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/_0302_ (net)\n", - " 0.42 0.00 13.80 v riscv/dp/_0683_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 16 0.12 0.82 0.45 14.25 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 0.83 0.03 14.28 ^ riscv/dp/rf/_3633_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.08 0.26 14.54 ^ riscv/dp/rf/_3633_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0112_ (net)\n", - " 0.08 0.00 14.54 ^ riscv/dp/rf/_4846_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.54 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_2__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 12 0.15 0.45 0.46 13.90 ^ clkbuf_3_2__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_2__leaf_clk (net)\n", - " 0.45 0.00 13.90 ^ clkbuf_leaf_22_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.05 0.16 0.34 14.24 ^ clkbuf_leaf_22_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_22_clk (net)\n", - " 0.16 0.00 14.24 ^ riscv/dp/rf/_4846_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.24 clock reconvergence pessimism\n", - " -0.05 14.20 library setup time\n", - " 14.20 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.20 data required time\n", - " -14.54 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.34 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 1.50 1.58 -0.09 (VIOLATED)\n", - "clone37/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0699_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0737_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0667_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0731_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0743_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0749_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0755_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0684_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0761_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0767_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0773_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 0.15 0.17 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.08906442672014236\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.4951449632644653\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0596\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.012804712168872356\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.1538189947605133\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0832\n", - "\n", - "==========================================================================\n", - "global route max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 13\n", - "\n", - "==========================================================================\n", - "global route max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "global route setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 533\n", - "\n", - "==========================================================================\n", - "global route hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.5376\n", - "\n", - "==========================================================================\n", - "global route critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.3386\n", - "\n", - "==========================================================================\n", - "global route slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-2.329133\n", - "\n", - "==========================================================================\n", - "global route report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 43.8%\n", - "Combinational 7.12e-04 1.59e-03 2.54e-08 2.30e-03 29.9%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.3%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.26e-03 3.44e-08 7.70e-03 100.0%\n", - " 57.7% 42.3% 0.0%\n", - "\n", - "==========================================================================\n", - "global route report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98795 u^2 9% utilization.\n", - "\n", - "[INFO FLW-0007] clock clk period 12.500000\n", - "[INFO FLW-0008] Clock clk period 12.197\n", - "[INFO FLW-0009] Clock clk slack -0.339\n", - "[INFO FLW-0011] Path endpoint count 1370\n", - "Elapsed time: 0:48.58[h:]min:sec. CPU time: user 47.26 sys 1.06 (99%). Peak memory: 459848KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/fillcell.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO DPL-0001] Placed 126919 filler instances.\n", - "Elapsed time: 0:01.51[h:]min:sec. CPU time: user 1.02 sys 0.16 (77%). Peak memory: 212608KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_3_route.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_3_route.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_route.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_3_route.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_3_route.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "detailed_route -output_drc ./reports/130_180/riscv32i_3d/80MHz/5_route_drc.rpt -output_maze ./results/130_180/riscv32i_3d/80MHz/maze.log -bottom_routing_layer met1 -top_routing_layer Metal4 -save_guide_updates -verbose 1 -drc_report_iter_step 5\n", - "[INFO DRT-0149] Reading tech and libs.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "\n", - "Units: 1000\n", - "Number of layers: 15\n", - "Number of macros: 441\n", - "Number of vias: 30\n", - "Number of viarulegen: 30\n", - "\n", - "[INFO DRT-0150] Reading design.\n", - "\n", - "Design: core_without_dmem\n", - "Die area: ( 0 0 ) ( 1200000 1000000 )\n", - "Number of track patterns: 14\n", - "Number of DEF vias: 0\n", - "Number of components: 147612\n", - "Number of terminals: 127\n", - "Number of snets: 2\n", - "Number of nets: 5971\n", - "\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[4]\n", - "[INFO DRT-0167] List of default vias:\n", - " Layer via\n", - " default via: M1M2_PR\n", - " Layer via2\n", - " default via: M2M3_PR\n", - " Layer via3\n", - " default via: M3M4_PR\n", - " Layer via4\n", - " default via: M4M5_PR\n", - " Layer F2F\n", - " default via: F2F_PR\n", - "[INFO DRT-0162] Library cell analysis.\n", - "[INFO DRT-0163] Instance analysis.\n", - " Complete 10000 instances.\n", - " Complete 20000 instances.\n", - " Complete 30000 instances.\n", - " Complete 40000 instances.\n", - " Complete 50000 instances.\n", - " Complete 60000 instances.\n", - " Complete 70000 instances.\n", - " Complete 80000 instances.\n", - " Complete 90000 instances.\n", - " Complete 100000 instances.\n", - "[INFO DRT-0164] Number of unique instances = 335.\n", - "[INFO DRT-0168] Init region query.\n", - "[INFO DRT-0018] Complete 10000 insts.\n", - "[INFO DRT-0018] Complete 20000 insts.\n", - "[INFO DRT-0018] Complete 30000 insts.\n", - "[INFO DRT-0018] Complete 40000 insts.\n", - "[INFO DRT-0018] Complete 50000 insts.\n", - "[INFO DRT-0018] Complete 60000 insts.\n", - "[INFO DRT-0018] Complete 70000 insts.\n", - "[INFO DRT-0018] Complete 80000 insts.\n", - "[INFO DRT-0018] Complete 90000 insts.\n", - "[INFO DRT-0019] Complete 100000 insts.\n", - "[INFO DRT-0024] Complete FR_MASTERSLICE.\n", - "[INFO DRT-0024] Complete Fr_VIA.\n", - "[INFO DRT-0024] Complete li1.\n", - "[INFO DRT-0024] Complete mcon.\n", - "[INFO DRT-0024] Complete met1.\n", - "[INFO DRT-0024] Complete via.\n", - "[INFO DRT-0024] Complete met2.\n", - "[INFO DRT-0024] Complete via2.\n", - "[INFO DRT-0024] Complete met3.\n", - "[INFO DRT-0024] Complete via3.\n", - "[INFO DRT-0024] Complete met4.\n", - "[INFO DRT-0024] Complete via4.\n", - "[INFO DRT-0024] Complete met5.\n", - "[INFO DRT-0024] Complete F2F.\n", - "[INFO DRT-0024] Complete Metal4.\n", - "[INFO DRT-0033] FR_MASTERSLICE shape region query size = 0.\n", - "[INFO DRT-0033] FR_VIA shape region query size = 0.\n", - "[INFO DRT-0033] li1 shape region query size = 543104.\n", - "[INFO DRT-0033] mcon shape region query size = 1786732.\n", - "[INFO DRT-0033] met1 shape region query size = 313248.\n", - "[INFO DRT-0033] via shape region query size = 0.\n", - "[INFO DRT-0033] met2 shape region query size = 0.\n", - "[INFO DRT-0033] via2 shape region query size = 0.\n", - "[INFO DRT-0033] met3 shape region query size = 0.\n", - "[INFO DRT-0033] via3 shape region query size = 0.\n", - "[INFO DRT-0033] met4 shape region query size = 0.\n", - "[INFO DRT-0033] via4 shape region query size = 0.\n", - "[INFO DRT-0033] met5 shape region query size = 1917.\n", - "[INFO DRT-0033] F2F shape region query size = 3640.\n", - "[INFO DRT-0033] Metal4 shape region query size = 1972.\n", - "[INFO DRT-0165] Start pin access.\n", - "[INFO DRT-0076] Complete 100 pins.\n", - "[INFO DRT-0076] Complete 200 pins.\n", - "[INFO DRT-0076] Complete 300 pins.\n", - "[INFO DRT-0076] Complete 400 pins.\n", - "[INFO DRT-0076] Complete 500 pins.\n", - "[INFO DRT-0076] Complete 600 pins.\n", - "[INFO DRT-0076] Complete 700 pins.\n", - "[INFO DRT-0076] Complete 800 pins.\n", - "[INFO DRT-0076] Complete 900 pins.\n", - "[INFO DRT-0077] Complete 1000 pins.\n", - "[INFO DRT-0078] Complete 1346 pins.\n", - "[INFO DRT-0079] Complete 100 unique inst patterns.\n", - "[INFO DRT-0079] Complete 200 unique inst patterns.\n", - "[INFO DRT-0079] Complete 300 unique inst patterns.\n", - "[INFO DRT-0081] Complete 325 unique inst patterns.\n", - "[INFO DRT-0082] Complete 1000 groups.\n", - "[INFO DRT-0082] Complete 2000 groups.\n", - "[INFO DRT-0082] Complete 3000 groups.\n", - "[INFO DRT-0082] Complete 4000 groups.\n", - "[INFO DRT-0084] Complete 4450 groups.\n", - "#scanned instances = 147612\n", - "#unique instances = 335\n", - "#stdCellGenAp = 12485\n", - "#stdCellValidPlanarAp = 225\n", - "#stdCellValidViaAp = 8060\n", - "#stdCellPinNoAp = 15\n", - "#stdCellPinCnt = 21821\n", - "#instTermValidViaApCnt = 0\n", - "#macroGenAp = 0\n", - "#macroValidPlanarAp = 0\n", - "#macroValidViaAp = 0\n", - "#macroNoAp = 0\n", - "[INFO DRT-0166] Complete pin access.\n", - "[INFO DRT-0267] cpu time = 00:02:43, elapsed time = 00:00:05, memory = 456.61 (MB), peak = 469.45 (MB)\n", - "\n", - "Number of guides: 55127\n", - "\n", - "[INFO DRT-0169] Post process guides.\n", - "[INFO DRT-0176] GCELLGRID X 0 DO 173 STEP 6900 ;\n", - "[INFO DRT-0177] GCELLGRID Y 0 DO 144 STEP 6900 ;\n", - "[INFO DRT-0026] Complete 10000 origin guides.\n", - "[INFO DRT-0026] Complete 20000 origin guides.\n", - "[INFO DRT-0026] Complete 30000 origin guides.\n", - "[INFO DRT-0026] Complete 40000 origin guides.\n", - "[INFO DRT-0026] Complete 50000 origin guides.\n", - "[INFO DRT-0028] Complete FR_MASTERSLICE.\n", - "[INFO DRT-0028] Complete Fr_VIA.\n", - "[INFO DRT-0028] Complete li1.\n", - "[INFO DRT-0028] Complete mcon.\n", - "[INFO DRT-0028] Complete met1.\n", - "[INFO DRT-0028] Complete via.\n", - "[INFO DRT-0028] Complete met2.\n", - "[INFO DRT-0028] Complete via2.\n", - "[INFO DRT-0028] Complete met3.\n", - "[INFO DRT-0028] Complete via3.\n", - "[INFO DRT-0028] Complete met4.\n", - "[INFO DRT-0028] Complete via4.\n", - "[INFO DRT-0028] Complete met5.\n", - "[INFO DRT-0028] Complete F2F.\n", - "[INFO DRT-0028] Complete Metal4.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2577_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_3057_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2665_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2627_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2909_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2969_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-0178] Init guide query.\n", - "[INFO DRT-0035] Complete FR_MASTERSLICE (guide).\n", - "[INFO DRT-0035] Complete Fr_VIA (guide).\n", - "[INFO DRT-0035] Complete li1 (guide).\n", - "[INFO DRT-0035] Complete mcon (guide).\n", - "[INFO DRT-0035] Complete met1 (guide).\n", - "[INFO DRT-0035] Complete via (guide).\n", - "[INFO DRT-0035] Complete met2 (guide).\n", - "[INFO DRT-0035] Complete via2 (guide).\n", - "[INFO DRT-0035] Complete met3 (guide).\n", - "[INFO DRT-0035] Complete via3 (guide).\n", - "[INFO DRT-0035] Complete met4 (guide).\n", - "[INFO DRT-0035] Complete via4 (guide).\n", - "[INFO DRT-0035] Complete met5 (guide).\n", - "[INFO DRT-0035] Complete F2F (guide).\n", - "[INFO DRT-0035] Complete Metal4 (guide).\n", - "[INFO DRT-0036] FR_MASTERSLICE guide region query size = 0.\n", - "[INFO DRT-0036] FR_VIA guide region query size = 0.\n", - "[INFO DRT-0036] li1 guide region query size = 18177.\n", - "[INFO DRT-0036] mcon guide region query size = 0.\n", - "[INFO DRT-0036] met1 guide region query size = 15622.\n", - "[INFO DRT-0036] via guide region query size = 0.\n", - "[INFO DRT-0036] met2 guide region query size = 8607.\n", - "[INFO DRT-0036] via2 guide region query size = 0.\n", - "[INFO DRT-0036] met3 guide region query size = 439.\n", - "[INFO DRT-0036] via3 guide region query size = 0.\n", - "[INFO DRT-0036] met4 guide region query size = 226.\n", - "[INFO DRT-0036] via4 guide region query size = 0.\n", - "[INFO DRT-0036] met5 guide region query size = 129.\n", - "[INFO DRT-0036] F2F guide region query size = 0.\n", - "[INFO DRT-0036] Metal4 guide region query size = 99.\n", - "[INFO DRT-0179] Init gr pin query.\n", - "[INFO DRT-0185] Post process initialize RPin region query.\n", - "[INFO DRT-0181] Start track assignment.\n", - "[INFO DRT-0184] Done with 27109 vertical wires in 4 frboxes and 16190 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0186] Done with 1987 vertical wires in 4 frboxes and 4958 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0182] Complete track assignment.\n", - "[INFO DRT-0267] cpu time = 00:00:07, elapsed time = 00:00:02, memory = 725.87 (MB), peak = 725.87 (MB)\n", - "[INFO DRT-0187] Start routing data preparation.\n", - "[INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 725.89 (MB), peak = 725.89 (MB)\n", - "[INFO DRT-0194] Start detail routing.\n", - "[INFO DRT-0195] Start 0th optimization iteration.\n", - " Completing 10% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 743.78 (MB).\n", - " Completing 20% with 0 violations.\n", - " elapsed time = 00:00:01, memory = 1954.66 (MB).\n", - " Completing 30% with 818 violations.\n", - " elapsed time = 00:00:04, memory = 1997.75 (MB).\n", - " Completing 40% with 818 violations.\n", - " elapsed time = 00:00:04, memory = 2374.07 (MB).\n", - " Completing 50% with 818 violations.\n", - " elapsed time = 00:00:06, memory = 2593.61 (MB).\n", - " Completing 60% with 1585 violations.\n", - " elapsed time = 00:00:08, memory = 2598.35 (MB).\n", - " Completing 70% with 1585 violations.\n", - " elapsed time = 00:00:09, memory = 2935.40 (MB).\n", - " Completing 80% with 2577 violations.\n", - " elapsed time = 00:00:14, memory = 2957.05 (MB).\n", - " Completing 90% with 2577 violations.\n", - " elapsed time = 00:00:14, memory = 3142.32 (MB).\n", - " Completing 100% with 3439 violations.\n", - " elapsed time = 00:00:18, memory = 3169.05 (MB).\n", - "[INFO DRT-0199] Number of violations = 5375.\n", - "Viol/Layer li1 mcon met1 via met2 met3 met5 Metal4\n", - "Cut Spacing 0 10 0 0 0 0 0 0\n", - "Metal Spacing 118 0 676 0 77 0 0 27\n", - "Min Hole 0 0 5 0 1 0 0 0\n", - "Min Width 0 0 0 0 0 0 2 0\n", - "NS Metal 8 0 1 0 0 0 0 1\n", - "Recheck 1 0 1363 0 551 21 0 0\n", - "Short 0 2 2274 2 232 0 0 3\n", - "[INFO DRT-0267] cpu time = 00:03:30, elapsed time = 00:00:19, memory = 3553.57 (MB), peak = 3553.57 (MB)\n", - "Total wire length = 435464 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 207521 um.\n", - "Total wire length on LAYER met2 = 197398 um.\n", - "Total wire length on LAYER met3 = 23577 um.\n", - "Total wire length on LAYER met4 = 5342 um.\n", - "Total wire length on LAYER met5 = 619 um.\n", - "Total wire length on LAYER Metal4 = 1005 um.\n", - "Total number of vias = 49222.\n", - "Up-via summary (total 49222):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21589\n", - " met1 26436\n", - " met2 685\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49222\n", - "\n", - "\n", - "[INFO DRT-0195] Start 1st optimization iteration.\n", - " Completing 10% with 5375 violations.\n", - " elapsed time = 00:00:00, memory = 3553.60 (MB).\n", - " Completing 20% with 5375 violations.\n", - " elapsed time = 00:00:00, memory = 3707.05 (MB).\n", - " Completing 30% with 4249 violations.\n", - " elapsed time = 00:00:03, memory = 3722.32 (MB).\n", - " Completing 40% with 4249 violations.\n", - " elapsed time = 00:00:04, memory = 3801.52 (MB).\n", - " Completing 50% with 4249 violations.\n", - " elapsed time = 00:00:04, memory = 3810.35 (MB).\n", - " Completing 60% with 3185 violations.\n", - " elapsed time = 00:00:07, memory = 3815.85 (MB).\n", - " Completing 70% with 3185 violations.\n", - " elapsed time = 00:00:07, memory = 3894.73 (MB).\n", - " Completing 80% with 2297 violations.\n", - " elapsed time = 00:00:10, memory = 3918.88 (MB).\n", - " Completing 90% with 2297 violations.\n", - " elapsed time = 00:00:10, memory = 3969.99 (MB).\n", - " Completing 100% with 1585 violations.\n", - " elapsed time = 00:00:13, memory = 3988.80 (MB).\n", - "[INFO DRT-0199] Number of violations = 1601.\n", - "Viol/Layer met1 via met2 Metal4\n", - "Metal Spacing 313 0 27 5\n", - "NS Metal 0 0 0 1\n", - "Recheck 11 0 6 0\n", - "Short 1147 2 86 3\n", - "[INFO DRT-0267] cpu time = 00:03:17, elapsed time = 00:00:14, memory = 3992.14 (MB), peak = 3992.14 (MB)\n", - "Total wire length = 433501 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 206800 um.\n", - "Total wire length on LAYER met2 = 196060 um.\n", - "Total wire length on LAYER met3 = 23765 um.\n", - "Total wire length on LAYER met4 = 5274 um.\n", - "Total wire length on LAYER met5 = 612 um.\n", - "Total wire length on LAYER Metal4 = 986 um.\n", - "Total number of vias = 49180.\n", - "Up-via summary (total 49180):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21585\n", - " met1 26358\n", - " met2 724\n", - " met3 288\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49180\n", - "\n", - "\n", - "[INFO DRT-0195] Start 2nd optimization iteration.\n", - " Completing 10% with 1601 violations.\n", - " elapsed time = 00:00:00, memory = 3992.14 (MB).\n", - " Completing 20% with 1601 violations.\n", - " elapsed time = 00:00:00, memory = 4024.97 (MB).\n", - " Completing 30% with 1373 violations.\n", - " elapsed time = 00:00:02, memory = 4032.23 (MB).\n", - " Completing 40% with 1373 violations.\n", - " elapsed time = 00:00:02, memory = 4032.23 (MB).\n", - " Completing 50% with 1373 violations.\n", - " elapsed time = 00:00:05, memory = 4098.30 (MB).\n", - " Completing 60% with 1457 violations.\n", - " elapsed time = 00:00:05, memory = 4098.55 (MB).\n", - " Completing 70% with 1457 violations.\n", - " elapsed time = 00:00:06, memory = 4158.10 (MB).\n", - " Completing 80% with 1373 violations.\n", - " elapsed time = 00:00:08, memory = 4165.52 (MB).\n", - " Completing 90% with 1373 violations.\n", - " elapsed time = 00:00:08, memory = 4165.52 (MB).\n", - " Completing 100% with 1231 violations.\n", - " elapsed time = 00:00:11, memory = 4197.95 (MB).\n", - "[INFO DRT-0199] Number of violations = 1241.\n", - "Viol/Layer mcon met1 met2 Metal4\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 241 12 5\n", - "NS Metal 0 0 0 1\n", - "Recheck 0 7 3 0\n", - "Short 0 908 60 3\n", - "[INFO DRT-0267] cpu time = 00:02:22, elapsed time = 00:00:12, memory = 4198.05 (MB), peak = 4198.05 (MB)\n", - "Total wire length = 433007 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 206532 um.\n", - "Total wire length on LAYER met2 = 195793 um.\n", - "Total wire length on LAYER met3 = 23792 um.\n", - "Total wire length on LAYER met4 = 5285 um.\n", - "Total wire length on LAYER met5 = 620 um.\n", - "Total wire length on LAYER Metal4 = 981 um.\n", - "Total number of vias = 49210.\n", - "Up-via summary (total 49210):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21590\n", - " met1 26383\n", - " met2 727\n", - " met3 285\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49210\n", - "\n", - "\n", - "[INFO DRT-0195] Start 3rd optimization iteration.\n", - " Completing 10% with 1241 violations.\n", - " elapsed time = 00:00:00, memory = 4198.05 (MB).\n", - " Completing 20% with 1241 violations.\n", - " elapsed time = 00:00:00, memory = 4198.05 (MB).\n", - " Completing 30% with 986 violations.\n", - " elapsed time = 00:00:06, memory = 4268.91 (MB).\n", - " Completing 40% with 986 violations.\n", - " elapsed time = 00:00:06, memory = 4268.91 (MB).\n", - " Completing 50% with 986 violations.\n", - " elapsed time = 00:00:07, memory = 4291.95 (MB).\n", - " Completing 60% with 700 violations.\n", - " elapsed time = 00:00:09, memory = 4292.00 (MB).\n", - " Completing 70% with 700 violations.\n", - " elapsed time = 00:00:09, memory = 4292.00 (MB).\n", - " Completing 80% with 343 violations.\n", - " elapsed time = 00:00:12, memory = 4324.30 (MB).\n", - " Completing 90% with 343 violations.\n", - " elapsed time = 00:00:12, memory = 4324.39 (MB).\n", - " Completing 100% with 77 violations.\n", - " elapsed time = 00:00:14, memory = 4383.35 (MB).\n", - "[INFO DRT-0199] Number of violations = 83.\n", - "Viol/Layer met1 met2 Metal4\n", - "Metal Spacing 30 2 0\n", - "NS Metal 0 0 1\n", - "Recheck 4 2 0\n", - "Short 41 0 3\n", - "[INFO DRT-0267] cpu time = 00:01:45, elapsed time = 00:00:14, memory = 4383.63 (MB), peak = 4383.63 (MB)\n", - "Total wire length = 433226 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204195 um.\n", - "Total wire length on LAYER met2 = 196269 um.\n", - "Total wire length on LAYER met3 = 25893 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49949.\n", - "Up-via summary (total 49949):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26839\n", - " met2 1010\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49949\n", - "\n", - "\n", - "[INFO DRT-0195] Start 4th optimization iteration.\n", - " Completing 10% with 83 violations.\n", - " elapsed time = 00:00:00, memory = 4383.63 (MB).\n", - " Completing 20% with 83 violations.\n", - " elapsed time = 00:00:00, memory = 4383.63 (MB).\n", - " Completing 30% with 51 violations.\n", - " elapsed time = 00:00:01, memory = 4393.83 (MB).\n", - " Completing 40% with 51 violations.\n", - " elapsed time = 00:00:01, memory = 4393.83 (MB).\n", - " Completing 50% with 51 violations.\n", - " elapsed time = 00:00:01, memory = 4393.83 (MB).\n", - " Completing 60% with 42 violations.\n", - " elapsed time = 00:00:01, memory = 4393.97 (MB).\n", - " Completing 70% with 42 violations.\n", - " elapsed time = 00:00:01, memory = 4393.97 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:02, memory = 4396.57 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:02, memory = 4396.57 (MB).\n", - " Completing 100% with 6 violations.\n", - " elapsed time = 00:00:03, memory = 4401.96 (MB).\n", - "[INFO DRT-0199] Number of violations = 6.\n", - "Viol/Layer met1 Metal4\n", - "Metal Spacing 2 0\n", - "NS Metal 0 1\n", - "Short 0 3\n", - "[INFO DRT-0267] cpu time = 00:00:23, elapsed time = 00:00:03, memory = 4402.04 (MB), peak = 4402.04 (MB)\n", - "Total wire length = 433204 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204071 um.\n", - "Total wire length on LAYER met2 = 196249 um.\n", - "Total wire length on LAYER met3 = 26015 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49979.\n", - "Up-via summary (total 49979):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26853\n", - " met2 1026\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49979\n", - "\n", - "\n", - "[INFO DRT-0195] Start 5th optimization iteration.\n", - " Completing 10% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 20% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 30% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 40% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 50% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 60% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 70% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 80% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 90% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4402.04 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.49 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.49 (MB), peak = 4406.49 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 6th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 7th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 8th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 9th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 10th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 11th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 12th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 13th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 14th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 15th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 16th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 17th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 18th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 19th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 20th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 21st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 22nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 23rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 24th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 25th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 26th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 27th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 28th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 29th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 30th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 31st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 32nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 33rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 34th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 35th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 36th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 37th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 38th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 39th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 40th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 41st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 42nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 43rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 44th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 45th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 46th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 47th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 48th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 49th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 50th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 51st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.50 (MB), peak = 4406.50 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204073 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 52nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.50 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 53rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 54th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 55th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 56th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 57th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 58th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 59th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 60th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 61st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 62nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 63rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 64th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4406.51 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0198] Complete detail routing.\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0267] cpu time = 00:23:28, elapsed time = 00:01:35, memory = 4406.51 (MB), peak = 4406.51 (MB)\n", - "\n", - "[INFO DRT-0180] Post processing.\n", - "Elapsed time: 1:47.70[h:]min:sec. CPU time: user 1557.79 sys 25.21 (1469%). Peak memory: 4512508KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_3_route.odb ./results/130_180/riscv32i_3d/80MHz/5_route.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.odb ./results/130_180/riscv32i_3d/80MHz/6_1_fill.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/4_cts.sdc ./results/130_180/riscv32i_3d/80MHz/5_route.sdc\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/6_1_fill.sdc\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/6_report.tmp.log ./logs/130_180/riscv32i_3d/80MHz/6_report.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/final_report.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/6_report.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/6_report.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO] Deleted 0 routing obstructions\n", - "[INFO RCX-0431] Defined process_corner X with ext_model_index 0\n", - "[INFO RCX-0029] Defined extraction corner X\n", - "[INFO RCX-0008] extracting parasitics of core_without_dmem ...\n", - "[INFO RCX-0435] Reading extraction model file /Flow/platforms/130_180/rcx_patterns.rules ...\n", - "[INFO RCX-0436] RC segment generation core_without_dmem (max_merge_res 50.0) ...\n", - "[INFO RCX-0040] Final 26178 rc segments\n", - "[INFO RCX-0439] Coupling Cap extraction core_without_dmem ...\n", - "[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.\n", - "[INFO RCX-0043] 54897 wires to be extracted\n", - "[INFO RCX-0442] 33% completion -- 18120 wires have been extracted\n", - "[INFO RCX-0442] 48% completion -- 26441 wires have been extracted\n", - "[INFO RCX-0442] 56% completion -- 31231 wires have been extracted\n", - "[INFO RCX-0442] 100% completion -- 54897 wires have been extracted\n", - "[INFO RCX-0045] Extract 5971 nets, 32079 rsegs, 32079 caps, 59534 ccs\n", - "[INFO RCX-0015] Finished extracting core_without_dmem.\n", - "[INFO RCX-0016] Writing SPEF ...\n", - "[INFO RCX-0443] 5971 nets finished\n", - "[INFO RCX-0017] Finished writing SPEF ...\n", - "[INFO PSM-0022] Using 1.800V for VDD\n", - "[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.\n", - "[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction\n", - "[INFO PSM-0076] Setting metal node density to be standard cell height times 5.\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (92.480um, 157.760um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (943.680um, 157.760um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 290.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (406.080um, 293.760um).\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (92.480um, 565.760um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (943.680um, 565.760um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 710.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (406.080um, 701.760um).\n", - "[WARNING PSM-0030] VSRC location at (670.070um, 850.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (674.880um, 837.760um).\n", - "[INFO PSM-0031] Number of PDN nodes on net VDD = 4567.\n", - "[WARNING PSM-0024] Instance _075_, current node at (630080, 48960) at layer 6 have been moved from (630200, 27200).\n", - "[WARNING PSM-0024] Instance _077_, current node at (641280, 48960) at layer 6 have been moved from (636180, 29920).\n", - "[WARNING PSM-0024] Instance _079_, current node at (618880, 48960) at layer 6 have been moved from (622840, 27200).\n", - "[WARNING PSM-0024] Instance _093_, current node at (663680, 48960) at layer 6 have been moved from (660100, 29920).\n", - "[WARNING PSM-0024] Instance _100_, current node at (529280, 48960) at layer 6 have been moved from (527620, 32640).\n", - "[WARNING PSM-0024] Instance _101_, current node at (618880, 48960) at layer 6 have been moved from (618700, 29920).\n", - "[WARNING PSM-0024] Instance _102_, current node at (618880, 48960) at layer 6 have been moved from (621920, 29920).\n", - "[WARNING PSM-0024] Instance _104_, current node at (630080, 48960) at layer 6 have been moved from (626980, 32640).\n", - "[WARNING PSM-0024] Instance _114_, current node at (45440, 511360) at layer 6 have been moved from (31280, 519520).\n", - "[WARNING PSM-0024] Instance _115_, current node at (45440, 511360) at layer 6 have been moved from (30820, 505920).\n", - "[WARNING PSM-0024] Instance _116_, current node at (45440, 484160) at layer 6 have been moved from (31280, 489600).\n", - "[WARNING PSM-0024] Instance _118_, current node at (45440, 538560) at layer 6 have been moved from (30820, 535840).\n", - "[WARNING PSM-0024] Instance _145_, current node at (641280, 48960) at layer 6 have been moved from (644460, 24480).\n", - "[WARNING PSM-0024] Instance input2, current node at (607680, 48960) at layer 6 have been moved from (607660, 24480).\n", - "[WARNING PSM-0024] Instance input3, current node at (607680, 48960) at layer 6 have been moved from (603520, 24480).\n", - "[WARNING PSM-0024] Instance input5, current node at (585280, 48960) at layer 6 have been moved from (590640, 21760).\n", - "[WARNING PSM-0024] Instance input10, current node at (663680, 48960) at layer 6 have been moved from (660100, 21760).\n", - "[WARNING PSM-0024] Instance input13, current node at (529280, 48960) at layer 6 have been moved from (523940, 24480).\n", - "[WARNING PSM-0024] Instance input14, current node at (518080, 48960) at layer 6 have been moved from (519800, 21760).\n", - "[WARNING PSM-0024] Instance input15, current node at (518080, 48960) at layer 6 have been moved from (521180, 21760).\n", - "[WARNING PSM-0024] Instance input16, current node at (518080, 48960) at layer 6 have been moved from (522100, 24480).\n", - "[WARNING PSM-0024] Instance input17, current node at (529280, 48960) at layer 6 have been moved from (525320, 24480).\n", - "[WARNING PSM-0024] Instance input18, current node at (618880, 48960) at layer 6 have been moved from (618240, 24480).\n", - "[WARNING PSM-0024] Instance input19, current node at (618880, 48960) at layer 6 have been moved from (621460, 27200).\n", - "[WARNING PSM-0024] Instance input20, current node at (618880, 48960) at layer 6 have been moved from (619620, 24480).\n", - "[WARNING PSM-0024] Instance input21, current node at (641280, 48960) at layer 6 have been moved from (637560, 27200).\n", - "[WARNING PSM-0024] Instance input22, current node at (618880, 48960) at layer 6 have been moved from (622840, 24480).\n", - "[WARNING PSM-0024] Instance input24, current node at (630080, 48960) at layer 6 have been moved from (627900, 24480).\n", - "[WARNING PSM-0024] Instance input29, current node at (630080, 48960) at layer 6 have been moved from (625600, 24480).\n", - "[WARNING PSM-0024] Instance input30, current node at (641280, 48960) at layer 6 have been moved from (638940, 21760).\n", - "[WARNING PSM-0024] Instance input31, current node at (630080, 48960) at layer 6 have been moved from (630660, 24480).\n", - "[WARNING PSM-0024] Instance input32, current node at (630080, 48960) at layer 6 have been moved from (632500, 29920).\n", - "[WARNING PSM-0024] Instance input66, current node at (641280, 48960) at layer 6 have been moved from (645380, 21760).\n", - "[WARNING PSM-0024] Instance output67, current node at (45440, 538560) at layer 6 have been moved from (30360, 527680).\n", - "[WARNING PSM-0024] Instance output68, current node at (45440, 484160) at layer 6 have been moved from (30360, 478720).\n", - "[WARNING PSM-0024] Instance output69, current node at (45440, 511360) at layer 6 have been moved from (30360, 497760).\n", - "[WARNING PSM-0024] Instance output70, current node at (45440, 538560) at layer 6 have been moved from (30820, 546720).\n", - "[WARNING PSM-0024] Instance output96, current node at (574080, 48960) at layer 6 have been moved from (569480, 21760).\n", - "[WARNING PSM-0024] Instance output97, current node at (574080, 48960) at layer 6 have been moved from (575000, 21760).\n", - "[WARNING PSM-0024] Instance output98, current node at (540480, 48960) at layer 6 have been moved from (540500, 21760).\n", - "[WARNING PSM-0024] Instance output99, current node at (551680, 48960) at layer 6 have been moved from (547860, 21760).\n", - "[WARNING PSM-0024] Instance output100, current node at (529280, 48960) at layer 6 have been moved from (528540, 21760).\n", - "[WARNING PSM-0024] Instance output101, current node at (529280, 48960) at layer 6 have been moved from (531300, 21760).\n", - "[WARNING PSM-0024] Instance output103, current node at (529280, 48960) at layer 6 have been moved from (532680, 21760).\n", - "[WARNING PSM-0024] Instance output104, current node at (529280, 48960) at layer 6 have been moved from (526700, 24480).\n", - "[WARNING PSM-0024] Instance output112, current node at (641280, 48960) at layer 6 have been moved from (646760, 21760).\n", - "[WARNING PSM-0024] Instance output114, current node at (45440, 511360) at layer 6 have been moved from (29900, 519520).\n", - "[WARNING PSM-0024] Instance output115, current node at (45440, 511360) at layer 6 have been moved from (30360, 508640).\n", - "[WARNING PSM-0024] Instance output116, current node at (45440, 484160) at layer 6 have been moved from (29900, 489600).\n", - "[WARNING PSM-0024] Instance output117, current node at (45440, 538560) at layer 6 have been moved from (30360, 538560).\n", - "[WARNING PSM-0024] Instance output118, current node at (428480, 48960) at layer 6 have been moved from (429640, 32640).\n", - "[WARNING PSM-0024] Instance output119, current node at (775680, 48960) at layer 6 have been moved from (779700, 32640).\n", - "[WARNING PSM-0024] Instance output120, current node at (338880, 48960) at layer 6 have been moved from (340400, 32640).\n", - "[WARNING PSM-0024] Instance output121, current node at (607680, 48960) at layer 6 have been moved from (609960, 29920).\n", - "[WARNING PSM-0024] Instance output122, current node at (473280, 48960) at layer 6 have been moved from (469660, 32640).\n", - "[WARNING PSM-0024] Instance output123, current node at (361280, 48960) at layer 6 have been moved from (363860, 27200).\n", - "[WARNING PSM-0024] Instance output124, current node at (809280, 48960) at layer 6 have been moved from (809600, 29920).\n", - "[WARNING PSM-0024] Instance output125, current node at (798080, 48960) at layer 6 have been moved from (797180, 21760).\n", - "[WARNING PSM-0024] Instance hold38, current node at (630080, 48960) at layer 6 have been moved from (627900, 21760).\n", - "[WARNING PSM-0024] Instance hold46, current node at (630080, 48960) at layer 6 have been moved from (635260, 21760).\n", - "[WARNING PSM-0024] Instance hold50, current node at (607680, 48960) at layer 6 have been moved from (603980, 21760).\n", - "[WARNING PSM-0024] Instance hold53, current node at (641280, 48960) at layer 6 have been moved from (641700, 21760).\n", - "[WARNING PSM-0024] Instance hold56, current node at (596480, 48960) at layer 6 have been moved from (600300, 21760).\n", - "[WARNING PSM-0024] Instance hold58, current node at (641280, 48960) at layer 6 have been moved from (637100, 24480).\n", - "[WARNING PSM-0024] Instance hold68, current node at (618880, 48960) at layer 6 have been moved from (620080, 21760).\n", - "[WARNING PSM-0024] Instance hold79, current node at (618880, 48960) at layer 6 have been moved from (616400, 21760).\n", - "[WARNING PSM-0024] Instance hold81, current node at (618880, 48960) at layer 6 have been moved from (623760, 21760).\n", - "[WARNING PSM-0024] Instance hold82, current node at (518080, 48960) at layer 6 have been moved from (523020, 21760).\n", - "[WARNING PSM-0024] Instance hold87, current node at (596480, 48960) at layer 6 have been moved from (596160, 21760).\n", - "[WARNING PSM-0024] Instance hold90, current node at (630080, 48960) at layer 6 have been moved from (631580, 21760).\n", - "[WARNING PSM-0024] Instance hold93, current node at (641280, 48960) at layer 6 have been moved from (640780, 24480).\n", - "[WARNING PSM-0024] Instance hold95, current node at (607680, 48960) at layer 6 have been moved from (607660, 21760).\n", - "[WARNING PSM-0024] Instance hold96, current node at (630080, 48960) at layer 6 have been moved from (633420, 24480).\n", - "[WARNING PSM-0024] Instance ANTENNA_49, current node at (809280, 48960) at layer 6 have been moved from (808680, 29920).\n", - "[WARNING PSM-0024] Instance ANTENNA_50, current node at (361280, 48960) at layer 6 have been moved from (362940, 27200).\n", - "[WARNING PSM-0024] Instance ANTENNA_52, current node at (338880, 48960) at layer 6 have been moved from (339480, 32640).\n", - "[WARNING PSM-0024] Instance ANTENNA_58, current node at (529280, 48960) at layer 6 have been moved from (527620, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_62, current node at (574080, 48960) at layer 6 have been moved from (574080, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_63, current node at (574080, 48960) at layer 6 have been moved from (568560, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_72, current node at (45440, 511360) at layer 6 have been moved from (29900, 505920).\n", - "[WARNING PSM-0024] Instance ANTENNA_74, current node at (45440, 511360) at layer 6 have been moved from (28980, 505920).\n", - "[WARNING PSM-0024] Instance ANTENNA_76, current node at (45440, 511360) at layer 6 have been moved from (28060, 505920).\n", - "[INFO PSM-0064] Number of voltage sources = 8.\n", - "[INFO PSM-0040] All PDN stripes on net VDD are connected.\n", - "########## IR report #################\n", - "Corner: default\n", - "Worstcase voltage: 1.79e+00 V\n", - "Average IR drop : 2.63e-03 V\n", - "Worstcase IR drop: 5.84e-03 V\n", - "######################################\n", - "[INFO PSM-0022] Using 0.000V for VSS\n", - "[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.\n", - "[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction\n", - "[INFO PSM-0076] Setting metal node density to be standard cell height times 5.\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (132.240um, 144.160um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (938.640um, 144.160um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 290.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (401.040um, 280.160um).\n", - "[WARNING PSM-0030] VSRC location at (670.070um, 430.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (669.840um, 443.360um).\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (132.240um, 579.360um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (938.640um, 579.360um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 710.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (401.040um, 715.360um).\n", - "[INFO PSM-0031] Number of PDN nodes on net VSS = 4567.\n", - "[WARNING PSM-0024] Instance input1, current node at (625040, 960160) at layer 6 have been moved from (627900, 976480).\n", - "[WARNING PSM-0024] Instance input4, current node at (647440, 960160) at layer 6 have been moved from (650900, 976480).\n", - "[WARNING PSM-0024] Instance input6, current node at (658640, 960160) at layer 6 have been moved from (655500, 976480).\n", - "[WARNING PSM-0024] Instance input8, current node at (647440, 960160) at layer 6 have been moved from (645840, 976480).\n", - "[WARNING PSM-0024] Instance input11, current node at (658640, 960160) at layer 6 have been moved from (661480, 976480).\n", - "[WARNING PSM-0024] Instance input12, current node at (625040, 960160) at layer 6 have been moved from (623300, 976480).\n", - "[WARNING PSM-0024] Instance input25, current node at (636240, 960160) at layer 6 have been moved from (641700, 976480).\n", - "[WARNING PSM-0024] Instance input26, current node at (613840, 960160) at layer 6 have been moved from (614100, 976480).\n", - "[WARNING PSM-0024] Instance input27, current node at (636240, 960160) at layer 6 have been moved from (632040, 976480).\n", - "[WARNING PSM-0024] Instance output113, current node at (625040, 960160) at layer 6 have been moved from (621920, 976480).\n", - "[WARNING PSM-0024] Instance hold52, current node at (636240, 960160) at layer 6 have been moved from (636180, 976480).\n", - "[INFO PSM-0064] Number of voltage sources = 8.\n", - "[INFO PSM-0040] All PDN stripes on net VSS are connected.\n", - "########## IR report #################\n", - "Corner: default\n", - "Worstcase voltage: 7.15e-03 V\n", - "Average IR drop : 2.71e-03 V\n", - "Worstcase IR drop: 7.15e-03 V\n", - "######################################\n", - "\n", - "==========================================================================\n", - "finish check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish report_tns\n", - "--------------------------------------------------------------------------\n", - "tns 0.00\n", - "\n", - "==========================================================================\n", - "finish report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "finish report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 3.60\n", - "\n", - "==========================================================================\n", - "finish report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/_1151_/CLK ^\n", - " 0.71\n", - "riscv/dp/rf/_5652_/CLK ^\n", - " 0.81 0.00 -0.10\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1152_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ riscv/dp/_1152_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.22 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.13 0.71 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.04 0.00 0.71 ^ riscv/dp/_1152_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 0.71 clock reconvergence pessimism\n", - " 0.32 1.03 library removal time\n", - " 1.03 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.03 data required time\n", - " -2.22 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 1.19 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem0[3] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5281_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem0[3] (in)\n", - " inter_dmem0[3] (net)\n", - " 0.00 0.00 0.38 ^ input36/A (sky130_fd_sc_hd__dlymetal6s2s_1)\n", - " 1 0.00 0.07 0.09 0.47 ^ input36/X (sky130_fd_sc_hd__dlymetal6s2s_1)\n", - " net36 (net)\n", - " 0.07 0.00 0.47 ^ _130_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.00 0.04 0.08 0.55 v _130_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _039_ (net)\n", - " 0.04 0.00 0.55 v _131_/B1 (sky130_fd_sc_hd__o21ai_2)\n", - " 1 0.00 0.04 0.05 0.59 ^ _131_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " dmem_communicate.mem_out[3] (net)\n", - " 0.04 0.00 0.59 ^ riscv/dp/_0596_/A_N (sky130_fd_sc_hd__nand2b_4)\n", - " 1 0.01 0.05 0.12 0.71 ^ riscv/dp/_0596_/Y (sky130_fd_sc_hd__nand2b_4)\n", - " riscv/dp/_0242_ (net)\n", - " 0.05 0.00 0.71 ^ riscv/dp/_0597_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.01 0.05 0.08 0.78 v riscv/dp/_0597_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0243_ (net)\n", - " 0.05 0.00 0.78 v riscv/dp/_0598_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.06 0.20 0.16 0.95 ^ riscv/dp/_0598_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[3] (net)\n", - " 0.20 0.00 0.95 ^ riscv/dp/rf/_4197_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.03 0.15 1.10 ^ riscv/dp/rf/_4197_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0547_ (net)\n", - " 0.03 0.00 1.10 ^ riscv/dp/rf/_5281_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.10 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_1__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.02 0.09 0.16 0.59 ^ clkbuf_3_1__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_1__leaf_clk (net)\n", - " 0.09 0.00 0.59 ^ clkbuf_leaf_69_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.04 0.13 0.21 0.81 ^ clkbuf_leaf_69_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_69_clk (net)\n", - " 0.13 0.00 0.81 ^ riscv/dp/rf/_5281_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 0.81 clock reconvergence pessimism\n", - " -0.02 0.79 library hold time\n", - " 0.79 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.79 data required time\n", - " -1.10 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.31 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1131_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.10 0.12 0.15 2.37 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.12 0.00 2.37 ^ riscv/dp/_1131_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.37 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_48_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.14 13.23 ^ clkbuf_leaf_48_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_48_clk (net)\n", - " 0.04 0.00 13.23 ^ riscv/dp/_1131_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 13.23 clock reconvergence pessimism\n", - " 0.19 13.42 library recovery time\n", - " 13.42 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.42 data required time\n", - " -2.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.05 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1140_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5120_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.02 0.06 0.16 0.74 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.06 0.00 0.74 ^ riscv/dp/_1140_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.02 0.07 0.50 1.23 v riscv/dp/_1140_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net81 (net)\n", - " 0.07 0.00 1.23 v _056_/A (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.27 0.32 1.55 ^ _056_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _007_ (net)\n", - " 0.27 0.00 1.55 ^ _059_/B (sky130_fd_sc_hd__nand4_2)\n", - " 1 0.01 0.15 0.19 1.74 v _059_/Y (sky130_fd_sc_hd__nand4_2)\n", - " _010_ (net)\n", - " 0.15 0.00 1.74 v rebuffer15/A (sky130_fd_sc_hd__buf_16)\n", - " 8 0.03 0.04 0.18 1.93 v rebuffer15/X (sky130_fd_sc_hd__buf_16)\n", - " net468 (net)\n", - " 0.04 0.00 1.93 v _073_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 11 0.06 0.46 0.38 2.30 ^ _073_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[5] (net)\n", - " 0.46 0.00 2.31 ^ riscv/_088_/C (sky130_fd_sc_hd__and3b_2)\n", - " 5 0.02 0.13 0.33 2.63 ^ riscv/_088_/X (sky130_fd_sc_hd__and3b_2)\n", - " riscv/_038_ (net)\n", - " 0.13 0.00 2.63 ^ riscv/_110_/B (sky130_fd_sc_hd__and3_4)\n", - " 56 0.35 0.99 0.87 3.50 ^ riscv/_110_/X (sky130_fd_sc_hd__and3_4)\n", - " riscv/c.imm[1] (net)\n", - " 0.99 0.02 3.53 ^ riscv/dp/_0783_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.00 0.09 0.66 4.19 v riscv/dp/_0783_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/_0372_ (net)\n", - " 0.09 0.00 4.19 v riscv/dp/_0784_/B (sky130_fd_sc_hd__nand2b_2)\n", - " 2 0.02 0.11 0.13 4.32 ^ riscv/dp/_0784_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0373_ (net)\n", - " 0.11 0.00 4.32 ^ riscv/dp/_0785_/B (sky130_fd_sc_hd__nor2_4)\n", - " 2 0.01 0.12 0.04 4.36 v riscv/dp/_0785_/Y (sky130_fd_sc_hd__nor2_4)\n", - " riscv/dp/memsrcmux.d1[0] (net)\n", - " 0.12 0.00 4.36 v riscv/dp/_0938_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.10 0.13 4.50 ^ riscv/dp/_0938_/Y (sky130_fd_sc_hd__nand2_1)\n", - " riscv/dp/_0012_ (net)\n", - " 0.10 0.00 4.50 ^ riscv/dp/_0939_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 6 0.05 0.12 0.13 4.63 v riscv/dp/_0939_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/memsrcmux.y[0] (net)\n", - " 0.12 0.00 4.63 v load_slew140/A (sky130_fd_sc_hd__buf_12)\n", - " 21 0.10 0.06 0.19 4.82 v load_slew140/X (sky130_fd_sc_hd__buf_12)\n", - " net140 (net)\n", - " 0.06 0.00 4.83 v riscv/dp/alu/_736_/S (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.07 0.34 5.16 v riscv/dp/alu/_736_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/alu/_163_ (net)\n", - " 0.07 0.00 5.16 v riscv/dp/alu/_741_/B (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.52 5.68 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 5.68 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.01 0.22 0.29 5.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.22 0.00 5.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.01 0.08 0.11 6.08 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.08 0.00 6.08 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.01 0.19 0.23 6.31 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.19 0.00 6.31 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.01 0.09 0.21 6.52 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.09 0.00 6.52 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.06 0.06 6.59 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.06 0.00 6.59 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.15 0.20 6.79 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.15 0.00 6.79 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.00 0.07 0.20 6.99 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 6.99 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.23 0.22 7.21 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.23 0.00 7.21 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.10 0.14 7.35 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 7.35 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.00 0.03 0.24 7.60 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.03 0.00 7.60 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.05 0.11 0.35 7.94 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.11 0.00 7.95 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.13 0.17 8.12 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.13 0.00 8.12 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.00 0.05 0.07 8.19 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.05 0.00 8.19 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 8.73 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.05 0.00 8.73 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.01 0.06 0.19 8.91 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.06 0.00 8.92 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.00 0.13 0.07 8.99 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.13 0.00 8.99 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.13 0.12 9.11 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.13 0.00 9.11 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.05 0.04 0.18 9.29 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.04 0.00 9.29 v riscv/dp/rf/_4015_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.28 9.56 v riscv/dp/rf/_4015_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0386_ (net)\n", - " 0.05 0.00 9.56 v riscv/dp/rf/_5120_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 9.56 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.02 0.09 0.18 13.26 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.09 0.00 13.27 ^ riscv/dp/rf/_5120_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 13.27 clock reconvergence pessimism\n", - " -0.10 13.16 library setup time\n", - " 13.16 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.16 data required time\n", - " -9.56 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 3.60 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1131_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.10 0.12 0.15 2.37 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.12 0.00 2.37 ^ riscv/dp/_1131_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.37 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_48_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.14 13.23 ^ clkbuf_leaf_48_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_48_clk (net)\n", - " 0.04 0.00 13.23 ^ riscv/dp/_1131_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 13.23 clock reconvergence pessimism\n", - " 0.19 13.42 library recovery time\n", - " 13.42 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.42 data required time\n", - " -2.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.05 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1140_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5120_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.02 0.06 0.16 0.74 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.06 0.00 0.74 ^ riscv/dp/_1140_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.02 0.07 0.50 1.23 v riscv/dp/_1140_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net81 (net)\n", - " 0.07 0.00 1.23 v _056_/A (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.27 0.32 1.55 ^ _056_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _007_ (net)\n", - " 0.27 0.00 1.55 ^ _059_/B (sky130_fd_sc_hd__nand4_2)\n", - " 1 0.01 0.15 0.19 1.74 v _059_/Y (sky130_fd_sc_hd__nand4_2)\n", - " _010_ (net)\n", - " 0.15 0.00 1.74 v rebuffer15/A (sky130_fd_sc_hd__buf_16)\n", - " 8 0.03 0.04 0.18 1.93 v rebuffer15/X (sky130_fd_sc_hd__buf_16)\n", - " net468 (net)\n", - " 0.04 0.00 1.93 v _073_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 11 0.06 0.46 0.38 2.30 ^ _073_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[5] (net)\n", - " 0.46 0.00 2.31 ^ riscv/_088_/C (sky130_fd_sc_hd__and3b_2)\n", - " 5 0.02 0.13 0.33 2.63 ^ riscv/_088_/X (sky130_fd_sc_hd__and3b_2)\n", - " riscv/_038_ (net)\n", - " 0.13 0.00 2.63 ^ riscv/_110_/B (sky130_fd_sc_hd__and3_4)\n", - " 56 0.35 0.99 0.87 3.50 ^ riscv/_110_/X (sky130_fd_sc_hd__and3_4)\n", - " riscv/c.imm[1] (net)\n", - " 0.99 0.02 3.53 ^ riscv/dp/_0783_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.00 0.09 0.66 4.19 v riscv/dp/_0783_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/_0372_ (net)\n", - " 0.09 0.00 4.19 v riscv/dp/_0784_/B (sky130_fd_sc_hd__nand2b_2)\n", - " 2 0.02 0.11 0.13 4.32 ^ riscv/dp/_0784_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0373_ (net)\n", - " 0.11 0.00 4.32 ^ riscv/dp/_0785_/B (sky130_fd_sc_hd__nor2_4)\n", - " 2 0.01 0.12 0.04 4.36 v riscv/dp/_0785_/Y (sky130_fd_sc_hd__nor2_4)\n", - " riscv/dp/memsrcmux.d1[0] (net)\n", - " 0.12 0.00 4.36 v riscv/dp/_0938_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.10 0.13 4.50 ^ riscv/dp/_0938_/Y (sky130_fd_sc_hd__nand2_1)\n", - " riscv/dp/_0012_ (net)\n", - " 0.10 0.00 4.50 ^ riscv/dp/_0939_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 6 0.05 0.12 0.13 4.63 v riscv/dp/_0939_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/memsrcmux.y[0] (net)\n", - " 0.12 0.00 4.63 v load_slew140/A (sky130_fd_sc_hd__buf_12)\n", - " 21 0.10 0.06 0.19 4.82 v load_slew140/X (sky130_fd_sc_hd__buf_12)\n", - " net140 (net)\n", - " 0.06 0.00 4.83 v riscv/dp/alu/_736_/S (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.07 0.34 5.16 v riscv/dp/alu/_736_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/alu/_163_ (net)\n", - " 0.07 0.00 5.16 v riscv/dp/alu/_741_/B (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.52 5.68 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 5.68 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.01 0.22 0.29 5.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.22 0.00 5.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.01 0.08 0.11 6.08 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.08 0.00 6.08 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.01 0.19 0.23 6.31 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.19 0.00 6.31 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.01 0.09 0.21 6.52 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.09 0.00 6.52 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.06 0.06 6.59 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.06 0.00 6.59 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.15 0.20 6.79 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.15 0.00 6.79 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.00 0.07 0.20 6.99 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 6.99 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.23 0.22 7.21 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.23 0.00 7.21 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.10 0.14 7.35 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 7.35 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.00 0.03 0.24 7.60 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.03 0.00 7.60 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.05 0.11 0.35 7.94 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.11 0.00 7.95 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.13 0.17 8.12 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.13 0.00 8.12 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.00 0.05 0.07 8.19 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.05 0.00 8.19 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 8.73 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.05 0.00 8.73 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.01 0.06 0.19 8.91 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.06 0.00 8.92 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.00 0.13 0.07 8.99 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.13 0.00 8.99 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.13 0.12 9.11 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.13 0.00 9.11 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.05 0.04 0.18 9.29 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.04 0.00 9.29 v riscv/dp/rf/_4015_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.28 9.56 v riscv/dp/rf/_4015_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0386_ (net)\n", - " 0.05 0.00 9.56 v riscv/dp/rf/_5120_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 9.56 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.02 0.09 0.18 13.26 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.09 0.00 13.27 ^ riscv/dp/rf/_5120_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 13.27 clock reconvergence pessimism\n", - " -0.10 13.16 library setup time\n", - " 13.16 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.16 data required time\n", - " -9.56 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 3.60 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.5127852559089661\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.3419\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.02627899870276451\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.031137999147176743\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8440\n", - "\n", - "==========================================================================\n", - "finish max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "finish setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "finish hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "finish critical path delay\n", - "--------------------------------------------------------------------------\n", - "9.5638\n", - "\n", - "==========================================================================\n", - "finish critical path slack\n", - "--------------------------------------------------------------------------\n", - "3.5983\n", - "\n", - "==========================================================================\n", - "finish slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "37.624166\n", - "\n", - "==========================================================================\n", - "finish report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.36e-03 0.00e+00 8.53e-09 3.36e-03 59.4%\n", - "Combinational 7.10e-04 6.60e-04 2.54e-08 1.37e-03 24.2%\n", - "Clock 3.63e-04 5.70e-04 4.51e-10 9.33e-04 16.5%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.44e-03 1.23e-03 3.43e-08 5.67e-03 100.0%\n", - " 78.3% 21.7% 0.0%\n", - "\n", - "==========================================================================\n", - "finish report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98795 u^2 9% utilization.\n", - "\n", - "[WARNING GUI-0076] QStandardPaths: XDG_RUNTIME_DIR not set, defaulting to '/tmp/runtime-root'\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_routing.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_placement.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_ir_drop.webp.png\n", - "[WARNING GUI-0076] QXcbConnection: XCB error: 13 (BadGC), sequence: 478, resource id: 0, major code: 72 (PutImage), minor code: 0\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_clocks.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_resizer.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/cts_clk.webp.png\n", - "Elapsed time: 0:28.32[h:]min:sec. CPU time: user 26.79 sys 0.76 (97%). Peak memory: 847112KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/6_final.sdc\n", - "cp /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef ./objects/130_180/riscv32i_3d/80MHz/klayout_tech.lef\n", - "sed 's,.*,../../../../objects/130_180/riscv32i_3d/80MHz/klayout_tech.lef ../../../../platforms/130_180/lef/sky130_fd_sc_hd_merged.lef,g' /Flow/platforms/130_180/130_180.lyt > ./objects/130_180/riscv32i_3d/80MHz/klayout.lyt\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' stdbuf -o L /usr/bin/klayout -zz -rd design_name=core_without_dmem \\\n", - " -rd in_def=./results/130_180/riscv32i_3d/80MHz/6_final.def \\\n", - " -rd in_files=\"/Flow/platforms/130_180/gds/sky130_fd_sc_hd.gds \" \\\n", - " -rd config_file=/Flow/platforms/130_180/fill.json \\\n", - " -rd seal_file=\"\" \\\n", - " -rd out_file=./results/130_180/riscv32i_3d/80MHz/6_1_merged.gds \\\n", - " -rd tech_file=./objects/130_180/riscv32i_3d/80MHz/klayout.lyt \\\n", - " -rd layer_map= \\\n", - " -r /Flow/util/def2stream.py) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/6_1_merge.log\n", - "[INFO] Reporting cells prior to loading DEF ...\n", - "[INFO] Reading DEF ...\n", - "[INFO] Clearing cells...\n", - "[INFO] Merging GDS/OAS files...\n", - "\t/Flow/platforms/130_180/gds/sky130_fd_sc_hd.gds\n", - "[INFO] Copying toplevel cell 'core_without_dmem'\n", - "INFO: Reading config file: /Flow/platforms/130_180/fill.json\n", - "[INFO] Checking for missing cell from GDS/OAS...\n", - "[INFO] All LEF cells have matching GDS/OAS cells\n", - "[INFO] Checking for orphan cell in the final layout...\n", - "[INFO] No orphan cells\n", - "[INFO] Writing out GDS/OAS './results/130_180/riscv32i_3d/80MHz/6_1_merged.gds'\n", - "Elapsed time: 0:04.08[h:]min:sec. CPU time: user 3.34 sys 0.57 (95%). Peak memory: 646408KB.\n", - "cp results/130_180/riscv32i_3d/80MHz/6_1_merged.gds results/130_180/riscv32i_3d/80MHz/6_final.gds\n", - "./logs/130_180/riscv32i_3d/80MHz\n", - "Log Elapsed seconds\n", - "1_1_yosys 14\n", - "1_1_yosys_hier_report 17\n", - "2_1_floorplan 1\n", - "3_1_place_gp_skip_io 2\n", - "3_3_place_gp 54\n", - "3_4_place_resized 4\n", - "3_5_place_dp 3\n", - "4_1_cts 36\n", - "5_1_grt 48\n", - "5_2_fillcell 1\n", - "5_3_route 107\n", - "6_1_merge 4\n", - "6_report 28\n", - "[INFO][FLOW] Invoked hierarchical flow.\n", - "Block gf180mcu_fd_ip_sram__sram256x8m8wm1 needs to be hardened.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "rm -f ./results/gf180/fakeram4/80MHz/1_*.v ./results/gf180/fakeram4/80MHz/1_synth.sdc\n", - "rm -f ./reports/gf180/fakeram4/80MHz/synth_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/1_*\n", - "rm -f ./objects/gf180/fakeram4/80MHz/mark_hier_stop_modules.tcl\n", - "rm -rf _tmp_yosys-abc-*\n", - "rm -f ./results/gf180/fakeram4/80MHz/2_*floorplan*.odb ./results/gf180/fakeram4/80MHz/2_floorplan.sdc ./results/gf180/fakeram4/80MHz/2_*.v ./results/gf180/fakeram4/80MHz/2_*.def\n", - "rm -f ./reports/gf180/fakeram4/80MHz/2_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/2_*\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_*place*.odb\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_place.sdc\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_*.def ./results/gf180/fakeram4/80MHz/3_*.v\n", - "rm -f ./reports/gf180/fakeram4/80MHz/3_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/3_*\n", - "rm -rf ./results/gf180/fakeram4/80MHz/4_*cts*.odb ./results/gf180/fakeram4/80MHz/4_cts.sdc ./results/gf180/fakeram4/80MHz/4_*.v ./results/gf180/fakeram4/80MHz/4_*.def\n", - "rm -f ./reports/gf180/fakeram4/80MHz/4_*\n", - "rm -rf ./logs/gf180/fakeram4/80MHz/4_*\n", - "rm -rf output*/ results*.out.dmp layer_*.mps\n", - "rm -rf *.gdid *.log *.met *.sav *.res.dmp\n", - "rm -rf ./results/gf180/fakeram4/80MHz/route.guide ./results/gf180/fakeram4/80MHz/output_guide.mod ./results/gf180/fakeram4/80MHz/updated_clks.sdc\n", - "rm -rf ./results/gf180/fakeram4/80MHz/5_*.odb ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/5_*.def ./results/gf180/fakeram4/80MHz/5_*.v\n", - "rm -f ./reports/gf180/fakeram4/80MHz/5_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/5_*\n", - "rm -rf ./results/gf180/fakeram4/80MHz/6_*.gds ./results/gf180/fakeram4/80MHz/6_*.oas ./results/gf180/fakeram4/80MHz/6_*.odb ./results/gf180/fakeram4/80MHz/6_*.v ./results/gf180/fakeram4/80MHz/6_*.def ./results/gf180/fakeram4/80MHz/6_*.sdc ./results/gf180/fakeram4/80MHz/6_*.spef\n", - "rm -rf ./reports/gf180/fakeram4/80MHz/6_*.rpt\n", - "rm -f ./logs/gf180/fakeram4/80MHz/6_*\n", - "rm -f ./reports/gf180/fakeram4/80MHz/metadata-80MHz-check.log\n", - "rm -f ./reports/gf180/fakeram4/80MHz/metadata-80MHz.json\n", - "rm -f ./results/gf180/fakeram4/80MHz/dmem.lib ./results/gf180/fakeram4/80MHz/dmem.lef\n", - "rm -rf ./objects/gf180/fakeram4/80MHz\n", - "[INFO][FLOW] Invoked hierarchical flow.\n", - "Block gf180mcu_fd_ip_sram__sram256x8m8wm1 needs to be hardened.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "/Flow/util/markDontUse.py -p \"*_1\" -i /Flow/platforms/gf180/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib.gz -o objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "Opening file for replace: /Flow/platforms/gf180/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib.gz\n", - "Marked 62 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 12\n", - "Writing replaced file: objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "/Flow/util/markDontUse.py -p \"*_1\" -i designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib -o objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "Opening file for replace: designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "Marked 0 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 0\n", - "Writing replaced file: objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "mkdir -p ./results/gf180/fakeram4/80MHz ./logs/gf180/fakeram4/80MHz ./reports/gf180/fakeram4/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth.tcl) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/1_1_yosys.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_real\n", - "2. Executing Liberty frontend: ./objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "3. Executing Liberty frontend: ./objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "finish synth_preamble\n", - "4. Executing SYNTH pass.\n", - "4.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "4.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem'.\n", - "./designs/src/riscv32i_3d/dmem_real:32: Warning: Range select [15:8] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "./designs/src/riscv32i_3d/dmem_real:34: Warning: Range select [23:16] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "./designs/src/riscv32i_3d/dmem_real:36: Warning: Range select [31:24] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "4.2.1. Analyzing design hierarchy..\n", - "4.2.2. Analyzing design hierarchy..\n", - "4.3. Executing PROC pass (convert processes to netlists).\n", - "4.3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "4.3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "4.3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "4.3.4. Executing PROC_INIT pass (extract init attributes).\n", - "4.3.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "4.3.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "4.3.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "4.3.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "4.3.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "4.3.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "4.3.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "4.3.12. Executing OPT_EXPR pass (perform const folding).\n", - "4.4. Executing FLATTEN pass (flatten design).\n", - "4.5. Executing OPT_EXPR pass (perform const folding).\n", - "4.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.7. Executing CHECK pass (checking for obvious problems).\n", - "4.8. Executing OPT pass (performing simple optimizations).\n", - "4.8.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.8.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.8.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.8.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.8.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.8.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.8.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.8.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.8.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.9. Executing FSM pass (extract and optimize FSM).\n", - "4.9.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "4.9.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "4.9.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "4.9.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.9.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "4.9.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "4.9.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "4.9.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "4.10. Executing OPT pass (performing simple optimizations).\n", - "4.10.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.10.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.10.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.10.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.10.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.10.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.10.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.10.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.10.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.11. Executing WREDUCE pass (reducing word size of cells).\n", - "4.12. Executing PEEPOPT pass (run peephole optimizers).\n", - "4.13. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.14. Executing ALUMACC pass (create $alu and $macc cells).\n", - "4.15. Executing SHARE pass (SAT-based resource sharing).\n", - "4.16. Executing OPT pass (performing simple optimizations).\n", - "4.16.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.16.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.16.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.16.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.16.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.16.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.16.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.16.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.16.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.17. Executing MEMORY pass.\n", - "4.17.1. Executing OPT_MEM pass (optimize memories).\n", - "4.17.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "4.17.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "4.17.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "4.17.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "4.17.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.17.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "4.17.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "4.17.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.17.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "4.18. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.19. Executing OPT pass (performing simple optimizations).\n", - "4.19.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.19.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.19.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.19.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.19.5. Finished fast OPT passes.\n", - "4.20. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "4.21. Executing OPT pass (performing simple optimizations).\n", - "4.21.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.21.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.21.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.21.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.21.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.21.6. Executing OPT_SHARE pass.\n", - "4.21.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.21.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.21.9. Executing OPT_EXPR pass (perform const folding).\n", - "4.21.10. Finished OPT passes. (There is nothing left to do.)\n", - "4.22. Executing TECHMAP pass (map to technology primitives).\n", - "4.22.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "4.22.2. Continuing TECHMAP pass.\n", - "4.23. Executing OPT pass (performing simple optimizations).\n", - "4.23.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.23.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.23.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.23.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.23.5. Finished fast OPT passes.\n", - "4.24. Executing ABC pass (technology mapping using ABC).\n", - "4.24.1. Extracting gate netlist of module `\\dmem' to `/input.blif'..\n", - "4.25. Executing OPT pass (performing simple optimizations).\n", - "4.25.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.25.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.25.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.25.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.25.5. Finished fast OPT passes.\n", - "4.26. Executing HIERARCHY pass (managing design hierarchy).\n", - "4.26.1. Analyzing design hierarchy..\n", - "4.26.2. Analyzing design hierarchy..\n", - "4.27. Printing statistics.\n", - "4.28. Executing CHECK pass (checking for obvious problems).\n", - "5. Executing OPT pass (performing simple optimizations).\n", - "5.1. Executing OPT_EXPR pass (perform const folding).\n", - "5.2. Executing OPT_MERGE pass (detect identical cells).\n", - "5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "5.5. Executing OPT_MERGE pass (detect identical cells).\n", - "5.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "5.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "5.8. Executing OPT_EXPR pass (perform const folding).\n", - "5.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "5.12. Executing OPT_MERGE pass (detect identical cells).\n", - "5.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "5.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "5.15. Executing OPT_EXPR pass (perform const folding).\n", - "5.16. Finished OPT passes. (There is nothing left to do.)\n", - "6. Executing EXTRACT_FA pass (find and extract full/half adders).\n", - "7. Executing TECHMAP pass (map to technology primitives).\n", - "7.1. Executing Verilog-2005 frontend: /Flow/platforms/gf180/cells_adders.v\n", - "7.2. Continuing TECHMAP pass.\n", - "8. Executing TECHMAP pass (map to technology primitives).\n", - "8.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "8.2. Continuing TECHMAP pass.\n", - "9. Executing OPT pass (performing simple optimizations).\n", - "9.1. Executing OPT_EXPR pass (perform const folding).\n", - "9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "9.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "9.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "9.5. Finished fast OPT passes.\n", - "10. Executing TECHMAP pass (map to technology primitives).\n", - "10.1. Executing Verilog-2005 frontend: /Flow/platforms/gf180/cells_latch.v\n", - "10.2. Continuing TECHMAP pass.\n", - "11. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4' - skipping.\n", - "11.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "12. Executing OPT pass (performing simple optimizations).\n", - "12.1. Executing OPT_EXPR pass (perform const folding).\n", - "12.2. Executing OPT_MERGE pass (detect identical cells).\n", - "12.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "12.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "12.5. Executing OPT_MERGE pass (detect identical cells).\n", - "12.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "12.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "12.8. Executing OPT_EXPR pass (perform const folding).\n", - "12.9. Finished OPT passes. (There is nothing left to do.)\n", - "Using ABC speed script.\n", - "[FLOW] Set ABC_CLOCK_PERIOD_IN_PS to: 12.5\n", - "13. Executing ABC pass (technology mapping using ABC).\n", - "13.1. Extracting gate netlist of module `\\dmem' to `/input.blif'..\n", - "14. Executing SETUNDEF pass (replace undef values with defined constants).\n", - "15. Executing SPLITNETS pass (splitting up multi-bit signals).\n", - "16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "17. Executing HILOMAP pass (mapping to constant drivers).\n", - "18. Executing INSBUF pass (insert buffer cells for connected wires).\n", - "19. Executing CHECK pass (checking for obvious problems).\n", - "20. Printing statistics.\n", - "21. Executing Verilog backend.\n", - "Warnings: 11 unique messages, 75 total\n", - "End of script. Logfile hash: 6fc339a1fb, CPU: user 0.89s system 0.05s, MEM: 53.96 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 36% 3x read_liberty (0 sec), 27% 2x stat (0 sec), ...\n", - "Elapsed time: 0:00.97[h:]min:sec. CPU time: user 0.89 sys 0.06 (98%). Peak memory: 55672KB.\n", - "cp ./designs/130_180/fakeram4/constraint.sdc ./results/gf180/fakeram4/80MHz/1_synth.sdc\n", - "mkdir -p ./results/gf180/fakeram4/80MHz ./logs/gf180/fakeram4/80MHz ./reports/gf180/fakeram4/80MHz\n", - "cp results/gf180/fakeram4/80MHz/1_1_yosys.v results/gf180/fakeram4/80MHz/1_synth.v\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_1_floorplan.tmp.log ./logs/gf180/fakeram4/80MHz/2_1_floorplan.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/floorplan.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_1_floorplan.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_1_floorplan.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via1 :\"\n", - " \tEOLENCLOSURE 0.34 0.06 ;\"\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via2 :\" EOLENCLOSURE 0.34 0.06 ; \"\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via3 :\" EOLENCLOSURE 0.34 0.06 ; \"\n", - "[INFO ODB-0223] Created 11 technology layers\n", - "[INFO ODB-0224] Created 46 technology vias\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef\n", - "[INFO ODB-0225] Created 229 library cells\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef\n", - "[INFO ODB-0222] Reading LEF file: ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef\n", - "[INFO ODB-0225] Created 1 library cells\n", - "[INFO ODB-0226] Finished LEF file: ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef\n", - "\n", - "==========================================================================\n", - "Floorplan check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "number instances in verilog is 5\n", - "[WARNING IFP-0028] Core area lower left (20.000, 20.000) snapped to (20.160, 20.160).\n", - "[INFO IFP-0001] Added 190 rows of 2071 site GF018hv5v_green_sc9 with height 1.\n", - "[INFO RSZ-0026] Removed 0 buffers.\n", - "Default units for flow\n", - " time 1ns\n", - " capacitance 1pF\n", - " resistance 1ohm\n", - " voltage 1v\n", - " current 1mA\n", - " power 1uW\n", - " distance 1um\n", - "\n", - "==========================================================================\n", - "floorplan final check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "floorplan final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16230.26\n", - "\n", - "==========================================================================\n", - "floorplan final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.07\n", - "\n", - "==========================================================================\n", - "floorplan final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.07\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[0] (in)\n", - " we_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ dmem00/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.00 0.48 17.07 17.07 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.48 0.00 17.07 v inter_dmem0[0] (out)\n", - " 17.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.00 0.48 17.07 17.07 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.48 0.00 17.07 v inter_dmem0[0] (out)\n", - " 17.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "floorplan final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 588861 u^2 53% utilization.\n", - "\n", - "Elapsed time: 0:00.83[h:]min:sec. CPU time: user 0.74 sys 0.06 (96%). Peak memory: 97076KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_1_floorplan.odb ./results/gf180/fakeram4/80MHz/2_2_floorplan_io.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_2_floorplan_io.odb ./results/gf180/fakeram4/80MHz/2_3_floorplan_tdms.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.tmp.log ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/macro_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "row=0,col=0\n", - "x=300000\n", - "y=300000\n", - "row=0,col=1\n", - "x=1220000\n", - "y=300000\n", - "row=1,col=0\n", - "x=300000\n", - "y=1020000\n", - "row=1,col=1\n", - "x=1220000\n", - "y=1020000\n", - "[INFO][FLOW-xxxx] Using manual macro placement file ./designs/130_180/fakeram4/macro.tcl\n", - "Elapsed time: 0:00.73[h:]min:sec. CPU time: user 0.65 sys 0.09 (101%). Peak memory: 96596KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.tmp.log ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/tapcell.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[WARNING TAP-0014] endcap_cpp option is deprecated.\n", - "[INFO ODB-0303] The initial 190 rows (393490 sites) were cut with 4 shapes for a total of 468 rows (176789 sites).\n", - "[INFO TAP-0004] Inserted 380 endcaps.\n", - "[INFO TAP-0005] Inserted 451 tapcells.\n", - "Elapsed time: 0:00.76[h:]min:sec. CPU time: user 0.69 sys 0.04 (98%). Peak memory: 95208KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.tmp.log ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/pdn.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting PDN generation\n", - "[INFO PDN-0001] Inserting grid: block\n", - "Starting PDN generation\n", - "Elapsed time: 0:02.27[h:]min:sec. CPU time: user 1.87 sys 0.09 (86%). Peak memory: 110188KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_6_floorplan_pdn.odb ./results/gf180/fakeram4/80MHz/2_floorplan.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.tmp.log ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place_skip_io.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting global placement without IO\n", - "miemie\n", - "haha\n", - "[INFO GPL-0002] DBU: 2000\n", - "[INFO GPL-0003] SiteSize: 1120 10080\n", - "[INFO GPL-0004] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0005] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0006] NumInstances: 1008\n", - "[INFO GPL-0007] NumPlaceInstances: 1\n", - "[INFO GPL-0008] NumFixedInstances: 455\n", - "[INFO GPL-0009] NumDummyInstances: 552\n", - "[INFO GPL-0010] NumNets: 58\n", - "[INFO GPL-0011] NumPins: 137\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 2400000 2000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0015] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0016] CoreArea: 4442344704000\n", - "[INFO GPL-0017] NonPlaceInstsArea: 2456650828800\n", - "[INFO GPL-0018] PlaceInstsArea: 90316800\n", - "[INFO GPL-0019] Util(%): 0.00\n", - "[INFO GPL-0020] StdInstsArea: 90316800\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 15390\n", - "[INFO GPL-0032] FillerInit: NumGNets: 58\n", - "[INFO GPL-0033] FillerInit: NumGPins: 137\n", - "[INFO GPL-0023] TargetDensity: 0.70\n", - "[INFO GPL-0024] AveragePlaceInstArea: 90316800\n", - "[INFO GPL-0025] IdealBinArea: 129024000\n", - "[INFO GPL-0026] IdealBinCnt: 34430\n", - "[INFO GPL-0027] TotalBinArea: 4442344704000\n", - "[INFO GPL-0028] BinCnt: 128 128\n", - "[INFO GPL-0029] BinSize: 18122 14963\n", - "[INFO GPL-0030] NumBins: 16384\n", - "[NesterovSolve] Iter: 1 overflow: 0.999976 HPWL: 17100910\n", - "[NesterovSolve] Iter: 10 overflow: 0.408481 HPWL: 17100910\n", - "[NesterovSolve] Iter: 20 overflow: 0.193491 HPWL: 17100910\n", - "[NesterovSolve] Iter: 30 overflow: 0.12677 HPWL: 17100910\n", - "[NesterovSolve] Finished with Overflow: 0.099360\n", - "Elapsed time: 0:01.53[h:]min:sec. CPU time: user 1.32 sys 0.08 (92%). Peak memory: 112336KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_2_place_iop.tmp.log ./logs/gf180/fakeram4/80MHz/3_2_place_iop.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/io_placement.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_2_place_iop.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_2_place_iop.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "adding pads according to the mother die\n", - "[INFO PPL-0070] Pin clk placed at (0.00um, 770.00um).\n", - "[INFO PPL-0070] Pin writedata[0] placed at (430.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[1] placed at (780.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[2] placed at (340.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[3] placed at (610.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[4] placed at (470.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[5] placed at (360.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[6] placed at (810.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[7] placed at (810.00um, 20.00um).\n", - "[INFO PPL-0070] Pin dataadr[0] placed at (810.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[1] placed at (880.00um, 970.00um).\n", - "[INFO PPL-0070] Pin dataadr[2] placed at (880.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[3] placed at (890.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[4] placed at (860.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[5] placed at (870.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[6] placed at (830.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[7] placed at (840.00um, 960.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[0] placed at (1100.00um, 670.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[1] placed at (1100.00um, 360.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[2] placed at (1100.00um, 420.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[3] placed at (1100.00um, 640.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[4] placed at (1100.00um, 470.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[5] placed at (1100.00um, 580.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[6] placed at (1100.00um, 380.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[7] placed at (1100.00um, 530.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[0] placed at (1100.00um, 600.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[1] placed at (1100.00um, 400.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[2] placed at (1100.00um, 460.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[3] placed at (1100.00um, 560.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[4] placed at (1100.00um, 430.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[5] placed at (1100.00um, 620.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[6] placed at (1100.00um, 510.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[7] placed at (1100.00um, 590.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[0] placed at (1100.00um, 630.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[1] placed at (1100.00um, 440.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[2] placed at (1100.00um, 500.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[3] placed at (1100.00um, 570.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[4] placed at (1100.00um, 490.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[5] placed at (1100.00um, 660.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[6] placed at (1100.00um, 390.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[7] placed at (1100.00um, 550.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[0] placed at (1100.00um, 650.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[1] placed at (1100.00um, 410.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[2] placed at (1100.00um, 480.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[3] placed at (1100.00um, 540.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[4] placed at (1100.00um, 450.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[5] placed at (1100.00um, 610.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[6] placed at (1100.00um, 370.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[7] placed at (1100.00um, 520.00um).\n", - "[INFO PPL-0070] Pin ce_mem[0] placed at (30.00um, 530.00um).\n", - "[INFO PPL-0070] Pin ce_mem[1] placed at (30.00um, 480.00um).\n", - "[INFO PPL-0070] Pin ce_mem[2] placed at (30.00um, 500.00um).\n", - "[INFO PPL-0070] Pin ce_mem[3] placed at (30.00um, 550.00um).\n", - "[INFO PPL-0070] Pin we_mem[0] placed at (30.00um, 520.00um).\n", - "[INFO PPL-0070] Pin we_mem[1] placed at (30.00um, 510.00um).\n", - "[INFO PPL-0070] Pin we_mem[2] placed at (30.00um, 490.00um).\n", - "[INFO PPL-0070] Pin we_mem[3] placed at (30.00um, 540.00um).\n", - "Elapsed time: 0:00.99[h:]min:sec. CPU time: user 0.79 sys 0.08 (88%). Peak memory: 109376KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_3_place_gp.tmp.log ./logs/gf180/fakeram4/80MHz/3_3_place_gp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_3_place_gp.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_3_place_gp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GPL-0002] DBU: 2000\n", - "[INFO GPL-0003] SiteSize: 1120 10080\n", - "[INFO GPL-0004] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0005] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0006] NumInstances: 1008\n", - "[INFO GPL-0007] NumPlaceInstances: 1\n", - "[INFO GPL-0008] NumFixedInstances: 455\n", - "[INFO GPL-0009] NumDummyInstances: 552\n", - "[INFO GPL-0010] NumNets: 58\n", - "[INFO GPL-0011] NumPins: 194\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 2400000 2000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0015] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0016] CoreArea: 4442344704000\n", - "[INFO GPL-0017] NonPlaceInstsArea: 2456650828800\n", - "[INFO GPL-0018] PlaceInstsArea: 90316800\n", - "[INFO GPL-0019] Util(%): 0.00\n", - "[INFO GPL-0020] StdInstsArea: 90316800\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[InitialPlace] Iter: 1 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 2 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 3 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 4 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 5 CG residual: 0.00000008 HPWL: 147424040\n", - "[INFO GPL-0031] FillerInit: NumGCells: 15390\n", - "[INFO GPL-0032] FillerInit: NumGNets: 58\n", - "[INFO GPL-0033] FillerInit: NumGPins: 194\n", - "[INFO GPL-0023] TargetDensity: 0.70\n", - "[INFO GPL-0024] AveragePlaceInstArea: 90316800\n", - "[INFO GPL-0025] IdealBinArea: 129024000\n", - "[INFO GPL-0026] IdealBinCnt: 34430\n", - "[INFO GPL-0027] TotalBinArea: 4442344704000\n", - "[INFO GPL-0028] BinCnt: 128 128\n", - "[INFO GPL-0029] BinSize: 18122 14963\n", - "[INFO GPL-0030] NumBins: 16384\n", - "[NesterovSolve] Iter: 1 overflow: 0.999976 HPWL: 98317860\n", - "[NesterovSolve] Snapshot saved at iter = 7\n", - "[NesterovSolve] Iter: 10 overflow: 0.408481 HPWL: 98317860\n", - "[NesterovSolve] Iter: 20 overflow: 0.193491 HPWL: 98317860\n", - "[INFO GPL-0075] Routability numCall: 1 inflationIterCnt: 1 bloatIterCnt: 0\n", - "[INFO GPL-0036] TileLxLy: 0 0\n", - "[INFO GPL-0037] TileSize: 16800 16800\n", - "[INFO GPL-0038] TileCnt: 142 119\n", - "[INFO GPL-0039] numRoutingLayers: 4\n", - "[INFO GPL-0040] NumTiles: 16898\n", - "[INFO GPL-0063] TotalRouteOverflowH2: 0.0\n", - "[INFO GPL-0064] TotalRouteOverflowV2: 0.0\n", - "[INFO GPL-0065] OverflowTileCnt2: 0\n", - "[INFO GPL-0066] 0.5%RC: 1.0\n", - "[INFO GPL-0067] 1.0%RC: 0.9873015880584717\n", - "[INFO GPL-0068] 2.0%RC: 0.9577825046297329\n", - "[INFO GPL-0069] 5.0%RC: 0.8804454292264281\n", - "[INFO GPL-0070] 0.5rcK: 1.0\n", - "[INFO GPL-0071] 1.0rcK: 1.0\n", - "[INFO GPL-0072] 2.0rcK: 0.0\n", - "[INFO GPL-0073] 5.0rcK: 0.0\n", - "[INFO GPL-0074] FinalRC: 0.9936508\n", - "[NesterovSolve] Iter: 30 overflow: 0.12677 HPWL: 98317860\n", - "[NesterovSolve] Finished with Overflow: 0.099360\n", - "\n", - "==========================================================================\n", - "global place check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16231.75\n", - "\n", - "==========================================================================\n", - "global place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.13\n", - "\n", - "==========================================================================\n", - "global place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.13\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[2] (in)\n", - " we_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ dmem10/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.61e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "global place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 596690 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:01.64[h:]min:sec. CPU time: user 1.42 sys 0.11 (93%). Peak memory: 153064KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_4_place_resized.tmp.log ./logs/gf180/fakeram4/80MHz/3_4_place_resized.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/resize.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_4_place_resized.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_4_place_resized.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "\n", - "==========================================================================\n", - "resizer pre check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "resizer pre report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16231.75\n", - "\n", - "==========================================================================\n", - "resizer pre report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.13\n", - "\n", - "==========================================================================\n", - "resizer pre report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.13\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[2] (in)\n", - " we_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ dmem10/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.61e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer pre report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 596690 u^2 54% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "1392\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "141\n", - "\n", - "Perform port buffering...\n", - "[INFO RSZ-0027] Inserted 24 input buffers.\n", - "[INFO RSZ-0028] Inserted 32 output buffers.\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "[INFO RSZ-0039] Resized 20 instances.\n", - "Repair tie lo fanout...\n", - "[INFO RSZ-0042] Inserted 52 tie gf180mcu_fd_sc_mcu9t5v0__tiel instances.\n", - "Repair tie hi fanout...\n", - "\n", - "==========================================================================\n", - "report_floating_nets\n", - "--------------------------------------------------------------------------\n", - "[WARNING RSZ-0095] found 4 floating pins.\n", - "\n", - "==========================================================================\n", - "resizer check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "resizer report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16272.87\n", - "\n", - "==========================================================================\n", - "resizer report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.98\n", - "\n", - "==========================================================================\n", - "resizer report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.98\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.61 2.61 library hold time\n", - " 2.61 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.61 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 205.09 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2634098529815674\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8084\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.3360211253166199\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.3765000104904175\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8925\n", - "\n", - "==========================================================================\n", - "resizer max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "resizer setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "resizer hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "resizer critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9811\n", - "\n", - "==========================================================================\n", - "resizer critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9811\n", - "\n", - "==========================================================================\n", - "resizer slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.472029\n", - "\n", - "==========================================================================\n", - "resizer report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 1.49e-08 1.49e-08 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.76e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599377 u^2 54% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "1499\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "304\n", - "\n", - "Elapsed time: 0:01.17[h:]min:sec. CPU time: user 0.96 sys 0.08 (89%). Peak memory: 126648KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_5_place_dp.tmp.log ./logs/gf180/fakeram4/80MHz/3_5_place_dp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_5_place_dp.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_5_place_dp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 642.9 u\n", - "average displacement 0.4 u\n", - "max displacement 15.4 u\n", - "original HPWL 48577.6 u\n", - "legalized HPWL 48811.0 u\n", - "delta HPWL 0 %\n", - "\n", - "Detailed placement improvement.\n", - "Importing netlist into detailed improver.\n", - "[INFO DPO-0100] Creating network with 1499 cells, 57 terminals, 165 edges and 357 pins.\n", - "[INFO DPO-0109] Network stats: inst 1556, edges 165, pins 357\n", - "[INFO DPO-0110] Number of regions is 1\n", - "[INFO DPO-0401] Setting random seed to 1.\n", - "[INFO DPO-0402] Setting maximum displacement 5 1 to 50400 10080 units.\n", - "[INFO DPO-0320] Collected 1726 fixed cells (excluded terminal_NI).\n", - "[INFO DPO-0318] Collected 108 single height cells.\n", - "[INFO DPO-0321] Collected 0 wide cells.\n", - "[INFO DPO-0322] Image (40320, 40320) - (2359840, 1955520)\n", - "[INFO DPO-0310] Assigned 108 cells into segments. Movement in X-direction is 29120.000000, movement in Y-direction is 0.000000.\n", - "[WARNING DPO-0200] Unexpected displacement during legalization.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "[INFO DPO-0303] Running algorithm for independent set matching.\n", - "[INFO DPO-0300] Set matching objective is wirelength.\n", - "[INFO DPO-0301] Pass 1 of matching; objective is 9.805612e+07.\n", - "[INFO DPO-0302] End of matching; objective is 9.805612e+07, improvement is 0.00 percent.\n", - "[INFO DPO-0303] Running algorithm for global swaps.\n", - "[INFO DPO-0306] Pass 1 of global swaps; hpwl is 9.663018e+07.\n", - "[INFO DPO-0306] Pass 2 of global swaps; hpwl is 9.663018e+07.\n", - "[INFO DPO-0307] End of global swaps; objective is 9.663018e+07, improvement is 1.45 percent.\n", - "[INFO DPO-0303] Running algorithm for vertical swaps.\n", - "[INFO DPO-0308] Pass 1 of vertical swaps; hpwl is 9.662422e+07.\n", - "[INFO DPO-0309] End of vertical swaps; objective is 9.662422e+07, improvement is 0.01 percent.\n", - "[INFO DPO-0303] Running algorithm for reordering.\n", - "[INFO DPO-0304] Pass 1 of reordering; objective is 9.662422e+07.\n", - "[INFO DPO-0305] End of reordering; objective is 9.662422e+07, improvement is 0.00 percent.\n", - "[INFO DPO-0303] Running algorithm for random improvement.\n", - "[INFO DPO-0324] Random improver is using displacement generator.\n", - "[INFO DPO-0325] Random improver is using hpwl objective.\n", - "[INFO DPO-0326] Random improver cost string is (a).\n", - "[INFO DPO-0332] End of pass, Generator displacement called 2160 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 2160, swaps 14, moves 871 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 9.662422e+07, Scratch cost 9.662086e+07, Incremental cost 9.662086e+07, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 9.662086e+07.\n", - "[INFO DPO-0327] Pass 1 of random improver; improvement in cost is 0.00 percent.\n", - "[INFO DPO-0328] End of random improver; improvement is 0.003477 percent.\n", - "[INFO DPO-0380] Cell flipping.\n", - "[INFO DPO-0382] Changed 47 cell orientations for row compatibility.\n", - "[INFO DPO-0383] Performed 53 cell flips.\n", - "[INFO DPO-0384] End of flipping; objective is 9.636752e+07, improvement is 0.26 percent.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "Detailed Improvement Results\n", - "------------------------------------------\n", - "Original HPWL 48811.0 u\n", - "Final HPWL 48200.1 u\n", - "Delta HPWL -1.3 %\n", - "\n", - "[INFO FLW-0012] Placement violations .\n", - "\n", - "==========================================================================\n", - "detailed place check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "detailed place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16272.82\n", - "\n", - "==========================================================================\n", - "detailed place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.98\n", - "\n", - "==========================================================================\n", - "detailed place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.98\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.61 2.61 library hold time\n", - " 2.61 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.61 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 205.09 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.264432430267334\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8087\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "detailed place hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9801\n", - "\n", - "==========================================================================\n", - "detailed place critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9801\n", - "\n", - "==========================================================================\n", - "detailed place slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.532344\n", - "\n", - "==========================================================================\n", - "detailed place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 99.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.14e-02 1.61e-04 2.76e-07 3.15e-02 100.0%\n", - " 99.5% 0.5% 0.0%\n", - "\n", - "==========================================================================\n", - "detailed place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599377 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:01.10[h:]min:sec. CPU time: user 0.87 sys 0.09 (88%). Peak memory: 126520KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/3_5_place_dp.odb ./results/gf180/fakeram4/80MHz/3_place.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_floorplan.sdc ./results/gf180/fakeram4/80MHz/3_place.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/4_1_cts.tmp.log ./logs/gf180/fakeram4/80MHz/4_1_cts.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/cts.tcl -metrics ./logs/gf180/fakeram4/80MHz/4_1_cts.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/4_1_cts.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO CTS-0049] Characterization buffer is: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.\n", - "[INFO CTS-0039] Number of created patterns = 12240.\n", - "[INFO CTS-0084] Compiling LUT.\n", - "Min. len Max. len Min. cap Max. cap Min. slew Max. slew\n", - "2 8 1 34 1 12 \n", - "[WARNING CTS-0043] 1632 wires are pure wire and no slew degradation.\n", - "TritonCTS forced slew degradation on these wires.\n", - "[INFO CTS-0046] Number of wire segments: 12240.\n", - "[INFO CTS-0047] Number of keys in characterization LUT: 1552.\n", - "[INFO CTS-0048] Actual min input cap: 1.\n", - "[INFO CTS-0007] Net \"clk\" found for clock \"clk\".\n", - "[INFO CTS-0010] Clock net \"clk\" has 4 sinks.\n", - "[INFO CTS-0008] TritonCTS found 1 clock nets.\n", - "[INFO CTS-0097] Characterization used 1 buffer(s) types.\n", - "[INFO CTS-0200] 4 placement blockages have been identified.\n", - "[INFO CTS-0027] Generating H-Tree topology for net clk.\n", - "[INFO CTS-0028] Total number of sinks: 4.\n", - "[INFO CTS-0029] Sinks will be clustered in groups of up to 30 and with maximum cluster diameter of 100.0 um.\n", - "[INFO CTS-0030] Number of static layers: 0.\n", - "[INFO CTS-0020] Wire segment unit: 50400 dbu (25 um).\n", - "[INFO CTS-0021] Distance between buffers: 1 units (100 um).\n", - "[INFO CTS-0023] Original sink region: [(580480, 301000), (1500480, 1021000)].\n", - "[INFO CTS-0024] Normalized sink region: [(11.5175, 5.97222), (29.7714, 20.2579)].\n", - "[INFO CTS-0025] Width: 18.2540.\n", - "[INFO CTS-0026] Height: 14.2857.\n", - " Level 1\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 2\n", - " Sub-region size: 9.1270 X 14.2857\n", - "[INFO CTS-0034] Segment length (rounded): 4.\n", - " Key: 24 inSlew: 1 inCap: 1 outSlew: 1 load: 1 length: 4 delay: 5\n", - " location: 0.5 buffer: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8\n", - "[INFO CTS-0032] Stop criterion found. Max number of sinks is 15.\n", - "[INFO CTS-0035] Number of sinks covered: 4.\n", - "[INFO CTS-0018] Created 3 clock buffers.\n", - "[INFO CTS-0012] Minimum number of buffers in the clock path: 2.\n", - "[INFO CTS-0013] Maximum number of buffers in the clock path: 2.\n", - "[INFO CTS-0015] Created 3 clock nets.\n", - "[INFO CTS-0016] Fanout distribution for the current clock = 2:2..\n", - "[INFO CTS-0017] Max level of the clock tree: 1.\n", - "[INFO CTS-0098] Clock net \"clk\"\n", - "[INFO CTS-0099] Sinks 4\n", - "[INFO CTS-0100] Leaf buffers 0\n", - "[INFO CTS-0101] Average sink wire length 1369.38 um\n", - "[INFO CTS-0102] Path depth 2 - 2\n", - "\n", - "==========================================================================\n", - "cts pre-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16270.06\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.62\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.62\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2605576515197754\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8073\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts pre-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6173\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6173\n", - "\n", - "==========================================================================\n", - "cts pre-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1147.412890\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.77e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599597 u^2 54% utilization.\n", - "\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "\n", - "==========================================================================\n", - "cts post-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts post-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16270.06\n", - "\n", - "==========================================================================\n", - "cts post-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.62\n", - "\n", - "==========================================================================\n", - "cts post-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.62\n", - "\n", - "==========================================================================\n", - "cts post-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2605576515197754\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8073\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts post-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6173\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6173\n", - "\n", - "==========================================================================\n", - "cts post-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1147.412890\n", - "\n", - "==========================================================================\n", - "cts post-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.77e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts post-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599597 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 210.5 u\n", - "average displacement 0.1 u\n", - "max displacement 123.7 u\n", - "original HPWL 48970.1 u\n", - "legalized HPWL 49114.9 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "TNS end percent 5\n", - "[INFO RSZ-0094] Found 80 endpoints with setup violations.\n", - "[INFO RSZ-0041] Resized 46 instances.\n", - "[WARNING RSZ-0062] Unable to repair all setup violations.\n", - "[INFO RSZ-0033] No hold violations found.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "cts final check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.64\n", - "\n", - "==========================================================================\n", - "cts final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.99\n", - "\n", - "==========================================================================\n", - "cts final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.99\n", - "\n", - "==========================================================================\n", - "cts final report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.25 17.79 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.79 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.05 0.20 17.99 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.05 0.00 17.99 v inter_dmem0[0] (out)\n", - " 17.99 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.99 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.99 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.25 17.79 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.79 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.05 0.20 17.99 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.05 0.00 17.99 v inter_dmem0[0] (out)\n", - " 17.99 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.99 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.99 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2473864555358887\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8026\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts final max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts final setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts final hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts final critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9879\n", - "\n", - "==========================================================================\n", - "cts final critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9879\n", - "\n", - "==========================================================================\n", - "cts final slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.062064\n", - "\n", - "==========================================================================\n", - "cts final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.29e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:03.81[h:]min:sec. CPU time: user 3.53 sys 0.12 (95%). Peak memory: 148024KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/4_1_cts.odb ./results/gf180/fakeram4/80MHz/4_cts.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_1_grt.tmp.log ./logs/gf180/fakeram4/80MHz/5_1_grt.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_route.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_1_grt.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_1_grt.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GRT-0020] Min routing layer: Metal1\n", - "[INFO GRT-0021] Max routing layer: Metal3\n", - "[INFO GRT-0022] Global adjustment: 0%\n", - "[INFO GRT-0023] Grid origin: (0, 0)\n", - "[INFO GRT-0043] No OR_DEFAULT vias defined.\n", - "[INFO GRT-0088] Layer Metal1 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5450\n", - "[INFO GRT-0088] Layer Metal2 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5800\n", - "[INFO GRT-0088] Layer Metal3 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5800\n", - "[INFO GRT-0019] Found 4 clock nets.\n", - "[WARNING GRT-0036] Pin clk is outside die area.\n", - "[INFO GRT-0001] Minimum degree: 2\n", - "[INFO GRT-0002] Maximum degree: 5\n", - "[INFO GRT-0003] Macros: 4\n", - "[INFO GRT-0004] Blockages: 2706\n", - "\n", - "[INFO GRT-0053] Routing resources analysis:\n", - " Routing Original Derated Resource\n", - "Layer Direction Resources Resources Reduction (%)\n", - "---------------------------------------------------------------\n", - "Metal1 Horizontal 253815 39311 84.51%\n", - "Metal2 Vertical 237797 56503 76.24%\n", - "Metal3 Horizontal 237036 57965 75.55%\n", - "---------------------------------------------------------------\n", - "\n", - "[INFO GRT-0101] Running extra iterations to remove overflow.\n", - "[INFO GRT-0197] Via related to pin nodes: 194\n", - "[INFO GRT-0198] Via related Steiner nodes: 8\n", - "[INFO GRT-0199] Via filling finished.\n", - "[INFO GRT-0111] Final number of vias: 435\n", - "[INFO GRT-0112] Final usage 3D: 8051\n", - "\n", - "[INFO GRT-0096] Final congestion report:\n", - "Layer Resource Demand Usage (%) Max H / Max V / Total Overflow\n", - "---------------------------------------------------------------------------------------\n", - "Metal1 39311 1705 4.34% 0 / 0 / 0\n", - "Metal2 56503 2921 5.17% 0 / 0 / 0\n", - "Metal3 57965 2120 3.66% 0 / 0 / 0\n", - "---------------------------------------------------------------------------------------\n", - "Total 153779 6746 4.39% 0 / 0 / 0\n", - "\n", - "[INFO GRT-0018] Total wirelength: 62554 um\n", - "[INFO GRT-0014] Routed nets: 168\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "\n", - "==========================================================================\n", - "global route pre repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.73\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route pre repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route pre repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.65e-04 1.29e-08 2.68e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[INFO RSZ-0039] Resized 3 instances.\n", - "\n", - "==========================================================================\n", - "global route post repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route post repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route post repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route post repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route post repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route post repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "[INFO RSZ-0094] Found 80 endpoints with setup violations.\n", - "[WARNING RSZ-0062] Unable to repair all setup violations.\n", - "[INFO RSZ-0033] No hold violations found.\n", - "\n", - "==========================================================================\n", - "global route post repair timing check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route post repair timing hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route post repair timing slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "check_antennas\n", - "--------------------------------------------------------------------------\n", - "[INFO GRT-0012] Found 0 antenna violations.\n", - "[WARNING ANT-0011] -report_violating_nets is deprecated.\n", - "[INFO ANT-0002] Found 0 net violations.\n", - "[INFO ANT-0001] Found 0 pin violations.\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "\n", - "==========================================================================\n", - "global route check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "[INFO FLW-0007] clock clk period 12.500000\n", - "[INFO FLW-0008] Clock clk period 214.261\n", - "[INFO FLW-0009] Clock clk slack -213.037\n", - "[INFO FLW-0011] Path endpoint count 80\n", - "Elapsed time: 0:01.48[h:]min:sec. CPU time: user 1.22 sys 0.12 (90%). Peak memory: 181488KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_2_fillcell.tmp.log ./logs/gf180/fakeram4/80MHz/5_2_fillcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/fillcell.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_2_fillcell.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_2_fillcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO DPL-0001] Placed 4837 filler instances.\n", - "Elapsed time: 0:01.06[h:]min:sec. CPU time: user 0.85 sys 0.07 (86%). Peak memory: 126280KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_3_route.tmp.log ./logs/gf180/fakeram4/80MHz/5_3_route.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_route.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_3_route.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_3_route.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "detailed_route -output_drc ./reports/gf180/fakeram4/80MHz/5_route_drc.rpt -output_maze ./results/gf180/fakeram4/80MHz/maze.log -bottom_routing_layer Metal1 -top_routing_layer Metal3 -via_in_pin_bottom_layer Metal1 -via_in_pin_top_layer Metal1 -disable_via_gen -save_guide_updates -verbose 1 -drc_report_iter_step 5\n", - "[INFO DRT-0149] Reading tech and libs.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "\n", - "Units: 2000\n", - "Number of layers: 9\n", - "Number of macros: 230\n", - "Number of vias: 46\n", - "Number of viarulegen: 14\n", - "\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[INFO DRT-0150] Reading design.\n", - "\n", - "Design: dmem\n", - "Die area: ( 0 0 ) ( 2400000 2000000 )\n", - "Number of track patterns: 8\n", - "Number of DEF vias: 0\n", - "Number of components: 6339\n", - "Number of terminals: 57\n", - "Number of snets: 2\n", - "Number of nets: 168\n", - "\n", - "[WARNING DRT-0421] Term ce_mem[0] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[3]\n", - "[WARNING DRT-0421] Term dataadr[0] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[1]\n", - "[WARNING DRT-0421] Term dataadr[2] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[4]\n", - "[WARNING DRT-0421] Term dataadr[5] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[7]\n", - "[WARNING DRT-0421] Term we_mem[0] has no pins on routing grid\n", - "[WARNING DRT-0421] Term we_mem[1] has no pins on routing grid\n", - "[WARNING DRT-0421] Term we_mem[3] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[5]\n", - "[WARNING DRT-0421] Term writedata[6] has no pins on routing grid\n", - "[WARNING DRT-0421] Term writedata[7] has no pins on routing grid\n", - "[INFO DRT-0167] List of default vias:\n", - " Layer Via1\n", - " default via: Via1_HV\n", - " Layer Via2\n", - " default via: Via2_VH\n", - " Layer Via3\n", - " default via: Via3_1_HV\n", - "[INFO DRT-0162] Library cell analysis.\n", - "[INFO DRT-0163] Instance analysis.\n", - "[INFO DRT-0164] Number of unique instances = 35.\n", - "[INFO DRT-0168] Init region query.\n", - "[INFO DRT-0024] Complete Poly2.\n", - "[INFO DRT-0024] Complete CON.\n", - "[INFO DRT-0024] Complete Metal1.\n", - "[INFO DRT-0024] Complete Via1.\n", - "[INFO DRT-0024] Complete Metal2.\n", - "[INFO DRT-0024] Complete Via2.\n", - "[INFO DRT-0024] Complete Metal3.\n", - "[INFO DRT-0024] Complete Via3.\n", - "[INFO DRT-0024] Complete Metal4.\n", - "[INFO DRT-0033] Poly2 shape region query size = 0.\n", - "[INFO DRT-0033] CON shape region query size = 0.\n", - "[INFO DRT-0033] Metal1 shape region query size = 21867.\n", - "[INFO DRT-0033] Via1 shape region query size = 17868.\n", - "[INFO DRT-0033] Metal2 shape region query size = 165010.\n", - "[INFO DRT-0033] Via2 shape region query size = 155794.\n", - "[INFO DRT-0033] Metal3 shape region query size = 315397.\n", - "[INFO DRT-0033] Via3 shape region query size = 155790.\n", - "[INFO DRT-0033] Metal4 shape region query size = 155842.\n", - "[INFO DRT-0165] Start pin access.\n", - "[INFO DRT-0076] Complete 100 pins.\n", - "[INFO DRT-0078] Complete 156 pins.\n", - "[INFO DRT-0081] Complete 11 unique inst patterns.\n", - "[INFO DRT-0084] Complete 111 groups.\n", - "#scanned instances = 6339\n", - "#unique instances = 35\n", - "#stdCellGenAp = 337\n", - "#stdCellValidPlanarAp = 0\n", - "#stdCellValidViaAp = 97\n", - "#stdCellPinNoAp = 0\n", - "#stdCellPinCnt = 118\n", - "#instTermValidViaApCnt = 0\n", - "#macroGenAp = 674\n", - "#macroValidPlanarAp = 544\n", - "#macroValidViaAp = 0\n", - "#macroNoAp = 0\n", - "[INFO DRT-0166] Complete pin access.\n", - "[INFO DRT-0267] cpu time = 00:00:08, elapsed time = 00:00:00, memory = 197.11 (MB), peak = 198.02 (MB)\n", - "\n", - "Number of guides: 993\n", - "\n", - "[INFO DRT-0169] Post process guides.\n", - "[INFO DRT-0176] GCELLGRID X 0 DO 142 STEP 16800 ;\n", - "[INFO DRT-0177] GCELLGRID Y 0 DO 119 STEP 16800 ;\n", - "[INFO DRT-0028] Complete Poly2.\n", - "[INFO DRT-0028] Complete CON.\n", - "[INFO DRT-0028] Complete Metal1.\n", - "[INFO DRT-0028] Complete Via1.\n", - "[INFO DRT-0028] Complete Metal2.\n", - "[INFO DRT-0028] Complete Via2.\n", - "[INFO DRT-0028] Complete Metal3.\n", - "[INFO DRT-0028] Complete Via3.\n", - "[INFO DRT-0028] Complete Metal4.\n", - "[INFO DRT-1000] Pin clk not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[5] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[5] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[7] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem1[4] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem1[7] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[0] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[4] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem3[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[1] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-0178] Init guide query.\n", - "[INFO DRT-0035] Complete Poly2 (guide).\n", - "[INFO DRT-0035] Complete CON (guide).\n", - "[INFO DRT-0035] Complete Metal1 (guide).\n", - "[INFO DRT-0035] Complete Via1 (guide).\n", - "[INFO DRT-0035] Complete Metal2 (guide).\n", - "[INFO DRT-0035] Complete Via2 (guide).\n", - "[INFO DRT-0035] Complete Metal3 (guide).\n", - "[INFO DRT-0035] Complete Via3 (guide).\n", - "[INFO DRT-0035] Complete Metal4 (guide).\n", - "[INFO DRT-0036] Poly2 guide region query size = 0.\n", - "[INFO DRT-0036] CON guide region query size = 0.\n", - "[INFO DRT-0036] Metal1 guide region query size = 240.\n", - "[INFO DRT-0036] Via1 guide region query size = 0.\n", - "[INFO DRT-0036] Metal2 guide region query size = 296.\n", - "[INFO DRT-0036] Via2 guide region query size = 0.\n", - "[INFO DRT-0036] Metal3 guide region query size = 102.\n", - "[INFO DRT-0036] Via3 guide region query size = 0.\n", - "[INFO DRT-0036] Metal4 guide region query size = 0.\n", - "[INFO DRT-0179] Init gr pin query.\n", - "[INFO DRT-0185] Post process initialize RPin region query.\n", - "[INFO DRT-0181] Start track assignment.\n", - "[INFO DRT-0184] Done with 296 vertical wires in 3 frboxes and 342 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0186] Done with 19 vertical wires in 3 frboxes and 111 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0182] Complete track assignment.\n", - "[INFO DRT-0267] cpu time = 00:00:04, elapsed time = 00:00:01, memory = 310.72 (MB), peak = 350.06 (MB)\n", - "[INFO DRT-0187] Start routing data preparation.\n", - "[INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 310.72 (MB), peak = 350.06 (MB)\n", - "[INFO DRT-0194] Start detail routing.\n", - "[INFO DRT-0195] Start 0th optimization iteration.\n", - " Completing 10% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 320.28 (MB).\n", - " Completing 20% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 451.27 (MB).\n", - " Completing 30% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 463.64 (MB).\n", - " Completing 40% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 463.64 (MB).\n", - " Completing 50% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 568.40 (MB).\n", - " Completing 60% with 111 violations.\n", - " elapsed time = 00:00:00, memory = 569.17 (MB).\n", - " Completing 70% with 111 violations.\n", - " elapsed time = 00:00:00, memory = 602.29 (MB).\n", - " Completing 80% with 170 violations.\n", - " elapsed time = 00:00:00, memory = 607.16 (MB).\n", - " Completing 90% with 170 violations.\n", - " elapsed time = 00:00:00, memory = 607.16 (MB).\n", - " Completing 100% with 175 violations.\n", - " elapsed time = 00:00:01, memory = 623.14 (MB).\n", - "[INFO DRT-0199] Number of violations = 269.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3 Metal4\n", - "Cut Spacing 0 3 0 10 0 0\n", - "Metal Spacing 6 0 15 0 21 0\n", - "Min Width 0 0 0 0 0 1\n", - "Recheck 31 0 55 0 7 1\n", - "Short 50 2 18 5 44 0\n", - "[INFO DRT-0267] cpu time = 00:00:27, elapsed time = 00:00:01, memory = 860.88 (MB), peak = 860.88 (MB)\n", - "Total wire length = 57041 um.\n", - "Total wire length on LAYER Metal1 = 13620 um.\n", - "Total wire length on LAYER Metal2 = 25394 um.\n", - "Total wire length on LAYER Metal3 = 18026 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 571.\n", - "Up-via summary (total 571):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 403\n", - " Metal2 168\n", - " Metal3 0\n", - "--------------\n", - " 571\n", - "\n", - "\n", - "[INFO DRT-0195] Start 1st optimization iteration.\n", - " Completing 10% with 269 violations.\n", - " elapsed time = 00:00:00, memory = 861.09 (MB).\n", - " Completing 20% with 269 violations.\n", - " elapsed time = 00:00:00, memory = 905.39 (MB).\n", - " Completing 30% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 917.87 (MB).\n", - " Completing 40% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 917.87 (MB).\n", - " Completing 50% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 930.86 (MB).\n", - " Completing 60% with 154 violations.\n", - " elapsed time = 00:00:00, memory = 933.47 (MB).\n", - " Completing 70% with 154 violations.\n", - " elapsed time = 00:00:00, memory = 955.88 (MB).\n", - " Completing 80% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 961.70 (MB).\n", - " Completing 90% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 961.70 (MB).\n", - " Completing 100% with 110 violations.\n", - " elapsed time = 00:00:01, memory = 963.99 (MB).\n", - "[INFO DRT-0199] Number of violations = 110.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 0 2 0 10 0\n", - "Metal Spacing 0 0 14 0 2\n", - "Short 44 1 9 5 23\n", - "[INFO DRT-0267] cpu time = 00:00:25, elapsed time = 00:00:01, memory = 963.99 (MB), peak = 963.99 (MB)\n", - "Total wire length = 57066 um.\n", - "Total wire length on LAYER Metal1 = 13664 um.\n", - "Total wire length on LAYER Metal2 = 25413 um.\n", - "Total wire length on LAYER Metal3 = 17988 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 599.\n", - "Up-via summary (total 599):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 411\n", - " Metal2 188\n", - " Metal3 0\n", - "--------------\n", - " 599\n", - "\n", - "\n", - "[INFO DRT-0195] Start 2nd optimization iteration.\n", - " Completing 10% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 964.17 (MB).\n", - " Completing 20% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 964.42 (MB).\n", - " Completing 30% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 975.21 (MB).\n", - " Completing 40% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 975.21 (MB).\n", - " Completing 50% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 979.27 (MB).\n", - " Completing 60% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 979.27 (MB).\n", - " Completing 70% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 979.27 (MB).\n", - " Completing 80% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 988.48 (MB).\n", - " Completing 90% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 988.48 (MB).\n", - " Completing 100% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 994.05 (MB).\n", - "[INFO DRT-0199] Number of violations = 92.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 0 2 0 6 0\n", - "Metal Spacing 2 0 14 0 5\n", - "Short 40 1 8 0 14\n", - "[INFO DRT-0267] cpu time = 00:00:19, elapsed time = 00:00:01, memory = 994.05 (MB), peak = 994.05 (MB)\n", - "Total wire length = 57096 um.\n", - "Total wire length on LAYER Metal1 = 13676 um.\n", - "Total wire length on LAYER Metal2 = 25446 um.\n", - "Total wire length on LAYER Metal3 = 17974 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 619.\n", - "Up-via summary (total 619):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 430\n", - " Metal2 189\n", - " Metal3 0\n", - "--------------\n", - " 619\n", - "\n", - "\n", - "[INFO DRT-0195] Start 3rd optimization iteration.\n", - " Completing 10% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 994.05 (MB).\n", - " Completing 20% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 994.05 (MB).\n", - " Completing 30% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 1004.41 (MB).\n", - " Completing 40% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 1004.41 (MB).\n", - " Completing 50% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 1004.41 (MB).\n", - " Completing 60% with 55 violations.\n", - " elapsed time = 00:00:00, memory = 1006.71 (MB).\n", - " Completing 70% with 55 violations.\n", - " elapsed time = 00:00:00, memory = 1006.71 (MB).\n", - " Completing 80% with 29 violations.\n", - " elapsed time = 00:00:00, memory = 964.53 (MB).\n", - " Completing 90% with 29 violations.\n", - " elapsed time = 00:00:00, memory = 964.53 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 964.78 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:18, elapsed time = 00:00:01, memory = 1013.80 (MB), peak = 1013.80 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13016 um.\n", - "Total wire length on LAYER Metal2 = 25505 um.\n", - "Total wire length on LAYER Metal3 = 18599 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 4th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1013.80 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1013.80 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1015.03 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 966.00 (MB), peak = 1015.28 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25505 um.\n", - "Total wire length on LAYER Metal3 = 18597 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 5th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 966.00 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 971.96 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 971.96 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 973.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1022.28 (MB), peak = 1022.28 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18599 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 6th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1022.28 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1022.28 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1026.04 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1026.04 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1026.04 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1026.49 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1026.49 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.38 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.38 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1034.33 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 985.14 (MB), peak = 1034.40 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18600 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 7th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.14 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.14 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.41 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.41 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.41 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.59 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 985.59 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 987.31 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 988.96 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 990.40 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1039.49 (MB), peak = 1039.49 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13020 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18597 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 8th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.73 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.95 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.95 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.98 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.98 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.22 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.22 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.29 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.29 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1041.77 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 1041.80 (MB), peak = 1041.80 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13051 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18567 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 9th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1041.80 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1041.80 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.01 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.01 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.34 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.47 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.47 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.72 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.72 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.75 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1045.23 (MB), peak = 1045.23 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 10th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1045.52 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1045.80 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1047.41 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1047.43 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1047.52 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1047.56 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1047.56 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1049.76 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1049.76 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1049.76 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1002.44 (MB), peak = 1049.80 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 11th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.53 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.53 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.56 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.56 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.56 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.74 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1002.74 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1006.69 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1006.82 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1006.82 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1051.26 (MB), peak = 1051.26 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25501 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 12th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.38 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.61 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.75 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.75 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.75 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.77 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1051.82 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1056.28 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1056.28 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1058.19 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:01, memory = 1008.98 (MB), peak = 1058.19 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 13th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1008.98 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1008.98 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1009.65 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1009.65 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1009.65 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.36 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.36 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1012.75 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1012.75 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1012.98 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1062.19 (MB), peak = 1062.19 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 14th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1062.19 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1062.19 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1062.54 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1062.54 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1062.54 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.02 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.02 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1069.63 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1069.63 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1071.21 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1071.28 (MB), peak = 1071.28 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25501 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 15th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.28 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.28 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.28 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.45 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.45 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.48 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.48 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.62 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.62 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.01 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1075.61 (MB), peak = 1075.61 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 16th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1075.61 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1075.61 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1075.64 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1075.64 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1076.21 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1076.21 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1076.21 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1076.21 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1076.21 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1078.28 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1037.45 (MB), peak = 1078.36 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 17th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1037.65 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1037.65 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1040.45 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1040.45 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1040.45 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1042.52 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1042.52 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1042.52 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1042.52 (MB).\n", - " Completing 100% with 28 violations.\n", - " elapsed time = 00:00:01, memory = 1043.37 (MB).\n", - "[INFO DRT-0199] Number of violations = 28.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 2 0\n", - "Metal Spacing 0 0 17\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1083.41 (MB), peak = 1083.41 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25496 um.\n", - "Total wire length on LAYER Metal3 = 18473 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 18th optimization iteration.\n", - " Completing 10% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1083.41 (MB).\n", - " Completing 20% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1083.42 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.46 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.46 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.46 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.46 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.46 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.99 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.99 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.99 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 16\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1083.99 (MB), peak = 1083.99 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18476 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 19th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.99 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1083.99 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1085.36 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1085.36 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1085.36 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1085.73 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1085.73 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.19 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.19 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.19 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 16\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1087.86 (MB), peak = 1087.86 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 20th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.98 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.53 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.61 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.61 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.61 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.84 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.84 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1093.33 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1093.33 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1094.16 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1044.28 (MB), peak = 1094.24 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 21st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1044.28 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1044.28 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1045.96 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1045.96 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1045.96 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1045.96 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1045.96 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1049.83 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1049.83 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1050.46 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1099.64 (MB), peak = 1099.64 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13145 um.\n", - "Total wire length on LAYER Metal2 = 25494 um.\n", - "Total wire length on LAYER Metal3 = 18478 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 774.\n", - "Up-via summary (total 774):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 774\n", - "\n", - "\n", - "[INFO DRT-0195] Start 22nd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.68 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.73 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.73 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.73 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.85 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.85 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.85 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.18 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.18 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1101.00 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1101.10 (MB), peak = 1101.10 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18479 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 23rd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.10 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.10 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.28 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.28 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.28 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.39 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.39 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.39 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.39 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.41 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1101.41 (MB), peak = 1101.41 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13149 um.\n", - "Total wire length on LAYER Metal2 = 25494 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 24th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.41 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.41 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.41 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1101.41 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1104.28 (MB), peak = 1104.28 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 25th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.28 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.42 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.44 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.44 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.44 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.44 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.44 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.55 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.55 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1104.59 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1108.20 (MB), peak = 1108.20 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25485 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 26th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.20 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.20 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.86 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.93 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.93 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.93 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1108.93 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1111.71 (MB), peak = 1111.71 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 27th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1111.71 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1112.63 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1112.63 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1112.63 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1112.63 (MB), peak = 1112.63 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25484 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 28th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1112.63 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1112.63 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1113.02 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1113.02 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1113.02 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1113.02 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1113.02 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1117.57 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1117.57 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1118.79 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1118.79 (MB), peak = 1118.79 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25485 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 29th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.79 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1124.29 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1124.29 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1126.63 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1126.63 (MB), peak = 1126.63 (MB)\n", - "Total wire length = 57115 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18515 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 30th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1126.63 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1126.63 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1126.94 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1127.19 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1127.19 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1128.23 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1128.23 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1128.23 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1128.23 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1129.64 (MB), peak = 1129.64 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13114 um.\n", - "Total wire length on LAYER Metal2 = 25488 um.\n", - "Total wire length on LAYER Metal3 = 18515 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 31st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1129.89 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.04 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.46 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1130.54 (MB), peak = 1130.54 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13112 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 32nd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1130.54 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1131.70 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1131.70 (MB), peak = 1131.70 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13112 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 33rd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 30% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 40% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 50% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 60% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 70% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.86 (MB).\n", - " Completing 80% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.88 (MB).\n", - " Completing 90% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.93 (MB).\n", - " Completing 100% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1131.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 28.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 19\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1132.09 (MB), peak = 1132.09 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13109 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 34th optimization iteration.\n", - " Completing 10% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 20% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 30% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 40% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 50% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 60% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 70% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1132.09 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1132.96 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1132.96 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1132.96 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1132.96 (MB), peak = 1132.96 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 35th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.05 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.06 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.18 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.18 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.18 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1133.18 (MB), peak = 1133.18 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 36th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.18 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.18 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.29 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.29 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.29 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.29 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1133.29 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.80 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.80 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.82 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1134.82 (MB), peak = 1134.82 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25488 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 37th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.82 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.82 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1137.64 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1137.64 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1137.64 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1140.02 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1140.02 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1140.02 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1140.02 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:01, memory = 1142.25 (MB), peak = 1142.25 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13106 um.\n", - "Total wire length on LAYER Metal2 = 25495 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 38th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.25 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.25 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.28 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.28 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.29 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.55 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.55 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.60 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.60 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.60 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1142.60 (MB), peak = 1142.60 (MB)\n", - "Total wire length = 57127 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18525 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 39th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.60 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.60 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1142.63 (MB), peak = 1142.63 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 40th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.63 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1142.70 (MB), peak = 1142.70 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 41st optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 1142.70 (MB), peak = 1142.70 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 42nd optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.70 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.86 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.86 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1142.86 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1142.86 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1142.86 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1142.86 (MB), peak = 1142.86 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 43rd optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.86 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1142.86 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1143.04 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1143.04 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1143.04 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1143.04 (MB), peak = 1143.04 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 44th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1143.04 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1143.34 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1143.34 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1145.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1145.30 (MB), peak = 1145.30 (MB)\n", - "Total wire length = 57123 um.\n", - "Total wire length on LAYER Metal1 = 13097 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 45th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.30 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.30 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.43 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.43 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.43 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1145.78 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1145.78 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1145.78 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1145.78 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:02, memory = 1145.88 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:02, memory = 1145.88 (MB), peak = 1145.88 (MB)\n", - "Total wire length = 57125 um.\n", - "Total wire length on LAYER Metal1 = 13093 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18540 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 46th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.88 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.88 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.91 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.91 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.91 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.94 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1145.94 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1146.25 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1146.25 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1146.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:02, memory = 1146.25 (MB), peak = 1146.25 (MB)\n", - "Total wire length = 57123 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 47th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1146.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:01, memory = 1146.25 (MB), peak = 1146.25 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 48th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.25 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.37 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1146.37 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1146.37 (MB), peak = 1146.37 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 49th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.52 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.52 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.52 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.52 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.57 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.57 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1146.76 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1146.76 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1146.76 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1146.76 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1146.93 (MB), peak = 1146.93 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18534 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 50th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1147.00 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1147.00 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1147.00 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1147.00 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1147.00 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1147.00 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1147.00 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1147.15 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1147.15 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1147.15 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 4 0\n", - "Metal Spacing 0 16\n", - "Short 0 6\n", - "[INFO DRT-0267] cpu time = 00:00:20, elapsed time = 00:00:04, memory = 1147.15 (MB), peak = 1147.15 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 51st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1147.15 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1147.15 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1147.15 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1147.15 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1147.15 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:19, elapsed time = 00:00:03, memory = 1147.15 (MB), peak = 1147.15 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18534 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 52nd optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1147.15 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1147.15 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1147.15 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:04, memory = 1149.70 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:04, memory = 1149.70 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:04, memory = 1149.70 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 3 0\n", - "Metal Spacing 0 15\n", - "Short 0 6\n", - "[INFO DRT-0267] cpu time = 00:00:21, elapsed time = 00:00:04, memory = 1149.70 (MB), peak = 1149.70 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 53rd optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1149.70 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1149.70 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1149.88 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1149.88 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1149.88 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1151.82 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1151.82 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1151.82 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1151.82 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:06, memory = 1151.82 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:21, elapsed time = 00:00:06, memory = 1151.82 (MB), peak = 1151.82 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 54th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1151.82 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1151.82 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1151.82 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1151.82 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1151.82 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.52 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.52 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:03, memory = 1153.52 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:03, memory = 1153.52 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1153.57 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:21, elapsed time = 00:00:04, memory = 1153.57 (MB), peak = 1153.57 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18538 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 55th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.57 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.57 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.57 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.57 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.57 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.57 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.57 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.57 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1153.57 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:03, memory = 1153.94 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:18, elapsed time = 00:00:03, memory = 1153.94 (MB), peak = 1153.94 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 56th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.94 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1153.94 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1154.09 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1154.09 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1154.09 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1154.09 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1154.09 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1154.09 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1154.09 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:02, memory = 1154.26 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:02, memory = 1154.26 (MB), peak = 1154.26 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 57th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1154.26 (MB), peak = 1154.26 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 58th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1154.26 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1154.26 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1154.26 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1154.26 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1154.26 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1154.26 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1154.26 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1154.26 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1154.26 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:38, elapsed time = 00:00:13, memory = 1154.26 (MB), peak = 1154.26 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13093 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 59th optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1154.29 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1154.29 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1154.29 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1154.29 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1154.29 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1154.29 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1154.29 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1154.29 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1154.30 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1154.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:32, elapsed time = 00:00:09, memory = 1154.32 (MB), peak = 1154.32 (MB)\n", - "Total wire length = 57114 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 60th optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1154.32 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1154.32 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.45 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.45 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.45 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.45 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.45 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1154.88 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1154.88 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1154.88 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:39, elapsed time = 00:00:10, memory = 1154.88 (MB), peak = 1154.88 (MB)\n", - "Total wire length = 57114 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 61st optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1154.88 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1154.88 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.88 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.88 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1154.91 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1156.66 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1156.66 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1156.66 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1156.66 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:14, memory = 1158.05 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:33, elapsed time = 00:00:14, memory = 1158.05 (MB), peak = 1158.05 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18521 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 62nd optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.05 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.05 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.05 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.05 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.05 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.31 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.31 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:12, memory = 1158.34 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:12, memory = 1158.34 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:14, memory = 1158.34 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:34, elapsed time = 00:00:15, memory = 1158.34 (MB), peak = 1158.34 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 63rd optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1158.34 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1158.34 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1158.34 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1158.34 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1158.34 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:34, elapsed time = 00:00:09, memory = 1158.34 (MB), peak = 1158.34 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 64th optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1158.34 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.34 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.34 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.34 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.34 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1158.34 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:08, memory = 1159.12 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:29, elapsed time = 00:00:08, memory = 1159.12 (MB), peak = 1159.12 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0198] Complete detail routing.\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0267] cpu time = 00:19:37, elapsed time = 00:02:49, memory = 1159.12 (MB), peak = 1159.12 (MB)\n", - "\n", - "[INFO DRT-0180] Post processing.\n", - "Elapsed time: 2:52.58[h:]min:sec. CPU time: user 1186.12 sys 6.40 (690%). Peak memory: 1187148KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_3_route.odb ./results/gf180/fakeram4/80MHz/5_route.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.odb ./results/gf180/fakeram4/80MHz/6_1_fill.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/4_cts.sdc ./results/gf180/fakeram4/80MHz/5_route.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/6_1_fill.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/6_report.tmp.log ./logs/gf180/fakeram4/80MHz/6_report.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/final_report.tcl -metrics ./logs/gf180/fakeram4/80MHz/6_report.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/6_report.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO] Deleted 0 routing obstructions\n", - "[INFO RCX-0431] Defined process_corner X with ext_model_index 0\n", - "[INFO RCX-0029] Defined extraction corner X\n", - "[INFO RCX-0008] extracting parasitics of dmem ...\n", - "[INFO RCX-0435] Reading extraction model file /Flow/platforms/gf180/openROAD/rcx/gf180mcu_1p5m_1tm_9k_sp_smim_OPTB_bst.rules ...\n", - "[INFO RCX-0436] RC segment generation dmem (max_merge_res 50.0) ...\n", - "[INFO RCX-0040] Final 508 rc segments\n", - "[INFO RCX-0439] Coupling Cap extraction dmem ...\n", - "[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.\n", - "[INFO RCX-0043] 6655 wires to be extracted\n", - "[INFO RCX-0442] 88% completion -- 5875 wires have been extracted\n", - "[INFO RCX-0442] 100% completion -- 6655 wires have been extracted\n", - "[INFO RCX-0045] Extract 168 nets, 676 rsegs, 676 caps, 739 ccs\n", - "[INFO RCX-0015] Finished extracting dmem.\n", - "[INFO RCX-0016] Writing SPEF ...\n", - "[INFO RCX-0443] 168 nets finished\n", - "[INFO RCX-0017] Finished writing SPEF ...\n", - "IR drop analysis for power nets is skipped because PWR_NETS_VOLTAGES is undefined\n", - "IR drop analysis for ground nets is skipped because GND_NETS_VOLTAGES is undefined\n", - "\n", - "==========================================================================\n", - "finish check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "finish report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16279.10\n", - "\n", - "==========================================================================\n", - "finish report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.69\n", - "\n", - "==========================================================================\n", - "finish report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.69\n", - "\n", - "==========================================================================\n", - "finish report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.10 0.36 0.29 207.79 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.36 0.01 207.81 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.81 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.66 0.08 0.61 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.61 clock reconvergence pessimism\n", - " 2.49 3.10 library hold time\n", - " 3.10 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.10 data required time\n", - " -207.81 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.70 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[3] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.73 0.15 0.68 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.20 1.02 17.70 18.37 v dmem00/Q[3] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net28 (net)\n", - " 1.03 0.05 18.42 v output28/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.07 0.27 18.69 v output28/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[3] (net)\n", - " 0.07 0.00 18.69 v inter_dmem0[3] (out)\n", - " 18.69 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.69 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[3] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.73 0.15 0.68 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.20 1.02 17.70 18.37 v dmem00/Q[3] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net28 (net)\n", - " 1.03 0.05 18.42 v output28/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.07 0.27 18.69 v output28/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[3] (net)\n", - " 0.07 0.00 18.69 v inter_dmem0[3] (out)\n", - " 18.69 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.69 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.3209850788116455\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.4718\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.496570885181427\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.6605\n", - "\n", - "==========================================================================\n", - "finish max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "finish setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "finish hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "finish critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6868\n", - "\n", - "==========================================================================\n", - "finish critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6868\n", - "\n", - "==========================================================================\n", - "finish slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1143.517349\n", - "\n", - "==========================================================================\n", - "finish report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 9.59e-05 6.12e-04 1.29e-08 7.08e-04 2.0%\n", - "Clock 6.39e-04 3.51e-03 3.78e-07 4.15e-03 11.5%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 86.6%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 4.13e-03 5.68e-07 3.61e-02 100.0%\n", - " 88.6% 11.4% 0.0%\n", - "\n", - "==========================================================================\n", - "finish report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "[WARNING GUI-0076] QStandardPaths: XDG_RUNTIME_DIR not set, defaulting to '/tmp/runtime-root'\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_routing.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_placement.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_clocks.webp.png\n", - "[WARNING GUI-0076] QXcbConnection: XCB error: 13 (BadGC), sequence: 478, resource id: 0, major code: 72 (PutImage), minor code: 0\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_resizer.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/cts_clk.webp.png\n", - "Elapsed time: 0:03.19[h:]min:sec. CPU time: user 2.66 sys 0.22 (90%). Peak memory: 227976KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/6_final.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef ./objects/gf180/fakeram4/80MHz/klayout_tech.lef\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "sed 's,.*,../../../../objects/gf180/fakeram4/80MHz/klayout_tech.lef ../../../../platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef ../../../../designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef,g' /Flow/platforms/gf180/KLayout/gf180mcu_5LM_1TM_9K_9t.lyt > ./objects/gf180/fakeram4/80MHz/klayout.lyt\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' stdbuf -o L /usr/bin/klayout -zz -rd design_name=dmem \\\n", - " -rd in_def=./results/gf180/fakeram4/80MHz/6_final.def \\\n", - " -rd in_files=\"/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tieh.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__endcap.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_1.gds 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/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__hold.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.gds ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds \" \\\n", - " -rd config_file= \\\n", - " -rd seal_file=\"\" \\\n", - " -rd out_file=./results/gf180/fakeram4/80MHz/6_1_merged.gds \\\n", - " -rd tech_file=./objects/gf180/fakeram4/80MHz/klayout.lyt \\\n", - " -rd layer_map=/Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap \\\n", - " -r /Flow/util/def2stream.py) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/6_1_merge.log\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 12: purpose VIAFILL ignored for layer Metal1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 13: purpose VIAFILLOPC ignored for layer Metal1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 16: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 24: purpose VIAFILL ignored for layer Via1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 25: purpose VIAFILLOPC ignored for layer Via1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 37: purpose VIAFILL ignored for layer Metal2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 38: purpose VIAFILLOPC ignored for layer Metal2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 41: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 49: purpose VIAFILL ignored for layer Via2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 50: purpose VIAFILLOPC ignored for layer Via2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 62: purpose VIAFILL ignored for layer Metal3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 63: purpose VIAFILLOPC ignored for layer Metal3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 66: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 74: purpose VIAFILL ignored for layer Via3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 75: purpose VIAFILLOPC ignored for layer Via3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 87: purpose VIAFILL ignored for layer Metal4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 88: purpose VIAFILLOPC ignored for layer Metal4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 91: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 99: purpose VIAFILL ignored for layer Via4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 100: purpose VIAFILLOPC ignored for layer Via4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 112: purpose VIAFILL ignored for layer Metal5\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 113: purpose VIAFILLOPC ignored for layer Metal5\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 116: NAME record ignored for purpose: SPNET\n", - "Warning: No mapping for purpose 'OUTLINE' - layer is ignored\n", - "Warning: No mapping for purpose 'BLOCKAGE' - layer is ignored\n", - "[INFO] Reporting cells prior to loading DEF ...\n", - "[INFO] Reading DEF ...\n", - "[INFO] Clearing cells...\n", - "[INFO] Merging GDS/OAS files...\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tieh.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__endcap.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_64.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tiel.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__filltie.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_32.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__antenna.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__hold.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.gds\n", - "\t./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds\n", - "\t./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds\n", - "[INFO] Copying toplevel cell 'dmem'\n", - "WARNING: no fill config file specified\n", - "[INFO] Checking for missing cell from GDS/OAS...\n", - "[INFO] All LEF cells have matching GDS/OAS cells\n", - "[INFO] Checking for orphan cell in the final layout...\n", - "[INFO] No orphan cells\n", - "[INFO] Writing out GDS/OAS './results/gf180/fakeram4/80MHz/6_1_merged.gds'\n", - "Elapsed time: 0:14.13[h:]min:sec. CPU time: user 13.54 sys 0.26 (97%). Peak memory: 406232KB.\n", - "cp results/gf180/fakeram4/80MHz/6_1_merged.gds results/gf180/fakeram4/80MHz/6_final.gds\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "./logs/gf180/fakeram4_gf180mcu_fd_ip_sram__sram256x8m8wm1/80MHz/\n", - "./logs/gf180/fakeram4/80MHz\n", - "Log Elapsed seconds\n", - "2_6_floorplan_pdn 2\n", - "3_1_place_gp_skip_io 1\n", - "3_3_place_gp 1\n", - "3_4_place_resized 1\n", - "3_5_place_dp 1\n", - "4_1_cts 3\n", - "5_1_grt 1\n", - "5_2_fillcell 1\n", - "5_3_route 172\n", - "6_1_merge 14\n", - "6_report 3\n", - "succeed!\n" - ] - } - ], - "source": [ - "!docker run --rm --name Open3DFlow_s -e DISPALY=${DISPLAY} -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Open3DFlow:/Flow -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script.sh && echo succeed!\"" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "**Optional** \n", - "\n", - "The docker script runs for a relatively long time in the background (about 30 minutes), and you could use the following codes to monitor whether the harden process has ended if you should execute:\n", - "\n", - " docker run -d --rm --name Open3DFlow_s -e DISPALY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Open3DFlow:/Flow -v $(pwd)/Results:/Work_dir --network=host --privileged=true test:latest /bin/bash -c \"bash /Work_dir/script.sh\"" - ] - }, - { - "cell_type": "code", - "execution_count": 6, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Waiting for the script to complete. Checking again after 20 seconds...\n" - ] - }, - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Waiting for the script to complete. Checking again after 20 seconds...\n", - "Script execution in the container has completed!\n" - ] - } - ], - "source": [ - "import os \n", - "import time \n", - " \n", - "# Define the waiting interval and the maximum waiting time.\n", - "wait_interval = 20 \n", - "max_wait_time = 3600 \n", - " \n", - "container_name = \"Open3DFlow_s\" \n", - "marker_file = \"./Results/script_completed.txt\" \n", - "marker_file_exists = False \n", - "start_time = time.time() \n", - " \n", - "# Poll to check if the marker file exists. \n", - "while not marker_file_exists and (time.time() - start_time) < max_wait_time: \n", - " if os.path.exists(marker_file): \n", - " marker_file_exists = True \n", - " else: \n", - " print(f\"Waiting for the script to complete. Checking again after {wait_interval} seconds...\") \n", - " time.sleep(wait_interval) \n", - " \n", - "if marker_file_exists: \n", - " print(\"Script execution in the container has completed!\") \n", - "else: \n", - " print(f\"Script did not complete within {max_wait_time} seconds.\") " - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "This is the die image of the sub die (Core Die):" - ] - }, - { - "cell_type": "code", - "execution_count": 1, - "metadata": {}, - "outputs": [ - { - "data": { - "image/png": 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QxzGBcR9HSlEFxW+aFUJYyt01TjhmVYXa78cQIASOjeTv2FNufU+1fYsYUmKt8c5RuRlNXfMkFPyCWfNCdizrhqYf1zZJEow2BOC76Rnftgl/3NVUwzXOuZHXaBqkGJ3599qcZ07xPOyohj1xHOO9x1lL5Wao7ZZf9aes7Ri+fxV/O+krQRxSjmGKUgolPMpZVLAUdk9QEqkkehjIsdC15JEiCjMSayi6PZHtiaaHAyDqe9KsQvqI2PXMdUfbtUQmQjDeYBVFJKFCOUE8NJTDHgHkOFRXkwZDcJ44VERBkQ8dJfU0ho4AFFhsN6CUQTnIuwYrJP308GTBIIeBIkRE8gjvLHm3p5wcRykcqhtDlSwolE9IhKPqG0LfkgeH0gPeeyoVyAaBZEFke0q/RyiFYAovgkFqTeoUSjpSM1B0e6QUxMaSJCnGaLwPJKJA+ZjUdcy1R3U1sR3Dj9haSjyxK5BOEHc1pd6PsBg3hTUxMZLIVURCkOuG0jkSp5F6QCCIbYcfGkQ4QXpBpG+Y6YZYX5ENhqACzrckQ4LyDuU0ebND4oiGgXksEd0eJRVpyFF+TuYds6HBhUBse2JjxgdFBTKdIkNJYnsKvSfHYrQeHZ7XyGEgCRmCjEBP1jliG9PrHsIeaWKcEbg0RXqHHRpc2CFMjN51+MRjwi0xjwCL8hFps6Po9sQmRimFtQYhJQURys1QUlDoGicsufC4bk/qMwSCwkiUcMTOUnQ1sXB0fYd3jkIG6BoyAYoF0bQ2DD0IQR7GsCaEQBwqlCvJnaHSNdZaCuGg65BCkvqU1CpUcKS6p2RP6lOctRhryaXHdzWxXCBFPFEGX5NQ5S7lNHo78FLSLI757PwMq+QBbifJCMGOekH31rJPS16cP0NFakQRUgICYwxvW8VwpdlWCz55mKO1PoQq3nuklNxcOx5vDJdnJ7zMnwKjh9Z6RCf4wO7Csu48Fyc/z8sckmRk82GEwHLQ1JcBOThePzjibTnG3sAUHhiWJtBeeKxzvHz6kGscTHG61hohJJGP6F921LHg+aMHNM6SJMkBbqdJitr09FeefTrjxfkzphz2uDZxgrGGZxtHvw1s1wUvzjLEBKGVikbOJgRubzzDznGzmPHDsxI9DKho5Iecc6Rxwu7VwLp1vHlwwovUEQIkcYw24zomHupXhsTBm+Nf5E2uiKL4QOCZtSHtWuxnAkRMc/r3+aT4gO3xKUNZEJKADpqbPKdrclpZ8eLxI3oxhl7XWUY/DEgpOLIx/Wcdm1Lx/OQMD0TqHTmapikn1wP9jWNTzfhs/eG49m5c57tx3d44+n2gPv4OLx4tiSKFNpruqGWXl0gE9fXA0Aiujpe8efQRu3mFTTQu8dSzPZ+qBzRvWnIh+OzJKS8xKKUOiFlKwdxC+8oggVenv8wmGsOLoe+J4ggQ9J2lu3A0suKzB2eEdLzX3nvSdOSY5l043O9PHz1jmNKjd/sqBPh4iOjf9Fwv1zxfPsT7Mdum9RiqRFHEty81/c5zvVzwcvExUTQhjruwpuvYXQX6DlwfAeZLf8a/UnJUSomQAukC5faKJ/tXeCVRSjIMA0Ve0HYtZ2pJ7k6Y1Xue7t6O6VijiaIYGFO3J8kD0qFi2W74qO9p2/aASEZIGbH2J6Q65fTNa56asdgqzwuaZiSmggvMwwNyn3L+8g1NqKcUazcdm+PagUo+JbOCB598zqxQB7iepRmDHpiFiIKnaGt48smfUpoOGHmLphnh+ON0QdauqaTlgx9esOu7ieAbmfaqqjitIQvnzJqap/u3CKkQYkQcaZqNaUw3J+OExf6KZ7s9Qo6h2R2Z6H1gxSmpq1g3l3zceuq6PhCe1oxhz7w/InUJ55+/5NbeTkRc8Q5xBEllzylEwvkPPyWJ3egIBw1CMDxt8W1DpL9BOqSUb/9XPrz4JdrwB8xvFoQi0PqW9eYBefs9Cj/w9AeXDMGhtT6Qo1IqHmbHZN2MpbU823yGD4EoHkMv5xxVVXHcJmRuzbLd8OTtFXmeo82EOJIUPQyswjEZC6rrf8fTJiGOYgbdsX22Yfl8jURQxcekQ8XJZ284D69YvTqiLzpsYbk+uuTDF9+l9EuyNuXRi08w/YYoilFKYq1FCMGMmMI+QAnBox88Zy7GNW3qZiRHhWBtJHl4hPaaJ/VnRMW4r5xzlEVJ27WcUpHxgFnb8qy7ptcDIMjzd4jjNDsn60qO/MCzt6+xzo5EedchpCRLU1Z9RebnHPU3PH1zS5qlWGtHdFKUY7pWPCQTFcq7rwfiCIER4glxILucEFghaWVEUBIlFYP0BBnRyYhBKpyXWCHpZEQkI4wMRCqGEOikRUuFFwKNolMx7XQcAbz0xCrGIHHAICStiEaYNh3rZATBY73EC0kvFW2I8FIxyGiU7cgYJx1OjOfpRUSnIjo5xp9eRgzSEXmFR+AQdFLRyYhAQKiETmqkkPQiwguBE5JOxeM5RISRHo9HqZhBBDwCE8Z5yzsyWAa8jNDSo6drmWn9hBQ4CU7FGAcejwnT2ghJp8bxGDGey0qQKsYKiUfQC0U7rZtQMZ2MMSIimcbqhKCXEZ2UWDGOQUiBVRlOGDwKLyRGZPQywZAzyJQgAlo4tIjxQuIQtCJCC8kgPbFKaGWEkop+GouVko54EmZFOAk2CJSK0WKctxaSVipQMdqNKNZKhZYR2k/nETGdjLAyopcxWma0MkIy7jsvBINQDCKllRGDjHFSokVOr2JcmPbEtDaxjFBKYfwooopQOARM+7MVgIjGfaWi8X47cH663zIiVjGtNPggEXI8dgjjnGwQdDKikw6BABXTyzG1PjAdIxUdMTZAkBG9jJBSElSMEQonBFooWhHhZYyVAiOB6ZkyYeQ33OSMv2ya4ytBHFEUHxCHjGOsKjCpYHtUYdWo47DWTAKjnr2OMDeCPo7YnKxRUYyxZkQsjG/gZkixN46+yHh7+g5iCwTeO4SQtFuJC47maMEmWSMYc+TD0JMkKXhPfy3QPexXj9mkYyqzH3oI0CYxYjAMNzGJcuxOPuCqiA+hSnoX1jgYriNsbNk8XLLxlkCgnd7QUgq2IsN8rukjuD6b0VhDmo1ZleA9XZqxyDRmo9BJxu3xGoQEMYUXUwan3YGpFV11wu3pw2nt7CELEUKg2ypsA235kLcnGcOyn9DYiE66JKa/DNgu0JzO2ESnEAJNnExEqyIJguEioJ2gXn7Aba5Ips8BzHogyTvCmwxLhFn+AlfiQ/qVQsQFJIGBgU7N0NscI1K2D1b0BIw16CxnWPYIKdmHEU21heRmWRCmPTNmiRx9mtIkFrsT9HnKdnFMGyejjgOmcQ30W4lpJf3qEbfrxYg4zEC7rrFuhgT0PmBRNMsn7E6OcFGFSTU+9bSzHW/1Q4Zri3GS3fkHbHxHpBSIMVsnpCQ4gbkAJ2C3/oitgiHL6bqWaEJ2Ue8x1wotPJuTb0CaYIwddRwTqq17idkohiRlc34yZVWgiWOMHTUqjc0xTrOvKm5mFd77KVvXI6QgUhHttcO2knaWsSlPieLoEKoMeU7XtOhNhK9HnlCpwJcNOr4SxHGXxgohEKwlMTV5rznbvCRM6dhhGA66h6N4RRrOqeot57sLojhGaz3B7UDX9SzzRyR6RtXe8qQflapfCFWiiDlnxDpjdbnnvH8DjJmQMYeegR91ClnIOPr8c87DjjwvDqFIURTYtqeIPiK1cPz8JXmhaNtRznyXb5+FiDz6CG00Z59ekNyRo2VJ04xw/DRbkfbHlMLwsH/Nrhu1JHehymw2Y11DKh9R1HvOt2+QagxV7lLVWmsWfkkanTHbXfBgvztkke6UlsF7Zuohia+Y79/wpPPs9/t3oYo1lEVJpU9JXMr61RXn+uagO2maMVRJkBThEZlIOXr+pxC59zgbweA6fNugzLeIh5T86v/g0ZuOjfp/mN0sCYWn8y3zzUOy7pfJXM9Z9xqNZxh6Fosl+/0epSTH+SlJt2TmDA9vn0/p2Hehymw2Y9mlJOGYWX3D2eUFeVGM8w3hkEKfcUoqV+Sb73N+k5DECf3QsXNbFp+skECenZHoGav2FcfiFctXa/qiwxUWefyWxy+/Sy7WpF3Gycu31N2YVVFKYcyInGciJvOPkVJysv0BGXZU3e73ZFmGEIKVkaTyGZkbONs9Jy7zSenqJq1Qy1rMSNVjirbmvL2iG3qE4LAHQwisi0ckfcXK9zx8+xnmLsPWtUipyNKU+TAnYcmiveI8XI3KX+swxozaqP2eQj1FqhnOObz3Xw/EoZSaMisCJSV4iS4XbOYxbiJHrTWjd2w79i7F7BL6XHK7qiaOwyDEqKQ02lC7ErsV9FnE27Vg0ANRFB1CIiEkbZPhamhWJbeyRAgxIo5lTzohjm6borVkP3vIbXxKP8nIQwg0STIijroi1p798hnX+biBCJBmGcPQE5xE73JMlLA9K7h1Yw6+TROGKR27UgXmAjqVcnP0jNpohvccR59lzHKHqTN0FLNZlu/Ssc6NhJoeaJsI02V02Qm3RydjKtv8COJoMkyn6BbnvF3H9Iv+sDbGGLokobtJsAPUx4+5ZQ0E2jiZ1jEmDTDcJBgv2a+esclGsdGdxkWvBuKiw79d4EKMXn6XK/8B/dIjZQlZYAgDnVyi9zmahO1JQRc8xmh0UdDPe6SS7GSFvfC0WcZ19RFBTAShGUvyuzTj8S5gm4QuOWFTzmmSBHeHOKZxdU2K6WP07DGbYk4cjVmVerXD6wUSwdBHWJFQV4/YHc8IYo7ONC61tItTrrqn6J3AuJj96VM2Zo2K3idHFd4L9E2CRLA9/pCdCgwTP9TGMSGA0gGzG+e9WX40IY6RHNVTGn+vo+l+R2xOFnR6XNs6jjHGAoGaOfbKs68ybvIENyGWruuQUhJFEe1GYvuYJj/lNl++S8c6hy4K2rpmaEqsiRAi+fogjjtSyTmHdY6ABz0g91uIRjWp1wPSDMi+Q1IhvUK4AbnfI+MIacyBHLX9uOGES6DviDuPaRtkNL5VVRgRh9SAU4hOI/0WISDJc0zTICbHIc0K6WNk1yD7DmEG5CTwirMc3/UIkyJsQNQ7EmLchEikSVFaI/04FmENom6Qdvx+4gtM0yClQsYO4QoUnqjdv7uW0eA9SagQrUW4CFyH3E/pWAHBGKROkVojdIHwEcJ2yP0wprmdJU4SmDamMEuES6FriLsI3dTIKVSR1hLnOdKU4BQ0LSrUY+ovL6Z1jBBIhF0iiBDNHmkCIk7GMQhBvNTQ1uBzRgLohrirob9BtBoCBN9CJ5DuCLxG7PcoPE5rEuHRdT2FryBcinKeqNnhQkBECukcwTkSXyF7AVYiQovwO+K8gIkclcmY/RJ6hnQSoRtk65FRjNID8aJG1qAAGWYIJxFdjeo2yL1H2gGcR6S3xN0R0uUIBzQNUu9R0chxWGMRUiCCQtglUkhkvUXK8RyiaVDpiDjkEMY9EQxyvyXyBb7vwDmk08iuQ7ps3MN+QOyacS8w7lE/vbzEtM8j61DNjmAt0g7j96UkTjPkkIAVyL5F2oYoTcfyA2MRViObGoxChBxvLVZ9+W0OvhLEcSfMiqKIKALpBKnVrNxm1HFMhVpF0LRty0xB5Asy17NuxgId/Z6Oo+97qjQncpLSdayblqxriSfH4b0fa2RCTORSZrpjrTejjsMPpE1DakfHkYWCyAvm3Z41NUXQI0wkkLse1w2kaknsYdntUEjyO2mwexeqJGIJ1rDudmBaCNO1uhYlFcsUIheTeMuq2RL1LbkfDoijxDDvJTEzsjCwbjeIKRtljBmvpQdKF4hEQWFajtr6EKrEZqxl8d5TiJTYKSrTsm4c6RR+wMgPFX4gsxGxS1gMLWuzGbMqfiBr24OOI7UFsQgs+h3OjKHKMOk4+q4lDC0yrIh8IDMXrJoHlPo1s2FBkAEZWkotidxTUmdYt9tDVmWmPEkzOo5FHhM5RaY16+EWRyCeOA7nHCWGakiJfUbhetZ6Q+6Hg8Q+tWMqtCAmIiU1W9bNMBamDR2yu2HZWCSCJImJXMSsr5n1b1m1niF0WCymvGTVHBMHQewyVn3NutuMLyGpcG50HDNiElcihWSpd0TCUARN2takNkUIwcJIYl9wd/EAACAASURBVBakftznEQPDVIRYYsZSBipiMScLA0fdjm6421f9QXI+y3MiL8mHnrW7xTo3PiddO+o4bEqhZ8Qhphxa1vqW1KaT5NxQCkPd7MlFRSQiIikOz9GXaV8p4rDWYgP0eUWdKl6enU46jndx+jAMrHpJd+XYJQXPz54g4wh30HEw6TgihmvNbTXnB+fZpOOIEIL3dByex1vDxekJL7LHMDmxYRiI4wThPdtLz7r3vDn+Ns9zQTrF8YRAnCTIXlO/FQht+fxsxVX1vo4jwRjNykJzEbDe8fzJA274IoSWUiJDTP9i1HF8+uicxplJx2Gn3H6K3Ax014FdWvH87PEXQpU4HnUATzaOfgubVc4nZylSSpy1qCg6hCq3N4F+77meV/zgbKyHiVQEk4YiSxK2rwyrzvH6wTHP41FxGk8ko1IRaYD6tSGxgtePv8ubIiKKokOcP5z05PWA/UwiRMT++O/xSfohtyfHdEVBSD3GG66zgm5f0MiK548f0IuAtWNFaz+MauD1nY6jivj0+BTPGN7exeNpmnJ0PdDfem7Lihfrp8RxPOpW4DCu25tAXwfq1Xd4frJCqQhjNe1Rwy4rkUFQ3xqGWnB5vODNo2fsqgqTGHziqGd7PhEPaC46ciF5+fiE5+gv6DiEECwctK8sAsFnp99jO+k4+r4/OOius3QXgUZWvDw/IWTvaonu9nnVQXcd2CcVnzx6ymDf0weZMXP30RDTX/RcL1Z8ujw/6Fru9lUURXzzUtPvPVfLOS9mH32BHM3SjL7r2F2D27Z44w/r9mXaV8RxjDxGFEUoDFnfUGrLo/Y1fkIcRmvyiRw9lXMye8ys2fOkvSFKxrL694vcjuIzkr5g2e/5YOjouo4ojhHcCaIUK39M2iecXL3lsb58V+TWtmRpSvCBuT0l9Smnry7YM5Y6t10HYZRY+26g5AmZhQcv31AWkqHvCUA+iZjmQVH4x2hrePzyk1E5yqgD6aYit0fZkqyfUw6WJ8+vqIeOPC/Qk3K0KMtRx+FPmXcNj5vrEabCqACciNgjOydjzby55ul0bmMNycTEB+9ZhhNSW7Durvig9zQTirjLSBVZzrxfk9qE84vX3JjbQ3Hc3TomSMrhhEwknL18QRz7SaA3qhs3wzVFI4jss5Ecvfnfefa6pVF/yPxmjps5zGBY70/J+79F4TVPnl8xBMegNbPZjKZpUFLyIDsm60vm3vBk/xo/1Z9Ya7CT7uG4TUjdkmW/4/HtFVmWY+xYEZtM4qulPyL1c8rt93myy4kncnRrblm+PEICpVqTDBXHry84k29Yvl7TFz02N2yrDU/ffJPCL8i6jEevPmPob4mjCCHlVOQmqYIi12dIIXj4/CUzMY6xrvckaYpAsDaCzD+k8JpHn75C5Xe1KiM52rQtp6Ek82dUXcszuz0gjnQqQgwhcJqek/UZ6zDw5PZibJtQFId9lSQJq64i8zOOLm95/HaU4x8QR1nR7PfMwgNUKMaXmPzy+3V9hVkVP5JDE8cRJBgf8HhEAOM9SQDjPHZSmboQMN5DAO09CgECtA+4MJ2bwOA8xgeC92N60nscYxv/wKSN8AFEQDiPcR4VxhO4SbtvvEfjSRjHEkKYYmxPUIzHBI+2Ae3HvxMSM47XIPHhbszjvEIYy9Lvxu0C+MBhTtp7YsZzee+JrMMGOepDpvW4a8pivR+v5T0ueDzg/DgeFcR47DQvgp/mBDYE9PR7ocK0dh7l3Lh+I9uE9p7gx7XR3oMPyOkz/954JePcIGA0WD/egxDABYF2Dh/EqDUIctQxTPMOIWCn7xvn0c5hnMdN+hdPwPmAxh9a4GjvcX481gZ/uN/GB6R3mOnNqcLd2oxzcn48RoRxfbX1GOeQCLycxjIdo73H+oANo+5Cu3F9Qwhj+wDnCdIjQsC78V7a6XMPmOAxjHtWe4+Y9qvxalqXcb7ubr7ek07jtSEc7oGd9jiAcOO+CSHghcAHsNM9cNNzcnc/cOP4x2MCRgRwDu881o37UTuPl+AFODfuty/bviLEER04DqmAoGiLGZdHFS56l1XZpqNi7qGO0LeCNk64OD5GTqm5O8ShtWY7pJhbx77IuDj7Ytn9Hcex20j0znKzXHCRLAEmSNkdQpX2RqIHuF0+4zL1bNPskDlIkgTRa9rbGKUc18cfcVW+0zLcqTUHGxhuxjf+mwcrbrw5FMkNQ48QklKM1a19JLg4W1FbfaiODd6T5TnVZkBvFHWccnG8hqkfh7XucK3tHnStaGZnvDmJD6FMFEUjIeYD+51CN7ArH/HmdGTg7+Ja5yxZktJcBnTnuVzPuIhO3oPQ/SFU6S4h95KbxcdcZGqsjp0qOLujFtta3GWCIaJf/goXfJP9MseqHJ8HrLZs4wK9KehExuvzFcP0AqmL8pAZeBsy9KBpC8Xlco4jHObjnCfPc57caPRWsM9TLhbHpOkY5oXAVLWr2W8lupP08w95s1gQqWiUnJ+2aFkigX4fMEKxWT7j5vSUPioxqcGnji5ruFDnDFeGwUsuTuZcHp0QRXd9T0bEMXfQXwqkgKvVN9ko2GYZ3fJdawc6x3CjGETG5XGFyLMDutxNOozjQTJsFG2c8er8mN6YqRAzQesxrLmyGUYb9vMZF7MV3rvDHhVTkVt9ZdGtZFdlXFTnhzDOOcc2yxgWLc02RmsJIkHKr0GoMlbHOu5qSLz3iOAo9zc83L34IjlajvLYk3hNGs6o6i2PdpcHclRNpeFD37POHpHoikW74WnX0E5w/E4wFamIpTgn1RknVzWPuvEPCGV5TtPUZFkGLjDjIVnIOWk+Zxf2hxz7XS8E1w2U8UdkFs5evKTI5aEHR57ndH3HPMTk6kOU0Tx6cUn+5/TjeFSsybojSmF43L9i37/fj8NTliXHrSSVD5k1NY/3bxByFIBZY8mnNPEqLMnkqON4Uu+ndKwhThLsVOS2lA9IfcVqf8HT1tI09Rf6cRR5MYZoLuX84obr4XoMVabQ6k7HUfpHZCLmdPNDoh/px7Htb8l6iPzHJENKcf17PPm8Zx//AbPrBX7u0Z1mVZ+Rdb9E4QaeDG/Gfhx6YD5bUNd7lFKcl2ek/ZyZ1Ty6fYEP7/pxWGepyop1n5GGYxbtLY+uLg6S8zEtPrYDWIgzUrGk2Hyfx7fpgRzduluWn66RQlBkpyTDjOPuFaeTjmMoe2xh2Za3PHnzLXJ5RNZlPHx1RddcT/04JNZZlFRUROT+EVJIzrc/oPzRfhwC1kaRyWfkbuDh7jlROYq+vJv6cTQ1J2JOJh9RtQ1Phiu6P6cfx2n5iLQvWbmOx28/H/uTlBXt1I8jTVMWw5yUJav2ikcX16RTqGKMoZrNqLdbZtFTUjFDeI1XXxPEIcRdIx+BUAorM0yU0iw+wN1xHMZg0oxh0dPaFLfPsLmgXhZjP45JqxACaDPQ2RluJ9GpYnd8PPXjeEeOKqXo60nHMU+pVyPbbdKUruswSQLOo/cF1ki68gF1fIy5E1KFgEkz6AdMXeJMoJ0/YVfFY/wJDMnYB0I5gdnnuChmf/KE2usxVMjGB01KyU7mWKewKmV/9IxaD5g0PfASLs9ZbS2uydBKsV9mo+OYemjoO3TTxNg+xeTH7FZHSCmw1hFPtR0hBIYmx/URw/yU3XFM13WoaKwcttbi0ozhJsYNgnp1yl6MfwfHTI4hiiKSIDC3GTZIuuUT6kzQTyQkQtCdHENr8bczfEhw82+ztx8wzAYiKnzhsJlliBbYXYYlZnf0lIERcVC+Qxx7SpwR6DyjLj/EE6aivZE49nlOvw24OkEna5qywGTZ1D0N+gkJDU2GGxLs7CF1NieKIgYz0B0dE+n5KDnvYxwJXfWQ9rggYsGQDrjM0ud79uEpdiexLmJ/9IBmuZh0SPI9IaPE3mRIIWiPntGogMsyunmHnhBH1odxDxPTLD5E5unhJeGml0Cn48P93h0VB3LUpCnDRNA3foa10FcZdTb22TDpqB+SUjLEMcNG4rqYvjihzuZjZ7pJ+uCyjL46QjcVoQtIviYcx2hj1CqEeK8X7agk9WEMgu96BNxV0IZDNW04nOMuNhv/FOkYa4cQ8IfvB0KYzuunAHziRe7O46fYMYQwtnYN4Qv/ja0Hx8B9REfvjYsxzvV+av56+L6Yrs1hTHdj+MIcwsgZ+Pfn698dO86ad9c79DH54hjufh6PF3/mWoFx/O//njB+8/1r3TVYOszt/XNM94Bw9x0OxxLCj9Q7vPv+4Xa/p0wMAe46Vb6/Nt4HhAgIyaT7mMbw5xwb3j/1F+b77ti7sX5hDiHgvZvmOA3rR4/7M/fs3T69y9DdXe9uD9+d6+5+jseGP3P9cWwe596/P+/uZXhvofy0J50bOaexgOjdZz74H3lO3hvvtNBfWJv3xsWPfO/Ltq+wA9g4aBE8ke5JrGXeTq0D1V3D3bGJThWtiPwpiduxGMZQZdB6TCky6jiK7CFKz8iGDSvfHOL4u5hfKUXOGUpnlLuaxSQ5z6dGsVmWEZwn5SGxzyj1BYuwP7SpCwTyLMf3A4n6kMgKqqtXhEzQ9/3hXH3fMwsRsfoAjGH+9hJnWkKYWg9OOo55tiIyaxJjWL59gxpaivy9UKUqKRtJJB6S+j2L/uILOo48zxmGgdwviOQp6XDDwrwLVe6gfQieTDxA+Yq8v2Ll7UFGPoY9hiIrSM3JqHHZ3LKYQpW7VolxHJMISWIfEomEsvmcRTzWy4zdzwSoMVSR/mOUSYn332d5NSeb/38UmwXeOnRvyOozYr0m8QOLywuyYBkGzWw+J5naRM7yMyIzIwuaZfMSz8Rb3PXjKEuKPkP5I7Jhw3x/MWZV7tKbWcbQ92ScErEgad4w39ySRAm97gjpLYuLMauSpKcoM6O8fUOVv2JxMWVVCosvb1leSRKxJjI585srFu3NpON4L6siImL7CCUE8/YzxCQ5j+q71oGCyihi8YTYa+b9S1SRHXQc1dSIpxQzIvGQJDQs/TVJ34OYqq6nUKUqHhHpgoKe5e5zrHWH9pZjViUlH+ZEYUmur1lsr0mSu6zKGEJFux2JeoIU1fg0fl2qY+883F29iheSulzy4mj2hVDlbgMcmYj+VrKLUp4fn6AmclQqBQS01lzpnOHWcZtnfHqW0g/9wbHchSo3W8njneNyveB5coRAkKQpfTe2DsR7djeKowEulh/yPPXvbhpjjwzRD+w3KUI7Xh19k+sfIUf1pONob2Ns7Hj5cMW1NwTCmEMfeqSQRCKlf21pInhxumJvh6lUfiRH8zxHbQb6rWIXp7w4OoaJ43DvkaNP99A3EdvqIZ+eREghsM4eBFMhBDa7iKEJXJdP+OQ0p3+PHLXOkicpu8vAug+8Op3zXJ1D4JDWHEMVqN8KUid4ffot3uTqQEIiBP1RS9la7NsUQkSz+k2ei29wu57RxTkUYUzHZgXdvqIROc/PVvQijDUU75GjRyGjd4ZtMeP5Yj7244gi7NSFPstzTm4M/U5wm2W8WJyMHcCm+d4V393uJEOnqBff5MVi/gVydCeKsR/HHoZGcrn8iDfnD9gl5bsit6wljc9ori15kHx2PueFf/jFUEVKFh7aS4FE8Nnq59iqd31PRwct6DtHdxvR4Hh5/B14jxzNJ3J0Nkj6bcQ+zvj07JR+0geN5OjI33zD5fTecDOf87xaTT023u2rOI759rWjbwTXs8c8Lx8Qxwl+ClXyPKNvWnbbmF4r7KAI4WvQj2O0O1g8mgievN3yYHjz/1P3Jj2SJGma3iOLim62+xLuEZEZkZldXT0zzR6SJ3JOnBt/AP8of8AQBA8DHohBgwTRXLonMyIzItzDF3PbdJONB1Ez96ieywBVINKBQhYszNRURdVU5fvkfZ93NLmp9DQdNfhnKuk4Ju2O1/0Danz6ZJlONW3XsTSvMH3NbNjwNg40zWhyixBiQOuMuTvD9BnLdcNrdweI0eS2G3kcgUm4Ig855/e3vI4HirKg63og8Sl801GJt+QWLm9uqGqddB5wYkPOoqaMbxms5ermAWM7IJ5mUFJJXpk5eb+gtp7XN3fsuoZiBO6GEJhOJpztInm8pG73XPeP443yyOPIscPAwk/JOWfa3PNmOIw8Dk9+7MSHwCxeYHzFor/nu8DI40hj47yjLmsm7QLjDOd3T7z2m1Mz92gWNEgqe0khDBe3H5FZOK2qCAR7tmQHj3LfY2xOuf0PvL0VbIr/nenTjNB7hnZgsb+g6P+Wwvdcfb5nICRm7HzBbpdgy+f5GXk/YYbnTfM52eqVTjW6d0wmU5aHjNwtmPUbrncP35jcEiekZxbOMHFGtf/A9SYn04Z+6NjpLbNPyatS6TPMULO6/8pFfsP8ZklXdvjKsameeHv315R+Rt4bLr+uOfRPZDpD6RcmN7Kk45CCV19+pRKOqqzYHw4URZ4YswPko47j6vNnsjoZ07wPJ5PaWZyQ84q6a7j2a7pRlVtWJW17zH+5JO8rlnvLm+1N0vSUzyzboiiYNxUmTFk8rnn99DTyWB3O2dSg3x+YcE1OjfoLper9BUE+qSEjpEQEiSSgST0OGdP/14AmosYSTJL8BXqsBdU4c9FEUtsw/VfFMH4WEEk3oGJAkmpGJdJn+E+8N20nfY8Sz/sAERXD6TuO2znu63GwAqDG7xHja8d/lzGgiGnbqRsBMY6vxfHzkUAc35u2IYVAk8o6IQSRSCbSe9XL4yaSJGJpbPRxW8ftnI43no43no4rbec4NsfX9fhdOqbtEBk/n14/1uQi+pEUcTxXIR2DSK9DQImIFPG0L5kYa3VABo8GJBEtxm5LDOmzMb3G8fy9OJfydI2E037/8+N+Po+OiIz+m2tGjON/vAZP53s8BjH2GrRI51MRkSFdN2LcbtqOeL5uxXG/IoKAihIRn98v4/HzaRzt8ZqIIMXxuknHnL5rPLaXYxPD6XhVTGObxub5Gj6OzbFJc9r/cRu/G3RgWo4NCDEKpBB0Rc3eCD5eLkd37LeS81Uv6R4i26zg4+UVckQHvtRx3HeG/tHyVNf8fFW80HEIYhwl52voNpavZ0s+5JcnKvRRGixCZHMfWXVws/qBj8WoZRg72sbkyK5n/yCRg+fz5R+4n+Qj6xKMSTOhpYPmXmAzz8e35zxG90IXkaTBKma0nwb2GXy4OvtWxxGTalOvO7q1YGtKPly8glE5mnQcqRR5twl0O8HTzPDh0rzQcTznqqyfoNtHHiYlP7+qXhDg01J1YXK2N5ZVG7i5XPAhewM8S+SVUklyfhMwQfBl8dd8OZYq43S6W7VMGoe7TZfrfvFv+EX+xNNySpeVhDLgBs9ZXtBuag6i5OPri1OpUlXVuLQrOQuGznZsas2H1RLPMzow8SeKhA58ijxVJR8XV9+UKsf9Wq+hO8B+9ld8WIw6DjfQnbdsRIUE9htPj+Trqubm6jXbvMaaVKq0eYMxr2i+dmOpsuQjSYIvpCSMqypzD81NQArBb2d/w5MWFH8iOe9aT3sPB1Hx6+UCyvzkSzrhGFqez/f1VdJxCEE2rtYB/DQYOt/zOJ/zYXb2jeT8qOP4452l28P9rOLD9M3JHeu8S6V327J5lPhdR/TH5umf93f+F59xKCJFu2faW97tfv1Gx3HkV1yrJWW4ZLbf8n53h8mfL2gE9F3PZfGaop+wbJ/4sTl8m6viPUpKzriiGHKu7w+8774gSJLzpjmkBLkQmIdrylhw/ekzzSlX5bk56tueqf6BwsLbD78xK5PkHL5tjlbyHdZa3n+4Z2YbYgyJq9A0SCV5V6wo2yWT1vJDe/MnuSpJx3HVSEqumTd7fjjmqozwneN3XYQFhbxgub3jx5c6jpFTGUJkJa4owoTz/S0/No7m0JzGZhgGqrJkPlxSesPb2yc2Rx3HizrdIJn6ayoMrzc/U2SevCjSFBnBU/NIOeo48j5n8vg/8+Nve1qV0IF+6rGd5Xx/Sdn8ayah54dfvtIFxzD0TKezE6vku+oVRTthbgfeP/5prkqKR7joSsp4xqpZ8/7+K8ULHcdxv8+4pGTBZP0P/PBUYExO2zU8DY8sP54hEUzNBcUw5dXnL7x+qeMYJec/3PyBmjOqtuDd50dcc0+ms2+bo2hq9xopBN9tf2YpHPVkym63TbgGYOUUlfgO6we+339Ej5Lzl83RazGh4DXzpuGn/pFmRFa+1HG8rt5QtCUr3/H+7vOpWfwyV2XVzyhZcNHd8/7rY0rG8x7rUqrbbrtlIb9DifokOf9d2OqPMw5IS4xRgDUFu+IMLyVSppUDV9UcVEFDjWszBl2yrc/IjKHP+xQ9KGDIBxoxwbmMPqt5mub05lsehxSSbqjwQdIUU7YmqfK6PKfVJX1eQAgMbYlzmkM+Z6sKXFnR6BKA3uREPTDYHBMD+3LJplT0ZmRSlCWd6SAkHoJDsJsu2boUaznkBV1WIYVkb6a4PsNKyWa6Yp/32CqtlMQQGMqSORE3ZAyiZFudEU+BTI6hLOlNT9sXOJfRFTWbmXm+cbxojnZDhR8y2nzK00TQqnL0qqRxHvKcYV/grGJfzdjkqYHd5Tl91p1uHMM+x0bNvliyMeMMajz2faWJCsKhwCuDzV/zNFnRF29oqkmacUhH6xc4bbBRsJ2djTeOAV9PaFSBkiqNTavpjWRjzk48jqNFYShLWqFwvaYzNZv8/DkFD+jzgi7r6IbEnBjyJdtZlbwqpuJQatQsgXyGUOF8RpPP2VcOOZszlAO+dDRlwWaywnY5TmXsJnO2mtN1dVqajQq7TzyOXbViKwOurtmLBA8CMFbgOoOVgl15hihzhjzFI/h6wkEVHHyRzrcs2UxXtCatWHXGMORp1ttkE1wvaXPBVp+l1ZKqptHlKR6hEznOZjRmyjaTzzMO5/B1zYGM3pY4n+Ht82LFn/PvLwbyeU5yS6J5rzPcdDmuqgicdfR5jtcGZw1x0ERd4qYZQWt84YgyTbfdMOBtSezA5xV+pnBdTxyn4zFGlJL4TUYcItZkuGyZZj8mx2clQ5ZBCASfE6PE1zNc5uhzg89yYgSV52B6wiYjxICbzHF1hh+BK31mcFmJ8xBcRhSSodK4WKT9zIvEDpGCnoKoSXGWU4WzA0NucCb92H1Z4IMleI3XOXaWeKJHAVifGZyx+L0iNpqYVdjJs3tWZMcbR8DvcmKQhHKCmxp8VoA6Ss49Ps/xgyQGGHKF1yn1zpkcZ8ZxjBC6jBgVYTLHF4JeaZxxqVcyzQjKQZsTZQb5WTqfZoWvJvjc44TDD1OiSrzVoZLYcUnY1XUaZykZYkXUgWAMfjZ6jJQafRUeV6TUveg0oSjxE40bSxWI9DrDmRK/y4hRg5li9YyoND4vCRONm86QQGwU0WaEeoqvI242w+UJ5OMLjZsuCC4StGLIa7xJ8Z3PAjCwQRLatHripwu8ivR5gZcZLsvSOesDwWqiELjZElHkuOE5AtJrg+810WuChr7OcHl6YEmT3guR3hVEFRIlvRL44OnzHKfzBMfKMoKDGBShqHGVSa+FkK6bvMCLjLDLiYNGRPX7EIDFCNa+sNV7BzGQH7bMth/GCMhUqkwmE/b7HZNsheaKbL9hvrtNS6hdd0oj67qOunqLHqYUzZpFt6dtn6fjzqVSpVKvUUPB9GnPvPnEkSB9jICMPpLzGk1J/eU35nF3iteDlMQW2p7c/BXawbT5+I2O4xTIhCbTPxKtZfn5ljAcRl3EM+JtWa3Q3RkZA/P2C7JrqOt6jAVMpUrdKjL5hiLsWOy+nCIg7Ugm77qWKi7R6hVmc8tivz0FMqV+S7pxlPI1Kk4pd19YtknHYUy6oK0dqIqKwr9C+5zFw5pZe/eNjsMYg0FiwhsyYaif/pGZHpcBR7k9w5qyA8EfUEOOWv89y98UN8X/QfUwI84CQzdQ7V+huwlZ6FkOo+S875jNZmRjBOSivkZ3U3I3MFt/IMIJU3jScfQlmguK5pHZ/U0KFbfDSS/Ttg2luEKLJXrzC4u1wWQ5TdcQ4iPzD6lUMeUVephSNp+YqM/MPy/pqw5XO0L9xOJLh1EXZF3B8u6eh/3dmOQmT/qgCRoT3iKFYLr9JyAFQW+3W4oiPXQmPml7Mt8x2/1ycsceUYj7/Z5aTtHyLXk8cDbcn0qV/IWOYz79Dt3XFL5hfvcb7lTqJJaJyQyFXaDFkrK9Yx7vX+g4LNPpjO1mQ67foeWE6Aec/J2AfI5TPa01MlMMqqbJ4OtqgtfqNN3ejL2M6yFjeFK0k5zbs4tnk5tOT8JhGFgPJcOTZ1+W3Lwy3zQA04wjmdzszvOwmnF7dQYky3J3XG8PgcNaM/SC9eInbs1z4wnScitdT/OUowbP/eqPYwTkswkumdygXxuscdxcL3iMSQqdfmgJKluTM9wEOg23l0v2diAfAbbHfki17uk3mkNWcHN2hhiP52X8wWYvGA4ZzfQNN+ffv+B1PM84dtsMe4Dt6h03r1L9r17MOMp8NLl1ka/nU2711bPuZBxHE6G9l5Re8vjqb7gt5MgBtYCgO28YDg5/X2DR9Gf/LTfqj+xWNc7UY3PUsikmDLsJnSj58mpBP8Y9HMZekpSS61gwBE9TSb7OZyfmaGqOesqy4s2jZdhKdkXO7eyS/J81Rwe2G83QKrrlH7hZzE7N0fayYVDJ5NbuBcNBsVn8xOPrK7p8hBUXgSbfc5u/oXuw9ChuXk25DdcvBGDpATjzku5eIhHcLf7lGAGZxtkY88LkpulEydez6XMEZAhsx+vivFcMW81Bl3x6dUFvbaLUmWfbw70rGYJjN5txWy/xwbPJc/p+ODX7dw+e4TCa3OrXGJNCp51zyeR23nLYZMSDQ6FQ6ndQqsQXJrc03fRkvqPwnuXtDUEKxHjjODZHZ3KGtivyds/KrlMEZN8nXqmAoR+YZpfovqSyO5ahG8NwspMgSgpJHc/RQ8ZiP7AaboF0N2/bm1YjFwAAIABJREFUhqIoEwFsOEcHw/T+jpVoqCep8cRonordQMFbMguL+1vYJb4pQFXVtG3DLGqMfw3Ocna/AZtMbkWeqO1KSlblgqyfYAbH8uaBbOio64quS6HTVVkxawRZuKC0DSv7CJLTTK2qKrq2o3YTsriiaB448+2LCMh04yBGqnCOdiX18MAyBIq2SbX3CD4u85yiPyNzGavtntUIK87zNKMwxmCiJO/PyGLG7O43hiy+mHHAJq6pe4Hy36GtwWz/geVtxn39D0zWU4IN2N4x2Z2RDSV5HDi/X9P5ZHKbTCYUhwapFKvygqzPyYNl2dymGUf+HAFZlhV1a9BuQWW3rA6PIyE+PTmL8WFQhxXaTzH7T5ztHp+bo3LN8ksyuRm5RA8Vk4c7ZsVX5jdpxuErj6w2LG8GTJiT9TlnTzseD49k2XOPQynFJGpMd44UgsXX31AiGdd22y0mN8QIMyfJ/DUmDCxvbpDl8wzqOOOYxposXFAMHZd3u1MEZD4KwGKEZXlFNhjK7Zbl7mtqro6zYiFTP6Nqa7Iwpd48sdpuyEw22uqTBma32VByjQj5KPX/Hbhjn3scI8hHggwBFQIlloBAohi8pXADwVsMHhUjGYHCWzInkN6iSAxOGSxZ8EkLETxVcMhg0eN4ZCGliuvokVGjvaX06UlZBAfekjsFIZDFxObIo6MIltwOBJ9q5yIkXJwSARUh944ypH0ByG0P3lKMWhQVA7kfKFIHiiJo8BaFJHcWOWotquDw3pK7AeFH3F90mCBRMaKipwwWgUgBzz7tF8FigkcSyWKg9BYZPcpbMilwIa2qZKT3mOCpo4fx3wF0sJRRj2OjyJylHJdxi+AQ3pE5MIz7QkzHLQPGCcR47H20mJD0HDIGdGypgkOHBuMzfBi/10/S2IRA7gYIHuktVfDEYJEEMj8gMWREyjFaInOgvEtu0ODIg0LFQBY9JZYiKGxIM7vcSYS3ZKO2REdL4TXGCaK3lHE4jaeW6boxwZOHPr3uB5x3GN9SRY8a9TfGDVTjdXVKq4+egjDqJ9L15IQjdz3WW3Kf+gdFkGk7MVAGiwoS5S3eB3I7pPOPG68JT+56wji2RUgc2Rgj2llk1BgCpU8oxdwN+GCRUWKUIIsBGdMxlcJiQuqFOO8o3IALDi38KaLkODP/c/79hXoc9rnH4SxeCvazFR+vLnEjj8M7Ny67Dqw6aL96tnnNh6vvkSOb4Rkd6Lg7SLr7gafpjJ+vq5SrMq66hBCTjuPe8fYpoQM/VG+BEY/X96dSZXPrWXaBm/M5H0vxjdw3GyG4u9uA6D2fr1fcTfKRSZG25axl4SLNjcf5wId3r3k8RkCOUmghBTJkdB+bhA58e/2MDrSjbDrPUesuIROLCR9effcsOX+BDvx+nSIgn8qKn6+SQ9N7/w068PHB0+88D/Mp//SqPi1lJwOVJzeG7acUAfn59QUfcj9O+c2JtGYi7D8NGA9fzl+iAx0CaJdN0nF8BoTmcP5v+Tn/iafzc7qyJBQRbx2ruqDdlRxk4MN3r8cISDuiA1ME5MpmdK5hM9F8uLh64Y59Rgde3He0j571ZMaHs3dkmRkReM8RkI8PnnYfOCz/JR8un9GBpwjICPvHgW4Pd+cLvrx9z2Zaj+jAQJsfyOpLDl8aSgS/vr3kg7Angt0zOjBy+JQiID+9+tenCMik4xj9VI2jvQ0cZOTj9SWxSKtAIYZTD2PSRLp7zzaf8vPbd6M7VnyLDuw03U3L42LFh+UxAjLl9RxzVf74tT+hAz/Mf0TrIzowjd3QtmzuI10XGQ5ibCr/ef/+YoFMxzud1hEVIpPtA9/vfvsGHVhVNYfmwNUYATnbb3m/vX/mcYwCr77vuMyvKbqaZbvlx8PhGR14/CFJxSpekg85V7c3vOtvQSTcX0IHpuXYebiiDAVXv36hiftkcmubNGMY0YFT+Y7SCV7//IlpKZ9NbiM3czZGQFpnef/z/8tsGGHHJ3Sg4vtiQdEsmQjL+3+8TejAqmLon9GBVwdByRXzw4H3m68nAdhRZtx3Hed+TiEuWGzv+GG3fza5vUAHrnhF7mvO9nf8tPMcxlhHcWyOliXz/oLCG15/+pUnm0qV8oWOI0MytVdUIuP1f/xAkfmTlwUh2FyvKbqIdj+kCMj7f8cPnzY0/D2zxwVhmkxuZ/tLyubvqEPP+3+6ow/uGR24P6R4zPKSohl1HOtPCR1o0k35iA68aHPKsGLZPPHu7i41RwcLxNOPdhUvKOKc+vH/5P2mOPE4nr57ZPnr2SkCsuinXP76hevwmeWXs9HkZtnUa364+WvquKRsC77/9QOuGUuVP9Vx2GukELz9x1+Y46knKb8kmdwSj6PkLUMY+H7/G+poq/c+NeCbA1dMKLlm1jT82D1+gw7s+x5i5Kp8TdGWnPmO93dfTuPx0uS26qYUccZ5+8i7L2tMbk7N0UmdSqi5fEPBBEP8/cCKT9ZuRnyeVFgZOZgJQUukUgyyx5mCLghaUeB7hRWGfVEnk5s0z5RzoelUjpeKXhmaSnGI6jmQKQYynTH0Gd5KGpW2I4QglCWHIE88DmsNQWg6XbEX4ExBP8blhbLCxwzrNE5CYyqaMqMdh8kagxUKFRTeKVwI7E3FXqbPx7LmENKN8ZAVeKnwStCUE/ZC4UyBFWnpjHJCYz3OKnql2ReTxBwd3bE2S6StfijwQWGznH2ebN5e+bQvx9wOZwhR0ak8jU14Jls7ZYhlxeAzfJActOGgJqfjbcZxNFFgg8ajafKKvYkp34ZU7/cl4C3BG7zMsHpJU07p9ZLOzPDaY7Wl03U632h2WckgIoPsUeWUgwcpFQdt8ErhspyDmiavitZ4lShWoprQeYkfFL0w7LMJvqywKjUQ+yxjQNNbQwgKp2v2RYFWWYp6LCP7fJL6X6TrpjMVbT4nKyb0ucYbT5dFmnKamB5SsdM5h7Ies2PVqTEs0DivkEJyyGr20uNNRVMkpokQgkKCtwovNAdTk1UVjWgIPuBNSRugDSXepbHZmopepAejL0s6kRFjpFFZGj9TcGCS/Dvj70RKSZEXDD7HO0Wvc/aqHgOZXLoeTElTBgaXET0nmNaf++8vpBx9oY+XEq8MLjPs5jJJzsfgZFckk1vjTBJ3qYrdIh9hxSkCEgG2tLSuwg/Ql5L1RNKbOq3ekOq7lNea412gn5TsVPq3zhj6rE5Q2RDonzLsIDlMFuzMBFeWdG1HJNKbHJEN2F2BJ3CYn7GuNDYfexzjk0F6sBuDF5L9PGcX0gU9mJzeJIz+QVX4JtCryGZ6xr4ccMVzIJMtClbB4fcGpyW7RZ4EYGNT+QiwbQ8K32o6NWG3mCFVmnForfEulRzdIcdFSV/OWU8Mna7QWTp+6yzW5AyDwkfoZmdsRQUx0htDn9enQCb7oLFBcqjP2B0DmcbG8KEomYhAHEqCynDFW54mZ9jqHa2riFXAZo4+TnDa4ITisMpPgUy+rOh0gue2coI/OLoMttPzZ1u9swSfxqb1ARc0Qz5lP8kZTH6acpvc0Hc9/cHg2iQA22WzJI7qOw5FSVwmkM/QKLzTNPWCw0QjFlNsMeALT1tMeOpXDB58pmgX52xtOaIDnwOZZBA4l5zJ+9kFexnxVUVjDvRZRgTyPuI2hgHFbnEBRY7NU4SjryrapqUdNG6XYTPJYVXTjqt1nTHYIpXLPVN852iMYVtdpNWSkTwnhaTVmtaDbzPaasauKun0UXLuCVVFk+2x+5LYBkT4HXlVjvEIIQSCtWT2QN5bzrcfxrR6dYqAPBwOLMwKwzWVfeJ8f0M2ruk/u2NbZuVbMjujah+5Hhr2++fskBCSd2MirsiGgunDlvP2C0Ikd+wxqi/6QKW+I48li+ZXzsPu5FyMEeq6wh06CvMTmRMsP33A1JqmOQBQFCV93zGNGUX2I/0wcPbpFjGiA5MuJZUTq3JF1p9TCsfl588U30RAeqbTGfM9GPWWwm853928cMcO43f1TOOSTL+i7m+5aDYjr/U5AjKEwES9xsQp9f4L10Ngt9uOY5NmL5O6prKXZD5nfnvPxTcRkPtTqVLE78ilYbH5J8IYAXn0SJRxQ3YISP6AHnLM03/g6ovivvx7po8zwjQwtD2T/RWmr8ldy1n3JVHO+57FYsF2m3Qoi+qSrF8wCZaLzQd8CKflZe8d0+mMWZuTxXOq5pGzh1uqP4mA7LqOWr7CyBXF7gPnDxkmy2j7jlxtmH1YIIWgLK/Ihimz9hPL7DPzT0v6OrljVb3m6mtLIc+TjuPLLeeHFAGZ+jsDQkimIsPEtyghWW3+kWzkcez3O4qi5BgBadQ7Cj9wvv/5hTs2lSpNc2AuZhj9lqLdc97djaWKOOmDYozMqjdk3YRZ7Ll4+HV0vD4vZRdFwbSfk4kF0/aO87v7b2Yck8mE/XZHkX2PkNMTi/R34VVRSiPli45uVPTTKY9ns6QcFQLrHM3Ir9gMmmEt6SaGx4vLZx7Hi1yVXV9g14GuKrm9zBj6I5P0mdp02CjcNrA7n7POLkHAPjN0fXficbQPiqEXbBd/xToPNMWo44hwMBmiH+jXOWYIbM7/BQ+VPhm9jDHYweI99A8Z1ngeX694HHkHh9HuLaRkQY794ul05P5yzsFbGpOnp2pI8Yf108Cw0XRZyeP5xTeh00cdx2EnsHtNO3vDw/m7lFbvPOpFBORhq7EHaM7fc3s+skqOsGKXnl7tV7AdbC5nPKq3RCL7UwSkxgTo7ySDF+xe/Q2PpULrF7b61Y5JFwhfcxwZ9vy/4av6I915gSiSjsMPjsN2gj3UDLLk8eqMjqQv6EfvjZSSdSiwN45DKXhYTp95HGPmTJMXvF073FbSliXr+RWHF6HT2Zgt3GwUtpEMi594XCzQOvE4Dhc7vJohI3Q7sI1iP/+JzZsrfDnF5gM+9xzyPV+LMXQ6KtbXM9ah+yZXJbFHYfgqkcDm7b9io6B9yeMARBcYHjW9CKzP/wvIU1M9hEA7Hvu2lwxP6Xw/XL068Th22bN9YOtK3F3ScTxMFvjgT7+TY67K4SFgD5L9tGBdv/kmV6UtCrqmpd9k2F4ihvz3EQF5/HsG+qT/ZV3D5OEhzThG5WhRFOiuo2KCdnOMPTC936KyI3M07V7fdZTyDGVzzP7APPOpOaoURyybVoq8n6Osotj1TOITkFSG+nAgN4YYAqZfob2h2j4ykR15npP1icdxVI5m9hJlI9XjI77PaI/r7cYwWEsdJNpeEp1lst4xuFHnMeaJSimpswna1pgQmK03iKH9BuRT1zXVNqDtksy2TO63SCVh7HHk442jGCq0n2PslonoTs3gEwEsBHK7QNmCfPvEXEv0yNgQJB5HVVSYboKyinJzYDJGQB6buUprDIKsX6LJKNdfmRyehVYgEGZHfnBIf4VyOfrwC/OnBdn0Z8rNDO9Srkq+W6FcjQ4D9cMmRUIMA7PpjP2ofqz1Am1zChWZPtwTYjitEh2Vo8VeouwEEw5M7OYbAtgRMJQPc5Svydp7Jk1DpjJ620GxZXK/SNb+OEXZknK7ptrcM31Y0BcdrvT4asP8SZPZAm0N9XrPxO7GhHd1mjnXUaGHJUoI6sdbvBhBTM0BY1KPo+5B23OyaKkf7tFVulmEMRdFty1lKNB2ReZ6Jvd79LhaV45MmBgjhVqhrKFsPdPhEe8ceVGQjfT8PM/JDznKVRT7HZNuR25y3EgAq8brPbPn6Fik+Ab+/xaASUX93/8P+KdH3C//D/7hNj0llT55IxDqnxHAiBFlB3K7Jo6liuh7Sl8RmwNGR2SsUa4j90/oTKOsRWcZY61CVpRIp9Cuody3hMNhDGR6TqvPokH6AtM15P1jmmL7Hrffp0AmH9CiTuvhzY487CjLCtGlaWLpelzTofQixVYeNtioie1zWr3se/KoUGqJtwPFfktxFID5AT/+OIoCpMtRwVHsnxi6Jl1sR6t1dGQtSDFB+ZbCrxE6LaEqa8nzAjn06BCRqkYPB4q4TU9A5zAmR41PtEzkyKjJ+j3lPuD3+9PYWGsp3YC2Gulz8vZAMQYylb5P4ziCfFSoUQLMsEmrKsYgx1LFzjdkjUeEFcILZH9HcVij+zuydkBqD+1A1kmUsyg/UOw3yOgRfU8hA3a3RUlFXmqkV6jBUrRrfHwuVZz3lNGStTkyFmjbkHdrStejTiCfHNl3aDKkyJHDjmLXp0jQoWNon8i3yQav8gzpM7J2h2keyLeR6DpUdHSsKfZnKFZIJ8mbHfmLtPrjjaMQGWqMgDTdEzmO0tf4/Z58TKs3g0SKOSoM5MMaE3pi0yQCWBgIzQHDFCln6NBR7J9g7B8VroLxGszLAukl2dBTuHVySrsK2rFUsQVZP0XGjMwdyOP6m1Kl8BP8foeSE6TUEP78ZQr8Z984JPl/9W/Qr98RtmuGf/h75C//F+V3PyEOe6SQrGw3vnkE1EpFb6bsc8nH8/MUASlFupOOysXloGgfIpus4JfLNPWy9tgcFdjBctdl9I+WdT3hH1/l30RA+pCCmf7rp5HHcXHGh/w1kMqLru+TNNiHkccR+bL6Ax8KTvhC4BQBuXtQKQLy8l9xVz+zEo59hYWDw73AGc/H715xH92J5zEMKRhaC0P7W8dWC/7j9TkHZ8cZx0CIkWKMgOzWgp2Z8MvFm0R4GU1ux+/6fhtpd4L1/Dt+uTSnG4cam6MQeXxK+SEP0x/5x8uklzhGQHrnyDPD061j2QZurlb8ou2JpHVku+YRdjeezAs+v/5XCR34ghPRLhumrcfeqqTjOPu3/JP+kafzM7qyIBYp1mG1LWj2NQdZ8/HNKzriyFBN3psjOrD91LKuFD+vzlKpMsZ++hAo8pyzx4HuCdZVzYfF2zE+Mx3vcb9OPI7l3/DL2Ryts0TEP2tY6/rE4+j2ktvVX/PlzTueqhqX2xOPQ5cX7O96CiSf3pzxIXSJEH8sVcSIDvziEcBv53/HkxIUZUHbHEuVyFXnae8FexH4eLmCMQLSj5jIruuYttCuBVtT88vrt3SDBUFaWh8J7j+5nO6242624Of5xTgexZjXI9A64w/3Rx7HhA/Td2idEYIfVbdpFrkdeRz8+UWjwH/ujSMEuv/1f8Kv73G//kf80z1mvqD9D/8+NdmEYvHuj4jv/u2JPKSip+j2TAfHu/0nwtj7sHYYm3MN12pBGS6YH7b8cLh/ASt+oeMw1+R90nH81DW0bYPWL3QcKuk4iiHn6v4r70cdR1EUNIcmNUdHHUcRCq4/f6HhT3QcI6x4Kt9TOnjz6ydmxQsdxwseRy2+Z3CWdx/vmdr2eeo/mty+KxaU7ZKpsPzw4fYUAdmPHMq6qrlqBEW8Yt4ceL//OsKKjxGQqRF74eeU4oLl7o4fDs86jsxko5gs6TgKX3PW3PFT6xOs2HwbAbkYRh3HzSfWL3QczUsex6jjePNr0nHkRx0Hgs3rNUULmf9h5HH8L/z4+UCXvYiAHHkcVfd39KHn/S939CdY8bOO4015SdFOWLiBHzafCIxiNGfxI5z3os0pwopV+8T7x7vnUoV4guis4gUFcyZP/zc/bIpTBOSTfeZxTEzScbz68oVr+WXUcbT4yvFUrfnx9g/UrCjbnO8+r7HNIzobvSruWcdRuaTj+O7DLyzwp+ZoioB81nHYMPDucIQV/3MeR8k1s7bhx+GRpu8QvDC5Meo4upLz0PHD439Kx2FYdTPKOOOif+T93eM/gxUfdRyKelxR+f97VSV4mn/3P/7JixHiMRvwGFHwn/io0tisfL5xSI3NK6yLOGkIvcQrjc1LMAYnNOG4HIvEaUO0iqAy+izHBoiZPqlQvZR4r4lW4rMcS5lQgVmOLSIqLyDEZG2OEqdzrAzYokoxhzHZm2NI/IUYIt4U9EZix4HXRYWNAhcVwUmiVNi8xI4xg9IU2JBARs4UhFbihWIwBRaBLiqcUITgGUyBs4LoFEFk6bjHm61TLn0XEm8NIUi8Tu9RSiU9g9Z4mZqj3ic7vFeG3ozRkJlJNw5p6U2exiZIvCmwMvFDZJbjQrJqSwQhKEJMehNnAiovsHFsUOuOzAhip4lSEfSEISsIeoLLJoTME7wjZBVBSqLQuKLCBocViiErsHkgKIU3yV7vpWJQJVGAMCnQ22tPn+V4Z9K5FAarK6TJsSNm4bhf3hmilwSVY/MKkRksAqs7bJ5gxUFkRJnOt8sqbF7ijMAZhzeWPisIThGlwucF1pfE44xDJa+Ki4oQxhUvU2KFT8dmPcKMwVdCEp3Co7CmTNdglCkXpahS1GnICU4SpE6vkZbfhTFYISFGQmYIUuKUZtDlmKtSYn1SR0et8S4jeIVTBqsqOPI4lEvvzS0hZISoIIo/e2MU/mLZse40E/DeEwQ0puRmcf0N5bwsCtqi49oZhqA5KMGXVZ2ERzZJf0Ew9D1PrmawgW0x5+bs7BQkJEililKK3S5jcIHHquRGJX5CPgYyGZMiIA9PhmEQPEzP+WJ8UoMW3WmZT3Q97a5ER8/X+Sse6uxEOc/znKHs6byg3xRY6bidF9yH5FXJRxeklJJalgyHQKcNt6uC3dBTFGOpEtLspFYD/c6w15KbZZEiIAHn/alUedpLhtawLxZ8WY0sE+dOJrcYI7u9YYiCTbnkZlV8EwHpnKPMCw4PggG4mxTciDJpD14EMuURWq8pg+R+csnNGAE5DANCQDtf0rcObysGldGUf+Bm+YZd5bCuIlYRqy1PoabXOa3QfFkUdASGIRka2zKVKq9FxbD3NGXBzTQ7raocS5WyLPlu7Rj2ml0uuZmUqcxzSTlqspx+6NnuM4ZW05ZXfMmnp+ZoO1/StRUKQdtKBq9Zzy54nNW0tsYVKQKyKQ7crq7pnwK9U9xOCm7K6hvKuZSSeRD0TiMFfJ1dsVEJodCYaYoWRRB7T/+U0wnF7fI1onx2x1ZVRZu3nA2KYWc4aMXn+YSuGq+rscSNwEOsGRrPriq5KXN88KffiRxNbrvHyNAqNvWCL+UEMwYyee8S2iGbst8VDFbhvPj9pNW/tNUrDdJHJs2W75tv0YFHHccrvaSMl8zclnft15OOQ+u0atJ3Hef5a4phyrJ74gfXjHkgCQd7zFJdxssUAbne831/k5qjZcl+v38uVWKKgLy6/8Qh7r/RcRwjICfqPYUTvLlN6MDuhHg76jg0pXyPtpbvbu6o7T+PgHxbLCmGFRNrefflhl3XfJNWX9cTXh0EhXjNrN3xrvmKUOnp7pw96TjOw5xCXrLY3/GuOzZH7cnLEkJM0Zdhwll7yw/OczjsxzIu+XzqsmI2lipX92ve2YfT8TajPD1DUrvXlMJwvf+FPPtWx7GJa/I2JnSgzZls/zfe38Kh+num63minHeW1f6Ssv8vqUPP959vTzqO+XzGbpd4HNflBUU/YxYSTjKMKyVHHUddTzhvc/JwxqJ74vvNV8oXPI7jDW/JJQULJrufefeUj6VKx0avWXxapVIlvyAfplzef+Eq/8Ti84tSpV7z/rahYkXRF7y5u6dvHp8jIEdJwERoKvcmSc4PPzM/6Tj26WEz6jhKvmMIA981H8nqgrbtCMGfmC9XYprOd9fw3t2fdBwJHdgRI1yW1xR9zYqO9+vPaVXshY4jz3OW3ZSCBWf9Pe94HCMgHda6UcexZaa+oxATdAy/D5MbMCZ2jXJXBDYv6TQ8LH78NldlrKE3PmfYGrpScb+YoDKNs9/yOHauxm4Eh0Lz9ULSdf0I+knfp5RkvzPYHWzmJfe6Rgi+mXHgA822wA6SzfQN99mxCdmfLki6nm5Xo4fIevE96zo7qSePOg7rBcO2wirH/auSx5BUf/vTjEMwFSX2q6DTBXdnxcjjeDY+HcqSemOxu4JWK+6Xk2RyI83YzFjz7w4a2+Y05Tn3q/OTjkO/4HE0+wLXSvbFK75emHGpOjVHnfMc8jzpVzrBepVzLxfEF54PrZLkvF8bhiB5Wn3PfS7GmV/iQBzO91SNxz9OcFlGP/tb7twPHOaeKMYIyN6x11OGTUmP4e68pBcRawe6ekI7Sxf/IzXWRtqq4n6S/YnJzXMoS948Bew+ozGKh8k0gZ5HjECWZUmvsc8Zuox+8h335fRZx7Ha44ZpCp1udYqjnL7m6WyCY8aQJ+Xoodhxx1v6J7Be83D2hoflctQhPUdA9kHQPxqkEDxO37NVkcNJx5FKQvqQjlsYHhY/jhGQadXrMOaiXA4auy9pVcbX8ym9ezGT7QcikSc/wfrIflJxVxb44E89ECkFWWY4rMG2mn11yX25PPE4vHMcypJu2tDuS0IzJiH+HtCBwOguFGnKJzwqBHSMVEOLP/Y4nKWUETm05AFUUOhoqWyLJnXNpU+lihoGTDTIqDDeUvZhXKpUz5JzKTFeoqKgCIFqaBGAISD6Nv03BLTXyKDIbU8Ve0oV6fouTd3xMAyoUKBipLAdZW9Rx1JFRPqhpwwSFfLE1bA9nR8VjSLtl5SCSitk0Cif9iXYgULGUf0YKCTkNqCiIQuesm9HAtjoaBWRoe8xLkeGjCwOVINHKpluqsGeKOeZV8iYkbuBsveIPhkAYZy94NG+REVF6S2la9MqED6No84wUaC8REZFYTsqARmeYegBge135C4iKZBRkvkt5dBgfHo9uIDyjtxrVAgoPLXrUKPkvNQS0adSpdQZMiqUC1R9QxCQ6WTaC95TyMTwVEGReUs1tBjhyZxLQVJ49NCP51uifEs1aLKQoYYOO2ypBp2iFXxxOt+5PVD1GUr2eOVwek/Zt6iQoaKg8pZyeE4IDCOuoQoSFVKpUg4dTgZKJRB9SxZHRsggUDFP2IehRUiPGmy6RrRA9i25M8hgyISjdgOq79OqSvQom8qwQhTIINAubccHTylBDUlyroMjcxkyyIQBGDqy6BJy0aXvEn1D5jME8mSt/3P//QXRgWPgsbUIOqRzmMNvJwHqfaiUAAAgAElEQVSYGHqKqsYfDphsheQKZbfk3S2ZMYixVAGg7ciqt8hhiurWlP5AHEuVo7dDaY0WV4ihINvuMe1nhICyrAgvShUt3iJjSbb+igk7iromNIfT1N21PTorEA6y7gtlKeFYqpQVtC0ZGqlzhLXk97eYIa3KVFVFbBqUlOTVCmnP0NZS3H9h6A4UVY3oEzqwmkzJDgIpM6TfkTc3o8kN7GApqgq6Dh0XSKWR/RP5sEEqhbQDxqTYhhAjWl4j4hTVPFAFR9jvycamnRyXQrW7RPoc8/RI3t+fUIexOZBlZtRxvEEJg959wWRpuVyMMYV5tkG3AWKBsA52v1A+nKMWP5M9zQg+ENsBtX+FtK+QviO/u4HgoO+p5nP8LqXV5/Ur5DAniwP5/tkdK63FO0c1mZB1JZJzVPdEtr0Zy7zhRC6LXYcSr5ByiWzuMI8bTGYIfYsp1+S3BwQCVb5CWtBPXzH1Z8zXPbHq8LVD12vKB4OS58ihIH+8w4xp9epYqqhEDpHhLUoIsv0nMhzFZILdbZPrWoCxCqlypO/Jmt/I6hLRtimeYjrF7/dkcoZSBtkfKPw9YcQylmUa5xgjpo5IO8E0LfnmN5xzFHWNP0rO8xzdz5FigR4eMeGBIs8TzMo6yskEt92itAQ5Oa22/Ln//iI9jiNBSWuN1hGippnO+XyxwimJPPotxnT3y17RPcJ+VvLp8g1KJ8OTlBKBYLADj52hf3Rsqwkfr/KT5Pw441BS8bSGYeu4vzjjs7lOJ9QkQ1RmUq7K7h66LnK3+iOf80j+QnJujEH0A4cHhRw8Xy/+lvs6xT4Cpx/rwkXae4Xzjk9vL1OuCqOOo+8RUlCQ0//Wc8jgt+sL9s4+56qE9L3mqadbS/am5tPF9Sg5H3UcJmewAz9uI/1Ospvn/Hb502j3dqfkM2Jg8yQZ9pGnacWHy5K+60c5ftLLFMawu/X0beDrqxWf9Ltxf81pHPMAh9tI7uHuzd+eIiCHIa0ptauGSevwt5pBaNqL/46P5q/YXqwYypJYRtzgeNqWdIcpraz59HrUcTjL0wsdx6tQ0H/q2NaK31ZnhNH67Z1PuoUi59WjpX+KbKuazycdx7Pk3A4DmydBfxA0y3/Bp5c6jvOGg0k6jsM20O8lj6sJX9+8Y1+POg4TaIoDv1avaO4GKiH4/PqMz7FLpYp4nsnOPbQ3KeTo9uxf86T/JAISsK2nu5c0subLxRLKHDum9qW0wI5lJ9L5zib8+vot3fG6GsvSGCN3tqD/2rOeLfhtdpn4JEVO36XrKtMZ/+Le0u9hPZvwefL+G8l5WSQdx34t6XsJQ55+g3/mv7+Qyc2fBDQ+BIieavfI9f7TKQJyGCMgm7blXC0owgWTw5bX+3t0phnG7BBipO06VnnScUzbDe+GjkNzQOujyS2Qac0iXGB6w+rrgdf2K8AYAZmaWPjAlNcUoeDi82c2cX/SZkQiVVnhmo5KvUsRkL9+ThGQzagcHcObZlFRincMduD64z2FbYmQUIj7fYqAzBfk3Yp6cLz5eMuubVI2yKgcnU6nKQKSK+rDnjf7O8QI3xmspRhXVZZhTi4umO3ueNPsvwmzsuO2ZuIVxtfMm6+86yK7/f50QbsR0TjtzlIE5M0jr+0TxEhZVTSjAtcgqN01pTBcfPwFOTZHhzGmcGe3mINH+R8wfU75+O/5/svATo/N0UmKgJzvLym6v6P0Pdc/3zIQ6E8RkDuUlFwW5+Td/0fdmzVLkpznmY977BG558nMs1dVb+huotEA2SIpAwmRNIqSRiPO3ZhmLufv6XbGRqaxoQlcjOKKtZsAeqnt7EvuGbu7z4VH5jkFYO7Iiz5mZVZVGZkZi58I/15/v/fp0NU1x8uzpq3eQzXO0Xa7xWDj4+sBnXTO4f3trslNmwcEZNeMCESXZPE5h/MA3/XIy5yVXtB50UMiSPwRQdFicHnFSF7Su+iTxw0CMplzcvMesekRZAGT83vSfI7nujiu+wgB6RLVBzhSMnn5wiIgY3utt87RQSkIOCbWJQcbO+PImhnHlt0zpEUgDmilG46KKVlZIIDoUZPbMNwnyBP6puR4erFj7Gy5u0EY0s1aBKZDv5hyeDN9cI5uG+LWaxJxRCBaoEqU8zVZVXnAIzT1lXFAGqQXol1pjU4IRBAitUYID0qJcFxEEFhfgXR24b3SAK4LlYOUHnga6SukawVAlN69jpRIz1qR7fTHRwYB0g9sOEhldRPh+EgRIoLQovuMAT9AKkA79uHvB+A5yMBmqIogQCIQxgElEdJB+gFCGvt+z7fHJCXC863YKSXCC5BaI/0AKYTdD89HegahJFK6CD/Y3TiklPZzhERUnl2Ldz2EH1jAjlMhmmVAYQxCuQgjkdIHzyCD0J4bbP4Frg/SQUiJ9HykDDHG2M8I7HkUSNAOIO1++tqexybOEDdHehqhJQiJdANwfYQbIN0A4yqkZz8fIRGOgwxCBNb6jefbc+U4u3NjpEQ4AcIYpOuiHQepVPO5HqKSCNdFuiE0PSHSGLt/CETtgpbgeMggQLi+Nd86GdIP7b5LOyaE6yG8wJ5X36A9B+EF4PlQ2TEp/QCp7fhD2pmxkFb3EdoBKZBuiKS22wa1vW5g9YRKgnSQzedKpTHb664UUvsI9TDO5dZg4fnIhrYmXK9p43DsuXHc5vfE2N8bz0dUrh1/joeUzblxHBsBEITIqm7GBDgNkOmf++dfvK2+NlAGMVkguRz33ixVmpTzceFQ3GnWfsDlZLxLOZfSQWAoq4pZ5lHqmmUr4vV+aC3nu+hAjSMdFlNDaSruB30uwj3gUanieQitWd9BkRvuBqdchDQIyGbVxLOlSnoncQvF7eStN0sVz9qIe7Uhv7UIyMvDIVOj2NLui9IuX4bGdp6mHpwfDH4lOjAIA8JZQTGFdRBxMR694ePYNrG9tTAUS1iFPhdj366qKIXrbKMDNcuZoFhr5u2Q15PYlioNBU/VitD3WV/VFKnidq/LRcN22ZUqDQIyvVKESnA7eIuryAb81JXlqmT9DUmqqK8cBC5Z9xPOxDusegGV+6hU8SOKWUwmIy4OhzblvK6YP+qOnSifsshZJS4Xwx4Kszue7dR8/75sSpWIy/4Ez/dt/gjGCqlVxXJmKDaQdZ5x0es9pJzvbUhFC2kgndeUSKaDJ9yNJqReEx0YKNJgw7m7T3adU2jJ1bjPBfs7H4dFQEo6CrIrhURwvfeOLVWadgm3iS+os5r8FjJpuJx0bB5HaVfQtpbxfibs9fZDLg4n5LW1gG2zSDCG+9KOt3nb5bzbb6IDH0pgz/VY3JZNqRJz0T54o1QJw5AizVhPBWqZf73a6r3G0ek4Dp7QBPmapKg4Xp6hHdEkdRfWRJOmTNw+oR7TXi84Wd0+MoDZGUdRWB9HULToZnOepunO5PTYct5nQlAEjG6uOCmuEcJ6LzabzS6Po2MOCU3I5PyC9a5UyX7Vx1HB/stzWpEky95E9XUaBGRZVRy/uCVpLOePfRxHYY8oG5DkNU/yK1aF9XFYfob1cYw2gpAD2ps1p8ubHVelriuCIKIsCwaqSyhHdJa3nK5Wb/g4tt2iPSaEusVgfcOztH4jq2TbMdlpogP3L2c7y3kYRjvrvo+kpQ6JhMf+i+f4nn7k44DF4dz6ONRb+EVAfP99np6nrOUP6Ex7jeW8ZLCaEGbfJlY5p8XNzsfR6XRYN1yVg3BEkHXo1iUns7PGcm6RlnVtLdp7aUBoBvQ2c47vbndZJjRaUlEU9MyIkB7J7Geczi2tPi8zFuWMXsNVSYI9gqLN6OKSCRc7y7mNDpzz5Po9YjMgzEKOzu4ps1/j48AlbhCQh6sXtH/JxwGN5VycUKqC49Vr3DhsGDoPPo6xaNvrnaac5vdkTf/Jg4/DMA4PCbKEgc45vbt4MHU1pYrv+/SLDqHpMszuObl+08eRJAmb1YpOg4Dcxnd+Ldrq7fq33j1BLLYv4j4av+HjiOOYNNiwMLFlh7gJd225M4BtmZdFWbKiQ6VcUq/DbTchDwprABNi11OQFi1qJVgnPe5iG/rmBz653yJoMkezTURVucyjPndO8oYBLAgC8EuKIsTFME/2mEYOZdh0MTYGsFpJiiygEg7T7oh7VezwCLlvn6o9v0VZeuTS4bY7Yl0WRHFEuV3bjyISoalyn9xJuEvGtslNNIJmYwBb5wFV5ZO6be66Mc4uAezBObopWlSFzyrsctORZF57Z46rKotHyJYxVSlZtgfcaW8XmFwEdjbmG0G+Com0wyza4y7YGq3skuE6iWg5oFYJteORh8+47YxI47egbGESTe3WbEyXauZTuIL73oTcKMqyJE8SMi9BSoeF16UqJBvf4S4co9kya0qU0qRRyJGQVLnPxm1zH0oLna5sGn3Q8GA2eUJVeWTBHne9ZBfks05i6n4XiSCvIyrlswwHLNoSlXUoowIdKtZRh9v2iCLzKSuPeXePu9CG+Fhx1M5kSyMplrY8moYjllKTxQlrL9khIEUJVeZTOIL7ZIwIA8qoRCtNliSkfsqo9ilzn9yBad8lfYPXY81tK7dHVcE6cLjzxiitrG4RpDvn6HrlUZU+q6DLnW8DjJSyJLc8abF2E7IioVI+dbXFlfzz/vyL3Di20GnHcRBSQxMJ4DgOorlxbA/GkQ5S23AfRzZLtdjazHVdDODIGmHETjfxXI/KqdmBrR07rRYl0LTyO9KiFey2JVIIjLBYSiEFjnSaGY3d1gCe66IdBcJKJ5bVaa3QD8fmILf7go0OcIRs+KcuVdXUlKZ5TTq4jovj1A/6hbDfJWW16z9ypINwrf6CNs1xbfUg+z5HGqD5TNe1OafGdnCKBvZt8zLLR+dG7poBEU1PjbTH7bketVM1x9Ic0/bcNGXx1pNjyzgLEKKJh3RdG4gspaCxGoG9BPZ6bffbkXiuSykbHKGx2aluc91UkxkhpTX82bBre6xbncx1XNAGbcwb+7V93dbxdjbruZ4dV801FEIgm3HnNKUystkHz0XmdhujNa50cKVj09jq5po1PSWyuZ6yQU/Ya+vYc6bMbuw7joPjefYByvb6buHPD01nu7HQbIuxrGWBsxvT2+5W64kSzbiRu/G5HQugdhEWrmPHvhCiGRtfA42DR9DpbaKTMIagyOjkZw0C0tnR6tfrNYk3wDETvHpJt7CW8x2tHmzMYGhwyhZhMaet17iPaPUWpeAQygPcKqSdrumkF7tpoJNuiBogU2AOcUxEnF/TMWuSVot0YxGOYRSisxLf83FraM2u0Rn4TYfotjW8bVw8J8BUFb3ZLarYIiAj3CxDOpJuNMAtBzhUdKpLRJE9AjI1CMhU4kqPUK/pFFcPTW51TRxHZFlObHq40sUvZnSrlc0cLasdpNkYQygPcHSLKLunYyob5OJZwtiWVh/UFgHZXc/o5re7UsV71B3r60Nc4ZOsLik8tVtyFAK0MyMqBFL7OFWAu/6Szm2PsPsl8aJjc1S3CMhyjKcKerOrHZCpk3WQTanSTfZxyjaeLmgvX6F5iCxQqibeJERFhGv2CIsFndU1URRSlg2HpNmvUEyst2JzRXcWEPgNAjKc0rkZ2l+0YIxTtomKG5L4gs5NQ6uPa1Qyo33r4oo93DKkv7rnfn1nx5UUaGUNYG3h4SlbqrQ2Fxgq2m2LgNyWKknt4EofVxW0szPcKCQo8gbI1GG9XpGIDq70CfSGvrl/g1YfNAjITnKMW8UE64x2fb6z4D+m1YdlF4ceUTmlY+4JmpTzqqppty2QKXCf4AhA11+PsGLEmzMOXEnh2jyOi/HQhhU34qjlRTyIoxs/5nx8bMVRVVvxs8lzmGYe5X3NMmlzdhBSbMVRsE9d6TCfGopFxe1owEV0iMBmbGzFUbRmtRNH3+cifHOauPNx3AmcQnMz6b0hjlr+RW19HLeCSinOjydMqa3ztKm9pRQExiM/K8k8wfnBhPVWHK3rnY8jaMTRld/ifHL4pjja4A/eWmjypWTdDzkb25uB0ltx1JYqi504mjTiaP4GAjL0fVZXNYNUcbnf59x/Yq3bj8RR38DmShEowe3xR1YcdaxIbcXRhqty5SCESz76A86Cd1iOhtbHEWrqSjFbRuTrFplscXY4sZbzumbRiKNCSsa1T3lRsEp6XAzHKCzCUyv9a8TRFpe9E7zAR9X2PG9F20UjjqbDDzkfvSmOZtEjcXQjmQ463B4/YdNuvSmOJlYczYXN47jkaTNT3oqjgo4Sj8TRj1m4cN+0S7gNhuJBHG1xNRliHomjQSNu9nbiaMKrw2OK2npkvEc+juvCp7gpmHf7nHf3rTjq2zG4nW0/iKNtLjrP8FwLxNJKMQ1CiixjNRXoZY4wXxPn6OMZh9YKaoVfb4grxXhz/gCd3iIg12sGTg+/HhJvVkzSKV6z2rJdNSmLgp6/j5fHtIol+0Vqeyy2CMhG4+gY6+MYTu+ZFFfAQ3dsGNq2+qQe4euA/sU1E7F5AzodBCEmL4nlKX5lGL6+wg3Fjh27g04bh8AcI+uayfkUr8ysjTyMdian/bBPkHUI84pJeUdcZiRxQl7kaGU7JvupxDdjkjxlkt7+0owjJsszOnUHnyHx+o79NN0hID3P3WkcbTPGr2M66R0HmWpA0lbtL6uSOAhJyj382md8u2JS3O9WdvI8x2+a3KJyTIDH4NUrjKffREDuz4gLgVM9wSsDgunfMDkvWLif0prZsOIqr+iu9vCz3yDUBQevp+S6oigsYDxNN0jHYRyN8fKYpC4ZLy4xYhuCZJGJcRzTywJ83aeVLRjP7h66Yw3WUJVldPQevukQzr9gfxnuoNOLckr/zIqjkTfEKxJ6l9cM5DXdqz5lXFBHNctkzuTqLULTJ8gD9q8XrDf3u9Juh4DEISwmSCHYe/mKQDSoxdUS3w8wGIa1Q2COCFXJKD1Hhg/Hs0VADkjwzYQkzzhSiwcE5JYdi2EUHeLnAW2dM5le7/I81o+g0+3c+ji6xZTJ3RzP83eW83a7zXKxIBGHSGPjE742Mw4Quz8CEMaWKxINWiDB9jNobf0NUjdvNfbf29eaWlk25Y4wv7qNEALZYBLFtsY2dhuEsOg+bbGFGI3A2PrQaPtHW8wfxv6fMcp+124bYV/HoiylUVbjeGN/7TKh/Txta2vTHJPBvqfZTjaGOGl0czz2/Eit7aoKovmO5hwYbfULY5r/336ebNb+DaIRkcT2mIxCasce//YzjD0/2+M2zedvr4HTnDcebbM9HsT2Ggp7jo1BmBrHaIRRj/7UdrvH57g5Z07zd0eIX9ofu1S4PWbTXJPdmGmupWP0Tmjf7vN2f8XuexpU4/bfQjT7yu67HP1wzbc4y+0223ElG9wjWiHFVuNoNIxfOje7saPtNtuxtx1bZnvtjWKrBO220fqNsWj3o9F7sGhQ+/5mv6E5N8338IAiZTe+7B/xSCP6WuARgDdEKyEEGsmm3eVi0pQqu9zMbakiKW416yDmfHL8QKt/lHI+zVyKu4plq8Xrg+gR6Q1rspEO86mmXFTc7g05j/YfSpUGASmUZnWrbakyfI/zaNvxWmKwf5d5yfoWZKm4nnzAXSvYxed5TfmwqQzZjQ0CPj+dNJZzG2ZclFaIDYxH8Ton9QTnRxPW9aNSpcn+CGc5+T2sguSNUuUxAvLZQlMsYNUPOZsEu+XnbX6FLVWgXGnmnZYtVR7pQ0opQs9ndVlSpJrLyYBz/+ShVGnOY6Ahvayt5Xz4IZeR+yatvp+SpzX1pQThku19jzP/bRZ7fYowfihVopB8mZBKzeujh1IlflSqjGqbm7FKXC72Rmis+Ke0RjdMmYP7gmKmWSQtLvrHjY+j3onYVVUxnxnKNWT99zlrSpWqKsn2UtLQWs7TWWUt58M2t0enbJLEBt34ijRIOY8mZNcZOYLzwyEXnP6aUsVGB0rgavwRC+dRlkmT7aoyRX5jSKXmcr8pVRpgVthA1PsZFM31fnl4TFlbzcZrPDsYw3XhUdQF816f894+qilVdFUTIBni074paC9L1sMW572nVtRvfBxB2JQqd1AUoHIXIb4GvSr2x97ttk8IaTSt5T3Hi9eYXalSksQJ6yaPI9Rj2qsFJ4vbHQhoW6cXec5eeERQtOilc542CMhtk1u9RUCKCUEZMr654iS/RGCFp02aEoUhRhs65oBQh4w3F6xYkcR2Cm2abXVW0HbfIqzh4PkZSSh2maSPxdFYPqWsK06e35I0XJXH1uCTqE+YDkhExWlm8zjiJKHI8504Ok6lzWfYrDhdXNsbhxDU24zOImfY5HF0Fjc8WayQjkNVlo/qYk1PHBCoFoPVNU9XNWkTHWiXY0viMKZTjQmUz+HFnFnT5Lb1cXi+31jObR7HZPEVnqt2wUQCmB/OiHJsHkcREN/+GU/OFmzEj2lPuzsE5GA1Jko/JtYFT/IbclNbH0e7zXrTRAfGE8KsTbcqOZm+fliO3ZYqScJeHto8js2c45sbojCk3HaQBiFZnlnfDl3i6aeczgN8r6HVZ1P6r/aQQCsYE5Rt9l5fMNEX9C6HFHFGHdcskhmnV+8RiwFhGnF89oJic4/nursbh3QkLbwHH8cXz2nTRPStlgR+4+OoXSJxQqFLjpavcKOAvEFAttptNuu19XGIQ9ppyrPsnrRoxNFtdKAx7CfHhFnEQOWcXJ/bG38v5sQ/Jbm/5RkJ75qExHgMri84ub4naIJ8qrqm3UQHbvM4HF1/fdrq7RSJxr1oUK5P6Ths4pFFQEprAKuCkMJPSE2Mynwqr8W6xY6rYpccrQEso4XWHoXbYtNPSIPMBv0YK466rkeeJRZzGCasw5F9OkcRm2BD5fsYpanyGFW7ZGGftYyogpAySGxyWRShg5yyCPAxbOIBm5a/q/MLz6cKK0v2yi3JbdUesFb2/brxpUgpWToJqvRRjmvpX0VGFQRUoc3QMEmLTFaowqMQEevWuAnysQawsnkK5XmIqj0qt8OqHTZNcKqZvdgnWlEkqNIjjzps+i4bf7MLcq7r2iIgFxGqlKyiFqtIAgYVRaRpiuNYPEK1Di0CMhqyDiB3XarQLteW3RicGr2JLJkvOmLdn5CHR7hJGx0qKlGR131qz6c2gkV7QNnkcch2h41v6/SV00blPlXksfEnqCZsRimN1gqTtMgXoHKfwm2xDuy+bleRctejCkuKPEHVPiocsurGeK5LEbUpuzHrXgcJVCpBaZ887JO2DW7WpQgLVFSTRRGb3hiV+ijPZRl1WHsOnmfxCNsub2Mc6rWPIySb1h5roVFRSOqEDwjI3FBnPgrJJh7hJtEuyKcOIwovJqsDVOFTCsOiPSAP7fJ23fiDjDGsRYwqPMrYZeNMqFXN3f6K5e09cSxIXeiuFF0dUEYd1r6kCgLq2nbBqigkdyLKIsZUdsb+tSlVjNFoLexAMAYtJdoRZF7QrKoIak9AEJEqQ6F9G/gjHTIvxPU8Sh5KkVJDZTyUkFSOy1pC4ek3nKOyyWnUAmovICMEQEmPzA1QXohwNFUpUQgK6ZF5QBCRaztH0o7tg1G1HcSFF7BxXArX1qZhEFIgCZRACYmSksILyaT1jhjpkXu2V6V0Q5QQVAhSxyfzDAQRJXY5FulSuAJdSpTjkXlB4zMR1EiMH1FQUFYeqpaU0iHzw515rnJcFJZZW9UuWkgqx2MtXXI3eMAjiBojPWrpoIWg9iMy02SVSo/CC5sbtLCsWy0oXJ+0IbIXNAhISnA9jHDRwqGWLVLpUTttSjfBeNrmi3oxWjRZq2GAW91SeAF5ramNBC1Qje+jVoZSg8aWP7WpUEayQVA6DloKKscl90K041M3jF+7X5Kq8tBKUEmf3AtRnkduBCkl0guQYPNChcR3apI8pZ0b6o5L6sZUrmLjuNRC2rEVRGSiptrmcXjWd+Jrm49qEORuQCY1wo/IKo1yrQEscQ1KSmojydwAIT1Kzy4QiCAiU4YCH1UKlONQBDE5FuitHI/StXqNkgFKGAos51dLhyyq+TgQdNKA48Klj53llNIl80Jqx0MLTS0cZBCTloq6djEVXyNxFGuS2mocjlB4VUGoKkb52a9EB6bphoHbx9cTknrJuLzd0ep30Ok8pxMc4lctWuWcAx5SzsE64xzHpWUmeFVAd7lm/Cg6cLNZ75yjiTnENxH9xS1js3oDv7e1nEeOj1/DcHqJnz2knG8t523jEEqbHzGa3uKUKWB2FnrHkewFffxqQCRqJtMr4oarssM2thL6a4knXOJixbjcppxbt+f2u7q6hy8dWuWciVo+LGU/gk63xT6+btHO7zmgSTnftntXFUkUE5cjfOXTm8+YbFPOmxmH57kWAVkfEgifQXqF8GoC16Ns4u0WrrWcC57gFS7D9d/yr14tQP+M0W2HvF2j8oq3N/t089/DJ+V79/+dHxz8mE4W8p2fuih/TJS3OR48Ya/9DUR+z3+8+YE1mDUxAve9W9J+i4/qD+h4J4yqW34rPScRlh076/t4skNdV4ydQ2J3yGB1xvvXIDyPO6FZRAt6N0OQDpE/wq/ahMU9Hn/OfHTJZObQkgcoWvzW82f0+2/TqiLe/+zntOs5m27MIhzYqAXPJ9b23Egh2MvOCZvu2F+ODgzwCXXBuDxrgEwZSummO3ZDnza+OCQuU8Z3dzt27K5D2xg6kcKvEjpZwf7qnFop0sGUtP0Om9sZ0o05yWBMi856xnh911jOlUVAZi3WqxWJPEaK1iNz3D/vz79oWLExVuzSQpC2+1zu9d4QR4MgsAiAwiGfCtZeyMVo/wEB6TyIo7Pcp5wqlnHC64n/gE8QDwjIxUxQLhX3e30ugglC2AufFw9Nbqt7QZHDXf9tLkKzW2PfiaNFyebexSkVN6P3uXvEVfEbkts2j6PyFRfHQ6amSaYKHvs4Aorz0ja57Q/Y1BV+YJvcto1P3rygmEnb5LY3sd20TWCI0NkAACAASURBVGOa5/vUVcWzJRRryarjczZ+apeft+Lo1scxlxRrw6L1hNfjyCIgG32obnwc62tFkRluJz3O3eOGA/NwHn0D6bUh1IJs8IR1viLWCqkcWktNpcbEvodbD1Cx4f7Zh/woh+XwE2LZoYwNpjYUq4T6ukUmIi76f8Ts6bdYM2X69IC6Uuzd9njPbTNIQy6GHf7q3Qk0LtR71+Fy/4aTu1ukTji4jimdDrdehjttI5RheZTx9DJAA4lpkrsY0RJr1rEg7QuECEj3Y4rokGrhoXBYtN/i8rDH+fgl/VmFqDWDlUt52aXyAirH4W4Y8tl4wt2wRzgdo0RAREyrNmTXxvo4hhYBGTRL1Z7r2ST+TJHfOWQy5nLUhTCg3IqjTS9KLxcUM8nGizk72KfYiqOevdYGw30ZUt6WzDtdzjtDalFixpc46THHR20Gm5KWrtCVYD485rLTICCVRmll2x6yjPXMoSgEVSa+HpZzq224DysrjoPUhjBdM7q+Re96VcpGnMvoizZ+2SMuNoz1YpeFsENAFgUduYdXBrTqDfuyeiPJe7feXvbwSpfuYs5YTwGaGcfGOvy0Ji6G+MqnP71nLLPGq/Awo9BZQaT28SoY3N7hbpzd61t3Y0c7BPUEUVWMbpa4Ta/KY3F06LXxyxahUoxvZ6yLnDAMd9GBcZzQWxn8ekBcpYzU4o0ZR9CwRztlgq96JMWcsc52zVc7BKQxtOq+hW3PZ+wL8caMo65r4jAiTtt4lUt/umGsl29wYFzXwzOCKBvgOpJO+TO+6PwdUTXmqnXFH71ocXSfERERHP8+aWy47vwPgpFHVESExTsIT6PLEidtks90QTu/Rp78gOngnm//8AO+3CvpXY3pxRMcZ0wrz5ncfIlpgnxGxhDk5/zO5xH+kcs6johvrnn3/jmtso0WhlenVyhd8cWTGZ+8+mOC4l1aq9eMnl/x2QfXXB/d8smPIvwq5PAi4L3o9xl6Y/79Zz+k8/Ir/uKTFalrGM9KskBy8HKA+ujf0Np0yFv/wCd/vea//K8lT5//KWxChJC0cQly60Qd3lzhC7XLMvF9f5fH4ZcjQlOxd337qMlN78ZFT0f49ZCoyhlfr8lL20AYPBJHu54d5+1NzTi7Iw023O1dky1uSe8nXDsxaxWyr0PaiymjdLlLOd/6f9L1hkiN8E2IJ5pohX/mn3+hGYdii3/UjdeAukYouyogHYkoCrvenKYWfWjaUBeIzcrmQFQl0rWULPIcEbRAuVDnOFmG2GxsdgEgtEZ6LkLHoASizBHFsslvUIjNGqFKUBpBB2EcRJ4izAqpa2SD33NMjUlzcPZsj0C2xhEuokFASlUhigKBC3IIqkZkG0SV2l4ctP0u6eCEDkKHCFMj0zUiT5G6QpQlRmscASIHIbqgS4S250YIEFVlv6ssmhwIBWWOx9L2XtQKL/CheaI5IkJoD1mm+KmmSjecSkG9eoVTFDhA2PsOYT2gk17R31zb8iCJkFWKbg9tzolqI4TLfV2x6QacpxJ//Q7/cJSg92rcZc2JaxvxNCXnByGteQhzg/YNlatoZYLCdVgrySvX53XbZxnG/PTjEH3pc93rMo7a6MqhjhyqtxOMBJpuX7fX5vVkwsjJca4dFicdLp++i+t7aKXI3q45/+YcaUpmrkFdV4T7EjfocNT36B1MKQtLD7weD5mlHaI85MX+mOtnKfJEsJcFrI9yHOlwPv2A02lE7cbM+y1ujxNS5+d0Z1+x5BBH+0g8UF3b51SuEZZ4Y+mFtQ3yEZVE0AddIeoVUtSINENo1Wy7QQiDEH0wJTJd2esLOLq2EY3GIEM7zmVVIOoVQm0wdcGz6pDJKueZY+hpK25T5ohyiVQhpq7tuEEjNiuE0wFhw5G0p78ebfVb0dIG2ngUTps0kJyPhg/iaAPTLfKcUSHJ7w0rL+JscvRrafX3mUVALpIWL/bD3XKt4KFUmc+gXFTcj4achQc268D3KfIHWv3q1pDlhpvhu5wFloVSNhStbR7H5s7BKRXX4w9tqVJVO59GWZb0a8jubMlwcTzmvokOfLCc23o3P8tZu4LXhyPWdUnQ0Oqt5TzEm+XkM2GjA8eHmMYA9hgq/WyhKVaCWd/l5XiPVh7sWLmqbmj1K5c6hTQ+5XrPWuyXjqToHCHK5yRVzTvLiL2ZR2flMQoGICUvT0rORwGxGjG+jhGbGCMEpvWUwJlQJ5qolIjIoXYMQQyiHCAMxPp/IvdcKj8kb7ehJVl7mnu/T7Zpk4qEq8mQtNejjlJu6gl4gmrYZ6wDssuUe7/HT+IJWtjGttqtmftTrp093q9vyI3HjT/kB0mM5/koVaPuv0U2uiK8NryKE07jDp923qZOBWmhWd9+wI96Dl7WY+J2+Kbn0qkcvop+g0/9E16xhJYiqDTGCMb+Uz5OBFNCXp7+Ma8PYdH7Jn//7bdxNyGhCukqQXapkEJwOfyIxa+JDiwzRX4HqdBcTAaN5bzhBEcRRZ7Ty7EluR/z+vCYotr6OLzGxwG3VUBxnTPt9jjrjCj8ks1gxV/7LmP/hBfKp31bMNho5sMTznoneK73Rh5HnqasZhK9KnCM+/Wg1duw4mp3c9BlTcCKJK84mr2ylnPHRgcmifVxjL0+odmntVpwvLjembYei6PD6IigbNPdzDldrxt04aOwYsehJw7wy4C9m0uOMuvjiKKI9WbT+Dg0bY4ITcTo1RlH5k0fRxRFqDSn5b9NUMHk+WviSJI3eRxbH0cHl8h5RllVHD2/IWzCirfTV8dxOIwGBNmAhIrj9PJXfBytVovhRhDKI9rrFSezJqwYG3wThTFFkTM0PUJnQrJ5RSBeM5gfUlXlgzhqDFHT5BaurxhklqvieT7p+J7S+YyjdQ88H42LyG7x06ntlP3gJZf7n/Fv/vYdPvrZ2+z1fpMgCnn2+f9N8jolyQ2D2ZL3zjWvjws6RUz8wZ/iVw6t6X8hQnFy0eX0JyFm7FK87TH2n9I1v4er1/znl3/Df9+74MxNGV+OaJdtTuf7vKv7DNIJLKf84fSHFLHgMI1Ja8XlwYKDu4jivTah+ICj7I4/fHlB75VCa4P2DP/4yS1cSMKT9wnzd5Hp3+K+rKFd0ItzCj/j/a983v+sx+GTj+ixx3e+/Amr2U9Int5yO0rRjmEROfzOX/4m/aPfJozbHLz4r3jLW7S8ZnJ9wPDzY+i8T6sKiNQRjpQczL8k4QG1GIR29W5YOYTOE2JVcLh4uStVrGW8zWazZiTaBM4xrc2G0/TONrk1mTFFI46OW8cEWUK/zji+PicNN1y2fsYfv/5Dwotr3nZ7HFcx0vh0r885um7E0bp+w8fRdk+RooVS9dcnrNh13abt2sV1DEILdBBRRyOUtDQyVVdUUYwKEmqToDMP48bUrTH4HnVZYrbux7JE0cZoH+21KHshKioQrs2c0FrZ5dEyxhgHFXdQkRWEyiBABQlVYKMDVRqhaw8V9lFOTBVF1GFit/UDCEt0afsPVDykjBzqyKrfVRhSFwW1lpjcRuRV3SGqbmEwzXe10FJSeS1MZZfTqs4eqirs+8sSX5Xkexnlc1B+ymSe8ruLa5zGyp76hk2vz8aJGGI9FgM3xGmNqMWeTVhzH3pVVJlgCh8ddil7AhXECNej6PjchJJ6OOT9aUzlJ7z8xjf5tF5jjOH8pI060sy/NeJmtI86j6ikQ7Qe0SuXdMoBWf+GHw8KPnt7zXd/2mEYhAjjkiUHOD1D4o1Jgj63B1NEF77xwiMOa8pVytFfnLE+zfnZsYZ4w+QXHoOzGX4rxE0kWezwfO+aL08N/+4vnvCy+w2WyZK9a8WizimVw117w3SVUU+eggGlS+KixTpcg0iAgNwfELdqgqQicDaUUcLr4xG6GjMKB7SqmIuTDvdJgJYDoMXNXkDtCJ4/e5+3vDaRgb1FxOsnIMUetR8RugHrzoSykui1b1e0kj2U1FRxjPIi6iaPo64EOvPRrqCORugooG4MbVWSUAcxSoWYwsPImKo3oi7y3birY4vYqN02pnSoQ0HljajDhGn/hvl9gk5KjK4YKcXQCEzYRgWS6lEeRxknKDdClwlG+UjhfT3Cimk0Dq1FQ+ayCMjC9Zm3B28E+WSBNausa5+6dCncmFk72AGZZHPjqMqSTRVT54YsTJi3XXK/eLSqYnCkJFt61IVmFQTMPPv09oOA3Mts4IrWFLVPjWAVd5n5ijQIKN14h0QkLygWAb7WLFs95om1xQO2m9evMArK2qdGMk98Zg2tPgi3QT6ChQipl4bK9Zi3vR2QSVGT9r5gMJ9y4HfQUrJODD/eU7z7wsevBP/jY4i1YHLrIWsfEFSJRxBphnOFqEEqjV2eF7QVBAY6ouTp2R233YJkYdDLmkHPkLAhoUNY1OzfXyCqFQZQh5JfnB6zvIlZv8xhbRCBpHAOyWSfuDas2x63/YKD5x7znsGIhDQG5b/LbaVxli2ymw51dYAyFT+atvnmLGYVePy/f/TH/P2HX3HXKXi95zNpddDvDRH5kFOdsI4LPn3nXZ4fFbj3hxzMYxbK8P2P2nyYSbSIWbhP+LT1Dp1Jn7pSOCJH7aUsphtWSZdi2WITHfGjd/uUYUneWqP0goO6x4snQ76zCslznx+dHPP5/pjkNuI+OmcZ3aOE5stnH/CvbyGUHnn3TxhdP+dyklIM3uL5W218t0VVKqrCRQPL9oCFNORhRCbDnUPXzzV15VEJyaI9gCjcLb0XYUjuRqwKh7r2yF3BNAkp/LJJ4reiO8aw0gm1o8jCgHnskPsJpX/KLyZXfHJ5yInbJpEOWks2YYtZK7RBPlqhakUeReQyIF8G1JWDUnw9EJA8Cit2HAfpGKSCOF2yn77erao89nEM3T6BnpCkC/bTX+/j6AeH+GWLdj7nsPplH4ddVemYCX4ZMJiv2c8f+zgeVlVa5pDARAxvLjhgtYtl23JGVJYTO8/waxhdnhFG/38+jqdUVcX+1a3lqmAapKX1cUzCPn4xICprDi62CMiIXKW88D+lO/XJVxv69R5z55LW9G9onQd0Ny7P/+M53/msTeu8zensY9qTb9LKfk5X/CPf/sdD7pOS/VVFGoC39jgcfEQ0OCKp/xJH/ARHaMJSovMaLzEcTQe02r9PVBzz8c9/QH37nNyrmB5mtN+aM148pXP3ISqsEUoyyl7x6egKUXZYSyireyY/l4ixxI9OyUNFa/ZXzMY5SXFIbzamVJqSimC6j19MCNMc1OfI1d8hkyWzKMCd/h6Z0yaPNWWucDcw+uI1rwZf8O7zb/D+Vxe82L9mpDXe3gAn+C0G86/4X/7iCl/YOv7syYz7+Q3dykc8/Zg4/4Sw+kd+72+XKK8kcgv+229/yfs/DKjMPkPv39E2xxy8OOdFfEX3ps9d/Bm6/wIjNaPLfcJiDydM8IoLpuaacv45rVlJ72qApzxaeESNj2N0/pxI2IyM1Wr1Sz6OU+vjSF/h/Rofx7DxcSR5ymF93yAgIYpC8tyuqgyjQ/wiprssOJies4k23Dz5AR9dfUKez7hgw1M1wDExvdk1+7MHH0ddVyTJg4/DbxCQXxsfx7Yxqq5rKq0p/JCNF3LWefbGjGMrMO2pgHwVsAwEZ70Wju9SlVXDBoGyKLlXLYolzIMhr/bGO1gyNOKo4zBf+xRrw10n4qwX2/oxCEmz1PYUaM1yGTIoJTetA157ozeWY4MwgKxgs06Qleayc8K05VHkRfO6FVJ7SpCtYipZc74Xcaft08K2e9vowMCJKWrYOIaz4RMLnQ4C/PyCtfcxn781oS1iZquIiyjhR4OE2w8173+5Zjm555+ky3qYcDA9pVt0yNrvstoPeP1ezPc/vmR0WTMfGY6vXbqbDr00oux+xGfvDlhFFS8nmuOf+PiBizqSvH15wqrd5qff/JhLdcgPPpzzDx/XuFnEi3FM+3xIJkJcPL5ov4MOnvH5ezaZapkI1t/tojuK9zY9tFOS+d9DBZKrgxGF2oPYUJka0UuYv+xzj+JvD7/HbLhHFS5ZuR4/e/pbePhEosW3bg2rKOb1wb8ljd/mp7/xm/x84iP1homSHCUr5LLPXdfjz/7DRyRly3YCtxTL1i8Yr302iU8WtKmj93j53hLluOhxTvb2N/h+pBmf9/lkdUA377CO3mPZGlKPPSIt6PvvYnzB/P13yb40BMLntveEW9kmbQ24NU9YFwmOduhqSdogIC9aT1jIxuyX2OVYhM14yVchKR7nnWfI2D5klNbEUWQjEkqPYhOyclxe77XJqmZcBQ8C/a3pUNSaWRLzOvTJg4K8FfKTk2/wVhoTmgB3VqBKw7S1x1nc+dXl2HjDKo1Rmbasmq/DjEM0Cvl2xuFJgadqQqEZbmY7BGRdV8QmYbPZ0KWFpySRytlLV3i1v1ud2KZYtaXEUz6tMmO4Lnfi6dZyLoQgqfp4yqFb1uypGQBBFRDv8jg0UdXDUx7dbMVemRGbpOGmGPwqgKIkVAGeMgyyJcKIHa0+0tbh19ESX3kIVTPMNoi6od3XAarIcZViHHYJqoRIKQbrFUGVk2QeN94F3ZUkimom6zG+9gjqijqq+MX4CooPeecXL3l6ljGeHVAPLkH3UOUCU15w003orW4YLypuDjY8/SpgNeliqg6dlzcE4ee8febSeWp4fVjz0d/1SGrJ6eYEp5ezOf6CF+LnvDxOeUt0CWIfR1UcT48J+xMCIdmrVoSv77lZ15ROTdLSHH+RkL9t8MxvkPqKPPw5UnkEVUo3V2hXU5mKdjnAUwNCUzEophj3xwixwDEdRuunBCZgGICnfIKsoJOe49Vfcjg7IZx7KK3xAo+yM0UR4pp7gs6S0xdvoeoauTB89e6S+FXB8PAJhhJ3s+G+VSOlpjaG+POUTXuBE/m07gxRVXBY39NNf0iSp+iWJHi1ZDqpSc5OCRjgK8O4nHOhnrMsXtFd1uzNx/iEtIwkVEOEkAzTBZ5QJJSsN2v8ysMY6FcST3kEumK4mSGUFa+VUrSwmS9dHeEpl8gUjLKUtGkg9MqmOxZDz3PxlENcVAzVjEyl3NYvuBRXnK6/xdrtUGgfaVxaRcqeWeGVdqm6VoqWqFhvlsS1ROLZGEPna2I5101OBjQt76ZCmpqgmu8QkGUjEtabDZ4LUie4KifQc1zfg7LcgZPJc9wgQiiJU6dEbgppuktfsghIB9dESBXg5huCfAZCENURerMmqGx3rGsiHCPxsxWBWROoCpWlzYwhQmcF0hkga/A2CyIt7Ro7ENQ5pijwjYsj+6i6ItgsCJru2Jia/cuf0Z/fc/+OYDD/U2Ss+e6Ln5GVGUILPvvwmrR4hY499q8/YCi/x4m64f3sH/jiA8XBVw5x7FI7LaYqo226lFKTqQXZ+pJs3cPg8tNxh8u44K/feoIIHd4pff4p6vFPh20udR9ZOty2vuAi8fD7B9yeDxg7kluGvGyFnPev4Frz+njB4DTmPxTHBFmG58J+9guuy18gXYFbOnzeMXxwsc8q1LgHb4FQBOo1d2KDLlOcNMT1wOgcLxN4qiAp5jjr75PcfIXey+ikkv/t/6kIS4de75j+27/N3H3Nhy/+jJujKe+9uOUP/jK2yRee4Af/8wRfddif3/Cdy1/wOz+8sbhLrflz74rjLxMOvRZR1WOyuKT36iVCCDaJZhEXrDF89xpOg0MGao/fLX/GZ63PqDoG3c5pz0JOTMl//uq/st/9A1Tc4qn+cz771uechiXfunnFN34+xElH+F6I8+y3wLTxizkBNYGpKFcrwsByVYLaQYoeUpUE6zmuiciz3EKjTUWdbvCokaKNUxcEqzlqW6qEIXljAHOjGKli/LogzOcotaFXL/ne6yM6acGJ2dDRDsI4uEVKUMzwm1LFqSp8U+GvVjhOCyFctDZfn+7YN8JDBGghWXeGvBoNqR9ZzsMm02BQOOT3moUX8WJy3IijFgGJEFRlyW3uUdxXzJIWX225Ko2Wsm1ym84gX9TcjPd4GRwAAs/3KIrCejS0ZnGrGeSGy+F7vAy3rj17Ab1tHse9RBaKi/FvcJvYaEGwQusWAZk20YEvTybcmxotFdXePfHTZ/RnNX1nzbk3RuUV10fvWbanFlwfvcUX73ybt75q8ff/KuZbZ0POg4BXBxF5y+H8/SHLtkFLg1869JSkvItZ9z9kdnRMnUU4hYfuVPjxCjXuQ2EwXpv1wSn5wR5zJ7I30u6H3L8T4cYJq7RFv1RcnnzM7fAErzNj40U47Q2VcPiH7x7x7l2brnb4yeA/8WlnSRl7uNWczURQt/dwPcW7044NXu7/77RCjdOP0Qd76FCgohJHCNTKZ9Pt8+p7v0PL/CZ5UIIj+P6f7BEWkqcy4bfrhLOB5MfP/i2BktwNB/yf/7piEfuYro/8Rsk3v5qgyoRf7H3E8z8YorQC6bA43PBFXPN7icfJbcK0/bt8+sHHNjTYq6m9Ck3Az+Mhx0WM2Hj81Tu/w+fjp7Q2Hu2F4Xm/Yt2t+L++O+I/nffxBfz90e9y7X5MuZD8Za/L9//EoV0c0zbwf8wKgiLgfO9bzB1IGr+E67qE3gzl1GTPA9Y65PXk27s8DpsMZ8vhTi7Ip7DyE148QkBaNIRdIXunCsivc+47PV52J5RBxmWnzX97d8Db4hmrWnJwlTLMBdO9U152T3Ef5XFEkUVALqaCLBfowgWqf/bf8X8RjeONGUeTapQs7jhenO0QkEWR7zgkE7dPaCZ01gtOlzcNV6W0sBsDWZ7ZPI6yRW8z461si4B80Dg816NvRgRlyN7VBSfFNQiaZqSVbXJTio44IjIR+2fnrLXlqmRN2/wWAfn/UfdezZpd953es3aOb35PDt2nczcyCAIgSIKiRIkjiTMKLo3LNReu8Y3v/FX8IewLuzxykEYukWKmCAICkdEAOvfJ581p573X8sV70ASq5kZlShq9t6dOqtp71fqv9fs9j29cwC4Fa48OCL+ogPyiV0W/QJYXbD3s4ecxqZ8y8u6x9YnGxkGTddfHWLFxx4qg9xGLeIEhdOrOI373bkLq1umGF7GzgAunZ+yWf8v+Rk7z4AZpzcCVFU5k0ajVMfPrMLuHbXxAd9xGRQKrnSPKiO79Dlq7hZ7fJDJ/yebijI3jJkFgcN+7w8aRT9PvsDf6KqEWcH3wNnPjmM+6x3RkDaPqEVQOz569SCt/BldzWZncw4pzlGUx10Z8uHObYNGlYbex5S2Uygi1v+HGoUct1fjq+4LIiDjcLGhVLbrRv8PPY3736Id8GiT0SFifBjwbXcaqDFb0VTyxy+rwAdvi/+LSvs/vvL3CmJgHW4qwcvjgepPAfJ3N0W3+p//tl0jbIpyWCE3n0SXB3WZI/amrhPObrGhvYR7d52SrwEoUizWf1kGHzcebmNsX8dKAzvxt1Po/cOmjNlsHLve/uc9pfUrz3st4i5cxDQuj/xNa8x5Xbm+jawFzEXHpcBXbNAlXL1GbO7x6733GekSzJqkfgWqXvH3hI9L1Jl78p4SzjP/wD79m1m5xek7R/7xasW02qfuX2SjnfP3gEen5bd1vhExws3GBuupwcTLhG9EDTteO6V/4lFdOf5/NuzO2RJ1GFaDh0uwteRxfVED65897TdvG0QJEWaD+NVzHiiew4nN0oNBQQkfpUJnBOY9jWSUvHIcKjUq4qFxHmRalE4BhUJr2UuuIotIMpG6jSh1pOBSuTqnE+deX4xCGgSwsVKlTWQ6lHixDaK5LJaE8T47KwkJVOpXhUYplNqPSlqqBwnWRGKjKREmFtHwKx6BieUhbWhaVblJKHVkaYChKx6c0dCrXYFqr4Wx2UWYXzfbIS5u46fDJ+gsssgRHaTza9TBpEcomiZqQTescNw1uX36OwcoA2WphPzrgSilYJScwQyq9ottQPBeU7Mwm6BY8aimSXNFcPaPmtQnOcrYNhyjTWM1SlNDxjTrK0xglM6xRie4V+A8jLt9b8KuVgrycc+ZIVic6g0IgM5PEVjyo2owLDROTie5yj0Nce4WebPGKEBRScJoY7HwScJArmlqbJJAcG3NSmmR5jSxzKD+7xsmVR5w5Blpc56TymIoaV7IWmyLAN2+S1UZ8dFVRuDtktmRan9PU6+TGAYtCMvQtxmsBd69WfPVNEzcR5EIRRBmFBZoyULZHfaQRd3XGjYpPtnNeOl5w5eiYWruL0DwUS0yCVWjYBeSOj9QV/XpOmRY4mJilojXX+J2PShJrwlkrQ/oJpWfhFLv4WYreeMi1/QWp8lifutxdS9BwiE2NxKmY2Q5vBs+gd9oMomgZ0DvvBGnSI61cpgju+xdIiwwQXxpVVo0Ou5HN2O1wv63IPQ9/0ScvN4nMmIGqyJbbeKTpUBoBxfmoUhXn2SgJsrKWmE7tXxE68It+DaVplKZLZmmMOsH5rYo4p5wvI9qzTKcYCVLTYNRt/RfbsfPEopQViefQX11mK/TzM5DPI+fRWFDKikWjxthuLO/ITYs0S5/kOJKBIM9g1tpgbJ/r9c7v0KNzynk2NLB0ybS7w9A3z8lTv1FAylKRD3RKw2K8WmekSnI7JwkCJitNKquOJwyqXkSsOZyt1YjKAkfozNs6OjXKysfJxhSWS2TZTJo3mYdjZuNdxGaD26OAw4XB01rAqtDZ99q82fwmHxgWdpEzXsnQF7BuhASxwUIPODI3OI00WiOd1Id37CbbTYFwGuwvNlirNB5uPMtwuo6jYo7XSvRSw6ma3LvQZnZYxzbAcqGVzBFFSm/FwdCfpgrb+FMBWghagLRe4/7Vq6j+Kb/c2EZ6ipk7JY8tBgctRprkjSuv0etssggWDEXAGzeaiCrEXzRI+yWRblJZt1g0csZRGwCtlIxDDb2yUTQ4WrnAg9c3yJsGs5rJLCywHMGIiBcDj9QNmNSu8PBrLfJActJJSMKKaWeTH//OKl+3bKzY5rOd5zhcNYkKHwAAIABJREFUM/ngVpfbe3tErU+pzDl3LrxIv6yRliX3Lr7OgV2SaRcICxgFM8b+nFBInr1fozA1/vYrVzFGEiFbbB+vcnQ9Yq4l1CtI3VXKwmJ/dWupgKznT9qxaZYxTwXFWCM1bYbr7SftWMs0KYplbWGe25RFwcLXGdYCcn2T/orFx/qM7vEVGqWJHulLHGejy7jW+bIC0nZIk5h0bCDnGb/9vcby8086qizLbQVmscBJcrqTfZS+1CZkWXaee4homi0s1nDnU1Ymp+c5jgLTXBLA0jSh4W5h5iH+YsxGHJ83QH+THDUMkxqrmLlD42xONz1BCIHneczn8ycKyEDbwlYuzYNDunL+JZOb5y1HFdfcwywFrcU+tq+fjyqC0DKQyZxGXhE6T1MUBVd695jlMUmYUPjHdB9usH60wo7lYLldrLnBzeN7ROkcvxTIFz6mMQ5opC30piKYfpvVdMRm7YeUVZ8bv7zC2faE1rBL7ZGJX19HbbXRJ5/RHb7Doq4YywA11aifCLpHgrB7AyszqNRbtI4/4NL7Flmo86tnJnjTkpPAwk7+A7V8nY2Dn/LUu2dU1ZS//u4EK1esHbW4dXoVP38dT9V4KvoFD9oHdM5i9p/L6KiC6w/X8YVE938PMpDFX3Hro22G8Zxbww5pU3HQmbJRdVgZfI+wjPm94Y/4wQv7dIc533m3yVzLyfQmr+3fwO9cY3c05Ln4PxO5CX/00y4PNnNKqTApOX15AyPX0cqPePH996lcjRd/bfPmCwkHOz71mc1T+iVMC3Yf/4qVRx/yaC/Hn5gcP+fwnduXMbQ6a2vXCao2K+IdurWf4eg21z++xLF3j3Gw4Kl7GuHsBo6mMGc/wGDE1v0Otx6XFOaCx+sJvvKo2d9jbeQh8++zeheunLbZuWPznkwZWylZ0EIr61gLk87oGMtfjuFfVEA2tBqWvoW7WLAW989zHOILTBhJ09vETEPqVcpq75BYjyhvfp8ob5MNNVKriyxCNOVROzuie9r/zahSFEsi+myOZ+yg6SHq85Lpb/nzTzSq6E+2R0tzl0bu1RmHe5TnzNGyWKLb4iRmVjkUc5vEEYwaPsZ5AEw7t9rnRc68CimmgsTR6bUgy/IvX8dqgih2KRewaHmMhAfA3LLIaimWbSOkIp7a5IXO1N9gZJYk3nL+RMHCthBpThaFmIVkWtth6BrkRU5DU0hm9MuY/c2SP/rIRdku/eAqcz2jCvdJnATbkFwYDzFXamhsIqoKTyiGVw3WTuvI8DqPuibdyQobtkm6COh3fPrN5ymsM+bNNeJ6wpQGZSqI9TpoPrl7gX7NRQYCY5FRVBnCrBHXLXJ/hTgNyK1rnGw0eOt5Cw+La8cRZhQzSA2U2iJ2Ax6v3+JseI2jzojSmlKaknHDYj5vUEobXbOJnrrGZGOV+rHNXidHCxfMb3h4lgmHTdyFYmXxKpNul1mScLtVx7Vh7kX0tCbTgwZDw+LT7k2m3TUyc8G71wWnbZft44B7cpOu9JmHJW+8dIUgKfl4YPF/fjenO9Bp90vWrW30tEFSv8jjV1wKE3TDZ/9iTGpLBA6J2EVVHbLgeR4+tcOdF2K6uUVnLjns1tCFxppZoyhtRv4G0vo6xZoONzTsWoemjLhxL6NWlyjHZnN6gagecucZg/efV7zy1i5n7ZKwssnKJpFpkPgv8NmLdYpTi8hyOXaWt3tpU0cmIYVjMW474FhLr4qslvrLOGZemBSRQ6YbjLq1JwGw+RdgxQvRoBxWzH2bgWOSGxm52+e7kxco19ZJhYeclKhUEgUdRm4N83zHUVYVmecThXPSOKAoTMB8YhH4bX7+idCBn48qYlnnVQqtyLDjOaahPSm5WTJHpikWEk0amDLHjufouYF2zhwFEGmKqZlLi1ie4uUKkugJrEYqhWkYGIWOVmnoSY7NfFlyUy7EEVaZgZQYVRNdCqwswS4SLJmjzkE+Li4ySdEqF1EpzGSBr1toSYJqDomqh9x5/hjNNuHTS9gzjQuTI442RhyoQwwx5/a1ionTpUXBy4+htEyOOzl9/5j9K8eMwpjUFbx0t8TwXIxynZVJj6vTBxy4E27FCX/Zjgiyq9ScDlZloBcVSs+ptBjSgsjNMQwLNY4pXJvUSEidHL0omHs6Bzdc6n2fec2katdI6hMSxyZHY+YL+mtdev6Q1OnTnBoMO4L5x5DnOVkZo/7+ALc+pfkwJAtjfvjfnbKobLTHIZq5judYPOc7hLsZrfsZ1o0xfhxhrmS0koT6e5soL+Xy1hGaXTFdrXD24Pp8zu5bh6zuJxgrIYaIudobo+cFvW2dy2cKq2rSMDwMR1HkJdvDnJlxRtQS1GnTXCsokRjzgsBMMPMCqzbF1o/YjBSZ0Fhd2NRjiak0LLONjk3a6BNkQ6498pBCsWmbbFoV0ddKjEOwFLirGe0oYWIWlIbOyqjN2U6KUepQVuSWoNJHCK1Pe9KlNfPpLWJm7YpaKrCzbYpS4SQRthkwTxbIqsJSJTJNMSsHTdpoMsNcxMjzWxVX/YYApmsGmrSwK4mbLkBPaMYpSRoh4zGFUVKUBigdI8+w1RzbcZ6U3ExV4sQRemGiSQ3Uv5IdB4Cp6SyJjyA0gZBglTm1aIzUztuxeY4vl6OKbygM6WGVCXU5WV6hfn7dCthZhmc7GJXAqRLCWYSZJMsch1hKmjVdx8FAr2yCIqWejkAInDJBP7fVIxW2dNEV+MmMulr8JgCmFE7hINMcS69jlBDGM5ACM0sZ14Zk3Rmt0YRA6Agtx1Bw4ewhpZActnJKO6HUCo5vmdR7dcSxQaHBvG0yd23sZIaoRghTYpjrSKNEEwqnMjhu36Eoh5z6Lqk/Icjv8Mp7PrfEC4ibN2nbB1yIfsnCj3m8AU6qsXcvYCWraF/8JnYeoqkDLh/eoTsU7B4J5kcFk7rBp5dK1sdXcYIW7eljunf2OV17yGfy4dKM3vc5a64SFwJXaBzrBsc1HavdYJHDelIiPZ/TRko2mrGILT49fI+vPG4zjIZc/7TGvWsjPvDOuNVbw+k/RZGPkG/8koObimqskBcNrELneXeXTtPCsCowYi4/GOOdZjiFydnTY1r9Q5pzk+rqJQqnS5Gecly7z6gwGU9Czh4OkDWN7Y8N2FiQ2xH+g2NW5w8YXZ4jDIXb89l8ZxVp+lg3V5G2TS99xMHsY/ZmXaSAh+MUlVd4pcu3+pexRY28d8CtuzFvPT2nOaphqwxNjtDwgYzSkBTOfcxcMW4lXM5XeHZf4532Hdb7LpX2LEYZszrtEedN6kVBJSsClu1YnxCdAJuMZjwlPt9xOEWClWfojLmYZ/iyQ2c+5NbiAblb8vDlhwycdW5GNiuqJJQ1NOXgZhH1bIyV/yY5GqjzKLzmYwhj6cv5r9kd27R9nmpt8sdbz/Ci2AQh+LFcUCrI3JCFrXOwtrrMcQiNqjr3quQ5rUSQ9Etmts/+2gU0Q/8Cj2NJ/e5HOtkgZxLUebTxRa+KeHI4OhpWbE0Kzla77LtbgMA6z3Es0YGK6VlJK1GcdRvsu18oGKEwzSU6cNFTaFnFyXqLvr+8j4+ac+bNKamVsCYgPlwn8TT+5neuMNMVw3Yf0YyxZIGFial8cGsUjk5y+SVyb4JMKibGhNQU3L6yy2q6IFo0OKy1GK78R1Iz4idtkziY0m9Z/N3rNlHU4VllI/SXeXDxItNWQepWFIXO3WdDjpTg5SpE9muUziscb93idBU+uyrRhWToKNKaYFDfZEVYZOGLnFyOOb66iSleI2oIjm24MmxiGi0MaeAFFxCNhLTZQMhdcu8avm/h1hT6vE5lKZT/R9zbaDKoYqyFz9HGBPQIN3OYBm2iIORw479HdiukUdLTK+IAPmiHiCrg1azB0LC5U/8OWgtqM42DnZJxVyPITNY9D7Fo0Vt1ebiyjlNoPHjO52SnxEt1Zns+sekiNY+x8wLv7exyZ0+SWTaHKwFDvY6uaXzbcBCVSRy8TmU8Sz+oMwkls1ZFFpTcqVwOerusJAYn3d8lSwRnGzGVa3K86zNtXSTTBPlpG1NpVNaf44iQxxs6zstNKiWYdr/B+pGOJpvENcGnV66DZT9xJ9u2Q55nhLEiHUjmdsjDzV2yc6n159excWPOxZM6a2cZ+7UV3mzeoKJi7G/z6XobJ76IWKRcnUiqQmfUvcB+c+8LOQ6J49hkScJsoKgmMVVeUVX/FdfqDU3DMyxcw8SWAq1mQqhhxOCkEUFesBWdfEkB6Z3zK1b1Ok7RIYzmbEXDL4iClgtHlmV0zFXs1KORzthNE5I0xTSMJ7oAXddpyg52arPS77Gd937TVYnjJTdBSmrlKnZls3J0xpzoS4ejn6MDfbGDXcLa4xM8VyNLU0abA+AU3Ck5oJI/xp7DU395G6dM+eVL+9y7NiY1YgpNp/nJVYLx64Rlyuv7P+Qz7xGmrGjsFAxa8Bf/e42as019499wbTTiUv1v6HVrZLpJZs9oFs9QVqBHCt1qIvMTgvlnxI0RSTFBm9u0H+1S1W2E30WpC5TiXapshDUwccwMEY+oOQlCd/CSJoYdYCQfYCuN1HoDqWJqugWZoHl8GTP+JkL61OWPOWscEXd8Xv/rJtpJjLlT4TzXwtVfBV1yKfsR6/EqB5MRl4xVzsQn7BwUXLu3QxCv4Bpj1h/9hGN/wcRN0XsVuh9x9c0ubWMLN/gWnbjPxeIDZq7kynGdYf0IK9eoZzbJjRbMn6Pbv41r/4CNnoaZN7n+CWz2NfY+bNC4dR2xfoWF8Q98uPdL9jclN+/beBOTr/ziOoXt07x+C9tpUqqfoRV3eOnDHd555oxA+PRbCZvlGl71x1gqYKP8AMuShPYx99pjvnO6h7MyYCV30crv4CYWNz/4gKFYZ9aeE48vUV8YyNqCfL6CLQJsmbB1/z76ea+pOj8cjaOIFQIcuUqYxOwWkyeHo0skZcZoY0B7dAsrcWnIjLXJGYXMMS7+mNfu/y7NBzHbdgMnc9GVQ7N/zPZwjGlZy8h5WeKfH46GrKMr7zxy/l8YVYz/f6/+b23hqKQkqwryqkICmYyYFgPcykNSITVBrhSVBA1FISWmgkwqCgESRaUUuVRLKppcaviEgFwqSgVSQcnye3KpUOcKxVIu9ZJLeZ5a6g/kUkMopCKTCm1Jn6dSCnX++3MUFuLJz9KkXEZ09eU5TaEUWSXJRYU1GOKHKbkt8JREryoqw+b05iXiKqW3ekLftcgc8FTJqJaRehXhqKQ2MSlXWuyvTpnbgtQymLV8buxLkr0MjQWpO6c9LQgncJeMZz6+zcqp5EYJ7pbHjcWUg+KAX/sxHQVWprh4MiFJE+y1ALMQiHN9gCYFSnl0+x1mFydkTCnVEh9XSoWcJYjYJTNT1Eije6TjTeaYFGiWxoGjM9mOGZQV34zWEPOEfZnT+emYRKtwKpNiHpJmAZGaME0NEtliHBo8aG4ynAQM3Yy7jeuM/DN65gDf8JhbZ7zx9AvcclrsHZlMnXUGWclh2ENaG+y3SzJp0iwbtL0EozJw0xBLtpk1JO+1u3i9Gv1mg/7U4aXaVdalx6ATgrlHK5pTapJbDzqgW1gKrEpgSIGVaxTC5MTTeLSpo+eKJIfOWUKwSHBzA2c8JS3GpGVKHmgMr1no10OsWQPjsYOqfK6Y11kzjpmaOdf8HupERxwn5PMS5a9QKUmuFMb5sy2lwmb57BdKLZ9zoESQS84fSkkhFaUSSHGujlCKXEoKFIWmMbN9fFUQFTkVDorlO5FJhZKSSipKqbDO3x25NFFQ6CapbSLDJlqzA4BwXKx//z9S6/fI731M+egu1eAUlWf//AuHJgSGpmNoyy6KpQVcSSoWRoqSGrHr0ete+1I71j7PcYxznWKkkZg2vW4X3dApy+p8FFHkec40sylGFQvPobe2jIl/cVTRdZ3ZWJDPSkaNOn27wRel05ZlQqWIRxp5BpPGBfqOZPqFUcWybUSSEY9MDL1i2LnEKLQYeT2kV2HqEfGaojn0sJRPmAjWqoyIkru1mwg/QgiJKk1ip8XCbDCttfjl2rd5+/keY2+KLhSXjlzefDFksbvBq6bD+KLD6cbrzDzFrU88Mqfgx1/dIBg7LHo1XpIut8OneePCBv31BdYix587vH+rwaRV0kp9irhOZT7FaQvswMUwDQaNGrPuhIU/4XT9Im4KZ7uvcHRLx20+w5aYorUllWVzJ6jx9dtriMJicfX30bae4uUP2+x/22TfGTNuZHiRR8UKqRCcmF9hYgaMutsU85DE2UFVC+KGhyXBLz0wXQRbtNhgQ2uzahRYL/vIKESfNpB6idzYww82GasGXvMilalQwqPRm6IMn0EnIGnucNyY05wG2Dsai7HH/RWTi6d1OpmC4Cm0YJWGMijaJYe3miS+jSYEq1qIW1q0im/R5imiCwGdJGdmKRQ5jzZq9I+3kKnJif8NFlrOYX1CoVfcCVY4zFOmhc3vJR1iafATv0amdkiNjJNaF+cFB6XDarNCTlyUFjLodtH9JS1OSsnsHEbcTQXFRCc2HY7Xuk9yHLa93GFH7QVD2aZICxb1kF7YpFQFyi75eL0gGF8gTypkbCILg3lrjX5t5RyruGzBzh2HtBETTQwyqZg7DXqNGsW1Z3HMAADd9RHPvoqHwLr1Atmvf0Hyy7+jPHz4z79wLC9PFFIpyqqkyHM+6Ra0bIEYSvzFmPXZY6Qmzo3r2ZIdsFjQMVvYrOHPJ2xMz54Ewz4XMqVZSsvdwspDavGYzWjxhPf4OaJQ13Ua2jpW7tAZRKzHRyDAdZY8Dtd1lzkOsYmtHNqLI9bVHN/3ieLo3IK+vFXxzctYJaw83sdxBKE3or/3Drt9jXm1T/10E3fWwp4Idk7eIy5jPtw4JDCGbA81dg91auYqRvUntKeCZx7+Pbd3PqV+CtPtiq27bVYnda70LmFduYydHJKov0TPFdvHHqkuEHrI85/tsJtfI3AvYNfe59LRL5jX5jhzjSuDLW582uRoZcSWuEmQ3KRSv+Dy3btYUR238Fg/avD2C5J0bYQXNXBzk87Rj1AnJ0TXx8yvzZB6STUxuHK3g9v/U1wVsv72X5F8dsyf/s0GspR8cKvgZKXg2oGH8ezvYRZw4eg/cfljnV9vwiv3BD+zB9SnFZ35Do1xkywfs6b9H/TDhFZP56XHTfqNirmX4viXQH6PzmTG1w4/5aglQTfZ8RKmfoal+2zMXbziOTbmD3jh4Oc8qEo68RqnRcXmnR06sxYtcQFbefjyY1bK9/ETg0Tl7Bx32L4foKHT2HgGVzRpJb+mm37G+qBDXJ8TxtBrLFg9beGO/xC3DKmd/IStzzLuXDxkUIsJDnfYqgqu9Oq4lUuQuHR6PyPON5nqC8KDiwRaCEBY6lj6BdwqY2366EvowM9t9W2thq1vEsQR2+k5OhBxHhBLmaRDupNnsNKAehWzcXZELnPuXPlb7Mk69cOS0GmhZR6a8Kj3jlg/62Pb1hOT2+e2+sDcxXQMro4eIRs+t4MQrdYEQPN80PUlQFw3EF6AOCeZ/QssHMtFAxSGYaILgeWHaJWkshwKwyaqX0R+XnIrCgrbJmtkSzXe3KFwWyzq/m92HIa+HFvyjKQKqWYaua0z73TJ0vSJW1aeKwTThYNcQFSziZo2CEF5vuMozpOj+dylKnRSf4PIXP4NnydHS9uBNCNf+FiFJK7tsPBNIq3LsGtjiU1m7Q8ZyBbTs1Xmts73b/0xI1Uwaz6ksveJ7DnzoEvadsmyOr2awaPay2S1kJ1BRK7ZDNo+hhkwLNusaT6Z1sJ2vo7Xcpm96OA5yzLXoqqRH62TZyEpF3iwrVFXDgu/xyB1GNZbJH7GwlgnFwHS3GW0XhIsNGqTNlkX9o47nOx1yR17aRlzNhHmFeLVAdIZUWoV87rJwe4a02gNq7QYW08T+c/xf//xdfIsY7y2YOZGjNZ81lWTwpJ8cu1VprV1huUJv+qucf/CIbWZi3W4wmm0xciqY1h/TtQ84fIjn882JF5iUShJZNWIRMC8FvC+XVuOmlJwZE9ItZJGukt3USA1i4nq8pn5Iu5JwkxOWZgWC9tke9FCFzalqzOmzl19g8rXWevbTFQT33AQaCQypNBcxnKDXiUZlA16WkSBRr+acnO4Tmk3kIZDFV4lX1XUoy1G7ZjDix2KoCQsAspxE7BYn9xEZTofX9gj3lwF4S1b2KminDmUwiSu7yHcpa9HSknlOGT1jLQwKSOXXDeYtn2ysliO2uaySJm0m0RlC1loZIFD7FiUqkR5T7Nmvki8tU5PmqQzgUolea1D5IXk5zyOqqyWCsgwpogCMm3B8eYlDkUNbfBrypP95cvq+ssx3rBQWUrVP0FG83+ZhUNDw9R1dKGDUhiVIowmlKkFaulYrLLsyahSFgWmrlFmKZXSljxRVVDlGQKLMs9Q5RINWOY5EhclDWRZUmaSMs/AqJ7U6pWmLTsmSoCUlNWyB6CjKLN0+Y9KiaoslBSURU4pc0xdX7IfFctGSpaD9Jd80iKnzCoqI0NVBciSqiqQVbHsvUiBLAuqKiMpDKgaKH2FxLPATKmEILUtRqKFe3yFh7sVCzUnXbWJwhahrHNV08DooB+uc6KGaHGKf+Tw+NqCdGFwcQo7hkSlkipKaScOynCZlyVxITBnAtlUIHW0UjCrX8Q4KxjZFqOOYnWgoYkBiTVEJHUCWXH5KOUgn7OocrR8uUOMhaQUkGmCBZtoE5+JZ5LKisS2MP2M2lGGaSlyXVIZESqaoZklQi4wy4LmzEKTOShJrGs8WFmjH8z5YHsT0zdhKlAoQq2FlBp9q+R93QalYZomI3OE5i1wkxPMtIn0BHrqcOOjXTzDZGrHnDUPGXsOIxSJWp5r6ZkkdlM2zgy8yGNYD3BaNXSlkToOUoJVxBR6jJWamEVG1hVcChqsbATYhUBmglbLxKxSni09DA+2Oooy0FgrBU6s0KuKzhZUqs6VtMS1B7jCQZkmoWliRSauVrLijdBciyRPyU+zZTkyTQmEj8kqjkpoFcMlyMfusXe2BB4/KjK6WR07d/HHERtigBSS20mBio4w0gamaS6DDkpRlSVlliGURFaSsipRpk6ZZcjKBUNRpBOMuEIrMlQSAfAkDqZpqKpEpSnqHwk0/u0djipJWhbkVUlRlcjQx85CCvcx5jzFLaE9O6MUCkM3KMoCr1yCfBr6Eq7jVhEd1T+/VfnNqJJlGTVLwywD/GrGyvzcVn8ODCqrCl3X8JXALG1qSUTnXAHp2Etb/ROQT6VhSodGNKLDAr/0iZP43N7uIJMcR/MwS2guBpiloLJHpIO3eerOEQ8697DSLYzqOkZp0Jr1EGVCGRyR5keESR0jqpE1BmhqB7uAbnRKzzkka5RIOcGWDvUkIYwlBAGpLHHnA4z4mJFtI+0mpXbCzIBMqxBVRqHHJFaPzIBMHy9doWaDUV2QmAmVIVEcY8RThNYkcSyUzOn2HILJffz8aZQb4AYjqkbBhvuY9QaYqWQmU3aMAQ1tjUbR4JX4I8JFibVYQnCP3Zh9f8pX0y6h6ZMJyWXjPi+Ux3yaZdxSBkG14OXjFml4TJ0NqnzMH9z9PrXmgt3eA7TQxBopJJIL1S6h9gyb+Yg/6H+MKBXogoebpxx6YzzD5+LkFRxnj3Z5xHbRw1F1Aj3inneEaa4i1pqISGIDO8mYV497XNpvMzYmqJUW5tTGKECzS7RUspYu2M0fcE13uN+Z4ZkG8yjhqz8Mafo+garjHr7N1Y8i0qfm6Fc1NjKTx2XG5qcrOOkmtalBO32HlalHdzWjNrbwBhWTdkk369Cxv0Y3jvhvf/QDhKxIcgMzzoi7OrWhxG9u07n8TWqLPp2HPyeTBQ/3PNpzD62EVj6j3jTxy2tsJWc8P7pNrlW89fJnXB5vcmn/DpuaS1vrYlgNtkY9nsmPn4wq1RPlSELXuYS5YrLeyMjcHNXqYKxuAaC7S8auKnKE7aB319D8EDnq/fMvHKam45sOrmFhCp1ETjj1U9JAwRzyWoPoUkipKWDZYyksiyzPiKc6xWNBEdgsLq08KbkpFAKBVJJ4YCKPJEXbY7RzDij+Ao9DKUVyZFANFfFug6i+PEGONW1JmjZNhFJk96CYQ7K7R1RXlOfnKQCxrqOXiuy+jpVK4ivXGfhLzoTy2yRNm40LT9MMbYz9AM3WyW6so6ERhJv4nTl6x0OfBHjuAMtsEzd0zq4HVCs76GFBQ6YYSkeUFsL30XsCVddxbnybTi1GaAJty6Bt5dhP+2RmHXmsMFcdwr11dNMllAvKSjBSDcq2gXUmEZlDx/4GjTWBFViYloksFXc2fNz15xGHW1QLRb/5GveeazCzhsQssAxJYUoWbYc8XCPHoLf7Gg+M5eF0bM+ZBjnToELZNt97sIGhgxP+GfdeUsz7OgcOVCsVd79iYgrBbN4kN0M+eulPiNslZxsCSzfRyyV/Nhw5FPfqLJyAR00HJ5ZIo+LDF27QaxfceFznOO/iZS7Dlse7T12mkfhMwoKoO6Sc2wzqLRalTZEajINXcXqvc78rycwCXWlkHRs7L4gKhwiNafA6iX2dOxdqhKMhi3pF5kneeMZjdbRNVZh8cu0P0BLB482YVl/jYVPQs+Ctp7Z46l6HqKHz6yt/RPN4xuG2wIt0tEFE4ut0Vcju/ipRo+AHW7+Pn0CEhpWXnK2X1PqCTa3JN0Wbs5rPTzc8FlZBb13RnHl4C43EKVFOjYujkFPf4OOOR2UoTPcqC+Fh6RpBXGL4BkroFG6dzBMUQkOhUFJRmQalU1BRQ1YWD6nzvqhRaZ/C5+cYlr0slSmF0HSEZS/PPP4Rn9/awpHLklkesyhTSqHwhM1a75SxU6JFBcH0jK1PPqNkeR5RluUTNd6K3cG1d6idjNm+/ficx1GgnwfA8jyjE+5iiTb1kwF7twfLMw7j3Kuu/OncAAAgAElEQVQiK3RNp+nsYBPSGQzZXhyAENiWvbyytKyl1Ne5hKf5rB49IC0mT4S/KEWzLMk0g1rtFo7S2Xl4h5ZeMg9TPvvOWzR/5nMWDqk/amCN/wwz09no/z0qM7h9dYi9McasDP7wrxR//Rc6Mv23bB5V7N39Fat6wXgjRzNiKi1GCQ27fxNVf4n2YcrG6A0eXRyTy5LRRsnlg4JrH+vsTV7CCW/RfnSHtvwVxx0oq4Ru6vPCf16j8HOMy9cw4kvMsjdwf32PnUMbR2k4C8V6X/CD1xd07v8Jmt9E3/8JX/mx4IOXJvzS7OPNS8Z1uPHTyxjp6xh5wO7dh4zSCaUv+OyFf2AUz6g/MHBPNrHkd1GBwKx+Ql0YNPYFT5kl74YZF4chvTUbabyGn8fQ+SmmnVErLWpViCBnZWRST9sE1bM4+jFa+4fceE+xMtB4+/WC6z34vbcEL5zcIt19jr3hfVbvv83WseB/fX1OPE5ZOdH5zs8DLjVepdG6zG75Ft/5/kMONysOVwr8WGAnLrVRRPfZ17H8TTqPfsxG/Cn//n9xaU51/p/fT/j+N3K+8iOH9eZ/Q03VWfvs/+XWT/pc/bli1FBcOBTc3zNpZWvs+n+EVWm8fPJ3DNwRDzrw8q+b+JOUN5/JmLS7INuUesJHrZ/wrTda+IVLqhWY4QhfQju+iu7UMJIxYfSAwo84fCFF8CLz3CC1UnZth1xTpI5OT1XkIqfnvE03+kPuBBlps4GTWfhKMdclp1pxDiuWy128ZxIvciJV0dYLVuNTrkqN++MBVe94+bK6/hK2ZZrILKHqn6D+pc44bM2gafvUTAddghQOUfcGI+MTUt0gEorTVgtlLK9rsyzD9TySOKat1yikyUJzOa21lwtH/jnIR5GmKVM7IM9MZoZLP+wSxfEyAAZPzGYL6ZNnJhM34MRuI1g2Xj+3iqtKkuCSS5OhWecUfblwJAkKmDkOVZQQGzaUgtN6nYWnMzKHpK7Hh9tXmat3WdgrRL6HqEzut64yJOJsPaKbdTjoPObHt+pkWkFuwtyFMteIuglio8HQ04i8jCAuGHUXGCcK25E0a4qkbpEUCZaKMTsGYauBUZkoG4Itnb1dmw1PMnM0GguXtWc1ioaGZSmsY8mlWcixFTPtpFz5KMTNDEathGEnJXEFriYoNMWjNcmgDmYsKUsNUQgeNdfIThwy0+C255G6AtGEe5ckxtxkbX6RXs1nkerkWsG9nqS/NeKlnkOxX+ejSyeosykTq0WWlCSUHD9KGNkR1/+2yayueLSyiqp0WvWUzUwxmMPdrEW2uIBuFfyD+AmX5i4Xki02yhV0FA+NgON0lSjyUA+HhI0B630DLXWpDIvEATvVSW2NeaBz53LO1XsV1kww8x2apoFeGsxrDtN6i/cvrtEaWpx1Rkxrp9y/dZ0rcR2KgJnX4NRb5/RCytTPGfgWWBpeUiO2LKpSp0wbnG3HkEwYC4lQPhf6JafBAl2luEXEd38VsTkxmecTotWCNy6MmL/v0Zr1EU5CmGVsTae4xRyj7LP3wKc5cEmCks2VkiANWZn2eT56wMCouJ3PKToOneMxdaHjCBtdt2lOJ2xnx5iGQXVeq/c8n3ixoBYECNulMgQSfQn0Oe/GPAl/CQ2UQpUF6h8ppv6tLRxpVTBI5oyzGGkI9GqBXX7MMwMDHJtYmhy0t3DcEK1aXqF+rkEYFybZRCM2bc7aHTRDpzrPcSgURV4wyW2KccXCdThetb+c41ASXdOZTwT5vGLcqtGz2l/acXweOV+MNLIMRo1derb8UuTcsm1EmhGPLYy8ot++yjCwWBgLoprHycVtSn+dqN4gs1sIX2OwfotxqJj7e4gqZFg74MMXHTaERGorDJoGj+mwvxdhOjpTP8JLTY53ErShSTps86gNb2z/LrMwwgJ0VyNxYgbPe9ifNuhMAj5xLvAzYbNxIsgNi/tNl2i9xX444PVpyI4V0Mtvcri1hr6u45gtUBUfbI053Z5zcNwhHNTIGy/Ru14RlAWFE9GIQMs1PK0JeogqTUTQJTUlxbpFf+c7rDyqmPkOu7M6prayLFq1XkMVMYdXarzfalCYfR5tCRqVSaV3yAxFHH2PQbjgzRccVqMWvTWdqtQwjTml1SFp+JxsrVIETSpbUg9WEZd9Pq61ad0PeGmi0DdaPH7tMr3MIbYTKrPikWtwnOu8/pnNjSON0fVv87P/4euUmk5iZbyfCPyBi5Il7Qcuzb6B8cIfEu5EfLBlIQ0D9Izt+pzH320yfa8BqY5969/yzqWAOMwpRckktqk8g94i5Mp7Ek1q3P7Kn3HUOGMyO+MH2w2efWDjyZxoTZKfrpKJFuOr/46RaRDnULhQrC+I6xbRfsg0bXK62uBnfod7W4Ko1eO913dRU4fKrihSnb3HBvthnZ8HGxSiJK5v8kY44+rONuYM8tig1HROV7b51FnBNM0nOQ7btsnTlGcSn8CIGHkr3PXalO0KY3PZjdG94MkZh2a76N0NNL+GHP4LnHG4hsWqV6fjBJhKIIWDm6+z+hCsxoxuUvHS6F12jka4hX5uXF9yN9Zqm3S7T6MWPf78V++j6RpVWS1BPmqpRLzavU43uMAzs31qbz34Qlflcz2Cxs3OU3SdVV5+9IDO8B4A1uc6SdMABVdWX6TpNPnW7Xe5FfWe9GVgyRxVpWR361VMYfMHH7xFTkqln/E/r93jufebpDen7O2v0e7/Oe2+4j+++Vfs16ecrSq8TOdHX5sTTC3CsINefo/N45zXPn6La9cH5HV4vB7RHdvc3YtpFOsY6R+wd3bGK/t/zdGlZbqzMYTRVkq9r3Pl7ss4nVexRm9z+ehndIcGe0c+H97Kee1nAb/4xoh141uY8jqN3rvsqHeoRMHq/QBBRFKlTOoZlH9BMNujNv8p1sExuwPJIIzRY8HZZsXVB1u08+8SEPL1d37O7fURRb+D+cybeLELKmB7foOa7iD1CE/8J3IzYetsiz39OrPyAaHtEiYGnvIozISvxe/yuDqjXbVwGgInSNk80ZGWRzv/JmvyiG/O3+HpgyaxXRB/9S7N2OLFwzWePb2Jo22wMj7k5ek9VicBx80Fs3rO4+0JdpizkX0dl0tcXXzE1sl9Ht80STRJZyFYiS2qTGOveJH/j7g365EkO880n2Pn2O7me7jHHrlnVlXWShZLVFESqSZFSd0zLfSgge7r+R3zH+YnzNVAN4K6R9Bg1NMSh6LErVjF2piVlVvkFptHhO+2m50zFx6VVdTMANJAahoQiItwwBBw2Idj7/e+7+OUbV6d/IKkfx+1jMmDFvXcsJgf87t/5RL5/z2ebtK9/+d882+n/Kc/KOlNfLbuKz56xeHtD2/QDN7GrSQ3/+sPMJf32dAlz9Z9qm7I5oN1RD/Hrvp4taGyz1Geg7Nc4NsjdOMxUxHgV1/DqywuHZ/yHf0DVLNkRMX1wz43P2kSByXDaJd+/ApX4nN+t7rHL996h0uFxeXzj7l5ssXluE2k+kjHozc+5HJ5tCorvvBxfNE52vauoNoeuxxjOOGRbSMuqPUvGsGMASEQ0gLrn9YS9s82OJKq4DCeMkoXJHWJVRkOpY1pNXlNeczbLk+Dt3m8u8qqrPioK43jtvZZj0OedAJ+8PIA6diUxRdlxax6DUyL5kLxYM3nb9vXKIov2LIrjcMSFl7WwEksPtt7k7/jyovBkWXZCyBTb9nAVIr3N77BA5XjeRcaBwbHWeER9rIujcLw0513mQaKyp0ya/8X3r+tWEQZWbRJ4fQ47wk+3/pjjqsnfPjmGS+fDJl3z8gCxawrqSYB83bAwY1bLH6rwvgVOpyRLR1UO2c2t6nPGzy4Yvi77a9jhIW2DF7bZraT0msHPFBXWV+ELBs7PNj8HY7XPU53uhxtTKmrLvduHHNrskc9bWC8bayWIQlyDqWNykp6iUXoTImqAbaJSHqXOXA2OCltDrYXFLlN0U355PXbfO+zDdAWH916jbubY7pFA2MliEIzjhzuqzVuGEVw7nHAgGduyg59zs6OyZ9LnJlivKXQhaBoOiSNiFzZ9JYNjoKYe2uG5n2Lme8ys2AeS7ITRfizCt0wPP/dDlHZYFwL8jgjCSySU0l+YDioFswCi1nPYl8EnLUV7zwW2Mrw4bFh4z9H/Kf/OOe4k/Hq54o//GtJ6ggGXY3uGe7sG/6vpodfhjQPDCav0c5VfrzZol20aVUe++4uctDhicgpKonlSY5VRu9RAtdq7MzQGRkaaovjoaSKC7LYxT9xqQc2sgSjBV7qoIsG7iThL2+0ee5cQ+UOj50dvpZ2GTdDfrj2HT5Y36eoc2p7jTLoEbs5BAOSNGBsap6bHYYfP+T97X08v8VQ2Ex8n9jy6BiBsByEHVILiVEGYWmE40MpENLBaEmc1OQ1WKNTygtnqAkufBy2g85SqtEhZvkb0jhC5bITdVkPWoSWTSEqtP6ym6O2FIUX/prlXHguOZKicjCZpJYOmW+ttiqyfHGiKGRJWboYCZXtUgSSXNpU8kuNYyW42mjLkNuKXIWAANchFwpz0TlaZysfR+n65I4NrksuVt2mxnFBFNSFQktN7gbkvkNVCzaO3yY0EcyekIcBSeBSWjZHm9fJFh6nvRgeJCwaGs+qaBsPqW3mkeA87fOBOGRt5nDqtXltf8ThSxVRp0n9WGFZNlJGFL7EqiyMr7Asl6XfYBa20IlDZUcsow1qJ8B2e8SdkNH6GotIUMZNLO1TyJBYDDlXSzwrZD6sWDsIWMhjMtUiCTyWdZPUCkmaFsYz+NUcmXi4owlLaxfHcsj6Q9IQDoYVTukz2tDEvsX3f2ShIkUWSrQYouWSabPFe3sWubTRs4CtRyGmbhFnC37sXOJAPedRY4dAN/g4/wBp36LRnpM5Lpnb4mH/Nk49pAwMy/AD9s9zPr5R46aK7449FlaPz9avcbyhWVsITgYLng8TdOVw3B9yaebydLfJT9pzErXGlX2HB3slf/WOJEwsBrj0pM0nt0JOojYNpVl/Kqgdi6XrMW8GLBNJtJSkbsBff7Omki6LPcOTgc3uwRY/eKvNv09bpK7NT3Zus99dMr8VkjBm3OuyYAOxdspkFDDxZvyfW3N2T66j/S5NOcUyT3GVhzI2tWNIVMBBd5e6PidrFJwO2/jxJUqvYmZsiqVH0nA5cX1yUXDWGLPW2aXcvkqZRbA06Ewz7/Y59qMvX1V0vYKRZznLJKStBFqvuED6q50cv5Z5+//X1fHPNjiWZcbj+SnP4zHrOiMyTbrlGpAhjMFN5rSXT38NARmGIXG8JFJdlBniVjM6yegrtPqVhpFlGQ1/C5k38NIp3SJ+gYAUX0nHBmIdVXg0J0va2SHwBQJyief5GK3xzBbKeESjA1p6cYHnWwGZPM+nTnNc+wqqgubxc4QnyLIUy/kVEeuMg0csjItVXUWkNupkTKM+Y+fOM45619HpUwoNibKhvI0pK4YPn7C5fgRhjBUvmPpLVLlk5+Q6Xn6ZRn7IpeJvqGSNU4E2BQ8CzfYjSZC9gyreJVrc48b8PYKlzc4o5GB9xts/bvKjb09pVr9NY/EyrrhPRz1gWU1pPW3CsGLzcYS8/RQ3WSdILFqLD2k/GVH6cN4d48YpnhXhZlsE2RaOadA/uEeQPCWIbF6vP+Xe5QVH3ZK12Wt49galY3CL98A6p663Oer4NOZt5kWfod7ArmLscsSVB3/JwozYfr5DO+ny4fBXtB/NqZolNV1ycUDz4Jdsf7wBaw7t8c/oHxkCJydxCtqzTVpin6uHnzAfKrxkn2ieESQ1GyeK4VkN8lWq6jPG1kf4mc3ayOasueTBNcHbn7mopIEQu1x6/ClH6R2uPoHbnzsUjs3+boVfKbywQ+20WXi/IDwfMxwHPOkmaGV49xdtbOHTafSphEdbfEhgj7HOBJZ4BnmH7vHrFO2YMGtSFzNGux+zPV7DSWLWTu9y0n9EMPdwn2TYzdcROqdxfMA7n89YXKoxsY84fowOC1TYRZQ2Mk6R0wMskaPr9+nrLtOTOyzNBmXVQpgAa36OnJ+iHBdR11CV+I2Iaj7HkrvYbZsw0IShjekNUOsrA5gMwtU2tiqwvAC1tkkRRnB2/N9+cCzKjE/OnhM2GpxZ23jFOa7XwEhF4YQkruSw2/h1BKTrkuUZg9Imn0qWyuGg219xVaqLE4eBoiwYFz7FRDP3PZ4PnYt17K+H3GYzSb6oOetGHNgdhOBCHM1ehNyWU0WeC85alzl0ajzXJS9yMHwpjk49ZFEz6l3jPFyZ0eaDJkK3SdwtvFpSum1qLXk6bDPJh5xvrOO6EUm0gbAEoVWhVY/ckdx7a50n/ZhkPWXhzHm6BcqzGD53KZwhk7DLw91NEjfFMoKNmcXCP+bBSykv7+9SFW088xrJ+pClpVluJWRexsFSsFzXJPFl9KJF3bhN4XWowoLZlqSyK+q2JNQ3qcU2mdsia7zN4lLCwq0onZxICraeR9TtLnm2TqVtRrs3me9eYqF8tHqT3nLCUznlJ29d5sZkiJY1fuffcMXTtC91mEYz6hQCv83cabGsm+S+xZ2Xvs5ZT7OVReztB6xZl3GGfVAVQnYxgU0V+SxmDarQ4LkdJnsB0qnQhx1yf8C87fB4Z5N0uOAHb1xnMFXEa4ZnbYdxdolLszaefBszuIy0LPa/AVVU0XcDjvck6oe7BGmDwP8jlpuvcq8piKwm86jieC0n9zTvPNqmLj3K1veZeoqs32QcLTCi5q/+uw3cGq7f28QycPeVbzJVJWUPZvaEoMiJ1xrQskkft8nrBp73LkVvDavTZnqzSyP8BnOr5uzWLsU4JHVrTja6PB28xKI7ZzjZwHiGQuVcxSVf2EyjiIOwRSlKjFvgWOsEzQatoomdKupaMm1vcNgYYDtf0uo9zydLEpZzh9hMOXB2+FT20eYOXGgciJUEwEUvsDGrXPk/5foXKSsuq4pK1MjKw1Q1qkzxNPSOj18gIMuyeBFya8omdtnDSxf0islFyC17gVnI84LIHqIKn6Bc0NMJWZb/WsjNsgShGWDnNu1lTi87uXhTWWVVfN8HrfHKPnbtEp2N6ImYRmPVzmSMwXU9TFbgWTvYpaF9egJzQV7knA0/5lJyiVjcQ0kXVfaRqU3vbIZcjMn8Z/iqS8t+Sm7nCE+D3kBWhuH+KYfOAu3PSb1zcMBGofMumCayiFHLzxHVnHacsv2kB/qQwX7FG08GBK0Cyzmlmn2KWyoyv2TUOub9V+BxF76VuLhZg2D6DMKHHHYPOBc2wzLmZ29afP3jIX46JHcsYucui2kTa6RwOo9w91t0ji6D5YBVUuuSev4M/9khYafBifUxUVYSLOZ87dPHRNEfUDiGcfwDjuWCxuGA2l4S1hZv3uuSDRo4xbfxVIxdfI5dzwicJo4bsB1nNE2AND1sBnjihGb5IbYVEiY2m+aUxkJyslsSqCv4VYewfMIw/gzpVORrMcMswCpi0rCibUDKy2wkD7kiPqW/sHhw02JrKtg6VdiVTY1LbSqG47ts1Pf59s8FjdhmWmrmewltrQjp07Q6vO4/o3RTGouAg3zKqT/FbsGbv2oQ6D/ErW3eOvsJE5UzzzWjrkujkhR5xXm9IKs6WDFcuf+Q6PyAaOEQPMlp7S4YG9jQBXa5Ryuac1ufcvZYcFCN2Dwco1JF4ib0W0O8bI1WGbN3dkIhSx7e/gUfScn3l7/NfB5SyXWkjOien7A3Pr8o8jEvAnXz2YyW2kZGNVb1iJ3xCffPj6kOnqwe0iC40DhsTJ5Sjw7Ry/lvdnCs2LErR6dSCinBMhpLg0eFFgLLSKSucOuCWle4QmNhUMbg6wpVC4SuUGK1CRG6xDY1ljHY1ATo1d81gMA2NRK5+gwKWVX4ulqlY7HBrO6FXt1DYnBNjWdqnCqn1tUqHYtGmwpLaywDrq4IsLB0RTdR6OrHrJcz8n6IXxYEFVw5f859UbDTGrMWVohohKNcQukQ2mApgb09Ypg9oz/KibsJwRUPW7lsttqEtqAbal7eNqSexBQ+3dCm2ogYWE2kDLFTSadrcemSjV0ppOUxWLMo12r6RtCfBdQ9l8izGdxq82o0pp8HVE2HipJB0aCzb9NMJDuhy/qgptn0aa379KuAS84UZSxac4dWpmi/+RE37x5jH0nu3Kj5+OWcG47F+B0L9cQCCVdtm7aUbBnNvFnRlpLTdycM4wDnANrGcM3KkY5Bh1B0HLo6oWXFxNhIU6EoCVRK0SnpPhXoekJp2YgiRVTrVKoGWWKpAulqLC+jUYBrYqxKM2+nWLHGBzwl0Z6gsSgoHOic2bSeW1iDHKErCjshaS/45BsNLh20SUNNW2uOBkuK5xVmWjLKT4lNwXAqoF2jrJyT7YLxtE+qQeQ2i15EyoDR1jnSsWif17jzmnbDw1WCZVgw6ZwyON9A2S62ZWEch/A8pjFP8ZSgXKRET08Y5DN66pzOpAWFRRqWRG6IU3dolSnb5QH95ZIPyhHvjF/nzYXFTgo9d9XuNphPuJ4+R1pylUzXmmB2QQ5ot1CBhyMNoTQI20HY9uoh/cJBala1gkJ9uXH5x17//J2jX8EjaK0xWqOVRdzsfFkdaAnqqn6xKu1mguy0YuGGPFnf/ZKrYn3JVTlNLqoDoyb7Gz5FUf76OvYr1YGjF9WBrLwieYFt2yta/YvqwBbPfPHr61jb/n9WBzYcjC4ZrXepqnc4bc6wrYLisza15fHZ9a8zkTmf7vS5+lxyZ2eD9tymXwTEtJkJl49e3mDhz1HlAtMSjFopylg0CSlNi6lq8cAZkFk5tmMzafrMvQVH/ZD+3GdrZDh2bnA33EYZhZ/YTJmAZbCEZE5AKiLOmq9xx98iM29wNqzpzxzGzYKWaDFTEW3hEldvU+U1GYLybJdy4bDMXSQWiY7Ak7x35fcYXy649UBxPKg4lRWxgP12wPx4DQPM+GNOZYk9bHDcSfBCiztrhm/eD8hO+izcNofuHzE1FTiShnKY1wXPGwIpPQxrlNpnFIYsNi1ix+LpWklzKemdQGYiZmGLSeMV7jUus4wKnoUJDekxVRnTRsnEGaJ1hzPnLZ55NyiahlE3ozO3ud9wyW7Y/FHaopN7pO47zOubPAkN0w1JuLSYozmxBTk7lMZhLr9HYgv8hsfIzpmoktTW3OtusDgJyITD3cb3SC2fiXeOkIJpJAmFhe1Oya01Kk9T7P0BpugykyVzoVn0BY4DU9ujiptkPnxwGUa9gko32Tu+giotSremWVnEueQ0bHJn0MS2fUzvDR7UAVW8xUYp+O5ZQZhLnu7d5BfhVSzLuhgc5sLHkXJ56bFp19jPP6d1nkFzE7WxC4AM/mFWZQMRRnB69I9+zP/5B4cAKdULWr0lV+1cjfkZu/ODCwTkShz1fZ8kSdhQbfx6QHM559L89IXlXEmJYRVyGzgbeHlIJ5lxNUlJLridX4ijSim6eg03dxkeH7FXnKxCbp5PEi9xL7gqLbOBrz02nh6RsLywnKcYA76/Ekcjaw+/gs39Q9qhork45e75J7hRC3P6gHijgvI/0Bop/oef/Ijn4Rnu755wbd/hsDOncG38xTpO8SeEpcW7vzxmf+ucoqU5P53x0L1HaFz00S1E8tvY+hTv7i+JOynurEH7YJ3JS0+J7q7TObmF7fXQo8+prY+wK5/oqMfR2w+oTIUUiji7jclvI04+5Hn6U8qiJm9k6Okmx2rE1eN3yBZXKcouk/y/sPlIoHLBolviHvsM7g+wLYXcu0rZEHDylzzdOORffXYN63GM3874/PqS8NEmMv2j1eBI/pSJP+Py4z7p9hl+7XLipMijG8jkX2OcmGbyv7GMYmyrpntiUx6nXH6oePLuDrL6t4h0n50n/5XspsXrBy5/r2MunQgad3La3qv4y99hbbbPuvVztCj5vHnOzffXmJkFd1sz8vJ7yOxN/JO/Y/3oQw5ekpy7KduP4aWfNtjvO7St7yHkNlf2f4S790uOooLOYR//2OJ0R5NGhrL+EzKryTj5c+JFyubzNazhEm1PMI2a7Z9dB/fbBPMG2x/+HJMq7rz+GO1ZdKZtnKlktDuh5A9wkxr38H/l2sdbdA8TnrsFT1+uuXX3EjvONkHvBpvVEbef/mf+7E/OefXDPV5++luISpJHGesypLm8we5yxtb8Q5x5k181PuDds+8yeBRzWTZZr0MkLpvP7/Ny9nxlOa8qqqpalWNlOb3GTYKNEHU5ZHYlQt8t0BfpWOsLPUMIjNGYMofflHP0i8uYVc3+F9pDWVXUSpJbMFPBanBISY4itz1SB5aWR2UkOTYzJ0DaNqUosZXCAJmxSJRDVUpSYTNzLZKKL9mxUq/YFoVDZUli6TBzVj0JgeuzLDWu7WIsTV7b1EiW0mMmNLntkWmxEmHdAF1LCq2whWGhPBa2zaHf5zi4get5jKWH5S5IQh8rVLy/e4UDr8Gk7nC0t0ZZPEQ5Htq0qC0PQ0VdacplCY4Co9C6Q3OpGUxrnMrCKyXGyZi15nzrlxVbhym6u+Td+wk3cx92Q5oi49bpkjBPePWzOdl2TqVgEdW0lhI/r/CFzWDmMo807XMPrSpcHdEcjejG11A2FHbEZ60Juax4eSTJ3JTBMkFoAXuayvJ4vBVileskSQtPBhQ3Dc0iA9EiVTaqlHj5LnYywcgulnaZhwKZ1GRuj8R30LogPO+QdXxKochfaRJZFvHAodtvI/Y9ajrcHX6NUztm5Hl8VD/kLBsQ3Wjz7fMd0kWLZ/4mP9y5hV1azKLn/OSVHmedmEoeU1pdYj/gqLXLj7sFxVaCLHMm3SZPdy3mskLOG2jbYRF1OW8NkFXNzHMpNmzCvuR6LumaBoET8rp3lUrMcHsFaRhw6azJaE3Q2YoIzlw8SxAOKuZ2TDtos+gECLeJ7Qb07A6ydigoOeuvM23vMXdtUv7UUNkAACAASURBVFWybC05bUT0VYvc9qnFJYreu/TSJxTBOvh94iThOEho+y2SwmXktJiIAcPlFK+M+LNrH/POk28wtqBZWrRKwVG7x2dS/RqQ6Yse35d1k4aBeFkSVyXW+Zj65PnqIfW/9HGYNKUeHaF/Uz6OLy4heCFaSimRSqCVi7YVeVtRfQUBKbxVTqSobOqpolINsu7F4ChLCstCAEVZUpQ+ujJUfptlewV4UvLLsmLLsigXNqY2lM2ATLmAQDsOud/CuA5oQzVRVLkgb/bI3DZ8xQCmHQfhF9RzHy00RXfIwleUYUHZkIjQpbZ8nDIDq03WUOzvfI1n/pTz3oTcNEn6bYIqIG9ApQIK4OzyDeadAXUTEmeOFYSkecR5c51qGaDpYaqbzHoTPrm1xmgrYNw9Zdao+Ps3OvyruU+xt4u51WB0HvD3N1xmV47xqxLR1XC0jVAR7toV9rZ9Cq8mV6w8LSbh2a3bzB408ahx65tMowVGGT4dZoQLn0/yPbxa4kc+AYK1yU1qkXJ+fY1n/RT32KUMY+ykjyUijAtC7uKxRh22CdMBhda0SoFSa2gZ0py7LIY3GDsJnZmPvrPJR6+MubJoIBtQWC5R0uX22RHvR4Ynbxha+VVeHrnEDUGYKLzSYlhZXJ67FHbJebKOYwlu7TscbTZB9ZDGIaoaiKCLP+3hDxrcMBYHezFy7OCfdjC+z52rbUr7OlUATd3C912SUNM/s6jsFnXpMnV2SJc9lk7K1K6ZNQR3WgVNL+J3ao/MODyXaxx0cjpnDmQVciGJPb3KOVkeqrTRznXuX7mNmFdMw5pFJyVLPBzd40YaEouCk42XmdsujU6fcbxBXdfYTpegCrGkwlKQDNd51LlOHK3RrxyG3atsVz7RvIIarCDC9h2EspG6hlpjuQ6OHSKTAEGKsuWqh8Z1Ed4KUmZd/EZrhJIIL0D8E8uL/0U0jrquXyAgTVWhihi31PTmT79Cq89f0OpbqrNCQMYz+ssTlL3KsNi2jbkIuTX9LewiIkgmbBQrBKRS9sX/vwq5NRiufBxnC/r5EV/g9V6E3LQmECsEZPvkgJ6ev8DvgSEIQqo4xbOvYlfQfv4U+4JWn9WP8SKPVB1i1wmqXMdObNaWx8T+EZk+Yjfzed64RyuLsFWApSMaWcFv3blP6/UjynrGx5dzSrWgEpcxqaISfZJ6wZiHmOqXdE+6bN9vc8UpeOO9mF9euUlddNEHdzgo7+JnTd58sM2y/DnY0HJ8etLHK0Ls8X306SecbS/wpyXzVkU/tfit0QF7y2/iqw5D9YDAW1ComsROGD5o0ng8w69d5K1LSOWiyw+xRMEi2SHPJ0STFkG1oHNgMMOQyjFU0c/IwjHN03V6TZvT3hLjQaR3kWoTSUUY3qfrHjCsfa6ltzgs9xkum5Q6xGZAS5/hOEcs9/bxMovruWGr0SaOQjqxwRV92uKEXesTShMzVzmD0GFzYvOkmtOvA4KizUb9kMvqFywCkKnALiVdCwbzgGHaYdmEgfycbXWXRaCpF4pFrlGJ4caHPiYMsYoWSfFDdp5pkiBj+1wjazhSSzqyQ6C3CLXNzeQXeM0Fg6rJsZXRUiVnQU5YdfDYxCHjxvTHXH/2C3r3DR+8umRtZLG5v8WN4iZh53X6+YRri/d4FNxl6/mA2x/vUVQlH7+e0Dv7GgqHRrFk7+QJmal5uH6fQfANyuOfEbNJVnewiGiOnjPMD3AvThxVWa1qCNOUILiG6Ho4NvieB2sd1HJVHyH9cKVxVAXC9ZH9IVYY8U95WfkX0jhWWxUhBJa0EJakaLWY9BvUckWwr6qK1HPJsoxFblOOFbltMx50/1/F0UXmU40NWegxGsp/wFWpL6DTNtVcs1iLmLhdAGLHIcvylY9DG9IzRZEJFt09pp4m/Uofx9JeQaezcw+70MzXrnMe2ivS+VqXoNRIb0BbL1B1A+E5FA0LGhGNfptRNSayv4ZGEeomluiRuTWfv+zx0etbpGHJuJXiypSeWCeIhljzANsG37uNcjc43FVEcZP1ScD/8X0buQ5Z2WPWeYPR2mWc2uFn7PBs5wrMDHYMI7vP1O1w2LzFQ2edE06wPYHINb2Fx/NCEeseYR4yKa5iFjALcs6jgvV+h4UIOMPnshtSG0PVfpMwrWhGEeedGXatiFxDO2phywjLFWw538PxC+ReSGutRg5WWYfWeoA361M1CmT7a4TBq9gdyXQzxA03YVPiuiGWbFMGkumVlwla13B8gTSC823wckHV7FPPWuTRZcbXbUbdAumAsFwmA4v1tmHo7eHIFo3hb7Ox+xJXAgdLSqb9HDsRLAeSo3vrrC08xKvf4/ruNympKds1GPALwWnX4vX3NpG2zYb6PuFmSdHSCANubnHJLsmuORRnm6vw4Svfo+wVTBPFsluicxsLQze28ax1sm5NtP7veG8jZ2fbpfTH6BrOFzZ3vSbXiwbTls3Twdukgy2e1xFuuuqOmXRiMr1NGTtMlGAcXqUWmnzNxS4GRIOA3tLHzR1qrTjqX+azxu5XuCr1KnG+jPnawqUhC9KjCuZLBDU6XgJgfeEiteSqASyNv0zO/iOvfxkfR1kiBC/oUpYGmwXN6SlGyVWsvshxHBe3yAl1hF33cPWS1mSCpVYhN9txMEaTZRmBWUNVAW68oLesiOP4RQu6MSvit5+1UJWDt4xpJhOEAN8PiOMltu1gao2bD7Brl8bylGaa4DgOXlm8gE7XcYZTrKNKQWM2Qlg2jfkjJv27iNqhDk5g3sItb0OR4C8eIdcekXlzylrSWG6jFg75+gRjMkpHMLEE5X5FsZlRjkdE3Qpt5WRCgNXA0jnr1Yjjeh9XdMBRWJ6PbxaEixqn7BPmx2yMH+CVDi/tT8jXn6LGUGsIshv4hUNjecDa4jHz7jFCSDInRxUdROMK+qyGuqI5H+Huh0xeHVGLOUW9y9i1aaYebrmNLQSFeoyRGme6gT+okXmHxdqIp+t93owFabVkX79PMssYHHSYH5+x/5pFkFlcftSnyLuYtGA2u8NxOiUuS771SYPe2KF3WHD8Wp+q7JLlx3j3P+BgO6axtJh0cl45bCIzmwN/FytpY8oR56MPGYsZmQdv/o3LeVBy51sl31x8Cx3fQv/qY56qT0g2bKKnAc92Z2w+V2zuhzQev8tsrcsPF3/L348eceORy8mgpFLQnUne+CwiTX4frQKeHf+U7OGc806TRmrjpDE/74159bBNumzhxpLylz9nPDzlzqBiAmw8bYJjMTMRadIiJ+bO6f/OYaeLevYtppFH2AyITYLnWOg6I1guGOrPaezeQ8mQtPM1zGmDrB6T5B20UVgSqiol1wVZ9ZCfNj8gqL9Gp9wjLpsI0SCanNGfjnHdixNHVa4MYGmCxwaqJckpKIwL5yfUx19oHBc+DmWvOkfPTtDJ8jc7OIQAx7Ff+DhsBUJbyKLEmWToiz4OXRT4vsAkKbZaWWatusSpVmjHoixRqlp1K+Y5yqkQZY0sS9Q4xUnSlTgqBLqukapE6gai1LhpjVOkIAR2KrDjFNdb8SukqRBaIascx6T4voCLIh87AyvNkZZGVGDPc1RVMskDDpw5u8tdFklKs7SQZYEoDNFszuOdhGya8eZpn/utKVQheTmh1hmm0LSOJoTlKX5tUQc5R84Jrmkh4hZUJV5coxYWJj5n7bHPslhS0qH17IBszUPrkrxasszG1IVHvhiSFhOsFHQARZ2ia01dLEjKMfP6AFlLyrri3EnI803qqkZrTVzPiRZdsuIQbzxjbeTQWNr0pzbORgd8m8I8hzLjxkmIJRc0z57glRUvPy4JWx1iLyNkQpwv8BeSo12HBUe0FornkUTPc1SeYI0fk6Vj0Jq0brD1UBGlDodCIVSFdHK2z+bsNjM6RnLSrWhdy+lNHXamCssXWD2L/o5FupWzM5O0rjh4rsXX24qNlsRT4N2SvLnjMm8YrFnF7Y0mLU+Cp3ClIkwkr3gQN2FbVehGghGGABvZD3CODYE2BJ2YZ+/MuPXYZ+EZ7K7ikijw+hXKAbtQbLqKs5bmbCvD9zWtOMRyDK28xFaaiZtx0Bux87jknbt3Od6aUklJ51hx62QbsbmGXVd4+YLT/gHLUNLKjvmtz77Oo2bNcNbBt306esm1fEJhSu6XYy7NXuKd2OaVuWboKCSGQZFwvZziFi5VXVFXFSqLqcqSjtNZcWnqAitPMb6PFbWAi5ZzAF2vWs7DaNUC9pscHCuNQ79Yk1ZCkF0gIJ+sr1NL66IntMJ1Vq8JnexLBOTj9b0XCEh5YUr5wseRnRVMGi0efgUBKf4/EJBP/NXO2rZt8uJLBOT0pKKTGo7XWjz2V87SoigwGJwLBORiZBB5zcFGj7PQIa8zsnaHsVwjCd9gEiimzQ1MAD/du8x0cEzmZHzSWyNXGSI3dNw5ltVGS8Hh5U3i5i46hDrIsMKYCpeyEaFnbbJWm/NOA6feIW92qQYWIzyK4WW2GjnMWxj3JkRDTKVIBk1qp4+9pll0KsxkgJA+RftVsDdwxNtYCizLrDi9/oDK66JLhe2+w/H1EuH9Pr4W3LvsMFj4TBLFpTrCtQRp8Mdo4fKDr+8wbaSYq5rC12RhxOWJS+mkFNafUPoZx1da5C1BGc7gzGbWd6hOhiRNGK/9CUmU41UBd14fMHUSvLiiEUoqs8bE8fnT33V5Wmv6mU18BnFi085tgiwi0U1G8R6fZyETChKlmF0RqNriXNYc6T5L1eQDc4ufnPVYZGAZl9k4o39uMTz3eGMyILIDns/f5lflDXJPMdaaxDN4RhB5itxsIoXNif19pjU07A5zJ0NIwbicg3TI2WDiOPxo61/zpLWg0A6njCiiLtKRDNycTA7InBbK/h+ZbQd8/I0e4+6C+UDhhzbxMmI3hifNNj+//h384jWU8Bj1XH701oBlr2TXibg60Rw3OnzaWKcyNXFrk3Ds8TdXe9wrBvzBccIry4rD3mV+1dhFKRuta2qtUVJRVyW3pgrfGiPXA5LtJvpJhJwnwBdZlZX+KFwP2Rtg+eFvXuN4oW9YFlJXeOmCMKvYWRxgpMCyVlyVL8TRddnGq9eIlnN252cvCn6+WLdmWcaas4GbN+gkU66kKWmSrjo2AF1rpJJ09QC3cBmcHLObryznq5BbjOuuyopbeh1fewyfHbE0yy/F0QuuSp1mNKw9vEqwuX9A5EvicsGzjR/SO7vKtHsPuw5ws3+Pzg2bj0/Is/eZRAmtaRNhz2npOcm6hRH/liDJ+cbP7vFgMKLqCM6bC6KNEYs1i+biFdz899icpfzOs/e489YjLj3yWZLzH3/ic9BMufP9K1jlNwnij/nWw/fx2g6/94uI/+XGKa2uw3Ld4ZWjb7NWbXFz/isWnU+41VTktqGk4vHylNc+HLCTfo+m08ekf8FYP2TzXpd+3eDhMGbn0S6DaYPm4HUIBE7yF0x1TPfsXZxpimPZLIKUnadb2MENtJkxrf6UWmd0H29yeKsgKcfYi6u0J02MDhCZIdE/ILX2CeYR2w928aOaoipo6T5e8h06xWMm238OY3BOGtQLjRN7tMYN3OwaVvEmrcVjGsc/ZBKdEoxs6trQObN5LFJm+XcgfxNn8iNa6QckwxpnFDIZznAqi3c+bNOJ/xCrt4k7+SuS8g7WUrHRajCJwDcW1/I1wvK7VMolL/4MNZlx6b11zro5tuPwpDnCmUXI7D8QJi79R39BNp4z2/Z4dOUZreUljLJIZE1d/TsqJsj4B1hlHzV+C1mdslG5iP0pLV7CtvuE5Ejzd/SfHNNIIobLNruPIg53prw8e4Oo7jGcjnktfUwlag42P+KZF/D7n77J1+eXuWQibOGw9ewBrxWHL5yjRmuCYOUcHTZuYHUUplZI4SLTGL2YrR7RanWSR0pMWazQCEKsfv6RZPt/EY3ji61KVVXUul4xV5Qkk86XWRUF0vFJiorcstFaUApJqlxq2yHX4susim0opEILQWnZxFZFpupVy7llUVUllrAohUQLQaUcEu2s+kgtm1S5GNtdrWMLSS0EuWWTChfp+KSlxhhDbSmMcqiRaAG5cogtQeEGWKKJU87oG491HLRVIGwX2fKp2326tsbeKAjPcp6tC8RagHho4/oS9XqfaOCRtGq2sin0bZp+hR8F1GPwioLBTPORbuDOmugcnkQNTjqSRegjz1yQbVrpq0w7BT97q8OTDZfTaMKle/D0VLBnfM6Mx92Z5MAxVHZJ4FrkQZv3r2/xxuMOKBttD4ibKXXYIj2SnEcuI79FQsAlxyO0LNxyZcmmPMcXPqaY088KkvAEq7iGEQKlQ1qxxLI8irDC1W3CUtEoFNJIrKrELzws08OqQ56sC9zYX30PKsJgU6oIv9hl4acIHVLLktKyKfUKhSGwsI1Ea8mpF3L9WHG4DqFxOXcUKvPQUuKXTULW0VbBrG1TKwuBzbjTosx9jGcTJU0sepxHkvaZzTQy1MphOTHUhcDBpbI7LNqKqnWJ+dqCViroLyS7py62Fihd08ty3ttLKewcS3RQbp+0ymgYEJaNhU1tS4rSJ5E2tRtRKoWxCwpto4VFieQ8dCj1GhUhlo5QUcRZKJhWEXmsmCufA9WmEjULr0uorvBZQ2AlKa3KpYlLplyWVnhBozekUmG3Wiykw8L2UQLEuMBN7xM+KqjPT1eDwwvg8T1KLKgrvNffwbn2MpP/+X96gVD4bz44xFe2KlJKpGUwxiJzfSadHWr1ZTo2cT3yMGNe2pRTRe5LJt0IaSvKsvqyj6MoWJY+VW1IfMVksEaW5Rf3+bKPI5kpqlozawRMlIeAFQIyS4ltB6E12dSmKgSL5joTpyJxPYowx1x8liwnn3k4QjPrbFJ2QoJHd+gFr5C/Ar5f4+QOUrYpLclBT3Davko48dka19zfOqE3sbFdMDSZacNHRnIQz6iUhUpqnrfmPNspYdHiu36H6V7E/Tc8pi+fc+w3SKaC6jQkc2ssPwfZorQv8bR3iaNowfiyz3NnDb2s+bif8dsnm0z8FsetK9wPQqbWgu6Ry5O1EguL/tYtposWYamZtW7z2fY67VFEq9lk2ppz95bH1kySxgFubSPrN3F1zGSzCZlkHIZksubSeYt8FmGETW1/g8I3HO82GQ2nhIVivtamUzXRSQPtG0zjdWxrRtmwSdsNLEdSSzCeT6UapMGQWfdNoKBsBuSNgtoJWVtEJI5HWTSZ+jtI+1s47oxsz8f3DLkj6LglLXENK2jjr79O09tiM8rJEIzNOcYRHO8FHMo1rsQtPr9+k8LtctJTnAO6FMiFy/GaT5Kt0atc+nydIsrImh3iKGUZOaTehHFLYT3tEgeC7fE3Kd05iS8ISrDqDo7SKEujdAOvsOikryOqLp7TpJD2inuyDe2pi1yCkBlXn3Q46jagDMhyF0uF+JZNnWssIamcgNTpoKVBqOsUVpt+cJlLzZBwUVNryfFgkztBH1vZaK0p6hr7Asg0jQPatsZNYCw9lpvrWOXqNGH5ATqNMdLG8gKEHyC0XiVm/5HXP/+rCvDViK5hFXILkxkb8dN/gIAMWS5j1uwOrh7SiGdsxqOv0Oq/4KpkdL0tnDyimU3YyuMXCEjgRR9HS6yvEJCTJZvpEUKAd4GAXHFVDA2ziWs8+ukBm2ZJEISkafwVy3lGqK7gVoLB0TMWE0GSzylHnxB7AivXPOqeU5pNiC2ah49Q5h7eUYPO8yHSPCZPPIrhBEELT8Pe9ITajFj6msWswG5NuPxA4sUhJX2ErlgufomePoXzTdzEoE67uO6I8rKNnTdxs6e0jlIm8piWLBm3jrByyO2S9tLFTX3a47s0lr8kL6a0jgJEpkm7BZcentA7/zqe4+Gl7+Gk9/BnLXqnfUx1jp11qScdDK+icKn4axrTKbZzjXzi0kp8bC9l8/kudvgSwswQ5q8QVs7G6QaOTNjIPPaSgKZp0dTfoRYJV+2fk6gzrhuL7UHAjf2AaWSj7D4t2WUtPOTt9k8BxXrVYNZI2Do2vJQ6pJ1duqO3uC0e8jz6CZcrg7nl0Fwq3FJyvVFw1QsItcfV6acI/T6CnGTuUezEtG3JZtmgKwK6mfi/qXuzHtmy80zvWWvtteeYI3LOPPNQdaqKNbCqSIqDWhQlkSLVElpGG+0Lw5cGDP8W/wMDfWHAQqNtteW2TIkSxUGkSBWLrLlOnSnPyTky5tjzsHwRWQNbaoBsq9DQypvMyEjsSGTsL7/1rfd9H/bkW9zS92hZgiAWZLZgc6IYCE3b+kMaqsPn7Pc4qg/4vSc139+oMEJyuCUJbZ+m2AMhuM0DvjaZMjYed7uHXDJbpGGOXwg8eQldT9nd/xmVcnnh7ibvXjnk1ntn3N1bctC+QTn7fbxlRqPehzghtjSXDq+SmZykGiGsHnVRoMsl7embdCpNfPAL1tUXGE2HfDDfY6Ps0hVN/OkZ7ek59gXJrSxLwjBkMZ/jW3vYHUV92ccSW9TGRUUXOg4/QF57Gl0b6tmY4tFdsjd+isn+K0CnP7k+TP2q63q1vXB8Ug2Tzo2P8zjKgshZEa5mhU0xs0gDi3G3jbIsivKXO45F4VNODYmnOR9YH7FlBR9mjiqWc025qJm1A8aDJoJVxkaaJmhtI2pDMtUUmWTe2mNsV0TOCtVnAMe2Ic1J5x5WXjPtXGESaJIqIfUdck8iLKj0iEo3Ea4g7l6jbPpkpcdUdKk6HbJAY3kjKtNElBWT0CXzt5F1zYZdkNHFlBKtQkwd4E7neE2HcH6N1nwlB75Uad4frFO6XYwM8Mo+W/WImE1mRcXY9FFAZiqEbFM5EtXfZV3AqDmhaIX4qkDUJa2kiVdb2MJFycv0Fg18R5L0JYO0Q2ejSbO5TvhkAEKwtvZb7FrgrbmsbQtSX6JK6Gx76AdNujrkS81/TaIr/Msaq1ngehbLlkIvNHI4IAtL3PUvsRMUWDswrAW+lGQOdOIGlW5jtIUJv4IwkpmjqGXNyJHcDzTdKKQ47XA+uEl0uYl0K2aOgULgCsi1oHa2MV6Lov8c850tbLeAoeS6XSF7YO9ayGyXIg/Zsb/I1HkW1QFaYMoa24LFtqIab5GnNjPxPHlwize/ZlEMDLUjaduCsGmRtXroUvDBjc/SbBTUjmRXL2n0HNwQulOBUQ085XCVLzLpZ/CiRXG9yWT/GZYYNuIemhVCc9R/nrOuR6xKhLVLXRvmgykjuUk+MswaLm9c/wy9uMOwM2B9vs1TtcVNr0Ev05hKErXWGYc9tNbUVUVZVSSeR9qJSecOhZkTpxlJmSCnEdVwFdQjfB9cD2HAnJ9QPnlA/v4bUP3qNLdPpXAIIT82uVEi6xKrMrjxfFU4hESVBV5dIOIYx/jIKsSqM9wo/mg4Ki8Kg8pzbCOQlUZnKV5UIbNfzhxVUmIXDWQlcYscL58BAqe0IUlxLiTnVtFAVhZ2EuEWGV7tIZMEALtYZY6qUqOqGjdZ4qKQZYSbn4ESiBRK+wydz2jPBV967cdUz5zTnkhuPdokYEKuDe9fL7HKHazUsD2KqeoZUW2wc6itKZWqIW8jzR7kBdcezhm3lyRS8ni7YP2BYv9GyeeWz1KT4URznNMDgkbM0q6pKRB1xSSoya09SlURqwXEC7KtE4wJEVYBQlE3utRLhZGG1J6wc7YgrtpYDTjqLXnkjLlzt0YsNxBacpA85ok/4tl7e/RnPifdJe2lS/fhOrGdMpcJ35+9hohKds7aHO3PaMY2O8c+MzziqE9c1Hx/8nPOqiV7T1yCVNH/qc/RWk7TXCVd9onKCd8/e43G3GJz7rF7rHEnfeLEJwwMRdZjFi04XhyQN+BnLz7hv/kPgsQ3vPV8zaXZi2wvb+H+xYxgL+H1V04w9yNO6jmqktx+p4E37iBLRS1GbOiYe4tz9NsV93cKGksboQSTvI/KXN6M3yU+Bx7e4MnyhGn/nOffvMzRwGaaJ9ilw3tPOpwkc6pWyc/sD+iddcgHKVtTj7zaY2HlPJAxzQOL46XN+WhEf76DcEd0jzWukTgiZifNWNt/wKGtuPUkpSorTmVBO2riFJrGeMJ6+Zi1yZyolfComFKkLkZk9OsWvdrHi5e0yiX6ozyOEj8PiJZLnLKH8SrKAqoM5GJGPVnNOKr0QsehLEyeUc8mmCz5te7xT2XGIeTFgJZVzoYqc6y6JMjPqJX4ODowDxBRhKs6qNrGKiPC+uPowA+h0laW4joSVTbQ5YJQLlFpiv6EO1ZKiY1Ali5uHBFkpwC4rou8QECa2mBXCmVcvOWYgCVB7qPiGMNKmlslGVoFyBK8+TmdrCKd/4KznffJRI4zrMllAzv5bUpHoocC25Qs9RHeYs4w2Of6Q8kHL7Wx85yaAqXu0YvGPHJyevMWiZxinc6Yb21T8xwFFWZcEpkRdubSGp/TtNbY2D/g5Q/2UJsZjcji1LOZ9Y4ps0cs7Jq0WfDcOz5ueR1d9wmWH7BZ/ISTWwq3tAkOI7rap570SasUrxKU6oxcT9ncf4QKA0b2iMjPSaoCsht4hUMnPeTM3efSyRGDA8WDZ0JaQ8Pl9zzC619nGZTo8hGIgrDqU+sRjghYn4e42gazpJFn+Mm79OuUNLBoJYrrZy0snXNzonC6l+lGI/aOH1AKSWPs4EZbNM8ressAZ5BjiQ38dEazfoxZGpi9iz20Odw2fPnbDv3WHiLfJYkryncjqvVj0uKcyBqzZQLUxMN+chvTsLl38Dp/HXyA7Wm+mm0wFzG784CxXyB4CpHXpNld1u8mXPkgZSRHHDbG7PzM5+Gdc0S2jpVnbD+4S9o9pViDovsLMmNhn1YMjtZpTG6zbMy58eRn2JnN3vuG2atTbt4/oNGacfPkBs21Dq4ak8m/5bBzj+v3r7N3UKAsSW/5AbejlFbnJlfn+3zBPMIuA0Rzxq5pcvMgou/2GOgaW5XcPHqM+BOB+QAAIABJREFUXj76hK2+/sgdu9t9FjY9Qtch82xMq4PsrgEXx7GAqUqE7SA7faTrf8yU/RXWP2nhqIVB7xrWrpYIIfDchOZSYp1LsrDHaK9DqVZHtVVds7RXSV+zpaI4NKS+x/mlTZSlKcoCgUAIKKuK2cSiOKlIOiEnOxZlVf4SAlIgWJ4IylHFbLfLeWN91a1ccGo/1HFE+4Y8Msy2rzNqwPITWxVLWai8JHmssLKK6eWnGAeKorxNOTglbUfQs2gvNUVzjZSav/2DP+ZwbQhZwV/vuBxcPyPd8ejoGGHtMQtr/p/P7jFnjiMV08IgmiWyp2iQgx5wes3lO1++w/HOMefzAHTKX15f5+H6Pnu9Nb5yLjlqbvOdV1+hcBMsc0A7nBN7JctrPslhhzxpMdv+CvcvP4/QGS3pMb9eYdcO51aP+CCgkxla9u8w3siYexboGtEsGOgUZ8OhPu9RpRrb+iZtL+X0RYvZbYuuY6h2BG9f8tg7GuCpmm37v2MRViyedVhrFoRasrytiC2of77Jwody838Aq0aUFYuG4vtf9ViEOf55h63zLrOwhemHFE7FpO0gRk3mWxZBprlaCIphg4UyTNd8nMAlaH6OX/ymJow0582Q7dKjIKS40WbR3MZdu0rspTjdkvNcED9n85g9dmsN6TdY6CPq2vAzy2NcGpalx7CVkcnLGKXR/AFHOxZ5Y4OTzQlFMOHw6ZBo4FBm2ySWxWuv7HHYXCDWCkzzKqN2hR8JlosOldqksvrcvdqibiue3Fgw8ySvdVyWjoW112Nt7rBwfd6+8VVYfI2f3Onx7rV1iipn1pxTDNf4rVHJG9d2+dPG59C6JNtc8tZQ8pcbHdalz7fOcl6a5/z9zef4dvPZi63KSnLuuC5ZkqCniktWjnrnMaocYZqbqM5K2v6RAKwsEdpGNtoIx/217vV/0sJRGcO79+Zcv7sqDu22R74oKKjR8Yjm8OBCOap+ieQWWm10vYYzndMaDlenKvnqZjcY0iQlcLdQWYA9nzIYp0RxhP5PTG6+GaAyB//BkmZ+ivhHTG6e2UIbl+D9Y5pmge99bHLzPJ8qSXHkZawSgjcOMYFFEscsrxxwdvMR9VGAnWn08vepy4zWG1PMzjv0Ttp0cps3+68T7u9Q+2eYpI2qSnqvLVg4jym7EpPWRN0J1+e3Kfz71PnLyDE0TyYcWW+hDzqkYYL/8GniO3+LPH4VSw1ozMZcYgZKMN45JjXH+POcbrqJZhNprtCKHnJ1eshJ8YSdez4jy8NIj151BdvsIrDo1G+yyGNcbZN5OVsl1OWMlmlhbB+Vt+hWb1Mu5mylu0x5QGuW42SKrXu7WPozVKKC8jsYN6F9ogjmmiIADegDD5n+LnaSkIz+hNTKEVWNWlr077aw7Jju8BpV/8t4w2NaH/wZji+YOoYXX9ujNXfptBsUPQ8rfomwekK3fA1HOaiNfTY/qLl8bHH7PZf41RdR4gZX33qb9uQDWi/NebKdcuQ2GXeWbB+FbAx/Hyfo0R//hEL8mN5Ysjv1wU343FuaD1KFk/wr7LxFxZ9z7WDJ7pFi2FngU5PKHn/0Z4Lu1T+mObf4H1/7Lo87C7795SX3+2MSVxGkIW71NNKs4yQLmuVrZL7gsH3I9bdug7LpVIJOnuBYO9jWku7429x830VGAdfH66RVxpO9Ba+Mn2Vgb/PMeIKIHvLg8k28ScnWyWMG8YC+22fTBDjS4aWHd+kkB0ipMKamrg3aXlEQbzduU21qir5F0fTh3pRqtOrCSQKEMWBpTJ5Rjc8+yur4r1I44JPHsashqFQKjAJpENq9gL+sFJ/CdhBVvcq7zCVYFsJ2EdpCCLX6GhA1CMtCFBIhNNgGWdWgrNXWqK5X0NzSArmKQpPCW70g20E4JcJxVsaOUkEtEcpGCnf1/dp8/NyK1eutDUI7oC2EU6NlCMrBJkRacnUdqcB2UMpD2C6m1ug6XP0Owl6drwuF5fm40qL60C9TCZpxSuoIpBF4ZUmvSPCLmkZRYOcVvcWSsDDYpqCoasQc9FBQS8NC1pzrGmsm0XHNtC7JK8MkEpwvPI5MgLA0o0WbsGjSiFqkqU0KPKiWnMc+Mreoiwr3fMbZrsM8D5gWggY2h5HkLPPh3Oew28Iog2VpjLrMTSzqqmacSpy8oEyaNMbXefvmfVpE3JYeytJor6DvtUllTjO2kYHAvtGgf3mDOOrhfODT9jp88dZt3FTwZLPgpu1SaEM5qAinDbwfKbodh+vXOhROg1dbhitXK9xtw9mtivXMw1pqyksOctsjvOnQ75bYC5urV9t01x3sSmMnmqtP7fD1xm1apeLWmoO3M8WkOYO2pH3i4QubVuTSms04HZRM2xbP3G1y+UmDnz7jcH3u4KQOZ402RWXjFRaDk5rT3RS3MPTPx3hJTFDEXJs8JjorkesuW2/vs+EalpbDXl3jD3oE2Yz144yzjs36+Rqnnk9SSI4aLod1l7XKYeh0eauVc+77aBuqzT3ePU1ZC2u+sKy5biQHrQ4/b61ohFW1CvL50B27KQLaskTkNUWmkMePKR6+v3qfez7m7huk0ynFvXco7r/zkTjsV12fkgCsRgiDMYYSQWZ7xLbgqL9KOV+Jtj5MK0pZyy2ysWCpNYeD7j84VSnynHHmkFUlc9/lyYbzj56qzKaCvK4YtZscOp3VqYq9SlJfbVVqFqMVAvK8s82hcxG19olTFZHmxBMLJSvO+pcYtWxkecDxoMQ2mj4uDWmhS4mQNhuLknuXetjdJs6ZjwwMQdAmFusI6VObCuN6THcG+JkCneC5l5kvKnx1E6Na2HrB9kLwVr1L1TVkXk3Zztmd3KJT+Cjt0jMu/XrB435N3OqSuh0aUQDKQpoWtQrJwk1mYQPL7DC6bCHrlW5CHkicykKGmsvmFVp2hVKCRFQcOxk1ksIKQPXIccB6lriZMjXgmSssHYWsXSy7D1WIERWV+MKKn9vV5OmAeecyExnRjdcp6TILupw3v0pKSSpXYry3Gh2SCVxVES8XAadG87eLF7h1H74ziPlRYKgcw9oR/O79ARPj8rDo88HhUzQXJcOdHkmssHNJpQS/f75Obje437/Gfa/JvQ3DMgBVudjzmsVMMqr7SDze0RscRT7LXLJsKM7KknvXKrxMUFYbLG1NU/8W05sJJx1N25ec34SHdQscSXSwjvF9/uqlbzK1K06vnrFRJ+TeArcVcnY7YDlZZ263+evnvsLW0mPmVLzxLwp+1LboDvvkkcdO2eDMlRxtfpM6rVG7a4xYEQtRiqTXppwYFtpi7m+hDTg4BLmH33W4lRh6SkElSYMOSy9AyFUQlTGG0nHIkoQiCagZkdQO+aJGnh5SPnkAgLQd8n/7vzB9vP9rJ399uD5VAZgQAo3BTSPCvGBvefDRcLQocnw/IIoiNqw2br1OM5pxKRp+gquyenlZljJwtnCzkHY65UoWkyTJL0UHKqXosL6KDhxHXEpXR0+u6xHHH+o4alr1Jq5xWT86JmKxgvR+gqtSJxmhdQW3gK3DQxpjQRzuE9d/x5wjVCTZjDboz/5bcmV49u6f8DfPn4AKufPGLj958SG6GBDLEp308GTGxuNHvNt+i9a8way5oHcypTecgbiBMF9Hl4e8+PNv89orc7bHgoOe4bST8pk3YSf9HP76l/Dnb3Pl4A3u7s3Jghg7Mly51+LSBPydV1HVHRrxj/jMW++yUClT4eLqhCDWfOtHHXZ2v8L4ep/F/M/Zfn2CUxhKUbBlK969U7IzXaOVfJVW3GB99OckxRmbZ9CaSI76S7ZPXL705oDGta8zaxgK/gPWuUVrv8Gdwxv832s/ZOfU4fM/fh7P/yxlsqSa/m8YWWAP2wiT8/QPtrArRfXZEEu69M2El7LXuIRmkg4pOgWJXXMrbXApuEMYe/Qb92nfeg1VVzxXerSsVZdWiZpm8QLd6TUu9w7xB09orS9xopRlZtGuFGXXo9VwCIs2l51fsBT3CRQ85/VZDtRqUJ7XbHst6tjhRvVTrDpiw5SkSUUlLF5MBoQTwe7yN9HVlG8c/IhUJnzXPSccakaNfV76oA/eBrr8PRw54/L9v8V2EnaOB0QipM4Um/tTBqqD510hqM6pk+8xriu6s88TuiFZlmIZg+1XyMLHESk6OaKqSmw/4G6coKUkcZu4dQPPNBDLc9RyhOOsdBxFUeKEIcV8jlS7YIMlNEpKxC+JuwwmTf6LiwZ8ah1HyYe8k6qqqIHU8Tn3N6g+KhzFasbhxExrjzzWxDpk2LA+Po6VK2VonufMTYuiUkR2k7N2g9RLsdSHQKYSKRVRGlDUgrmvGXqrwarjOCRucoGANMRRQF4opl6XoQpXXhU3+QiPgJuRZh4WNZNwwNizKKoGpmwy6p8QLSyme4KTeY+qMvz8lS/SMaeEVclP7gScdX2aE7AJkNLGEi5ZuAFeQVa6RO2IThKBzsi6m4gyYEGbu1+8id0KGLs2RS/hoEpZ2jVkl/nGcZNH1zfJ0hF3b63RjV2O1w2P9hpM+i0+pzsUUYNx8xo/3rOpSx9tQM0U0cCh/uOb/MFZRaf2SLybPN6qWTRyBktwc8WyMcE6sxG1R6E8Ivcm43CT6yc3ebB3zv7OhGN/ncf9Nv/zaJ3ciajsOxSFIg48kqJNIp9jpq7zdv86T1Wasa8R6kXsomLe2Ca2Y3747GUsY9HvTIhPfc5rj59MMx4sG3w/exuVVWBVNPbXic+vkJUhw3Kdv2peol07dDKP9QPBpG1RiArfWaNTeRyMtjmYtnhXT6jKnLSu2b1fUPoVG4mmGdk8nva455fIHNx3HA6nFc25IHcEt0c2ynKZHVxGny/4yy/PERk0px2Y79FPNHfSLgJ4M73DQpUcl1PGO2OGVZsnaptG1GBueSyk4P7ub3O2ds5mexMdu+TdnEeywVOlw1NpQORusZE9z6x/TDsHlSXYF7tlV9UoI6CWOFaAUQZXexh79c94XNeMRc1C1kjp4MsGQkgsZdDS4FgetQOWcVaK1UpSmf/yAvGfW59CxyE+IqytogMNshJIAbalqK2VjkMagxaCyrLQlUIKiSUl9kVeB5b10VaFusKqVtoQSyoczcq8c5HHYYnV5yqXSAFSGJwLWJNjWatrKAXUKLG6vq0sHKtGCYFtrRCQjragqpAZSCHQSq0eq11Es4MQY/rWLqk6JVceuco5DF5gXJ5yoGOaN1ugXuetZ2KeOQ4pHQuV1fhlhZflOPMpQVBSK4ESilRVVFmNPfW53+vi3JUUqqbz0GejbpKKEq8OVzwUXdJM4Nk3LGZS4XYkBonOFUYDBpQweEXJef8QOfTZlSHVeYFdn5GLAf7Soa41w411Rq0xp5ZD69yhMcrwsopSKHKnJlwU6OYS++wY6Z/RHSfcPppx46BBw29TeAaI0CLHKxq88GTGvcOcZ96d8+zhffzNy5gwRpqS9kiRWymalJ35DCUVXryKavQiQ2sUsX0s6U9SGpHgeK1AP4ngaEHZb7B2r6bemTMrSkRsEZU14b7Ng92cW8KjKls456fYiyM0c5pLwXubNlf2+5xtZsRFjYgM6iBj7kW89PMOW6c9hv05bhoQtyLqQNFMBPaO5PyzDTpBzYNlxtN//wwzx1AGPsnQQSI48Acc986JnZKlkxFEEpHkNJMUuy5xypL18Zg0XNIrziishO0nDTrTnMuljWdpHDVn6gzxixjteoh2jziOEUIQ1xamkthSoMuC8gLtqMoSISS2baPqGswKESJZmfGqqoKyojY1qsiBEqu0cI2LUr9eSM+vsj6FjsNQlsXHJreyxFCjk4ggevzLOo4gQEZLXN1FmQ2sYkqYfELHYa2GqGma4nrbqLyBnU0IywiZxCuT24c6DqVwxAYyd/EXEX5yiEDgeh7iAgFJXaPZRhkPNz3GNwuCICSOIowxH6Wca/saqgBveEi5EFhpSuycoLJ30dOUzD1G5S8gRIo/WuKoR2T5jGJgUVU/xZtbbJ7dgjq7SG9eIvU+afuUR4Mhn70/YPvQxmrnqPo2FBnz7IB4bYfMZJBDoDVRmrFV5BRlycyLeffKNmYqKewJWf0Bbu6SqMtUIqOmSylPOdh7m0jE2EOP/PwZUs9BqSUpAbUIKeUhehkjrCPyGtLIx9GCI9mhqiG1E6bmGJGMSNUmUzmhjmPG0mOoLXKdUJkMU73Hws8gbVInPdxkwubBgu1HXXS3gzATTPVzWiOXMAs53IrYOZthtMA3BXaxR+c05aWjt7n2yOWnLz/ElCV+EvOH311j1xFk7QbNyT5XHr7JU49cHmxnXH7c4LyVs7w+I7NbGNNn4bzH/fY7+DHc30wJpgEvvCmYBSVb4zZhomksHuIv3+W3vtvh5j2bu60pX/h+yJ9/q8YZXkLXPs/+2Ts8ap9QDmJ2Hc1XfvKQcKk4222xXX4DISSvRP+RYfOY48GU117IKVzB3uEeW1UfJ9vDVxFPHb6FtMZsnEpq1+XW/jqXD0oGNLBvBnjLMzYPHtM3inN5iBcrkiRGSgVuQGkqUlMyrRLKqiLwAqI8QQqJY2oS41BSE5uciUlw6pqqrijqgoZusIhiMl2u0CRFQaX+WXQcH+MRLMtCaEluhURacDTofDwcLQocxyHNMtZztRqONl0OB1vIi+jAFQLSkBcFo9QmH1fMgoCDDZc0y1Z5HQLMhcltOoF8XjHsdziy10CI1TWSleScumY5EmQZDDs3OXJqbMe54KoYHHtlcovGFjKrORs8zShcISIX/SlZsMdsYw0TnlM4TUoZcNTbZdTbWMl6O5I82KbObWadBuVhh8S2eLzWY9xdZ+qeM20lHF3Z5cmdHjeXkiK2ON+weHiriVV7lKbA1IpYOWRFSjzRVFOPNHyK9+70EEYS2xFZ+zaRUdR5H+IMI9uk3suk3iUKK2Ex0IzLK6SOITMNiiNDndsI/QqLgU/avEaJoHZDlK0oLZ/siYMjCqrgCxiv5Phai6y7jchhIh3KyCKzulh1jdT/EiENw12fH/3GOqcbc370qsvklsPvpQ0q2SZ3/w33LgnCvMGsE/HajR66VjwlJWoeMhpksPwy7z9VMG/dJAs1oqr537+5yxeiNZ6ua/Y3WiBv8vZ1yePBjKHboGikzNfOaT7Zo7R7vHX9C9x1X2LczsmtJf7Q49+3Kw63NV9+5zrh1OVg7Xc4W3+Rf/f1bRqzBnefP+M4bHB8PWM63qMSOd955r/nbCk53R2jlObkD12aqaDjSb7whqZWhh+uf5lpGBMFKTdOND/YSRj2fbRZSeRzFfIg+A2qqiT1Smbdkoe7Frff6dFyA76R9ThpNLi/vctpOKcuW2ym22RZhjGGq7lDbgqmzTaHzQFVVa3eo1mGkBJba2bDkiyCSSPgKNxD2/ZHknPXdcnimOXEoi4nq5PNXxO29KusT23Gseo4CkxRYZcRfl6xHh+ubPVKUuQ5QRiyXCzpWm3sqo+/nLMej1YIyDT9SHKeZRkdZxOdBjSyGetZTJqmF7b6CwSkkDTFOnZm058krKcnF+5YlziJ8S46jqBax64duscnrLMkDEOWUQTGrNgraY6vLuEU0D88wnIFWZZR6w8YTMdsDR0yc04lJGFi8a2/+DGHvRGzJvzoCzFXnswZh5IguowbfwOV5Hzm7feRszPeu3ZAXUfsHO/QPr5JMLBQ1VU60Yi9u39F6ae8vN9k2fSxjcJUGdfkZdrl01x+co9n3ruLrA3n3YL/ozcjOPO4OWzQWLuKU98g4HV6zs8QpqKzCPid1xpIp2Jz5rG1/gqdeIOA77GRHdBaKNKu4s4jj1mz5uU3G+yqL6Ndjxe817miFkQ7JVcLiTqvaO6XfPXnA9xnP09moGW+i1ul7I76vHBwCbs/xVkIXhjv4Ho3cOoZ187+DCuVdMYhpybms096BKnNttqiXT5Pd3pKFf+cn9xOcdwhV04ltai5sexz58kzuJtXePr8EO/sTV6/taBrCb702oC3bs0otkZszD9PmGkC3uIzB+/wjlexSEtuztfYaik2nyy5NHRpVgMuj9+gV7zD3rzNi2/1kFtDPvNOyNt+xPb5N6iaNq/c+z4bHyz47ucXWJbN538SolTF4yuwtfhdJq2KjeTv8LyaoZ2zN+lw9dGUltmmUmcY2cekMX7yGPe8pD3vMm6f4EwNYpziBx2M1SSIl7TyQ6L4HnoSsja+QZGXGGMYBNvo1KFRpayPT6iqiiAMiZZLpJRobRNmDWzTopWNWB9NsfWKHVtW5QoBOZ0RyG2Ee+EX+/8xBP3PrU+141BqlZ0o6tXMwFIKebFVMUqhhEBfzDRELVBSouXqcUupj0ltSiHFatgphUQrRaUU1kWamFBqVVlrwYcf+uJntaXQ6mJuAqvnCIElJRr10SwDY9BKYS5SxT48HdJKUCuF0AWtaIFfzRj6MaWuMakhUE2WwZxIJ5w0piyaOYltyEaKUmkiX7K/s8vIkojSZ+69z1F3g1a8QekuIRFkbkbeHpJ0c269ZfOop3CTDh/sSoa6gPs1QiqULwnyjMNejnQrlJ3RUBVKl1iixlEFgwhO+oZGLjnddfHcNse6iU5sOljY2sbNNL0zgzu1mG6muFWBFbjUpkIawRuDMUkx4vl320x8g8x99i95fF/f4rdKC6coCJDcPG5g5xWy/5jZZsSzsw7dcUJ9GVyhCLTF7XccXntJk7kt3n7RY/N0Hb/aID9yGA3W+X87l8jcEr+A+9fHNJddxsPnecCAG9Lm8Wafn/mX8NSCJzcOGZ72mG1V9FNI2i5mKWlnAam3h+Oc0VtENE8dZqNNDren5F6XorKpWg1MqPFlyOx2jhNKuu2Eaq1kMohp1AJLCbK2ZrkJmYrAdll6FcapqUSGk8LNeop6EvHjVysujcdc+55k0Viy3A5w0qfpxBE3Hv0Cz3jceHIf5ZfUVptrBzl6s8QLd+glKd1wypOnDlhbKvZEDx2vbsVOPsUXfdaqhNvxhLKq0MvlxfZ/NeNYx8JXPptFxO1ijNarGUdVVdjRkjzL6XhdtO0hpULKX0dM/qutT7XjqKqKuqqohWAZdjjc6K9Szj/UcdirbcAgEWTnFUvb52Bj5x9GB5YFo0iRj3LmYYPHm/94dOB0VJHNCob9HgfexqqA2Jos+zg6cH5W0UtqzvrXOfhPowNtG5nmRENQWcXpRpvz0KbIc87Wexi3wuQOmXOKsS4RNQR/+tWneNSbIPKS0h4ixAqwbVd7ZG5ApGzeXbvKiXOVpBuTNa5ztnUJy99hqzqnPoIi2GTaX2PcP+Hffdbncc/n6ug2jzrH6CQjEz3KyuYvrg+wc58H20v2dYRYlzxcL/n6cI3MdJlWz1Ec7TKyc5I1l5Gx2Bq2Gbc0zyUhseUwz7/ApC5JK0n30Oa0nVLYhtd7mp3FGr1CMyq/zLEqkKHNQtcI7SGBhuww0x5+KRjnv01r0eFskPNwUzK1F5hwg3rX44vCY0GDA+uPSNcdxnVOUZSk2qV227jGItYhC93nyVoHlSfE3GAqRsSOzVH7DtuF5EqUs7BD3tn0yYXggTxn3e6zb80Zq4wXxRqxbDEuX+BNO+NIDdmYCcbtJltDj1k9Z1k2CYVmv3Gdfd3krfY1DkvNO2tD7r/kcDIY8vv+Fu7C4YH3ZdJdeOCcsQhy/s/P2Gij6eQ+R701dFkxLL/GvesZD314+Irm+bdtJu2KqG94NRpQOx3e3fk6gxOXyWXDw2s5tvCYtUuumg5x1maubPKGQ2m3yP113r90jWKjoDYGO1FcntQcNtr8orFFVdfYQqCSBMEqCnMwE2ymihPvMne97Y+iA1dJeBZ1UXJn6RBgUYoFdf3PoHD8Y8pRWRnC+Tm784N/MByNoog1q41brREu5uzOhx8xZZVSIMRHOg4nC2nFUy4vI5JPmNzKauWO7YiNlY7j7ITdi62K67rEnzC5NesN3Npl/fExSxYEFzoOg8FzV8PR0LqCU8Dmw0MCV5ClKbF+C+Ur2gdrLP13sIo/wBTQOzhgnO0TDAPGwRsU1RRhV7SnX8Qqb+HFgr35mNrbZ5GOOO68xfrh89x8chu3tUCUezizmo3sbR7tfJdj1cCKQm799JB8+z5OZw0v/gIbR/voy69x9Q2HeXrKqDUmAebdCCv/Gqp8FmfxQy6dvE1pMha5zc7dgNv3Q44vQai/hM42cBbfZ/sQxFKxbF5hWQyRUrFIbOrKoq489Og7BFWOXrbpyCYTnZObikrcpqSDKhVe9KfsHr1A7DzgUuby7rUP6J07lKKHKv+I9nTJV/7m3+MvUo6HLtEdF7MUfOZRn6C/ydriZQb5lJfbf0ldpiyrioWtCTyX35z+gkFyGU9e5Ya4x1fOv8ddJ0KPcr5y3+JJVnOwXjFYfIXm8lluLH/I87/4Od/7fEFn2MOkAa/e1dw9OudS+ru0vC02T/4Mfe0t/qc/2cJOS/7Xfz3nN3/g8qffzOmM/g2dRZ9n3v82R2pBUZ0y7CeE5+DLgH/1Vz3CF76JW/i8+s5rWDcesnFaMhSaq6+vMVzPyEfQ5FuINOX65NtsvguOrrDzlKO1iH/xHx3W3Fts3P5t7OSM3/neDwhfXGAtniHezoiTBCEEHXcDKw3w6oTG+Gi1VQkC0sViZeS0bay8haKNzs5xJiNsZzXjKIpVHsdyscBSezgyRJv6I8zIP+X6VDqOVR7HBXgaKC1NpiQzr0dtqYvCkZG5LqnlEZmAMrHJtc8s6KMsRemWF8ClFZApEiFlpUmtkHk7uGDHfgidNmjLIk19ykqysANmdn+lAfE8Ih2R2DZUNXnmUZaayGkxky6p45Brf3X44XnUdkqeOWhjWHht5qFN6iSk7i7SFizDHpUVUUsfowzTwCMKcqrMo3AuU+k56AppGkjhoC2JJ0JaTpPW7Jy7coO9SYfePEMFDpaxCeuc9dyndG9xsr2GqnOWWhHG/K/xAAAgAElEQVSwSW2tkbkNFs0+5+2rtPouhdNBqDGyNrh5jmCDUodk/iXe2oQszGEiwN3kyTWP+SAnm/coK5/C2SHuOuStgrXYR4suEoktNUq4KGlRh1u05oZevMl+vyDyU8JFRZVLaicgdSwq+TRFo4/uSvhAs3B9Xr8luD7Z4GtHLRJf0jy/Q2aDnzd4x8wJpjNmxw1K5UNiM3NDHje2OVqPuHzSxnmjyf76Ae/lW6R1j+u5x/5ai7+/fQnLEaz5DtMvaRpSsNaqWH9wBeM38O0rFM+6XHdAb7scS4+Tay6zvmB6fBNZODj9l7mebPP9zwwQOmbaPeewGzL3phRqgyhs8Kj3KrNJyqI9IvWXSNvDn9q8fyXk88U6tYH7m1cZN/rkgYVeehxe00x7CVfHDUSjS2znjPks+Y5GOZA6sNgy/NtvuTyT7fHNesAj0+D/urVGVpUUXRvX90jtFGMMC+FTZhaZFzJXA8qqJHNcUstHSrGa2c01RW6ztJuMtbVix1YlRVGu8jgsnyTzMKWgruqP8nH+Kden0nGsMshWJDeBwEgJlqRwvI+BTEKhXY+iFpS1TZ0KKmlROB7YNkWeUV3480sjqWobIwSVpUkVFI7BfEI5WglBpSyMFBhHUZCvfCzKoXBq5EVYcVVY1AgKy6HQEu37FEJiDAjLRthQlwpT1ZSOR2opCgdqK0Bqi9pyqV0fySptu1tmnNc1jbrmkWNTahth1yg8SqmIjeJx0+PJWsrL97cxdsWo3UIVa7TshBJJKhVJS2MVDpeHCaNOxvxKTnPcZWPSQOcFSAvhthBhi41Zkwe1QlAhdI3BX/0pLRejPQrlo6TNJFijtCSJk1NbLkZaJC5U4gyagmCc4BRgpKA/03iywi41svZJq5y6LAiLkuNuxM5c8OTWGTzaI7MltQo5dGsyu8/hjkezUCQehMMNpPFJLPjRcy9jJpLcLTho7rN3/CI//ZzFjThiOQs4dDPuWjnP/U2ApOTGfsT4DwfEgcPcBnGmKHwPb3CFyXDIfjRj8LMAjMWiKRlZLru5JhlvcK/wIbeoyoqTds60CAhHMxY6pp/bcCrJXY+x22DhasahYH+tSxw4FNqhMIqZ9lkKh4MWzFrrxGkPL/A56fncmPlIIfjB7vNEaoQZZDSeeBS+xbi3xNMheekRlT5vbN0g6PhkF5F+bdkiayyIHZtyoSgtj6Rtk+SrxC2jNKUtVlZ36WEiQyFqctulqmu051GwQqcaS1MqhZGSStsUjgGtqZWmkiWVF5CXBlNpTPlxcPg/9fqUOo6aj4pHXWFVKXZe0IkeY5REqQt3rOfhxDFN3UGbDbxyRjc9/ZhWfyE5T5KE0NvGyhv42YS1OrlAQFoX4KcarTW+WcfKHYLpgm56ghArd+xisVhtVaoaT+xg49KanNCtF3ieh3dBq/d9nzJOcayr6BKawwOUr4jKBYv179E7A3+ek65HhPM9rESxPX1Ckp6RGguZv41wjtEzl8Fpj9IEOJVL/3TIfB5RWgOC0ycchSc894tnCLoFyn2W3nxMV7+GKu8jZIdcpxit6BSKrfMFLh3aizN6J69z5dE6palYrp3yxuYJWbNApy6iblDV93Djt3n6zKI2PnvR+2y9XzFvZ3TDr+GXmwzO3mAtGxO1DWuPU4ySFI7Cr32a9GiWbW6/8T4j5vi5S7Eo8eMRQdcl1hJVXaWSAif+Ia+8q0l3BQ+3Mm6c1vzdVsJz712mpVrMxZzf+MUPKFMolGK+PmJnfB/fWNxc7iHNFRSCpTinzK9Q+BVHQYPDk3cYzJ7CKUZk+Rqn6TEP33ybO/czqktTlt5TREGLWBsyWZAlJadWxpECS0vyNKfKh+wPjth5GFE0fQoVIrMlOn1ARgPrPKXmIakRlLyHlV5D1RXe5APEac72UY1UEA4nBFlIK+ug6x2klHgnj5g0R8SNJXLWR8gG8c4hp7MhVfl7yEjQnjxgMGkzu6AMBosQGUUEsoGWO7jZkk5xjpulq/gJzyNNV+rl0NtC5w0aIqU3O6CsSjzPx00SpJS4rkuYNrFoEWTndM3ol6DTQRDgLBY41h5SNqhr889jxrFaq6IhLlAJBknS7HG61vslBKRzgV/cyCTZCCLtcbK29TEC8kOTW5EzSWzycckiCDnYcMizi0xSsdqqSCmZT6CYlUwGXU6dLRACW2vSLMPWKwTk8hyy1DDq3uTUNRc6jgwMaHvFVYnPFVZeMVq7w3lgI6uY4a5DMo9otQST9ZTUWUf/f9S9x5Nk2ZWn992npWsPDx0pKzOrUBqygW6IFqPQjZnh0IzWxtmQZvyruOWGtCEMRrJ7Wkw3SPS0AApAAaWzUoeOcO1Pv3fv5cKjsqrIWcwCtYCbhUUsfBEW8d7ze875zu9DcBk0XGx0sWxJFbRxjQZheSwHt7GmEVIauMGQdstDlxGb2fdpWg2PXxqxjcaYthl3PBb9b+N4b/LhazXtI4vLwQHGjmDzzGJ1FnLZ2me8YfPhq11UpbjcTMn7K6qoAmcfjB7KfpO0dZMHKqTyGxJCDgc2Kii4fTqkXgV47h/zy72E3EvofbuNKUzSlkO7ELz0aIDOPNSdP6YKMrKVRvrQ6tc8jgV+Y+HcX/tq3K1/x4NXNGkoCXPBL19qmIUNz/bbpPMBpRfz0d73OYpzeguLZX/B+TWfILe5Pu6jpiGV7aDC71Bsdqg8TWIG6G6fmerTaQxkFYF9C8vd4NFdSSNN5lsRFi3SsKRMHLQdoNs+ta0R2kRLycLbZrlX82wDksseWeIz7b+KGd0m3eoQlIoyGJEcKHzVwjGGIGxOb77AxXVB0vXQekXcbuMYJpoYeeHQCItl5x7zbkbZqhG6RW04HN2IyLY2UW+1qGyH8903SHoRlWmjlVpnZJQl/RzKmUHmhJxu7VA2NSCwbZumrtFoJpVLeVExb3c4bQ2RV+E8a45jTWUvLmuqBBbtiPPoAMu+8qpIieeut2OzqUFZCnRhIcR/fSTgf+3ri0kA+8zxSLB2VbrpgsHxJco0ME2DsqzwfY88z+mIFk7dxS9ShvXsecq5dYWCF0VJyxpilz5hvWKka/I8e54QpvVaRBPVXezSpjWdMlATQHzGq7JeaQ+aIY506IzHDESG63pX7tgrcjQr8dQWdg3dswuscJ1vui8X4C5I3JyaY5T5AkZlUPkfs31YExWKuXOINBVnbdi4OMFrvo6bLfnBP/4179xs2FoMWNpjRKPZnnQY2du4vI5TLgncx9yRhyzSDPuo4Vtv3yAx1xSrI+9iiPu88ffvgB8wR+MPNIE14XDvkiD5LlZ9DyHfxykfs3Hqcf/VJcMPh9RxTaBdvPorOM2QXvoep+4h1x+4SN9gFUquX9h0FzbDyVfRYQDF39FK59wctzjZlHx0YwkG3JEb2PSohMa2/pGbA5+ggF+9XLFlKOJAY++3sPIhXVJ+N/sJv7xT0wnB7ipuLwP6K4NXzzaJrNc5OLngheFfsF/EDE8Ndk9c6sGCrzyIyPd2iKpXGRSPeO30PWpb0ZobdBcunanH6bBgx3uRuL7OTvo2JO/SzgbMeg1zXRAsclqZw6b1LeJqhzuXb2POz7BFRNVO+IbSHL2ZMbR8vJ/fxJM1PfUMGVTcwiYRR5hDyeipjx2b4H2ZKLH41skv+KfBBHM2YOs4whMV05sfUnoGVhXhSouN2ce0x3ukpoWU6srdk9HWAU4zxCtzhmpJUZdX16hHUawBsLY9wCk94lXDMLmgaSS+51GUBUIYuK5LlPrYMiSeLhgslriuS9NImqbG9wPyNMWXGzgEmFr99pQqSqnntnqlNRoQssHIU4RlYpgGRlliCIWR5xiWg9AK0dSIIsOQFkZdY1rrIB8jLzC8NkI5CFlhlQVGnmJ+JsjHsC2EikAZGHWFUaUgBKahMfIUQ60RXEGD0BaiLBA6xURhXCkgTQG6yBGmBAWiyNcPpzyjTpcoX1EaFZU5wylqrNygtHPqoqFSgqXV0FiSbmqTGQ3KcJh1Y/7mO2/y7ugxbfMGD0aCuqip3FfItOL1pcVU+nyQe7xfpBhas5te459euMlczvi9uksx95g7ml+2btGbD1gEEyx1iqlLRL0i9SpAoUWOUAsC2dC9WOI/qxjfXPJwv+YPH91CVBHm5SmifIJ7EoBt8pNvpbT8Nm8cBciyxjIUZ7pkJWp2moiVOaUzTXjhmUPjT6BqwFF0DUUlFK6E5mLG0ss5NxVF6WM0UDmSQ0+SlRmFXTA2DL78zKGRCoWgNBrMumbpL7j/tYZk7hO+D94BND3F7krBSuKGDc3OgkFiY/dMzLwmnNp425p4bMNck95xyGyNlBNmYYX1NKDV8Vh5FfYDibOs2fbn7CeXjAcXlOOA0aXJj36Qo0RGy5zg6RY3IsmgNaOSBXIxx67BszKC1KM2KlZuSSrvc+fnNZ5ZM5EZB88C4tszelUHqxZMo4ImNRBZgmE5aCUxDdbXoDAQQiFUjVFmGGW5lrQLjXFVqhi0QDkYssaoMwzZYAiFuCpVTBRGbSK0j5AlBimGlhhNs75nDBB5CkYNxhUO8dtQqgjBFeZ69ZQzLUo7InUNjoYDmquw4kbW60/7omBYmhQTxcr2ORqtzeF1Xa+FTKwVkJPCppzULMKIR5vepxzHlTtWGAbzGZSLmvFGn0N3ez33dhzKssCx12HFy0tFXmgu+rc58sC7wt5hLa4WZUU6MTFLydnGS4zDtcd23j6Atqa0CyzzDnmwQwG8f/efs1ImaMF47xxlSBzt8q7f4jsfeqxcxdv7+xy1brNZh+TdLXJVc653aTUKlQXkbcFkp0vj7eFqjbE9pNJdtMpQcweV+pTdewhPEQgTj20O2zfRQcrmKiOPN6gnfaT9ddL4Rc42HWSkWO0HpP0xnpRo4xZZEDIZfpeL3hsox2E8hCbMeToCbbj8y1/s05MeZesPmYqCf/L7nPVn2JbgfqdFd1Eiil0au+JJ9vtM3Ra2ALvQzLs5dqbJ6JA5XXK3w7PBv+FBe4EUGkrFT4cBjedQhV2+d2xyeLuFvPbfU9XwpK2ZvSQ42zc5tT2+dtRiOPGZBC7v9ffwWwaVqfDSFs52l0U7wS8jWinMzW/wfryHn9jkUjHdkwzw0I3mxbqNLxx+Fv4e56FiGdZkjk23bPHT8gmVKPgTe5uh9Hi3+DYf2sfMOxXdsksSL4gMkz4e1y9aCB9+tvE/8vFmQn+5zVwt+fmtHo92DtlqYHW+jfRqLgZ7JP2A0lxb5H3PoygK2oWgmLLmlbb3KK4M8bbtUDc1aM24dinPCybtDs9aQ5SSz0sdIQS2ZXH3sqZMYdqKOIyvPbfVKynxfJ8izUhmArUsr+7F36Jx7CcPOSEbvGZFVDTsLw7XHIdpUpXlVRZGysjq4qkNWsmS/dUFtu1QVeXnFJADbwe3jOhkc25kKVmeY1+lnCv1aR6HV3lXCsg1x/G8VPE8kIo22/jaY/PohEStCMKQPMvWS25BgMwKIusGXgPbT46IA4NGZjztvUvrtOLJvQuKeoGX72IuNVuPfkG3WBOptf+YyqgJApfo8iZW9SqOytl7doE5+oioPGQZLzFqyXf//oBdZwev+xUOkoRvLH/KX/TvsxEGfCU/YJi1Sc2UO9UePfECo+oDfOfnfP/PTKw65+++lhNtVlzsJOB+ByleQTR/x81H7/La2wZHOzX/0/885Gy75D/+YcbO+R/jRttsnf4ls+QBO2cGvY7PfjvkZ+6Ml5KAzfzfETcxN+c/4kYzpWgJvNpi6zhk75mB1hYbyx/wLKoIq/+d/acOxsqmCDWlhiIw6Zzu4+dvEuoF3/yHv2LuzDjqN3RWJmZmcf3jLUbs42WvMpqcsnX5l/zuT9ss+pqtk4j/4J9w0a24XLyIl3yLaPEQ6/wX9BuX1Fvxtfe26GY+96/NOTh5nbDe4e77DzGiD4nv29zfWFINU667Le6ctNkr3yQSXXarX9OvUy5JYGGwk/Y5bX5F7Tb0ZIuWjHjj8lcs7HcQswU/+PGAX91dEi0adqchTv/7uLXDN59+xGHnkv7FS8j6gq3lDc72f4qlTczmn2FVS0ZPnzGcdsgs+zkynqUpIxHjiW3iLOWgmJAXBSDw/PUHqNaaUbCDlwf0ZcG1ixMa2azvkzzDuNq96pYtXN2mn03YP5viXiWA1U1DFEYkqyUtYw/DiNZqyN+Wcewn6sZP/LEoA+V6lF4fabAmR/0G0w8obI9KR6jcprF8yrCPuhIy1cbaZ1l5FbUIUdKmsUOyyKF0AuRnxrFCCJoqQCmTOogpvXXYsXYcSsuHqzyOJveQjU3ltihNFzMIKG1/PQpzXLArZOWg0FRBl1Wk8IoxYewQlwW5a6KsTUxlYgvYL3qcxQ9oTwqe2BWFXVMYDmnbxD4Fv1HcGo+ZdkpqM+T2Q5tFu8PhvQM673o0fZPKdEl2NjDMhGkpyU8d6qVFZtvMCkUhGxYtTVrWHA27+EWbRSQ5GzY8ubbizeMeAgdt9JmH15j0eqxaU969N+TxtsaqC8adHiPh02xdpxfHXN7W7EQxx32T7dklQaoprYCAmFV8wNRpswwLauXQqiJM4VMZKdK00YaBNkY83C04eGiw8g36Y5PGhdAUCBwcs8X59+5y65bgwKiZ7lY4XkFXufQufOrApmwCnlYtds+7lMpjuehzP6mZxAU7KiZvPJKiwyLdorIDcHJmnRtcvuowi1NWzRbyPGCytcvRgUfwckDhLOjMxmQ7EeOtPumTHsEqQl07YN6t15yOrpimPrutO0hLI1othOlTvHIDc79mIHPGXsSWkaPLmiAJ6Vx0EY3B5JWQzWGFaRu0qi7hQtNvDxkpF8e28VyPaCsm0x0Kw0NJhRWGlJZPLT1UZSMNn7LVp3TXJ13l2DRujdZQ2zGqMqgcyIPe2lIYBJSOjyEMpGXRCA9d2zRORGkL1NXYt5ENdhhRGg6y9lHSRmD99iDndf3JWn1N00iU0BSGxdSLPhUyXSkgc2WyUi5NZVIYDlM/XqecmzXWJyY3oyRRHo0pyCyXWRBQGPnzE8lzBaR2qUvNyjKZGjEg8DyPXNg4zrpUKWqHRpksnZCp7ZA5PoVaN2E9b+2tKKWNIxVzJ2DlOEyxSdjiYleR+afYekXu+hSN4GzwGsfyNoebNXCKI5coNEUYoESIMjweXb/H4W5EWwZUU5NMwzjucnngI4XHwnf4cGODlQXCaTjpbiLDDnOdsjFtUeYtaG4wG8X87Te7WKnB5XDBvDVj3l7gPNpaA2lih7NNm/blLtPNjD/73gYrS1PEFa9f9ujmLu/2N7jI2swMwf1znxN9wrKzQd7p8D0vxsx9LqtNDs0QdyVZORpPBoSlS9ZvcV56lFpy6G/RaXtcOD523bCoYbHMKW76fPcXHswN6r92eGeW8WS7YdoVfPPDIU/ObEYXQ7ZbLqk3oPDvMBnFaF8Rz8BlE4sGvxrQ+C52vEGwqRA1aKvg14OC0blkUYcUiUNZGiyfwvnKoJ3B+YbDubvB4qHkG287vCQNlo7BR0c+J2ODqXuJIRX9YsbZVFF2QsaZxspN7t/3eTfssnd2g8d2mzEzLEuweKo4sGw6hcsDFXGcaHZOa+yFRhYr0pFEZDaqUOQ+fOBVbA+3SdIGpSSJ5VL5JsvKom7WDuWJa5IL53nYVFmuN7SXuNSGIncsZu56XT5zfQq9Bicd2yGrBLW0SGyfqWd8zuRWuAFZDblyaLRJUyuapv5N3+ZfzInDtq11KpFlY1oCQ0JYJOwUh6irB0dVVc9t9QOzg6tHxM2C3fIS679gq++727hVRLucs6cz8jy7Iks/fXC0GeFWLv1Vwm55xuenKi4oRay3cbXPcHbGUq+e2+q11s85jtC8jtvA5uSYMDNI6wSrmtB4FSfZuzRmilN/BSUkw3qOsypZyIJi4yl5MCGXOY3ogbqJVhVNdU5R/YrY3KCpHISuMeohRjHEdFu0VgkHxz8mjY7I/ILBeIe92U28VkpvdoPAbNHNTtm++DW3jjaJco9H3TNSnjEaT9i5dNCWgZBv46Q/49qzFzFdwWvv3OFJf8Gyn+HWr9KZ72JU7xEmK6Qq2X3W5cI+pO4sMeU+ihGGMtHyHcxsQawikvgcK+ti5zuIJMeStxA6Rcofkz5JuPtLm7RvkscQ1TahNQC9h1WvuPvRX/Bga4U/0zzbFdx53+b2Q4M3J/cwvvzP2VxdsLnx5/zOzz0KX+DKhmuHCYZUmPWXaa8GvHFxRDl4C2VAXkm0JzjdUVzLI0biy3Tyfbam97l7/A79iSb7+gwvs6naBVYWESR/RNjaZf/JW2xdnDIJV4z7it97u8uP/uVTZBYQpFu4Zc31j9/i73beYvD2Fjt5C9GbIDQcHG5i7rkERcDm5S+59M/YuhjgTQRfOuxwtP8+g/QaQt/AqOfEzS8YJorOZfc5Mp5lGUMiXLFNpDN21YS8LACuOI51qTLwt3GrgE5asrs4ppHy+X1iGOupSqdo4dKmV4/ZXU6vworXU5UwXCPnsbGLKyLsq6XT3/TrCw0rllIiNVSeT2YHnHaDtUlcrA3zrrtuGm3UNuXCJAksTvqfhBXXn1FA1kxrn2qmWPouRxvWc2HTJ9JpwzBZLE2qpWLajTmxOwgEjuusV/CvpNOrmUVZCcbtfU4d+blx7Cd5HNnCw6gUF70bTEOHvMlJwhWqJ2n8Pq6ZUdsx2tacv+iTP1ZMpSZp9Sm8hNqokM1arFyamskwoIptErONWZlIS2I0LRa1R10apLst5Et/QL87ZyA109f75LJL5dRsvuuwmq2F0h/udFm227SWFcudfWrrJqtOxuXgGjuLDqb5JnZri/e/ptGNTx4OsKMWTlCjqgHm1MUSL1N0Ekwt0W2PyNhlJhoiEYPThyLEcN7E9Ar8iYttZNSdkKKMyEYm9bMeQkS0rO/T3nZIDYOs3dBPfYqooZUE6JMRy0GX/+tf/XckfsPuqcCLNIvvuLz3dRPztMOryyGzUQde/1N+sifpLSzSCKx+zZ6l6cz7lK0Rh2HA22EEAmoFla+om5rLheSN8RaF2eX8xj1OnA7LElabOQWCop2T7hmMP9gjXsWUvReZhLcobYnhSu6/4jHevIMlofQ2KPGY+Hepg4jja22Mqcd4mODmcFzH3LP7rCJBGb/E5WiPVtLHjCwMP+ZydAMlR6TZgNIKOdv4HoWzRejFKKXwPJ+yKOhWBtXCIbVdjjd6lHUNApyr0hwNYxlQyYZFK+IkjK44Do/yahzr2DaLqaLMDGbhNifhxtqrotR6dOt7FFlGsnCRaY2S6rdnqvLJtMOyLEyjwWpqPK3oLSafK1UC3yfLMlpEWHWMV2f0Fgm2/XkFZFVVRKKH1TiEeUZ/0VAWxfpE8hmTW1i1saVFnGf00ynwqa3eddfNUb/sYEuL1mpOzywIfH994uATW32FW2/gNJrOaorRmOycHjL3TzlLp1z0JniFQW9xBy0Vr/zVOwTPJI9upXwsllROTt4ziPQAP9ugrQp+Z/mMy+4HBMrk7gcFy2jJC48NvjLZI37hmxTVKbdP/m9WryisPCBattiftbn0E4xwk+7yNXbVY15NH9JLx2zPa97r2oyWNsqY016YOLXF5vkzvjR+SKYkB0fw8ocxv341Ze+spLjrYktwy48Y954S1QGdPGJzvuBI5WwehrSWG4RJhRDvU1pTXny6h2xm+AubzeOQyq9wqu+Q+RXN8tdMC4V9YnO/m/A//NkmP/wXM8KLIWXdpalL9EcfsOwsuXzgsOgndJ5KRmODttxHj76BLRKqk3+AI5/RI4eT2wXyhkugTLqXNZ4aEKoJbfsB0onxUoulvWDnos3Ek4R9sKcVG8GM3Y0p/qOERTJmMjSI0ThaEJXbYGh6+RFBkpGGklRW9EuP0LzEth0s8wDTFHTNOS37EEdeEjURTnHJ7kwwXAZYdoBTwoP2M7I6Z9pvMRpvcjZwKPUj7FriVD0sK8EpHxGnks68vyZHr5qbLeljNR08VTFYZuTV+sThOC711YZ22xpgSQs/r+nVM6SSBH5AlucYhsC2bILcw24ComxFr07XeRxKIZuGoA5JVwl+3cfAWo9wzd+SIJ91j2P9valrBBXIBpGPMa+mKrIqMasIkSQYtkTgI+oMo77EdFyM59GBIIoCM3CgiaFKsEip8gzDttcN0Curm2HYUHuYWYLIL9cmNz9ApAmm5685DuEitI9RzjH0CrMKMdJ0bXK7stULuw0NiGqKURk8EYIqtmgsRWmdomyL2qxwUgdRS5zsITvHE842UwrVkNYNKtzFswssam6rC661cqZBSrtw6GYF5WsV+eEQ24UmFiyum7QHJv1nNW0voesLxtszLDPGPGvwo4yX1CW7mYMyDIrznGVTcIOcjtXgSk0fi9O4h1SS4gWXi7LDxZtPsE89WpaiiRRRp2bXbtA9TVAYjG8tyJ0pWbBLU1TUpmYQFcyjGR/fFjiuYCY0h7MWc6+iNhWaksI6xzENlBGg9AWNDJnED6lPUuz6GxRBiqzGBEmJYYVcjiYMTjWPbwpeeb9L7lXUVkZ/kDNIal4vfQbTnEf5GTPHYuvJJlZeY5kJdXJE0jMYHgZ88MIUa/UCyTKjnOTo3EfkU9yLc7Yykw8OzgkSB/GqwbGVkTxO2Zx2qU1NLQ3mXkLh1LQ8C8s8I+0oGudNVGOj7BmteoG1NFg020zrC7KOg0wGvCYEtdBcDp6yNAp2sy7uxMVybKzmlCa5xJLXsGSCkCcYMxtjso6XEGWGyDKE0UKYIaLOMBfjtbNYCCzPQ16VKmbkIZoQs8wxkjGqaTCjNbJuGAaW4yKqFkLYiGqFoSeYrgtNg2oarKZALBZg+WBEz1H03/TrCzlxOI591eOwsC1AW2Rxh9ONwVV0oLhCztdjqFFpUE40SSvgZLT3qVflav78CcdRTWqWYcyzTY+quipV4NM8jqB//wwAACAASURBVBlUi5rxxoATd+dTjqMosJ11qZJcaopCM+7f5cRbJ5uvvSrrPA5RfMpxXGy8zDh01n94tyJvX2JVrxOq9RJUYDi8N/oeixe+SRLXjPckRdWQe0uu2wYzZ8hKK/6PTsx7xjFh4vELLeiMTY5uruic9dkUA5aGx4euQCcKp7ZxEou5jvjZzSmtoxZzt82T8Ca/qHd50I+QUvKsn1ALxWEn4Uv2HsMyZrH8Ovf7Obld0SpDFlsh7wdPOek77M/bZCLiovkWM5GQrSq2jj2S0Yu4riLrD8mTHkXpc55+m7QqiWY+l6MEOzaZXQ9p4gJ10cORXRzr36AdTd2xwM358JUYV71B0fbBGCGdHsuNf8bSqagdDxllnL8EF0LxUyfk29UGY6PNw+X3uBSCwDG4qAveyxt0aXGab5OpFuf1Pu/UBvlS038ccdEtCVILiaYquzSETI3rHNPhOLR4u3WLdhbQf6a53MiZWfvUukUuXiAVDUtKCi2phM1jd4uVJ0nFCEqPB/0X6Ty+zmnfoDXZwOr1KB2LVEeo1KGODQbyT5hHGUY0whhFmAKErzGVpggihO1Ttr6OHG0xUzGl62EGAVVVMawtyktJ4kQcbu+tS5Wra7Su1xzHRe1SnpfM211OWqN1qeJ9WqrYlsWLVxzHrBVzEl/HttYnDiUlM++qVJmtkXNR+tj2b/ou/8J6HBJQz0W4aEmwHLO7/IwCsirXeGyWsmF18fSIOFmwu7r4/y25FXnBwLtqjmZzruf5lQLyU47Dsmy6egOnchmcn7Fbnj1fIEqTZB0LKBUtdvC1x8bRCUu9wvcDijxHowmuFJCReQ23EWw+OSIKTfIsB6E5efUQjycIpwI5gDIivLhEXE4xe5okPGZwHHOycUS+W0PTR4kGlRzT5P8JMwuJnnToj3usBudU+gZG7aLNQ2T9F8SJTXS0gTu3aNFG1v9Aoe/hp39AmLzPf/vjB8S5RYXkH19ZQmryo+0zWum/wmxusH/+jDt8TEnNKGmx+zBmFr6HdsEuvk28ukG4+nsi64xO0tA/6yCSI+yw4taHN+nk3yMoW7Rnf0stJ/TPI0ovxZUW9z7o8uDFS1D/DQpNbv6v9JYl1x85pJ7m5bcDTjopfrWDV3Tpxhlfrv6aJQWjhcG5L7G0Re5qXtCvgg6wswmds79l57LD5nibuT5C549olYqNs98haL7CrSdP6Gz/JaKfMzx22e4IXvnIZLIRMLr8Ln54wP70ATtnH9G4DU+unbL5sUckF0xfrfCzf0t3dsDrD/6S3bce88Pfr9g4MzFdeOtWzqQrqMx/T7TcZKP+K249LXk8qnjjY4MnByUXocPt0wH29a9i1TbbT37MxfUzdj4a8vLfdbEdi2dbj9lZDDBUB6oMP/kxfvo60VkXpa6Q8yyjd8VxRFnKfj4hvyJHfd+nyAs0mqG3hZuH9FTJ3uXJ8yW3dZixged6dIsYlzb9bMzu2RTP9Wjk+mQRhSHJKiE2181RIUukKflNoxxfMMexZjbAQpsC6bZRpkAbJsqpkJ6HNCyUCNGFiXZcVNBGWjayrhGf5G1YLtLw0NJCmx5NaKGMtfYA1icOTAtZuSAtpOuj7DYgaDwPiYV012HFqnTQ0kTZIcow1r+DuX4kN56HMhxUY4MG5cU0gYU0HLRQVF4ETg+cEgwbbdnIIKKJG1QIyktQYQu8DIxi/R7DQAVtymCTpRlhDQc4ho+IoIw7iNJFxjHG5j2cVOLLPoxMKgKC9j5bhxso36Yjdnn4tRihAaFY7U6pH6Us44ZpHNAsXQ57Ix5vaypdMtUeFwNJfPs60nEJ8y6N6ZG5fSaRTdMOINxj0vopjZNysX2d8iSmFCF5NGJlhLilR9rOqZXNcrDL8bZBPnNYJydscjq0kNkGMix49w9u0mw+wZxuUMYdEsvg7dE9MrfkkeeRdBLiZUzdXvGyv8Oe9DDDGG/nGkYQkulN6Dt0exq/kujRBnLhI8wBrcEek70Fh9/vsoWPb1UYfo1R+RhYBIOQd3d8ztoh6Z0ueWXje4quv8AIe6SdFk/3X+Lp7Vvk25fIc8HZ0GTPO8MSFYEVk/Z8xrdf5PxuSFVO+NnLGyy9JdqUnMzavLyIkcqmvHMPf9RlaW7xoLON7dhkd0IuL2Pq+x6NECThgNTyCaL22i3kB0jDRisfXVto4dKELaS9jn5oXA9pumitkZa/jgdwQLqt9YDB91GmjRYGjeugtIeuTZQdoCxJcwWAqaahCQKUNtGNC1I8J0d/0+sqX8iJo2nk1bRD02hN5biUjsFk4K9Llc9txxYsKotaCnLbZDxs/xdLlVXh0tSSLLC56DuUZfW8B/LJVCWdC+pGsoxDxk50VTY5FEWJ7awVkNnEoCpg3tlg/IkCsirRev1eUVYUUxtHSGa9LSahQ11XSENSBRGmHdC0CqQZU7s+415E4naofJPcadMMHYooJDBTDO1gKom0HTzjS/QLi44TIIfQKUcI20XlNpUVMFMHLNwBF50QR7uEIiKlzTh2WHpdTqyYH1931wtLQlNEYwx5TtJq4zUjhPAZDgw2Wwptaiq7ouo1TEOPeGUg6SAchxfUiwgzI3NhVHhU3le5jBrSe13Esos2HdrdV6ntHE+ZDNslljawt3024zahsYHQcFf+HoWpaA8sslixM42orIgNM8DFJRBtdtlhZmvCyCbwGmJpY+QVhh3hiBjTtQjCWziFSdm1KbY2YNBCJIKyvUcuA462OuTbr9OxFFFuo+cWqxhM3+Rkb0R3HHG0dcDjgzbPNnN8T9Bs+qShYLc08K0uhhfitm9yulUQiOscD9bhvR37Dlaj8PUmluURu1uU2gSjTWfXpmV2mPRKescu4QdtlNAMezvMnA6FjMhUF6u2yJtbXLYE6BbKajDU6+TBPuNhdDVVWZcai8KgmpsUts140Lnajv18qbKsPeqiJvEDxnGAVJ9O/oSxRs5TJHUqWMUO47CLbVvP5Wep51EEOfncQiXVWlEif0tOHJZlPqdGLaFwi5SgathMDtGf4Tj8q6lK3+ri6hFRumAr+aRUqT6XANZ1t3GqmDifs1tmZFmGba9LFSkllmXR1hs4lUd/nLD1mVIlSZLneRwxa45jcHrMlk4Igqupiua5VyU0r+E0go2jI3zfoChyGrOB1hHHez/BsgVuvcdg2eabi6csxzNsX/GL5pDENJiHR1i1gZv16TUFW8Gf81PjQ/7gb2IEFpXbJe3fpFMN0PoGqv6Y1oMfs3l6C2gRqoCWanFmv4WTXCPIIvbPT/nue5cYpklqFfz87od0HjTMusdEUxfDvkmSPEW8/z7x8oigKGlNDVZfzdi5sJDBn6DyG2y89R8p7Kc83C8ZPLL5x+9lnNgNt+53GT77UzpNC//jH9KpzhALn9mNhM7K4ZW/CvnwT2vK6k/RJowXP0Q1OcGJye4gZDA20IbkRnqA34T4MuH64m/xbYOwiFh4BXHp0qpdrCDAm3yZ4fycjeKveeGJx+5JzDSa0pvOcAsbs/4m5uolEvEhTxd/S+1ovvrzHpsPPURckQQ1VutLdOevsP/erzj/1a/42e9fUAUx4nGPZeyzddmnbG7BfIfg4yf0WFLnOfUgp3AdDl9/yOogY1X9Cd1igPOf38c9EtTDc8RHA0qn5PGXn+I8uEuevIItK5a//t94eG/O7/yqyzf+aZfpMOBx/xm2pzHrf007z/HS/8DBxbexnvWBT9ce+iLGFduEecZ2OaaorpDzqweL1pq+v41ThHR0yfbk+DOlSv6c42gXa+S8W4zZupheJYDJ53kc6WpFaO5himgtKjP1b8eJQ6n1L6q1XkthhCD3Iy6i/c+NY33fJ8sztqRHmbikTpvzjo/l2NTVesmNKwXkQsVUC4PE7XHS763dsuanyLlhGKwynxqYtz3OhbvmOByHIiyeA2Dp0qesDabhJudWjR/4Vz0OnnMceRZhVopxa4dpYFFVJdJQTFsNnfF3qfyc0vHJbYOVjrhsa9L+nHbaZbFbY3GPwbJFFfRItWTe/j20s8njXZvLgUkRhsT1LsbSxThvY9U36SYmgT1CV2s5VFPbOOU9RL5NZflMwj4fBj5CCAqr5vCaSzBrE8gVZXgNo2qRmj2KzivMouuE2mbQ8dCtGUuzhGyP0m/x7q2XuagPGLdKjAPNrFsiDJOnGz3G8S5aBVz0fpdn1ox6T3J8I+HeA5OLLRvpCoToIxRgfhlJxXQAzoXJLywbc+xRNgFvEjJrDP7GuE05qbEWLaYqA6HYSdu8dqz5UupxYh7wN/IrTKsuXTPg49WS+8sTatPidXWXW0HMWe8ai/ibaAN+fmOXVsen8Rqi5ojI3CWpWjwNb/B238RwM5Kwwe63aNUabRpYdQctbLQTsTIkyXCDJNZM45C83SX3Cxy1heVFuNdfY7UnSe09jDgkiWqK7V3So7vUiU1pNZy3/4R4dcZq6HB/P2S5W9Gfx8x3JMpskdseifc7nLZu4Iw6a4mS55KlGf3apso8MtPkoh8+TwBzHIeqXnMcC9GmahSLwOXMM5FS4V99uBnCwLYtlnOTqrRZ+APOvXjNcUiFvNprSYOELIuoGhtZGb89uyqffq1/EArMuiIoEtSVDqGsSjxdI4oCF42lbGwqgjzBrE3spsGybdCaoixwhYOpHOy6oFVp0jx7jqRrrbEsC6cxMaSJXZQEJOslNxFg5AmOLNFKYUsLS9t4VU7QFHi6Xq83Az4SWRSYMsBUa1l2bNnkeY40JRsnAQthYTcN0tCkjsmjoEXqaOTglIFs8eDgPoWVc+3tl7GbgkDWfP3nK97dTbl/r09ieyxYcjOtKFIDoS2kECSdgOg0IolBqQqZW1ReiekpDCqiOmOjmGGYBolVYjWXOHaIETcYU41oFMIVDOwNHvgJOCZuEJEMFyRdl/oQpNDMo4opDl4Zcrd5icvTv+GdG8fEWUKc38FvJJ3ZIXN/jFXYZP0VQjh4so1T1RiyorEgc6cY2YrBGVipRady2JiYqGGMX72ADDNKdY5QEmEqpKEphaJITAZyD8sQaLEiC06o7Ta1gP2TFsfdS5bDFEmFokaRo5mALdDegMCXWE7G0UFDsVCUU5cz3yR2fGIlEYmJpWsuNg3GI/juBx557fDQ7vKg63LupfilST44R4s5dr3CXzYk9pLVB0e870pW/YZ4GjAt5hxvPuYVYwNbdNGGpBUXLHoNBTG/xkK4IYg2hf0ILaERAmEmWDolyNclhNd4UBR40sNULpaq8LIMUVfr5qi4atBrjWVYmMrBV4qwSGlks75PyhLDEHjaw21sDGXgVAWBTvGUS9M0NE2Dj4Qiw2ocTGVg8Jt/aMAXth3Lc6IT1mE+TlMRLqfPU87tq5RzM03xLYWhfOwmI5ITbGe9Hbs2tQmsssBzPQwpcJqMYJ4iivz/k3Ju4ggTU3qEVU5UTNZCpiqFq5RzlMbWPobS+NWCiM8oINF41dpW71htzAbCdI6UAqMokGaDEWYkzpJMzEFlGLVNnK/Q2Tm5YZCGsCEVajbDEMe48g6lKMiix/T0Cd1qirn0OA0y7pyn3LzsEeU9NpaXvJz/jJff67IKKrbPLbzJOT80Thnq1xAyZJA8YT/5JWaj+eXLKzbHJa/89AhtH3Fw/PvYnbtsLt5n7/El5t4FN45isCzm37ykEQKd97Aqj+70BGu1AAW7b60I/ceYm2frHogqsaRDZp1TmZcMx22eFGeklsPUsLGyCU5dYDqa19pLHqZPcVeazOtj6Yi9yw7KkWvpeFNw8CzBKQSZeIISGVJLrj07o3tYILbuEooF4fQj9h5U7F10kEpy2npCkZYcnAZ49pfoz48YTj6AbcUf9k3OmgWnt8/ZKhRxYtCRPVpb73F7/oCbpzZLN0W+75HeLshjwU46ot003HV/gqceUO9J7h2HtM4lD3zJmTZpkWKYPtsDj/PgGF3leImFIy6gOEQ/vYM0PRq7oXw24cR9H2d8C2dh4QYBGo1sLxC6xJAlZnOMlcdEy3V/IVYxZpLgixhTRNi6pJ3NyfIcBLhlinVlcotCH7MRWHlO2IxppCQKQ6wsvdpVcXGqFhY2XpMQ5dPP7arEKkIslzimjylMxBdw2oAvMAFsHR1ooA0ovJjEMTgarcNzhRDIplkb28qSQWFQjCUrJ+TZ6GCdct5IDPPT5uhlZlFOKhZRiydbPlX5KVmqriLgZxNFuag5Hw449HfXOK+9zuOwr6IDlxeKXqE4H9zl0Fsj6WvcV2NfgWerC4GoGk5HL3MZrRtXSiiqTsnKXGCFC7Q1oox8Dnf2WUZ3qKMlEoH230C6Yy5Fl2TRZuxq/vyFLWa9MZYBTZyAK3kYCLazmES3qNzr3L9hc7TTwkpD2nMXZcHRzoLN3KSQPX76hsf/cmODlx83LOKGWdvg7a92yFtTJsUWnt3lVy99nYdfPmBhnXB03gJb8nD/GY6okY/2KOOIxeiPeLi9/h9VrRGHN15FRxNmWxHj4Q0oLOabP2ASlSgvYtWbUCqX/+c7B4jwmOJ0A1B8nP4RK7+meEmTWx3cOuBs0GNglXznUUDpdfng5g5K2dSyIG3lKK1YxW1a3Rb7KZzHA2aDf8+7r4x4UrhoNMd7pxA0nBRd9tOQ+cChiHaYOTm/XAxJ7Ro5ywlqyYU3JLHapPUbnBsvUJqas7iBbZfKWJHYgjNvl07h85/3v8FbGy+yihSTjTZeIyhchRANib9DqE0uZYeJu8/lXsPwzEeHOY39AunmiGbhg6G4vPElit4eebVPR/hc2CWVbRO3Zmi7i7QUdfx9Lne3ye115qfrra/zVg7FRLNyYh7v7FE260g/x15fYxrNzcKm0AWzdo9nnW2UUjhX7p91dKDF3YuKYqWYtFsctm5ifaY56rkeZZ6znGjkIgcF64/u3+zrC8ocXT/ltFYIJfHyFVHZsJMco4wrr0pdEYZrtd3Q6uDJ4dqrshpjX01bPhEulWXJwN3ELULa+ZL9NKUoCizbxriSWxuGQfdqyW00vmC3OAMBnnvlVfHXJ45YjvCUx8bhKSvSdTMpS0GD63movCQyr+E1sPn0BN9bKyil0WD054ydc1ajGWb9h0TLmJdX73NipZyMMmzT5vz8jHx3QbkaIbKvYuc5vffeRfcv8JIS03nE0w3JxPHoHn8HEbkYzTE7D3/Go+tL/sVPdtk4NRAI7g5yRt19guAOVv1rZt3/hP/2AGfaptmrufbeJud3D1kGrzBSt5Hinxid/j3oCYPxG/SCiEz/n8hAUvG7uPV17iR/z7V8iiEEX/9wwI82DnlnlBCbLrH+t/TrHjfKH+N7c7y5xTg6pl20eend25zcnGI336NRNcXyh2AY0NiMpiFxHnD7wSZmD4LidVxnyu3Dn2GnikymTIYL+mPN/nHI106/9P9S9yZNkmXnmd5z7jz6HHNERmZGTpU1V6FAggQJAmwKDTYnk0kyLSQzmelPaSfTQguZZG2SQVI3h6YAggSIRqFAFGrIzMopMjJmn93vfM85WlzPzIJ1L4FF3VWG+fVwT49zr3/fd973eWnt3WU/H/GtZ/8P3/p4E1tamNLgYz3k6MqMTnUH1NcYnH/Gnv4Jcyvl+o9cpO4yvZNy4yPJ5I+/Tmv4PnuTf+IP/ulXPLha8Nd/WHPwiz2O367YyLp4lYNVb9GaPMBxPyH1JhT3Q6KJz+zanK7RJzj/HiKC7YsHdO9b/PAb93n33gZLNwdxyB/9xytEe99AiZK6/F+p8py3P36DOx9t8ON3S7Rrs9g5wyz/FUGZE8z+PRvPX6f7dBupJHEUs0yWrBPhsUWcplwtpyR5BqxEiGUTUL4Z7OBmHh2Zszs8XZnkmqq4iYC06RQxrm7Ty8fsnk9+veKIY+azGS1jF4Pg167H3+TxW0cHaqXQaJQwqIT58sZRGya1YVIZJlIYKEAJQWWYCMOkFiZKNBVFZRhIYaARyNU5lWGAsdraNTSGIZC6yXGRwmh+D6zONbGECUKjaDD0tTCoVudVq8cMYTQaEyFQ6NU5gkqYSEMTlyV1OKZTKmwlcZnz7Z/+E7/aX3J96uNIk8OtnHteiOlXhEpTiopb6RhXRNy7Bt3+LrcWinE/YHCti7NwMdb6eNc/IPAe8uDqPk82Q0I/YGRd4GVr5IZP6sRoPeB5+4AoD0jVkKkX00q7tFSM4Rlo6XAS1GhzgHUK5bAk3bxGVSu0DKmlzWkqmKYetinoLyPuSXheKhyrJK0lVaHJF4qxVWGZAt+KCYwYEdvkcYg2HQwMLCdCCIFrW7i2x9ayBdEQQgt7UhFnGt8/ZdKTzFvgpZL/6sddjjdKbAoqWzEYw8O+ZDdsgyfoHpmciYpLy+GyFXGrMFiYIc96HTLX4ad3d9i96HKxUTB53+WaFzFtRRx293jwNY8v3j7jwf4z1u+HGEZKf1LRKjWmEsQzE28zIsgrYloEtk+rjpn6DqaKqY2S4cYVHqSSM3/Ko7iLaRpIo+DSG3ADF7SFrdtoX1NaHS49izcmNfe37jHrK0q3grQEXWIv5mi9TS1MMqWphEmNgdKv1nktVrGkq2sDoV+uc4WgFia1YHWdrEheq+uluRaaNSyEgTSgNvTL9a6EaH7PVwnk8yLJrfGP6IZyHkYM11qvdlXqirnTlHDT0qQaQWZ7XK5vYFgW8suU87JkljtU45okDLjYbGTiL7NlV7b65Rjqec2422HoNVthjuO+alWkIh0Jylwz613j0tPMXzgT4aXkPBuZ2KVkvHaDUbR6XIAO3me68Tl3j1KiZICpBfcO3uHxboEhDM7bivs3NdOuZuMkxlA+0ndZtL7Fg27JLIyZziJEPaEalayrLrvKZ1bZnI0jjrahfC1i53kXTwQoy0cToisPw7qKZRjosIeyHXSQMNsZML72Gu3aZXMaY4m3MDxJRU3S72EnFq2szWitxEh7KKtNEX+A0zNQXcXzgU98bZ/t9YL+3MQPN9HKprX5+6x1cmRk4vYURtcgc1zWYwPvaR8hYb/1PQpTYYcCr2XiRS6zGwWbCwc1XYOgxeXX/w1LV+EvJfPLlH/39YgsDjktQv5y2uO8E3Me/hGf7e6yk0RM92tO+zOGbkZRDZBWh7zlUndisHOW610WosewP6MyXW5JG+mElK0Djm5cZdEryN1LHt7sc3lDszOc88HxJuuLgEV4laXbonZLstDGxGT3OZzsV5g4aO2SugsWg4C4fgcjdqmEpPJ6nOyvU1YxQkAa/TG1O2fpX2G45+CYNfP+Aa2swq02qG3JvP0dTm7dJm43ArAXNP+NXFBNDFLb52xr4yXl3HEapbTWDeW8qkqW7RaXrT5SSRYvWhXRENGTy4pqCYtWwDDebijnq+zYhedR9BrKeVUIEA6G8RUInX5VcTS2eqUVhlaEixFbs2coQ2CaLyIgI5bLJQO7i6s3CRdTtmcXL2cfL24MRZHT83ZxyohWMmV3uSTLsiYPdtWqmKZJW2zhVC5rlwlb2QlCgOc1e+i+35jcGh6HR//omG29XLESErRu4iJVXhDaB7g1rD89wvOaCEoAPwhYTL/g9i80sT+grhRZPmZejBiMQyL7gtb8iLP2EHF+C11soWVG6+whp9vHbF12mS+6dGY2w4NnRIc3sIJ9guklr31xn/HXf8LEX/K9jzv80T+HPN4t6Wy8TbjzLvHiY8LF3/K1TwZ0ZxZfXCn4zg92eTw6Jzz4GlZ5G3/xz9w8ekYwFoSZzxtPfNbvLvnknREb6s9pF3u8N/wH1h6fc/9OyTc/9DgZTPhJa4R+5tF69j/g0GJy/L9znJ9hTx0OvZytM5uNzz3K7QC1/G9wcji5/J/x65ytSwsU3P6hydJXRM4GrvFf4jkzLk/+Fx7vFvzVD9vsnYWsjRzsyibZ2KVtfRM7G+MW/ydKbvHBL24gq5JleITSGdce/SHGYIf++D5rw7/HlJo7n/R4/8EGP1SX2BMJO28SLn+XvS8+YfDslOyhYPgnH3Ljs3UMPeLgYkBgfI8g2WZD/xJ3+xf0ZM6VZ12iyuDqcU5ihITJJstIEBb/kc3ihEnWxpxeReoavfecMvsaytzGVIrE+j6yGtI//h0G91zqliDsTanCHDvvIZ0UVf4NvdMRg4cbKCWJopgkWTY6DmOXKEnYy0ekeQqIL4kQNevhHm4W0K4zts+PkbJuWvpkiWGYOI5Dq2zj0KGTDtk6Hf1nW5XI2scREUKVKPMrYqs3jFe2esMU1MIjtxzmrStN8vxqxpG7LkW0onstPUqvw6zlY1gmsm4iIDWaoihIVQs5N8idLvO1PmmWvbyxvNiOzZYe9RLmkcOs3ThnC7+ZceR2k3FRLCNkZZKEW8ysktxxKePG0lx6PirLKZIAx9As4p0mAjJvbhypY1M5mtOrPZKiR13XPNz/Gue9MVk3IvR8KuMBSecRZwcHJOM+qV3waLfNaW+bQAeYnsW0HTDb7TLMBlRpQGlsc+9Gl7OdGlPO+fHvR4R6jZPNkl1/k0jFSG+LtPsOwysdsqWgbPvce2eHJ29OeFusoes2KnyN09tX6LWAzOWnS5uL3pzl/ozyF+ukrk9xvs+TvMeP/IzCc/msHCHVPssoJInWAI8yeoustUulbTxVYXgmVhAgHRNltsHUWMbbGC2DWWCSWopPJpLeCBbtGHkZkTsOhfdNlsGSk+4Oyoh41K1wtc22EVMkPpnjo4w3WG53Oev2ISmYeiYzX7D0NkG0GHYPON4p8Ysun95qk+7uY6gPKTZOKPxdlOHiL3rMzBIlLE523uaj9/tsJHNmZovE6bKMPIR5wHSgyUVB5jjklsH0Tszt2R5Z2MFUFdLeZrLW4nQQsHm2h1EbyKBFunMDfaYQKKR9G09fxfCuIbdcpK9Qfg9tF1jEKMdCBXfJe7eYbXZQSlF4HkWUk1QOdeZSGAbjnrvicYhmoFnkaA0zHVPXBnnkMXctaimbzl7BqQAAIABJREFU6yRuqlrHdcinBnXukHkDZl6E67jUstmOLT2fPOiSpxEUAoOvEKz4VVp9jZQKbSqE1uiiWHlVDHRVYZgGqsjRmKActKrRZYHBKgKybj5YXZRoUaOVhZY1dS7RRQ6rikPVElmVIC3QBoZW6CJvIiPRqFXFIJRCyxqtQJUFWhYYlokqm3gECeiiQOgIrTS6KpF5jVq1MoYpiC/bLLWi1ppKa1JDMJcVWtWUUmLlNvbSwktrzLrC1AWt2ZTAm5Gu3adXWdy93GJ2vOBgNCWwbrElh3zvyT12hORky6OrNV5b4LcFcmCih4KOZXFHhfS8LWaD5jMuYoV7pcZYVjgzzfVcsVAzPEtg5pqk41PES1KVIAqJJSyy21c5pKDffsrlm5J4ELPhp2w7DllX42cWju/DpkuET2AbBLZPut0ltKdYtklla4KWiz+xMKTHcK9mcfsmx9WMgTDIipiFzpjriNKc8HTgU7QGeEcL2nmCv7DJPZPLIEIrh6VXkMQmx+sBaVuBm2O6gK5Zv5xx7ekUbVfceJ5zcDzlYRv+7rvw1j2r8TW1W5Qe/OTdS2aR4Fba5qx/wMwJmdUxqXY58gP2nlp8cnPCMrrJqHNBKXyEMWCBjW1DEfd51hlzORCYl2AJg0xIZDxBnIWYCAxVwLzm0Iwx2x5122Lct7DcIaUpKCyNEjl1kaILH6UkhmWt1hto5QMSUdeolQBMao2qmp09044a0WRVI3XePN800UXeeKu0RFUOKAtdV+giR2qFlhItZRNTmucgfbQym6pffQValReVRjPjsLCMGltWuKqiVw3RpsAwzAYdWAd4SULbqrGVi19n9NXlS3fsq1alIHYtbBkRyoS1RUKWZavXaZSjpmkSYGHVLnGa0C+GCNHIeZMkeRUBqW1s7dFJZ/T1Er9KCfL01yTnrhHj1NBZjrFkIzkH8EqfosiJtYUjWlBXtJcTYuuM7rIkqHNU8Yh4/TPCeY5T3sIXSzanD5mLY/zZBbc/d7kxf4ZdPMcebKPX1+iODln/4d+z+5HN4bU+n98q2f7ZmMXVBH2wxK5inPSYQPycrb8+Zle7PD9QvPaPPf52/QvGg3fIZMhZcZ/s8jlbpwPWk5iLvS+4d+OCZOqwUAdYyQDz+SntWcpib4i5bDFN7nOZnnL94SYieQszt4mffsGk9xhzFDK1LNaXu7gXFdqekcoFVm5wNL9HnG/QOupy2vmc7acuCRP8yEYV13DEjDj9FHhKv5ry+uiAjfOQiT2n5blYqocn57jqCXFqsZ54XLYu6UwTLDL2jl24eoAoR2w8fcTRnQFO6lPqkL60eO9ziVVOkEgWMmNEwZARVXWfaGpgeRXhsoVtCuzCp19nvHHh8XTzgvbaM6powd7zIa8/K2m7d6gtwd6opN77CVq06E5NOjrAHv0Ld76YEMn3wBDsjKckrYT12kBOz6gNG50cQnVMe3aD1Jizf/wRvaJNZ9ZcsHY+xytLWiLGIcDTGf35iKD4suR8pePwbOw6JCpzBtkQKWv8KsVfuWMdxyEqWtjaIsoW9LPxr4VOh3WGu1jgGx6GCF9Kzn/Tx2+h4tBUVf3ygq5ljRKCZavP0frgS+jAVxGQ/dwgHyoWTsCzjZ3/dDhalQzTJldlGsU83fQoXuSqAErrVzqOec3FWp8jb/uljiMvimYeohTzS00v15z3b/HMa2Tm5erObzsORl6yHAqMUnK63mEYNSY3WOVfVBXdWpNeQCUlR3sbXMQ7LLshruMxbvXIejco05DKiZCGy3LjDtlgD2FbPH1bM08sMCas2W12FhucXAv5t+/32D70kZbJ46sVfy0jjraW3DXblKMB0857TDo7fPaOj13A5bpk/gcDjjc/4EAFaKND5v8ex7sFS7+PqwLyOOWoN6HuWZSTHsugy5PNd3mwY7PsLnCkw3l7m0hXK7fwFrVlM2t/m6h6F8fy8EKDcO4QdgLKqILFOsK0cM0/RdghRuRimtfJu5toagwDhNtGeCbu5rfZFDV4Hs+NgMp1GcY1KoC3Ri1mgY2t/5Qsdnlw0OZobcQylmyca5KgR0sMiFSbbHsHHMl8I6SlPS7WK1y1gWm1wPTB3WLpJEyutBHeLU5ub1HFXbyORzZWFLnLs957fN61mfRe4yPlY9cZlW+htgfcyCw8u+ZJf8DFjoVRWtTdDUZKcLZ5hZ9aa7x/6CG0YBL/OZWfc3z9fWRvgQxN8tZbdKxjpH+F3MsY9/97tN5hcWsdrcFefRG+0nFEPN3ZfdmqvIqAhOuFTXFeMO50eNZe8Tgcl6IsMEQTAXn7siRfakbtmGfx1ZXkXL4yxGUZ85EgL6BMmxngV8TkZr00uZmmiaE04XLKdn6Otl5VHC+8KgPRwq36RNmCnWLy0uT2ArJaFAU9ax2n8GmVC/bq4j+pOCzLpF33cXOb/njIdvWq4kjTBlaspSaq1/Cky+Dsgh2RfinwF3zfa0xuehe30mycXBAExssZh+t6FGVBS5n4agezqtg+eUbWPqI97tKN2jzWf8PSfsTG0Rrx4q+QIuPu0YcsrCGtPOAi9HEXMUfXNK99FmOFJbW1pDw95eMDxbWTm5j5kkXUYhSdU2cKZcTk5pCle4+JdwMDg4U/4vaTUzoHh3jGDQx1ndL6jOjZObe/OMB2HCbtJWX9gKSscfJvEie7/O7HH/L67IxH6xNqVTD5TsLFluTG0wG90fdw7Zjts3/kQfsJ/tCmPal47Z6iPd3k86+XGNVf4mU23eHfcvAgoK4XXKxNeO9nMbMI1q0tIv1naDK+d/xLTvI5w+sGN+YbbIZrdKsFt9U+rtmhyyXvz74gC0x627uMNk5IrSlXfv4umVUj6hn+NIHZz6iCBfVsE+dsA7+TYnnNe7KNEE+cY7QPWXcfYbDk1skG61GL/iRir7rG+mSd7zy5xy17xPe/84hW5pG5FtvPQt5/tEe/f0Dd0lw/PsR446+5+7jPO0+3edg2sZcX9Ic3sMrbGBiI9O+IdMn+oUE5SqnbDss0J9k/RKmr2FlOuPiE3mxB73D0iseRpQx0iCvXiIqM3aP5f8bkBgNnHafw6MxKdmYXTcXxJZOb4zi00wBXxnSrKTvjGa7rrCIg60aXtFwSqQ1cApwVrPgrYXJ7MeNoQD6y2btWElkVaN1oJeqyoDYNZFmizBp0A1WVZQlaNchBu9Gv12WBEjVaaRQ1uq6RVYHQzbRYKYWhLbSSaGU2/WFVIBAoy6QuS0wh0FKhWelK6hqpm/dQlw2aXlkWsizRpkQrkFWJqq3V42AKgSxLpDbRQqGVbH6uK2RZUmQF5axDK2qj7AijtNCOoNCa2lCURUbaXzRDq7RGZwn4PdS8pq0E3mRO++KcjDntk5rYG+FqH0NVtOdTts5OePN+hZ0JnhRL/LKLnywxvRq70nh5QTtZcuP0BMcySScli17C0nYRQpNaFZOq5iRQnLX76HaO1hMypyK1CqxC45cKb7bg7ucVvTMP7Uj2T2zcNONjSyO0xlY1cZbj6ZKP3lnQXQ8p77iU5xkq8ShqyTIV6AcRs9sLfvnWkkXyGr3pOoWQCLPHtdKiqNc5Ot4gt4ZsDnMuiympnxIt5wS4OEFEOy9p1TkLpYgrCLQCY0hlzdCqi5vl9FVCICd0LiWWXeF6Bcb0PrtfdPDW1/HyhN1nh5xuPcIu5zgJlCW8++MeB6M5rTd7zB2P4Pw+3fkCqjlaLli0Q3RZ4JUFWkmEAn9ks9hOuPCfElctdCXQdYlSNVqrRrekarSskVXZ8DSsZg1JHLRorom6LKjLsqmYV2tUa40yKtArdoxsbPH1CrXZ5NmIZp6hVbOGKVCGaP5dV9SlhSwLlJAgGg6psr8iFYdpWhgroZewHEorJHMMzgadFTrQoK7qRoqb52yWFvkIEtvldH29yVWpq1/jcUxyh3IsWYQ+zzbcVxGQKwKYYZjMp4JyXjMedDl117+EDnzB41il1Rcw6l7j1NN4q3ZJ80rHkY4tzFJyObjVtCpl+dI9W1YleQ3Z0KB2JOe7A3Kxg2dqlGmRdRyS8C6+OGDWEwy9kh8dbDEcHGMuZ8y3JNHEIpRtRL+LQYBrKzbzfYyLXXSgybY9wplBub6BMe4h8JDeFRYDm+l2hFsKRnsJqIDJ2h4y38ErezjqDUR8k8MDwXCvoLIr7t29Tlz4KHMLw46RrTc5GWTkgUlrYRGrb7A1g+O9Nc6yAZ3K4uPbf8mzdkV/EDD1Ex5cb9MuI87XTpHnOyxjzbz/Z9z3XUTSYXiZ83+9saDb65It2mRP2iSW4mdXb3G8fkESnTLZ3afQAbWxy8RcozqpmHsWF5vvYyD4x57FeO0WranB//EXCf/68TrbI49fXd/k5693UJEiyGMODxTj4Arn22PuJFcZJV0+dm/x8foulbVEHE14EnT5ZLvkzOzz50WXyLb4+63v8kV/jivnSM/GtDOeXxdc3or4lruObRr8+Hc/QNWvczbw+dD3MJWB52dUYQtd9tC1xAnewZUFy+02kw2LK2dtbL+mXW0hLA/HMMH+A4aDPlndQulXEZD9XFBMDBLH53Rri+JFC/wlHse49iguSiatFidxt2k/fi0C0ubusKJMBNNWwGm0g219SXK+ioBMpyZqUXy1bPV1/WrGoaoKt1wS5hXb08Nf43EEYUCyTFize3hsEi2m7MwusFe5KubLXJWMvr+LW8a00gn7SUKapli2jQCkklimRUds4pQeg4slO9kJCEHwgsfhr3gcYrfhcSTP2VGLl/F6fCkC8oWOY2P5jCAwybJmv/1FW9PSNoF1jaKq2H5yjlc2zw+CgPPiU0xnRDCyMct1TGNOMDpnP/kXNk4qno2/IBz79Io79C52sLZu0M9P2Bv/nPBcEHcqPr7xCDMTzNwF3uSbWJVLp/iUbfVDbn7UopsKPtsfEp50MG8N2Rh/l/bybTYnH7P5yxMOTjQ/6l6iixR5q2D/vk+Lv8DL9rl7+BPwn/Jos2D/aUw9mXPgSe4+arPBvyHWbYKt/xdNhX+xyyiewHIfKx/A1i8Q9Z+gaoOk/DFBOWD9k3Wca2Metx/gTW/gz7dw83dwRcL2YkoqHzJq3WPt/F3aD7qUxglr/Tewiy6tSrH19J9IN8cEo5yy0tw67nG49zl7p9+klb3B66MT1ne+j3cZcvOn11jPpuTxmJ+/OWH75HtEtc3B+WdMJ/fQz2e0Lm3GrPHpe0sGR9dpOXdxREhresTWYoZyz9ga9TndHGJftghbHQwrxs1MluFPCC/OCGXMnc/3SLyM+s6E+HgL23wPr5B4y3/L+vISf9om6zrc/vwuwy2bSZbhpX1aacHNex9SiD7RUQcpX+k4BqKFZ+4SpUv20iFpkSOgudhXsOK1cAc3i+jWGTvnz6ll3VDSv5yrUrZx6dBNL9lRoyatXkrqqiKKIhbzOZG1j2FEL/Udv+njtzrjME0Ty1QIZSD9kDy6gly5Y+uqAt8njzMK6SGXLrXbJm+7VC92VVYVR1lVFLKFWpjUbo+k26UoXsUjqBWPo0xDFIKy7ZJ3GhygdlyKOGviHZWiXobI0qQMN8itbvMeVmn1ahWPUKcBqtIU8Q5JYL5UlmrXpSxKXCWolw3OLRvskMumYsHz8IOaepiyiPvI0kW6EWnbZtGrSXfXeTK4SVC32bq8gj+2uZHYXKzFfPjGNURdU7DgybWPCO0UcQNUehXxPMIOtrhrvkn5NYt6Ingru0p9vc0HW4Ld6Q1E3GKtf4vDb/Q4MzTGTgJnGa0NxWnXQ/7qCmW1zi/f/BYP3fdZ9IYs70ZcdMa00ZxsRaQPdnELF3XzNcJAEog11tsprbyPU4Rsdu7iOjGGabDeu4vdaRPrNsagR9EK6O9vEY1ijLmLY4O349AaVOz0HYJ6D8+M0IlHpTdQpUneqqi3IyZ+QtoqCAqHizUPizdYxluoOuLZxoCjjetsp31qf5dTHyxbs3DHLP0rJLLF4/Ytnvk3GQ8mRN0Idz5juLHg4Y1rfH3RIyoNjgZXedCWjOwNFhtrTAZjEici9gNuZy6iMsD5fXr1GcqWyK0NajujCkbI/iZqGeIUAdr9fcwypVvGUEiS9T5VKHB1QBrEzA2PYfs1bAKsjVbTRgeNbb6sHGTqIi2DrOeTl0XzxbeqOLTWFKKDqqEMbTL3ClJJhN8wY4RhUFs21dxCFQ6VNyB3Q+SLXBUpMfyAIlxSZy1U7SAqG8v6SuyqvPKqNHvIzUyhFgaFaaOsleRcCzAsCtOmwm40F4ZJYToYhkVt8iqQSUGtG/19LUxK26CQivqFAEyYGCvvixaaUgiKFUcUy6GwapRpvfICGAaVaVFYvHwPL87Fas5RQlGaFqVlU8iVac+wqCxNIUXjZxGCwrTIm+RZhGljz6/QR4AVNL2nMCktl6ndRmUOqRGiKptSeyRKNJ+LMphJF225LOMUs77C057POWecGV1mjsnjTsRh8i4tJ+STvYJLb057ZjF96NPNBgzqgIvLDT7BxIoDPnUuyd8uqBnTUhZSCYxc0vviki11RL1ec2VeUu9kKFPQOq5ojXJcAdWixBnPCI9rngwS9j9PONuW+GcuqlCYNaipJD5b0n06I79SMg0TvNEjwofXMZMKw6ggOaJ9ccHQSMh4Smde8s6/+Bw4BXH7Ot16jjOo6BAgxRpPt2pc06a/7LIoQ4qlphIJVdiirNrMOjGDRYZTSzZmNq4Et6zo5QlXJkusesFgmpMJzWCScHByRgeHUDjcTA7ZeDrmb/4woeaYaycR6xcZpmMSu5sE0kZk54SThG4haC8VOga3tlib+RimS21YKNFj4bTo93d46lxS7l1F2Yq1TKGEgRJGww3Fp7Cc5lp4sc6VhRKNxyQ3LApTAQJtOZSq2ZEstYESGrlae1KZzfMtp5kbWg61IVCi8XsVlvMqO5Yaw7QoTGe1hhtf1lcmkOnLgdNCGAgFXrqkl30ZHdik1SdJQsvqYqsNPDmjl1+8JICZpgkCijwncnewy4igmDJQDTrw13dVLEK9jlV6tGZLesXZSnIekCSv0IE+29jaozU6paeXLyfeX9ZxeOY17Bral88xlwZZnoF+FdXX0haOeRVRVfQvLhFV+jJC8kVJ2fW62GUP25jTv7jALe6zfeyS25+yeSm4c3qdzfkBQesKg+Sc3/nwHpFKON8Ys4xneFLyi/cq5sEt7PJbbJw8RB4f000ivrgyxe3alHXBH/5gi+3rFSE118uHJO0nbAx9gq0jUmoOWxmGYxJYWxi2z9ngmIvzn1PVOaQhab2gFjGn4RIr3wQ7Rvqfse0k3FkfIK5l7J85rOuauhcQnt/EMA32Okesiz5qY8FtcUzVbwKl3xhGxNU+dZjw2u+dEUYzvjEoic0Se1eS7M7oBA7hp4rNXs1fvZeSFGOqeswkKjFMg8A1ee1knxiTTfMp//rsZ3iTFgfTgN1nglhbBNaYtfSbtAyHW4v77Awf8lSWeInL+Z4gaM35phWyV30L0+ljDy7QnUta1x9z80kLZfWJyzZ1JFGli72IOVAP+OTGAvn5Bu5ljDSGZPU5YtHGCFuIGqrkHrUuMOY1TvCY7qVCOjVhKXCKDo7ICcf3cXVEfNpetSoRSZIQixhbbOMVCQM5Is3zlzt/L9CBLX8buwwJlzm96clLqtfLVsVxCYoYmw5hMaQ3Ha9alZq6qomiiOV8jmfuYYsIQ8kV5uI3e/yWKg4JNPvHNZrc9Vk6Ac86TQSkIRqTm+d55FlOv7bJpiZzy+Kw18Nc7Wu/4HGUZclrVUA+VUx8l8dr9qtWhVew4sncolhILnoxh9aLCEiXPM9WodOK2cSiVwjO2vscOvJlPJ+mAReTFSznPqKUnHSvNya3onyZ9FaWBV0pSKculVXzbKvFSDVlprcaghmGgW345Kc1mWcx22zzOBbo1CBpD7g3KOiVEdeKNo4KWGwOOF+7w5FZsKwrztqavVzilArhdjAYoOw3mGxuUC9N5oOSZdtgvl0RlB5XWCMl5qzc4lPb54vQ4pncRhYGMjUYLhOWxRaFbjH2b1F2rqGdlEXkc7I7xpASVzlMuleIsPGLb7Ok4iNsPplknPcdPvg8ZOyD1L3mbyJ+lxSPxMmx5LuY85pxBP98J+S1UUiCy73zu9TPK47eq4gLB55AmsM3LjaIE5uL3OWnP3iPaZRTtDXTdoFb2BjSRJR9uk7Aae8uz3s9upWFuaMofAvp2RxtJ2wN95jPOzzv3+X5/i7SFNz/ekEWKy43a7wLl8HJDrHwsJZ7JKLFob3LaM9g+9zidu2TaoNadtGFwyP/A+S54LLrobcClHUFZU852xig0y6FZ0Hnd1B1zbG3Rm6tM5bbKFMha8jKkMRwGQ7excBnbPoopV7GH8SlST63mdsuT9cH5CvzZBMBWQGaAxmSy4pRHHEYxsgV7DjP8xU60ObWWJFnJqNwm8NgHdt2mp2aum6+CNsJ88UqAnI1NP1NH78VHseLeATDMDCRuFVBoCSbw3OU0XhZqqohgC2ThJ5o4VZdwmLJlpxiuw5lUayYo4KyKOnYazilT0su2SJrdkpW4dYNj0MQqwFO5dBfFmxVFw15zHXJsuwlASws+zjSoT+5ZEukjYHoBY/DddFFSaB3cCtYH1/gpIJiJRAL/IAsz2gpE09uY9YVW+MZTtVg3zz31Y1jw+vglCGusSQcLeiXn7M12UB9csGyZxBeSKJUooMWfvacwvgHds9NWhNB5lso5tz5TLPRu0PLGXB7fILKfkFQmCgn4zBIeD6oOd7epfOrbyI6NlZyQTb4iM5lSL43JLyosZ4I3vtU4K5HWIVFmD5GjXN0XLD1aB3n6qcYDnQu1tDygNoWFONPmdQ1VWIQPpqhxhHlwz0uvRFZEWFWBo/Pf8T+P7zO091DbCyeXx9Tuppg8RpZsUWeVaSJYBRl/Gz7h1x7foON4z7zaEZ94iN1hFhWmOMpZX/ExMiY6Sm3P+sw703YeHQVM7hCZT1FPf8lXIRkEwvzaJPza3Bafoo1+gamCCCZYWRTLMNkd5lytj7kkXFC+6c72G4LM4gJjp4TBCfEG49wcgN/GPH6D7oc72rs3W8QpF189S/0zzJ6s4rOcM7Xf27xP/13BbOdgPbhf41tOPwXwWeoiwn3zkYEXZfbj17DTATZ2hpuGeKJnPb0AbYKaF02w9EXPI6+DnHkgLDO2RktSPMMVlzcciU5H3ibuJVDKynYSi9f8jiSlzwOizgLcWRMR07ZWs6xnYY5WstVxTGbE7GJob2X8Qi/6eO30qo0xKGmXRE0HhEhJHZVrNCBJroqMUsLuyqwzAqhNaZqzrFEo91/aZuvCkyjRmiNIWucukLVBRaqaY1ksx1raonQClNW2FUBCBzToK4KbLPRcZhKNq8layxdYpY5dtXsoTuWQFYlwlAIDWZdYtcCVTU3DssymvenLQxU81pViV0Vq+c3r2WaBmZdYOgAQ0tEnuGLDuPtjO6zKW8e17z7qMCNJIFTIcWCw/4xTrJFf77J0lCIGG7ck3iGjd0XZC0bbbYpWibWpkmxM2dvz+fNwyE3To/B9rhxMuUN85SfvW6QBynXHzpcPXK486yDOdBYSqGZU7dmRNJgq2zTKQrisYNlzFiGJZbyWbQS7HPBWtLlxD/DqH3mg4KsVaLnGmlJCj+n9myKQIHURFKTLVL6ZylmXWHLglYyoqpnuOmCeDni6v1LIifl6+cC/+oddsdDvvn4B3z4tTmHr8/5k7/z2Vh0CYsF6koM7CJIWZpn7Mwi4onF2qlk3hJsuTmmzJlHS64+PaN3+ggMwf/2FxecteYMph7XzmPCzQLLDQjLnC45Vl3TX1hokSGlgzWbordyKpHx9ucJF+6Qm6MOMosoQ8HeecpSSRjnSF2j/u+M4/aMLV3Tm+VcGR1ijrqoLMAaSGxd49QZFs3aNqTEqhzsqsDExkBjKIlZFlir7VjHBL1ag4ZVIbSFqSSWKhFSYpY5VtV8kdpCY8pmnRuyxlYFjtE40UVdY5U2Vl1iiN98lfHl47fEHFWA0QhitG4k51GPw7XuKx3HSnKe5zm90iQfaWa2x9P1Lcwv76oIQVWWXOYOxbhiEoY8/rKOQ4imVRGC8VSQzyrO+z2eflnHURQ49qpVGTaS87PedQ69hhCWFy/Cfxsdx3JkIsqak7XbDTqw/HKrUtKtNcnQoK4lz/bWGOkarfWvSYNN4ZI9z8l8h6PNbcbOVfLCJwly7kmTn7wZcGNW8t/OLRadkJ61w+JKyIO2TeZIFrHiZNvhjcplrQp4YLf4+807GIYgCRK+cE/xz12W7TZXv9bmhrT5aLvFT1+/yaS7ROqAy1s+2a5g9HrIBxXkdcjF3gdcVgqzNviV3aLoXWO2FVA68L1fDjAzl277u2SBxXwXeu23MPse59ol1hp72Ida0Wv/KcmdAc7aJuasQg9yXKUpdYQY+5jCgYHEaHVZi9u02xbpuw5L4MMrbb697HB+vc2/+4bHs82MDWWxuOVTVppQ2uzgIMsWZc9Bba0zS8BouTxomaRtk+FOyUm7x83LNo/23+SznSuYlsnja1OOtgo2zyL+/R918fItBrXgP3ztD/msU3F/84QL30Y5Ps/MNq4n+B/nFjNP8KTzVzz0TO6900VIA/07GukCYcE8CdGmwa/iq0ytirZXUtRL8m6AU1n0K4FOXEzDpmt+g+fdkLHfDEd9zycvMuJMkE0Ecyfg6dY2+QpW/MLKgNYc1B65zBm12jxtr614Hi8iIJtcldvDmnwJw1bI03gP27JeRkB6vk+epszGBnkhkIUFfAWyY+HFcLRpSRAKQymi+ZD9+XP0alelLAr81TBx0+ri6w3ayxlXX0RAluVLynmW56x727hlTDedcjNLSVbDUWhmHJZl0dfreKXH+sUpV4vzhnIeBI2Ow3XRStFmB1/7bB0fk64iILOsMbEFfkC9ioD0a8F+/0I5AAAgAElEQVT24XPagdnoPOClGamlLULzKmVVceXpBXHVDFdfyH0N02TP6+BnfQI9Z//ZJa5zydZym6Is0UoRxTGDJdhiG1Vcsjx/QhC1WaZN61TZFct5TKE7CNPBW4zpVHMMIVDpmDfTE9461HT9LtvqOpHR5erikFuLHyFnS97+bJ+T9TmFr9gbRvj916icdXzx17z15JCbjyL2jz368yW7E4vJmkHX/lOCus03x/8Bfz4mmvv89B1Yeks8BL2HAVH6Z2gBO8n3+fZnHf6/D8b0ny4J5z5HaxnxtE+c/SVBWfAnj37M090L5l8vueK7hPEmVCavXWzRru/i1DN+L/sRd5/MsTptbkxCNE2rG7GNZx7QcR+x5/0z142Q7SxgLQ2ohI3dK+iZ23SrO+zJp/jyCLTgsj5lPV3y5sOAG887XLF+F8/t8LXjnzJwn/Dw6lPuHt9g7OwSnA7oBx3cahtTmLhPLuhaJZE7BhoZgCEE5ZUEN3sLUwj6s8c4NNLudLFAuC5SCMrKAGMfpQqCJ4fcvgxIsxwlJUHYDDc3RYwvtmklCVezEdlKx+EHqzWoNRv+Nl4WsqYKrg+PqV7MLbJ0FbXg0c9jfN1mLRtx9XxlcqtrqheS88WCtrGHb0QYsoavQnYs8FLeqrVuEGemTW0apF53lR1rULolyvPJTI+CCFlY1IZPGnYb5WhVYdkWaMidnMIIUdKiMgOWkUtmeliW2WyEKo1lmRS5j5QmuRuSOj0QoDyfVDhI10FLRVV6yNoid1qkho30PArLBzTa95FmQV05SA253yYJbTLLA0C6LqVTYikDWdpIDWnYJpVe838OAlLDwTBMUitqzrE80rBH4cCSbgM+1goRhuRKIksLd7GBEbrUls20LchEgIxrZBaQFAG1tCi9gDRuKqzcEbjmNl90HbRSdGSHQNt8Lja5V22yfaGZnLQ4dGHkVVRVB0/6kNssFl0WUiGcq0x7PkN9Rjxd8qRbch0br7J4ctKiHmve+LDNmRriK59amsSnHiqwKFx4voyYPG8hfRfzYc12FqLenDG92UObIXlk8mxrwHS/w3unJspzCT1N0REwb2Md2yjLwh0NiL0OS+3zyGowd65tsy1t2tJAao/gqEvrscCaasKzkkVLslYv6QQWuoJRavA8ddGGYDmJkWmb2XCXe6bDhtVmICz+5brNg9Dh5uPb7M5usaPbLH1JKMHFxNIW22EPnc8wyhfblyaGMFjM+0irkQykfpdEKJTvkxoOpeuCEBgFVIVNqWHm9bECn9xqbPHaD8hMj1x5yNKmsjySqEPuNBGQyvPJLR+NJjcCZGlTugaJ36OWNdrzyC2vqdQdlxIHWdkUdkhqaaTrvYxH0L5PJmyq0kNLwW+DNwq/NZBPQzg3DANhaJRlIx2HrLv+Eh1Y1xXK9cj9nLyykdKksgKyro9pW1RV/XKoU1UVRemhSk3lmyzbFqX/olUBqdSK22ihakUZ+WS2CzTimsKLkHaTVl9NLCSCIu6SuS3UKl4PNNJxEW5BPfVQQpG3ByxDi9JvSj3lNtNvp4Z64qAMk6zjk+mq8eg4DqUXIYRBLjxkIqltn7QVkDsumTtYCX0U2vUodIWa2UjHpOj5FEYzGyqNAtVW6MqlWgrk0qZ2YtJuB2EIcstHWjaVcEBrioWFLBQq7mPZb/HsVs24e52L9jlpnJAPNrg2llj1Op30uzzsa07XTGLZ4iI45cnGAEeAcWmhDYNz//d4/PqS8eAaz3rPwNRszbYZdlPeHsXUVs15/y3+5jvvU81LLj8w+Ny0qauSwYXFzHYZWiU/8P+E8kJRn9S4oU+RlwhhkGmfDUtz5Pf5fmsHhQbbRrbly9L8raRgfVbgPLzCZGOf77+R4+Q2vUUby7IoZcl3lw5jw+BBN+TnwRuYlgl1jl2UPNyNMRG8MXOICkHu/jFlaFJXNb/aNsFqhH2R4/F75/9/e2fWY1lyXecvhjPfMecauqpHNmeKpAbI9ostC5IBQYAh/wS/+MW/xO/+Awb8IgsyYBAWKVsWKYiSKFJqij0PNWfldOcznxMRfjgnb1XbJIVWd5FqKtdbZt68Z4oTsfeKvdcSiNbx7tGQ903ROxFKrDUIIRlZ0RkbCUE53aeQ4MKQIixoeyv4pLLYuY8RinJ6AGFAE9ddHVMYUcYlVaWwSw/jSYrpoEtVgNb3aOIu3a1NjC1byiAgH+hu4gmeuNU3WlMbh3GSOhlTJAOap0rOiSKKMKNdBbis3ZZGfNJ4JhzH0231tqnRTYZfNkwWd3FaoZSkLKu+7iFj6O3iiWsEzZLJ6gTtdSXnntdZQBZFySC+iWpGhOmc/SIny9LeIrJLVTxPE3OEbiIGZ2sm5TEgiOOENF0ThhHOGCJ5C4+IYfaAiV0/lao44jihzQsC/2V0C8P0PjJW5HmXqkRRSFl2qYrvvwR1zfT+Ca7u6jgupRCVUkyiKV61j8+a6YNT6uCcnfQ6VVVhrWU4HDLIBFrdxE9XTJYnnd2DEOQiwx60hI9iYjfF00cEq1Om6xVSCvDnhGGIPw9wzhKp6yQ25vr8TT5zPuPEm7OzSWm/dM4rj+7QmEN08FlkGxPN75CUBcYZ9tp9NoP3GF/cxkfi8xy+9BFnryPMOfGxQdQ/RASCwXlKJZZI8TmgxpbfZXQ6IjvprDgvtV0HRGjvFqpKidNztDNUVcVkMmW9XqGUIokPUdWEwDYky7sY5/D6xcIYw3A4ZNoGyHaEEQ3Bu8fEL5yjlppwuU8QBOiqxBdHyHCIWp0QyhSvt8IYxglefh+JwNe3US4kyo6ZrgxlWWz1cMuyYGc4JmiO0EYzfnjKJJ/heT5KKZqmQUrBQHh47jmUkIyW7yFoSJIBm82GMAwRQjBqJJ56Ht9WjFd38QddGv6kjiNlIEd46jmCPGWan3epimA7Bp1zDJMb6HLI0JbsnD34cKoiJWEYEVcjPDEhyc+Z2AvCMKJtm94CckC62RDo2wg13Jacfyqa3LTWfdQhutZ4p6gGAy4mcW863dV4RFFnbbdsfOqVoog157s7WyGfpyOOdRPTLi15FPB4T3UWkPrDFpDpxqPZONa7I87VtCOTfJ+qLPH9AGEt2VJTV4LF6HnOfbMt6nLOdZ+pKsp1jFdbltNXuIh1R1zBVj+kMYJqGdJ4LRfXxsxMjXOwDjoiVkrJSEbUJ5YqUpzvTln415H1Pk3drUJpGBKvGpqNT+kFXEx3cP3qUIsadhza89ikkjr3yZNrnO/dQErJWq/xtMYb+TjnyFKfPBfc2/kqd/Z8qqIgPdI8uvkexeglAjdAPh7TegPSnVeYC4dxhqYdsY5HnA8OCZygnCkqIykOvkw2TTkXr5API5x2nHk3kG5DOx/idIsL/zmPr71KE3eFen5PQgetpF561NpjtrtP4SxNU5PHMeVut1W9EAnNScsmhLPR57DiiWaFtZZNEHJ9ZbAbzSYccTHcIbu2wSXgppPtsbKNR9tAevAc54OuxqGqqu32pnSCYh3QVLAa3ubxSG+tNKSUVFVFFYQUZ5KwhfnRy5y319BPk+5SUllBdaGRwPzos6yUI+t9jz3P65KB0lKvAkpCLnY+B4G/vZ685zAOKkW18Sm8kIuD/a0FZHftLeBYuQHNectqMODsaIDp60Au2+q11qQLqAvFOg44jw87PY4+4sjjmDxNKTYhda0QMkDrT0mTm3MWa0X/swVn0UXGyJz35KiirirCMMQrCxIxQrdTgjplfLHsU5Wmeyiua3KL9QGqCQnMhh1tyPMMrXTHcTiLpz3CeoxqPMJ1wdjO6SKOrskt8DtyNGz38YzPYD1jLHKCIMS/FCOOYkxe4NlrqAaSxTmu9jrHLdy2O3ZoFZ65hmtrhrMVTdulOkmSbPfbB94Qrxni6Zzxak3lzxilVT+YHMPBgGRt0GYPr84Y2WUvXCQoRU5LQzRLiOoEz00JqxUjim5ABwvCIMRb9tdkdtBtRNjM2dWSNE3RWnEwfMh6Z8Zo8wpeI5CNR5ieMDQdz7JjStLmHqO5wUfgVXt4ePjrB0T+guFFROg+QASC6UrSsESZW1jRIJp32FnfpLgo0EqjPU1QNwycjzZ7aJszOE/xhaWua8bjMZvNBikVsT9FNRGxskwWZxjXqdSbXql7MBiSpArdDAnaDaNqgZpssCvLaJXheT5hXRO0E5QOCTcLRmWN52nqqn7itYrAb/dRxidZz9ix9Glp185QVRXTZIRfj1BGksxXjOs1Wnto3UUcQgiGTuHVe0ghGc4f40S34OgsJwgDhBAMKtDtAb5tGc1O8ZIuSrC996tXFCQuxjN7+E3B8HyN19QIxPZ8nXOEeg/dhCSVYVyd0bamiy6rckuORlmINjFxumZcrAm2HEdDFMXoLMM3+2hiMG2XLn0aIo7LbdKuCEwhrMBzLUldYI1ASYXX1ERaIOuCSAVdDYdpSJoCTae6pWy30uumIhA1yvr4riWuckT9/0gHmhrfJiiniG13LBCE0nWWftLhjMWzDdIqwqYioSBWgrzupQGlw9YVnrRoB3FTYaoaUfcTi4KyLomdRmHQ1pK0FXVfABYpoO5WhkQESGuRtiGucyJShu2Yuu5SlagShG1XIOdbQ1J3TUzdPSswtiWqJYHxkFi8tmbQdN/dyJxAGILa4KzDp0HZgNDVxJXB1Tme81g6R6lSXLlE2jEKS2BLorrEOEPUhoTehmFT4iHwTIsSktDmeO2KYVsStGucdIR1hhQZwrUIGqRbEFUpsq47314RUDUlsbMoLJqWoamonKGqK6LSw9adwHSsBigXoNuG2OVYXK+C1dKalriSBG2AcgmBbUkoaOoV1IJBHeMLR9WUBDZBSo+wrRlQ4OFTNSVh5ZB1iUTg0aL65x1XBl13PIuyCl0XRFqhbYK2MDANSV2gbYtsJb7popMEjbYWKRyxKTG0JJ5ENAWB7IjUuFEoZ1H92NOqOwdrDIkvkXVBiOqepTMM2wpVd1usQWmRvQ5NrAzSdc87MUXXHau7MSqlxBcG30iUDQlc9xkfs01JEk8h6wJfGBQG1Tebfioijrputi907RxlNCQNFPePDmn7Og7Ttl3IWdfsFILivGUdDLh79HxvAdn227ldqvJqJikvapbDER9ci7d1HPBEOnB+Ybi5rDk53Ode9NxWlq3upQOxltWpYVpYTvbH3ItEZ6/XXFpAdtKBmzOLqAzH13Y4HwTbVOVS4m3SOvKTrhvx/u3rzDDgXF86XCOkRFpNeT+njCPuX7/N3M8oqkmfbzr8IEAtSooLwzoYcu/oFsju6TaywQ4N3sDnuYWhXDmWOzF3j7p8OtMdv6NzD+cci5ml3LTMxkPeP0y6NE4pFofPk43mnLFHlTnqMmS29yUe+RrrLCs7YBbcxOzu4TvYPKrxDCyv/RqracWd4BbL+JA2aPGTmwg9p7mnMdJgot/hzvNfodltUEqi+50wUzmK05bCi7l7/QVKQbcShhFl1dW4TFuP8mHOMtHc3T/C4lBaY/umSD8I2LsoKeaGxWDE/d3bFAc5duJI0yG6fw7zmaEuGma7E+5OA3TPS3h+V3sjgfWZZbcwnO5N+GDS9XQI0bc9NDUDLyB9WOLVlvvPHXBPNB+qDxJCMDaQPeq+7+HhL7HUnaVBVT7p0C7yluLUkEnH/WsHuDCg7VOVS+W4Ye4o++f9wc3bWwvIp6UDXyg15UnBbLLD3enTFpDVVs/3M2cV5dpyMR1zb/QS+pIctbbTlykKVheOdpnRVl0k8knjmUQcvu8hhOxXonZrAXkrfYR9Wo8jjsmznCM1JjL7jNINz28u0L0eh+6lA8uq5MC/RlgmTIoVL+YFRZGjtdftqpgu1N1x+wRVwOHpCbfrUxCCKIzI8uxJHYe5RmQDjh6ckJN+aA89jDrT6aG4TdTC9bvHDKMn0oGXdRxDq4i5RdM23Lrz3raOI4ojir4Z6VY4IcynhG7Nc3dnBME5R9kN6p7jSJKEw0wQuSNGWcrtzXkfcUAhC8x+S3Qcs2fGhOwx2Vzw/CZFSsHc7zQYgkWEc5apOyQwCbvZGS+llizP8LSH5i61e8DB6QsE+S388ojdi7vc6COO3WYPOXyf5+bP4zvJsDkkFj6Tx3/JuDrjhYdfpx29Rb6b8dLdXyKfnqOaF0G1qOJ/8MK9luq845ouydEjQiJ3jajKuP3+u1TOUNc1w2GnSaGk4ka4T1gMGLcNz68eYV0XcTRtR44mccJ+ERCZKdNixa3ZGet2SZO3HJwdbV/aHbePryN2NzOeP8+35GjYt6FLIRi5G4TG5/DBGfWs3U7sSinKomScDBiU+0RG8dyDe7TFAu1ppJSY1nTkKB5Jc4QUgpvv32OMIUm6+iA/CBAIdhpJ5G5Q25pb6UNUHFKVFcaa3rsn55ABoTtilOe8UC22dRzBU2LFR+E1wiJi11Y8f/GY1piOHM0vxYoDdsoBoR2xV865fbLAD4Iu4ujJ0SzdMOYGmgStNfoZFF08IyEfgxCWth8IDoeRmlwHmF4ZrNEC4YXkuqWUHsZKGinJddANAHvZXSuojKNSurd/1KTKo9TB1pDJiBYhZd+2LGm0T267/XUjPQrlY70QrKVxEuMEpfLIRIDwIvLa9ufo4ZSjRWGEo1Q+qRTUynVV9F5E0YKWCmM6W8rSC8idwbnu/0sddISaDroWaxS58ilkROlFlLZbyZz0qJTAGEGrunuDoNvKVQ7hOaz2qZzGOEEtFLkOUFpR6AgjfVrdbcfWVmGtoBIeqbIUqrs3tR7QiiEFIQavuzcqpFBgbEuqPAoZUeiAFklrFAZBrWIqkVD6IbVKqAWk0qdRMU50vJIVYzLpU+mODDd+SGEchfP7e6MovZDCttQGhPQoVIBUitoLOvtCJJn0saJXV6PGCINTHpXUGCupRXdvchFiZEuuA6wXUrSO2mgskkppci/E930K42ilR60tAkFrFdZKSqVJ+3GnpEKpzg9GS49WdM+y9gOyxsdTve2GNiilUSjaViKFIJc+uTBILyLTDa3ycUBoJcZIWtGNYSk9au0w1qK8iFwbSuthraTt703eyzU00qPRvdC352OFpEKSKR8jLMILyXSvOSO7e2Ndd92ZDGikh0FhnET6IZmqafpxY6z7dDS5Pc1xaK2QypEj+MEAZsObCN0ZMjVNQ+EHVElF2nicryx/63ssJjdRWvfubBpw1HVNVkc8shU/ikNWeweUZfkhQyalFPlK8a7LeGscs5S3uHTJKsoCv09VyoXH2zTcj3dZeXsUfkA96DRHyyCEoqRchbyj1xxPDqiTuHdyE50hU9NAC/kq4DVbcrJ72PUyOEcYRtvtvrkIWFctfzGpmY9ukukpF8UObdt10tZRRLqouEglrwWaxejmlhytRIkdGfwmJE8FxyW84UUspnsIIUi9IZ7n44UezjqKjccHVc070YDV3oQ872oR0kFAE48pp4e0a5/XTMUHkzFrc4TDIsyYIvKYewf4TlBcSB56Defjm9STPS6a6+Sxox5XrA9vY6MRZRbwZ/v3yOJXWO3fptJVZ4OhO0J70ApWG8F3k4rz8BqNgLZpaJMnreELFzErav4msSwHt7HOobTqbQwtdRyRzVuOM8ObScwySqh2StqyZSnHXXRSNxQbzTv+hnfkkIUfbwnNy90viaBcebzZFNwd7bIaRn0a/aTRkiCiPHV8YFPujndYDYbduJWqS2sQtFaQX0jeD2su4hsUAsowpIi7HR4QBKVhs9R8X9fMx8/hReF2670KQ8qkIq0ls7Xk+77gfPd6lyJ/yMkNlibiQZHzd2OfVXSb1pp+jFYIIfF9j3Jmea+oeG88ZuVPnnJyM5RhSBVNKFcBb9mK88p9OprcnkgHdvUcpm2pdMPj4pS9WdrrkXapymDQ7YVP/R0KN+Rx+oCDpejD3mpL6pRlxSS6yaI2LPMzDjbh1gJSSrHlQ4bqOid1ipnV7G82H1I5D8MIrCXmBm/5OXI5Y/8prQTn3BM9juAl3q8fEKcV0yDsfVVEv59eMHIa7T/P+/VddhqPpNdSiKJu714pyWG8iy1HvBW8wXQ9RuoF1/PnKMtym6pMCkXl7XJeP+ZgXm8jrEIWcOTw7geMmbLxE2aLOxyuQpRSzLxzgiAkWAQ46xiq65yLhmJ1ymHa1Qz4vo8JH5Cp+wxPb6OLF3i3rWkW5+yuQ4xt2W33KIbvczR/EQ9JaK9zP1qjLn5I1Cy4/qgiHb5JXmcc3M0p9mZY8zx/Pfw+dX2PgwcjyrMuz4/67cldEWGiPd7Ub3BwcdQZR1UVw+FoW+NyMLhGWXoc14/ZP+/yb7/3R720PBxXERsZkjYzDk4y1qJPVU6Puu3JPGcoj3h0tCCbrTmsoi7iKIqtxKNEEKtbvMEa0hUHPQelVOf5k+c5k2RI0B5xx54wNAI2m35cya1fzwCNMkfcM3PGFysGpqvDWa/XnRQDsNtqhH+TO9lddhdNJ9dQlX1dyog03TAVIyq1y6PsPteKcNvq8LSvyt7wOdZ5zayes28MxrQMBkPSNO31OHwGzYRz19K0GftF0fuqGNq2YTgcsV4uSbzneUemLOyaQISf9Gv+bKUDtdYIT5JHQy4ORmRtjZKXYsVNZ21XVawbj7yQrMZDEOJJxPGUdOC6DgmrluV4r/OWLaut0I+zFqkU6UqRMuZ8R1OVVccX+J0eR943ueVLzXK0x1IeYK2l7BvXHI7S76QDs1XA+uBllt4TwtMBed+M5AwU64DV0auU4RNiqwxC2jJHIlgTUM8t1dEXadyIVKXMyl2atu2sKMOI0aoiq31m00534XJlqGWNGbf4KmSzEYTSZ33U5atCSjL/OqXS+OOujiNde6QerIJd6iimLAuU0qS7U9rhNcq9g059PNEUOwfYQYB1lk07ok6GrJMjfAvVTLHen1CNBGaQsnQv0yQhZlSyqV+iTRa0FwHN6Mu46Cbz66/SDrrIMPM0TV2TtJKyEGTXv4TLd3DO0jQNTZJs5e/mLuRoaVjujWms7RzM1KXrWHdv0kVLYCWzyR5VU5EfpZjSsIx2umM1DelaUwwHrIYCv/FRujuH8qmII195rKMJy9BsSUiE6Noe6hoXROSnjtUo5iL2KKsS3duUGtOJ4DRWUswEi6Mdlv0OWtUvKF2RosArDVnqs5x+lhK79eu5vJ6qKtnUirzQLCcJyvOomwYBFL5P3Te5LdqIoVez2D3cNq5dXo+QEl97ZHNLKhyzqaSp660ehzF9xLFTkK99KGu08baR+SeJZybkc2mPcNZm/O/qLl46JigLpOweimwaojjG5TmPrCND4C27LdzLl/VyBRZ1xR0/pMxTAgJ8P4Cq7MlRgWk7juP7VUNuWmJvAnnGZRho+1nZWct3ypJShARYjLFEcQK9WLEfBNRlyZ86SZEJAuHwPL/T0oftStZY+GPjaFeOqI66hwrsxgMic4abQ+R5vLcq+HIT82jYUsVzokoi+/A1iCKO1xtyIQk30bbgTSEYR46gClhsLninqDiNY7xFRRD4eFIzDEsoFWXjsM7xulBkWY1fCII6xvbRmC5PCWYL9EXK97OGZH3IvssJ1z7GGSblkHLnlP1Vl2v/xSbDuJiRO6EWcw7mQ5rqjKGLGZze5+TGj/jDnVNuPFCUdcmL7wToaoRAgIDHE8veQnCvrRjIGB/X7UzUNUFTYIscKRWn2uOi2OAtE0Sff/u97qYxhiCKeDdNuYcjVAMoCwZxycvzPd6vZ6jAh6bmL/DYWxa80ChWSuOkQFQVfhB0Vp5C8D0UF5uaoNRdJHF5n5WCskCFEX9cbljhEdsBLku3ToTWdPaL1jm+WWbUqxF+XeOcJU4G2HTTjQ8gaw3/x4JaSwJru07rpu7GWJLg8pwLIfmzusFbaoIwRJRPdWX3mqN3tUdTZPjLuJ8M7PY96fQ4PH5Y5BgpiNYxsirxPL+vgWmJkwFms+G7rQXqrmTdfWqkA2VXGg1YYcnajFHmUFm27QNompqBq5GbTZe6BAGDrNwqOVfVJYchuhdzNKKt1wxaRRiGP9atvnEOV9eMfZCbTScd2ESo3q3eWktpDB4Vw7bBGMvA1egs7dzqm+57izgmrGo8Y7fnAhCbBJ3nXVm47xPnBZGJKcsS7QS/m42Iuc433DGZtPyz4JBfNiF/efwWP4promDRpyqG2CSk+YbK9xml5XaiHDnN765v0krH77fH5Kah1YZhuiGoQ45UzG/MdsiV4A/NXRocJoqgLBgaQ2IrVJYRBD5ZOccFD3l5PYBWMJ07qsGKwSrEYtkvJ2TyITeOW4R1GNOyk0Vs7D0aueLa4xGfH1t+/fgL/F1zjz+4cY/d05CXZzeY+++gB8cUpqE2Y3w/YDV8zGl+jfMgZrww+P6Stu1SlRENqk9VvDAkbzKGab1V4L7M843p7k1e5jRCMBINUV7wb+weN6uQPzTnpKGgmFxQBb/C755MUU3Df+cBuQ9FkRO1EUXRlXPXcYLKM4ay4wfqXpJSKYXOcxKTkLUFQQpD0SLW6yekey9JCZCZiiSzqD7VHLoGtqmKwxhLEfgkm27yu0w/rDUMaVDpBt/3Ka1jUBmitisKA0cQhFuOQ8YxbZ0ySiuMaWlbw9DVqD5V6RbVTmtm5DpjsqcNmUa0uPWS0vO2QldCfAo4jjzPef/995BSMJ3usFwuEUJ0al9pp/1pre2q9qZTFot5V2TzVJ9H0Kt2BUGwHXh7e3vM5zOkVD03su5KxIWgrmt8399Wz10eV0pJHMes12uSJMEYQ9M0Tz1Uy2g0Yr1e930Anc/scDikLEvatldUSlOALR+ilELrLkcej8ekaYpzljt7HgeE/HD5NiLwedl7jn0/4Y9Xp2zKjPE4ZbPZYK1lMpmwWMzx/YAgCLblyxrB10cepXS8ef4OrTFMJhOWyyVhGHKmfb4Sv8qJqHhn9h7G2u15ddWrHW8URRGDyYjlcI0fjlm8vRN6idYAAAaHSURBVGZ2kVFnLXnZsCklqZ3x8NShhysmyyXq8ZpaKkbXLcerEXdLj+r8IdnuktNgwpdm/5aJhmk84NZbJzxaf4A6/YDH+jOE/phik/LW47dRsmvOiqKEqippmobJZMpqtURrvX0mURRtd94u+SNrO05gvV7jeZogCMmylC+OKgYuZfXwuwhPIv2KmT6hvPHPMc7y7uIOJYY8zxmNRmw2a0AwHk9YrRZIqbb6Lx2h2Y3VyWTCZrMBYDqdMp93vSpa666EvucP6rruv3eDc65/fottr8qlM2FVVVueJsuyrvJ0OGS9XhGGce/x2mx5j67H6QlxHEURm82GJOnqcdq27d+TxfbvRR+5XXI6SZL047VhZ2eXi4tzPM/f8k5aaxaLxSf6nn/iE8diseCb3/yfz6Qj7x875O1jvrx7kz/4wTc6t7gXv87t4R7/7bU/+kjNzTe+vOEkX/ON9/7q/z8Gghe+/jt87+wO33zwo5/4HZ6Q/Lb3e/zHxe/xg8mEb9//Ju2d95mnCw5G+7x+//XtZ7/2wlewUvKje2/Qmpavlb/M2//re3xh5zE7L36B3eKYP33wOv/u13+L9UGAN19yPfxN/sv8Wzw8/h7p2+/iNvCVl77KG/d+RPMMCo7ErS/zS/u3+E/f/zNcfzeHXsh/+O3PMglivv3Nb/Eo+2Rfjl8kuE+45vyZ6HHAJ3+inwa8tTjGWIPtc8o35scsqhz7Ee/Fa+f3mZXZj72HBscPzu/xzvLxT73HkR+x+9aMcZPx1SF869HDXtLPkljzof+dIqiNwRqDs5Zh3YXb0jma+Sl/vlhwtp5jj0/ZWyVYU3Foz7EfvMnIeGzyrskvqCukezbP/q3FcTcZP5Wvp03J380ecCPZ4aLY/JMccz8vPLOJ458iHqZz5mW6/fnO+pzjf8Aq+DcX92nsTy7a+e7Je2S9DupPQrO7R/P5r2PSFnPymHY562Qc24a2LD702bYqaUwD/UvZ5Cn0ux3F4pxvrM54aXzQ7SZkGVII1puMu29uKM2T6KItsmdCxAE8yhYsqvxDv7PO8dend3g8WH3oPK7w7PGxJw6F4Ghnn1UUfxLn8wuBvWHy4Z8ZfOTv8IHkp/x9xE+/3wmGf20U4yjA15rPHd6itobDpmQnSDiTFYVpGSifl/au0VjDXDTM25zxeMKe3Wcy6Swm2mbJZDwh8P2um1N57DvDrcPrzOsnL/N0OmVPVlTmk7ccvMTe8MPXfUxB1a7Y29t/Zsf8RUPXdf7xorOPPXGIomHgCR7n+d//4Sv8zCAbQ3pxzGde/GUmQcxnp9d4a3nCbpjwOFtxnq/4q7O7/MbtV/j3r/4LQuXzX9//S/7z639CPagoy5K6qjDOUeQ5VVWxKDMEgmvT6+yHQz43OOBbD9/YHrNOKsqioHgGHMdPwuvVfTypyP+eCOwKH8blTuE/FB974nhxuM/1ZMJrj+983K+6wieIG+MB//LaqyQ6AAfvzB/zOFtg2pZNnfP22UPyPOP103usX8lpteFHp/exdcOv7d7meHnBvzp8lUWV8e17r/PVyU1+6+YXOpMrpcnbmgeLc/I8A0Ag+NrkJndmJ8z63/0scLVc/XzwsSeOL+ze4EYy5Q/EX39kEvAKzw5f2r3J9WSCloratnzn8TuUbcMbHLMbDrjouZgH6Zz76ZxE+7y9fMz1eMLnptc5v77hVw5f4HG2ZDcc8KuHL7IbDrrdMgfWWfaj4fZ4iRfw+Z0bvHbxgAfp/Od12Vf4GeFjTRyeVHx2co2dMGHoRazqq/n/HwME8KuHLxFqHyFgVmZ89+Q9nHPMyowXR/tb8nXTlHzn+G2UkDzOlvzGzc8z8iN+87kvsh8Occ7xtf3bfG7nGlp0Jf4ASki+uHuDP7r/dwDcSCbshgO+sHuDP3n05s/pyq/ws8LHmjh8qXlvdUqQakLtsao/qdO6wseBEpKzYs3vv/c9oNvK/KvTD7DOUZuWu+vz7Wetc3zj7msAFG1NbQ3fPn6boR/yIJ2xqguGfsR3jt/hb88fIEQv1mQb5mWGEhLjLL7S/PnJu/3vBOYq+vyFhvhp7KoQ4urpX+EK/4ThnPuxlZyffBH7Fa5whV94XE0cV7jCFT4yriaOK1zhCh8ZVxPHFa5whY+Mn0qOXuEKV7jCj8NVxHGFK1zhI+Nq4rjCFa7wkXE1cVzhClf4yLiaOK5whSt8ZFxNHFe4whU+Mq4mjitc4QofGf8Xul6llqfBzvkAAAAASUVORK5CYII=", - "text/plain": [ - "
" - ] - }, - "metadata": { - "needs_background": "light" - }, - "output_type": "display_data" - } - ], - "source": [ - "import matplotlib.pyplot as plt\n", - "import matplotlib.image as mpimg\n", - "core = mpimg.imread('Results/core.png')\n", - "#core.shape [:3]\n", - "plt.imshow(core)\n", - "plt.axis('off')\n", - "plt.show()" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "This is the die image of the top die (Sram Die):" - ] - }, - { - "cell_type": "code", - "execution_count": 2, - "metadata": {}, - "outputs": [ - { - "data": { - "image/png": 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AZT9QIhePkM/GyPf3wogGnFLkUoa3ZvMUNdfk9Rbje2+w2G+RziN6k1yNDNnsDmLo4VvbqPd31srTmUYrhXzyGLHMkPtbqK9dpRkUiDqArAmEk9ctcpkhDof4r+5SkMU3zWrAyOMl8kSByBnfu436IFlTGZcvXebx48f4wqOeF4jLLfJu0EGyDL13KBs6SP6OI4qFQD8Z8tmvT3jW3OJHzCO+KX8Pc3eZMr9M+2MfIf/lv458sIP72T+CK1c7N63WoX6XSuTv+WnUpMH9/X8H960reLnamXKDY+RP/h28f470FRzfwD14G8ypl48A9/wBNEvER1/A/e1/C+9jOcZyWGQYYxm+u4/+7X8VOR/R/sx/gF9obvB1Hvk38HWNkZJ6YuDxB4Cl/Ye/leqfjrF1xT+RQ5yHbJFRmdv8pPkGQqbxGxboK1cux12SKuJ+YXdGyICdjIYTFosFSq0mqNYSKQKhDOExpumeZ23D4eFTtJboLExypVfleW+x1kXAfYGUoTypJFpL2ramKDKUUt0LryiCBRzmJN2zkozHY7RuogcRrg+L1rrOP6289EUl7QhkWXi0zqJvGP3R4G+fRyiKznt3DRjjIi5QY61nUAx718r4EbSNQ+siltPGKwQIRV0bvBeMR+PVxFSKwWAQ3iw+PWslWgdMxbm0MEgEKm18MhqFAROsERnraqmqliIf0TTrmAoofFxss2xwpjxnoXVhSzFoIehgd3ePp0+fUlVNd4+IAEfw10csF03c/ZBr5UkpcR6qqiV1szWeo6MZSuUU+fr1IGnbNLhGcZch6Tr8/15zl5PsDbb9M7a4A+oJxfZnmIyfIlgipUbrb2L1algFc32BUjVCzJHSotRHaH1IluWAxxiDtC3y/W3k0wJ/vUDd2Wb89be6PusPE/n2MXqRofwMrb/R7f5oDdYJpBJMtyoQSwSO4eBjZHaJ9w+WOL6OUvGN5lusn6OURIp77Ls9jGjBBxegbeFjOSTPiwAq+TTm4Ph4Fhav4STuPPb6B0lVNSiVkWWSuq57eg4WhveC4XDMYpGwK8WlS3s8PXgQJ3V/jIcxqZSmrts4HlcYJMjYZ8kqSmMyWDpKZSiVsQY+ETBLVUiUDBiclI7pdPrCsXwvfVHxPgySbrUTCVMJPqn3FiIucOpOEqYSPsFiMcYzGg0oy5KqrnrXuu6eLMsjEBZ82oB1OvCOPNc0TdNtxQE4a4LfKXwEpdbrYkxYmKRIXbeqE3iWy/AGCmZiuFdrxaDImT0vz3BLwHVchLapgSF9CdaZwllLQjnA8fz5Ada2cau3iS33Uc+Wpi5RSuOcCOZ3rzznHAhFMcgh4j5KSba3pzx58pim8bGKK11qrbDW0jRVr/6rv1ppTKtwtgXZAg3z+QFleYKQxDdeE/s4SFlahPBkWep/BzR4X3d6HgwGlHULS41oJVpq/PCIsvgWqHW8SylJsbvEyRpPi6de21IuikHckZohYtvqZkY1tzg5QgmBtVGXcZFw3uFxFEWGMev8DOctbdsiJCBW/bq9vcXJyQlluYhtiv0Sx0pR5CwWi47Pkvol8U0EPrrjye03HB4+A+9QUrGaD9F1Mi3WGobDIctl3yUM19R1iZQ+WipBZ2nn1NoWa1tOv8yLIkewxDkXcU6Yz08t4t+FvAJMReG9pywDfqGzQAgLmEow4cKis+7/OBcGuXMeY2xczT3OeebzgGpnOuv5rY62TQMuvQnE2r3GWMqywlrLeDymLMOiJIQiz4uA3xjTe06QsPtDdAU8zoWyvA8DoijCIidEKA8PbduyXC6Rckjb1msmpDIG6wKQJ4Q4U55zDmOC1eU9OBuA162tKWX5hMVi2d1jbQQEvUcqHS0Vv4bhGBN2pZxzlMuStpWdjsNOWjDTExZjrY3tC/8d8Ke6uyddM62OEdl7eF/QtjmtyCmmV9C6xFmBc5K2LWjbFbmtKMKbfLn0eK/CwtoWtG1BluV475nNLE5p1LDEZobWN9iiRl92lPPFmq4MgqWYQQbOK9qmWFtUrBXAECmJZESJlFMGg10ODg4A8D7syDStovQF4whWLpflmb6RMu2krfQEcHR0TNPUcRFrQr/0MJXFYmXppXvS2HTO0RqDlKrTs1KKra0pzw6C+5HGb7o3yzKklCyXYSyE8kKdjDHkeUFZLpHSdaB9sJjDrqNz/kzblsuSoTKADHyhpmVwaXgRMZXVzg2ERSVgKmmrWaK1RsrTqL4AEfCXtB2d5wEvGA6HSFnj3Ax6fmvmwnVFkce3niDTGiHDNqnOFINBQdsGbkFyyZQSYdtOSlTkZZypC9EHFYFlmGW6YyV678jzLNY1bANrpcMbd+6C7yxXJmSmQUUdJIS+L1qrqKOw6Mi4JV9VJUpJBoNBh/ZrpeJzJPjwRgycEbf2PPAIKSOHJdYj00wmweoR+EhHD5MmyzR5nsfF0K10FSnrUimGeYMUB0i5IFPHZKKhsg/x/gCpLFIZ8vwIb/tvxAWDgWE0cgjRIKQjy47Jc4dSMrpbBWVZIvcvoedDctOgD6e4j6ZkzWBNV0pJRnODqPZRoiHPn6+xRYuiCJiCWCKEiS7lU6xdMhqFN3yKqM9yg5cOH2kQg0FxhgUbWKxuTU8Ak8mY+Tzs4gTOR+zfOFbyLFhMQrCCArSKuIsk05pgZetYjqCuyzA34na57o3NhNmEeVV15SX6xmpMqm5LOMt03HUUKCXJsvXFYjAoyHRNjE1AZxl1vf5C/G7kpZPfAkhbkOc5eZ6TZVk0AdNH9f59+uPX/tu54HsmbEWq/mTsXxcwhrCbEEkVCPASaz3eC7TOV/cIiVSqh6msf9ae1ZUlu9+1zvBeRLA5Okg+7GpJmXga/WeGXRVBWKBOl+ecwAUzZq1teT5ACIW1fb1AJNcgle7889PlpecEV2ylz6YxsX19fkf4PT1Lymz1XU8H3gd+TOIbBV3kAYPq0ff7H6WCrvxaWXJNz6l9iX7gvAcvOmyr/wl6T7Va75dURyEkSupuPEmpybJBHE+n6+jj+JRruurrMizgPgL14dM0BueIWIXsnpXqaG0Yk4G30++X8BzvRbw3jTlJng/j/Wd1mfosWI59zCPpWff0vOpvvEd2nK71tlkbR6UIL70syxgOhxcTU2nbZsVTEan7E36xwkJOS7QD4j4+8Y0cUHNrwXfb0Ct/M739g4UkECJMOIFDCI+UQbnBp/SpkpG4lObx6boEU7abUqJfXxH39H20RsI1UgikSrE/pzGjsKCAj/VcL0/KcH+aeUlXAUdxXTkrRYmuDSDOtEH0cJD+vVKKwDQlLNJpvVjpHYRYr2NvSekwK+8Dv0dA9NdNqMda30RNOtNVudNF1GeYPB6ldNcXQoigC+Hjc9d1la5JCAbCn1HNSs/hOc4HNmqw6k/pEgHexfad/i3+7OPY7Y2DwM5O7fNd+0Rsn5ThZdjXh0gvTeGjnvvt87Rt2MFc1WN1b+BmgZSa9Xz0vtfe9fGcrP9wb6/DoyTrJ7xcHW3rqOt1jOq7kZe+qCgVfPXlMviUSof9ceeDTxewkNVeepLkkzrnOqAprLYOpQLuscJd3Jq/KYSMOAK0jcE7OhwkfYRQ3fU+vlnCHr89B+MIf030W521NK3p+l9rTdsapJQ9P9lGX1fGuq7MaNVanPMdp+C88pSWHX5hrKVpkqkeGJLrfnn/WcEE75usAR8JAyXoKQ1MQdta2tYitYj8oeDfh+dLnLNozTqGE60wYyxGBuJiaw0N4W3tXISWow5SeUFXGW3bYozvMIfUJwn7EkLSNG0gIrpgqRhjz9VV4IoEToi1jrZp197cUuoe5kDkejic89FKW2EcqrVBB9Dp4HR5KYDQ+XVMJVwbCIZNY7pxYJ0N49ebOCbF2j0+KCqwqHtjWMrgCrZNi3crTDD9Hqwi32EjfUylbQ1Kadq2xTl9BsMJ48DQtqcXFYPIDL7Tq+1cqheRl76opMGdMBWlE09FRDRaxliGs6smQgR/s/Mjw31SsuIICDosI2EqUgryPG1h685vTfwBCL6pMekaGTGOgPecxjiCUkWHg0gpyTPVDd6Ar7iuTek1K2Xyn9eB0yxjrU5nMZyAwcienxziRbLoF69wGKVVcKNUqLezAbXvYziJ50C09Pr6TBhAlokOU0l1SvyhFNuz1gcq6CzTGukkWigyoTAx3koQFvcs0zizGpRZprHWIKXtsKBVeToAzrF9QvpgpRCwo36fJQnP8D2TXa8tKkoJvA/xNiKOlUxrZJ5R18kt1Kt+kYHukMbK6b4J/SHW+iWI7663NmEqdPhbGgt96yf0C3HcBHcj6VlKGeECHS0ZsTZWAg6ZtpfVGqbSj8cK42A1LxK2pjNNlp2dcwHnSXM0jOkLi6lkWcBTsjxnxVNZxf+c9V2TK7Huj4dBmCOlxthkTq77vEplHf4SjMz0HNn5vAHIXPndxppuIpzntyffPBqSnXWTfNEOl4j1lkKhVd5hOGvPQ3Y6OOvTr/zl07hEE9/Ca3gQkPxya300h0/5y16Sti+VztbKKYrBCg/qDApJ8stPYzirGoUF3526J7w1fTTb5Zm2J131MQ46S5EetiBXfSdW956nK6V0z6FY77+EU6y29UMMV7AqdK/P0r2rOp2H4aT7g9pX32XZACl1rGOqQ3ICQ58FK67X3z6WF+dAH8PxXsT4KLnCIHvlpWdpnfXG5erZYSyotfZJqaJbvf6s07pKsUghmHCV0uK7lVeGqXTkL7nyGYMv6OKKeNpXTuCb735zLuAgxjR4b8h0mDzJb02+uXMtqjMY0qAMZVjbIoQjy2RnlgdeiI4+8tm6JOvPY+PC45FiFc2TZZKqaiNTMdbVW6xt0LogxDetninFCj8ITMjTTqvtLJ9OF8IzHOaU5QJrm+6eNN6E8GgtqU3y6XvDTAZcCZ/ar7pyAp8BdAz0FL3yQp85tM7jZGENC/HeobRAGNHdUxRZYEAHux4p1+sSuEauh62s+i5Ykas+kok35MPv/T5biQuYFsCpfoHATA18jaSooCdZZNT1sqtD6pd0jRAOY5ozfZMson7dAZqmDGMyyzGm1+ZOl00ckysSpZBpEXFd/xmTxqRnOCyoG9eNlX55ShFxmoaE46WlMTxLUNcR7xLJ3Q2wQ7CgONM2a1vybr74wPWanJ+j59PIK0nSZK3tctbqTGLMTodxGBN8znXGaWD/JWwiRbQWxQBrLYNBsDTKsgp+q3U0TRuvE5FpWAMCmbdxVXfxTU8sr+zoy8aGt0LiHqwiaIO0bcBnnI0YhzExYjr8Ht7G4c2QygjuRoiKPh0wKZSNmIOjaZoz5WVZhtY6+MDOYdpQ3tHRMVVVMx6PunvaNmBGxtqQl8aqiDGtCFFN0+KsBxG2QtO9eV5QFAOOjo4DRcuFoLW2DboMerYYU3bbrgnDsTa0qSorjDM0vqURitlsHgPYAkZV1w11vXJ/Qn9ZnKfr39R3JlLwR6NRwFSEj5aNoDWGxWLVZ0mCNSU7jKPfL+H3jLpuYsR1wMPKZUm9VBgTFu6kD6HC4p9wHhBn+qbDRCLGkX7f2blEVdWRN9J2bORAHmwYDoYdlymN9aaOeXFcyCFTlqv2CSE5Pj6OWJqIwKnp9XtwbYpiQNO0HU5prIljOYyvLNPdPWFXVGKtoaobOmJvN+4K2sbE8RPwnsB1uXA8FdeZUhB5KkpFPEFHbESvYQAQFqNkQifyWXqzJyUNR6POT9Zak7mYosC6LvWB1m3ELwQ6+plKqRg/EyZ6lqtu62y9vCAp9UHCSoLfmnWuy3gc6NXe+2iOCpwNzMvRaHyGpp9lEnzym4sz5YVJ4gJeIiVKabIs5/LlK1j7JBD/4j2Jp6KVYjgcsZjXEZNYPVNrg1QS7wIno//bbHZCURQMhzIwhoWI5WWdyzccDmKIfWBoJp8bD8VggG402mu0yNje3mY4Wnb3ZlnWw1REF5LvnOlhKgkvCtHabWvQOkNK372UlNIhivYMb0QEWr+UKNnvlyDWWrIsZzgEYr2HoxHDfJeDg6eA7/SRZSvMTKuwqJ/um4R1eBKOFX6fz+c452L7FqiO0yQ7cHowGCClpI5McJ2Z3pjSjEYxQDbq+fLlKzx5WuHjYqCinkJdc5RStG0b5yB8F7cAACAASURBVE/qF0WWhTwqy+US71ftS0RKrTVFnmOydQvEGEMxDtv6Wmu8axiNzur808orwFRkx1FJPBXZYSoSIcKbJuzh9z8rzCV9l+dDlMqYTKYhH0R6i4j+dZLBYNjtTvTzjggkg8EIpTRVVXfPdQ6qquw65XRdUiS17ngxEnrlVVXdvfWT6ZhlOePRpEP4158pkUqCF7GO6+VlWU6RD0Kktl+17/DwOc55xuNJdy0xf4v3grZpKYpBxJ7Wy/MxEnY0HPfKKbh0aS/shLSrHbaky6IYoHUWd0lW+WqCylVIsxB3UsLvkvl8QVXW0a073a+rGJiiGBBMetldl3ZyRqNx6DeRgEiNQKz1WfoolTEYDGNU+9kyh8MRweJIFIKwO3NyckKWFR33J9Wv28kXMtZjvbyAG7Xdgpi+39293GMei/g/H8ZdzG+yGpPxeYScKzLqoK7b7pnOCQ4ODkmBt6Ftojcmg+UyGo1jQGJylVfPUipba19I5hTGc+Jy9T+j0RgpFM6H7ffBcBjb+mLLwktfVPqxP+mz8hEdIQ7lvI8nxWogwndtW+Jcy2JxgjE1g2F4s3XXxXvruiTLAmNQ4CJmFsqr6yXOGYbDorteq5CqEu8JcSrrnywLkZ824QC48FwC23Q0KjCmpmlWsRtt21CWc4pCR0ym/8yY6iHiBKfLM6ahbStkh3OEul+5sotSgrKcd9cKUk4OKAYZbVtF7MmuXZPyt5TVovve2prnz5+itaAoslVZsW1NU2JtE37rnpXebhZrGjIt405d4ONMp2OGwwLnEz9nvW2jUY5zLW1TphHSlRf0vGpf6Ltg0iM8o1Fx5nnOtdR1iZCiw8T6v9f1Eik9g0GyOByDImNnZwtjatq2WuuXpEuBW9Nz137hyfMMTrXv6OgZTROyqwnhYl3orinLeRyTqvesVQ4UIVysY/hNKc/e3iUQFtvxhPzamMxzTVnO8b7fL0EHg0HUc699xjTR6hMRY1pvW1nO8dgOM6qrKrK3LximkrakEk9FZxLrLM4HrMAYGzkIn8xTaSNPZTAY4JwNZv5iwexk3vnl/T388biIGc4EKo88FW87s7qqqpBOMJZpnWE+X+Dx+HNiIpKvH9bCkLWtaVtS6oPj45MuW1YbfVGtNXkx4ODJnNP5TVRrEARiXFXVtO16su0Q16GjleMw1tA0LQ8fPqJtmxgDVHV1C7yCltlsjhQ5IV5q1Ya2NRjrkAKKfBBIVQQK++7uZe7fv4dxK05I4miknMCz2bzb6uzzVBCCZVnS2BYjDC0th88OuDKfk2KNTvNUjo9DTtvE/nXOduUlPackVImnopXGGsPx8cmZcRJc0RxnXedy9reU8zzkKJnPF3EXzzGbz6nmaUtbdMGZKnKfnA11yrKCqjqbY7isahBijTdz9ep1nj8/5OTkJOJQvbie1jAZTzg5OSEAta7rF+dBCU9rLLPZvGtf2xoePtzHeRPj5xK3ZMU5ESK43nU97/WLoW3bLpo7y/KufcHqCfyVMO7WbYjhcIQxC4wJmJyQkqOjIy4gozaF+Ic3hcpEMPcI8SNSinOBoD6mksg3CTyazU7w3jPZmkSXVHaBXhCS0aTtMKkipkLAclLA1vb2NsfHIXtanoc0fvAMzyopU5Isy6NZ7DtXRKsVT2U63WY2Cxm7EpelbVuWiwXj8ZSmqdcmuVIBEJURazpdXnBH2mj2S6QMC9atW7fY339IWS67e6QMulRSB5zoJIS7958p44LnnYsR1WERs9by5MnjgKmMYgwRAhXLCxN0lV0MQPRilgJoPiRrMqRTKKG4cuUK0622w9LSYptkOp1ycjKjbZpOl6l9eV4AvmufkAmkbZFSrSUY70tVV0i1GgP9RaWuK7TWjCdprAgm4wnT0RUePdqP/aG6fklxTUopyrI80zdSyu7tLXvEsKdPQzrJlFp0tUMUrlkulx2mkjKxSaU6d0sKyWSy1UUFK6W4ffsNHjz8MJLQ1sd4nueExNdVGAMpJitek55lTNvdExa7liwbhSRW9boFUpYlkyLcHzClmune9sW0VLIs63JzKr0iWYXBlCFlSzI9+/clH1nFt9ow+njT6ZTlckFZHsdrZbcnL4RgOBx1qQ2GSq8WJ6mYTKbUdcViUcY9/NCpi8WcAOxm3fdJ0hZgWhhDWStAcLksGQxGkbQWomiLYsD29g7792tC/MzqmWELN+UsMWfKCwMmZMhDhPgaKTWPHj3GuZBfNy2IIXYoGL113TAcjtfSdwIomYhQmq3pDgeP2ljHgitX9nj48EHHLk24kpQBOEw7QamOMvrXSmmKYog1LrKcNQrNs6MTFosyLq4qckFWE3O5rMjzgtEoJ/GCQu4O3QVBbm3tMJ/PEDK+kHSOkGEn7bSutNaMR5PYRxKpMvq44ngckhhVVdw+RoWs97MDBoMRQojVJJesJrlUbG/vcHKybqkIAU3dIIXs8Vzg+vWbMZ1kyK+bsqclHs14a6ezYtI9SmoExEU84Hyr9gkePtxHKh0DasVaeQEXadneDidLSNGPn9IR5xvEQNSqG5NZlmHNiuLfl62tKVId4lywfkfDYS+PzncvrySbfsjPED/eRdjBs8rTed4nyeqaqlpiTMvR0XPqumIyHnfXJF/Se0tZLmKUrWY1wkJekuVyjrUtW1sTEj9AKRkTX3tc5Gb0P3muI5szTlTve797trYm1HW1lqOlritmsxOGw0H0X93aPdZGTCXPzpTXtnXgj6QsYZGfcPv2LbRWHB8frT0LAmdhNBpRVWXcTl49z+M6S2U+O+7aXdcVjx49DLlfhkWnx5S/JRxl0jAcDnrPSpyHkAsmy3V8E4a6XL58ia2tSSCInelbz3S6hTEtZbVclRf1mecZWaaYzY4jThAuSTlNJpPxGV0Z04bE1zKSbE6VuVzOkZLYhqDL4XDA1atXY56V8lxd4n20itafJ6VgMByEnCs+8ZI8jx/vU1Ulk0nYkcR3mgou1+yYLAvJvfv94qF71mg0JGB/oQ63b9+OW9cpJmh9TA4GA05OjnsxQ6vPZDLGmLbL0SIENE0dd4tUBH/X27ZYnOC9jYu8oG6amFz+grk/ENyWtFoqGxiJKT5l9TmdTyV0corrgdW5P1tbIfH18fHTzm9Nz/DeMx4PugxaKl/FO1hjKYqQJzTk0vBMJlPKctbxGFI+ir6k7boEMqfE0mlLeXWP70xVrQOafv9pMtdXJqQxNuQvcY5yucSY9cTXeZ538UTee4o87LLMZvNohaw4KCbmU3GxTv3fkthezEfCLpIO9/b22N/fp7UhqND1dBB8bBOtokRATOU5ZDTrW9ciCgVedOkHA/3CxTqltosY95NifQQ+9p0xBqVMBPZDG8bjreiOBmr/4eHhmh4hWCqDIuz2OWt6/RIkuAFzTk6CWyFEOFGg0M0ZXRmT+DMOE12F05JejmkcaL1Kx9G2LYeH4Wwfa214SUW8bzKexpfBaiykfgnBkjYmmfadhbRcLgj5jX1vbPbjh0Q3Vq3zXR8nSzX9ls79cc7H3byaqqoxZt2129nZwtmS1lhMGyzXlHPmReSVLCrJrO7+Hf5FnyF4erCs7g3MP++hrkPi66Oj53jvmEzGAY3PWqbTJe9sCT766A5VtWKpCmkwogEahHhAWR7SRZkCZRl2LhbNAU40CPEUIdbBwNA3AsQhThiEOEGIu6QVfDb7eNUOUdFQ07YNs/mvnbsdJ6Sjdku8qBFiHyHWTWxjQnIhJ05wNFTVA6Dh4OAuKb/o6mEnWNHi3Qll+bX13zodNtSuIsMg5QOEyFguw9b306cfI4QNx4aIEkSDEI8RoqSuwzX9ZzpxBMoxHNYYfczWYJerg4wfur3LL3zlayyXz5jNl1jRhl0ycW9NB/N56BspDa2oY3kPEGJA4Net+m65FFjmNGaB4Gy/QKCqL8rnONGGfpF3oRdHVpZpnFW0tDjXYt1HPHt2v9t96feLERXWVQjxECHO4jcAi+oJXrQIcUhdfx3wzOcr9jMA8gQjDCFl5l3m83ucZec2GNEivUWI+wiROC/3AM+TJ/eQyvT65Ql5brl9+zYHB48AwXQanlnkJUJ4xqMxSgnm85Nu3jhnWCxmgO9OI1ife0GSRyBIyahihv2Lhql4v1opIQYUqpT4OuTK1Lo9A9ZKufIRQwwGDAZDjGnZ2pqyXC6pqn2k9Ey2Zvzm33zI9RuGpvm/OqsIYLKj8fmbVLlie+dXKXcrTouUoAa3abIRg62vc/ny+ccSDLcuYbIrMLzL5ct/j/N0vb0zwGZv0OSWne3/j+yciVCMJBRvUmcZW9tf5fLls36rEJCNbtBmU/T4W1y69OzcOk2mU0x2HTso2d39eaw5W6md3RyXv0ntYWf3V/DN2TewzgRi8Aa1HjCefo3Ll89PIziYXEWNbzDceR+1/QFXx1/mxnjMj//E1/j46Gdo53MmW2Nsdou2aLh06ZdoqrPkqcmOhuItqkyyvfNPKC/XZ66REtTwNo3+9v0ymIR+8cMFly/9P5/YLy4P/bK7+w/J5fn9Ioq3qDP9if0CkA2v0+gp2fiDb9svNruBHSy5dOk76ZcvfWK/yMEb1Fnol89/fsIbb7zJBx98c+268XgLuBoTluVnov4hWHwI4jUZ2WTSWf7L5ZKyrJjsaHQWeC9Zlq0d//HdyisBakMYd/IwiX8TpkL3OSvJ5w7/VVVVtFSO8d4xjpiKMYYHDz6mvXyNg4MnHYgJMK1yynIPlObJk4c8fLg4U4qQMJ9NqWvF4eEzHj7cP7ctzw89db3FyeyEBw/vnWtc6a0Jdb3HsmzZ33/A/PjsQBmMFOXyMlU95OmTxzx8eP5kOTkZUjU5R0eHPHx479xrbh1cpal3mS/mPHxwr4vR6UsrhlTVHt7Do0cPOdg/u7DqTLBY7FI18OzZEx4+PH+yHB9lwA288KQziUI8jODk5DkPHz1iemOXur7MsizZ379PXZ4d4Gv98nj/E/tlNp9SNYqDb9svjrreYjY74eHDe+eOJT2ZUFW9fjk6v1+WyysMqwFPfoN+qZvi2/bLjWdXqVO/PLx37qKS+oXfqF+Wu1S14Nmzp9g2Q8b8v+uS8BS6eXVW4pfx9/rUfJpMJnhfYU2Kbo7g7UWj6Yczf5oug7h2MaDK+zUs5PTK6tIi1MsNEiwVw9ZWOAf45OQZKc7m6tXrPCvWUw1u5NWI9x5rLKZtaeoaNwoHyH+CB7uRlyin51OSgDumQ8nW8+kk6fLmxjmVZafn0wmTbYtUOuJejqOjo7W4te9GXrml4iKBLIiLvt3pHR9OmS7htxAJ6pnNAnFtNAqLiLWW/f2H2GtvvOzqb+Q8iZBFIvV1mNkLhshv5DeW0/NpJXHnSvR3Gk9L/+xG12GUq/k0AlHibDoqVTCdXkhLJVDE+5iK6jCVEFCYgtT6ItWKp5ISX58+TKxpTgL2kOXcvHmLp4PiE8y+jbxU8SE5VJ7nHclwY6m8HnFufT4lSVyWRN48jwWrYlIzEQMGtRxhrYknS4RI9NFwlfBJa81yuXhhS+Wl81T6LEBYkdp8h5VIUhKk/t/EZYEV5hJSFngWi5K2DWxOCNuph4cHMdXiy27BRk5Ll2QrsNe6t+fGUnn1cno+rUR0f70X32ZOBQnzqcUY182nohgSEnYFPo5SkvF4cvEslZBTo+7yRFgXYx982nsPUa5hMezBuN3xF77LiJVlCmPCYlKWZZdPBQIfoY1HPGzk1UrKm2ta050lY53dWCqvQU7PpyQJQ0nzZZUUbPXX9bgszvmO/zMYDCjLirIsGekQvRxy03hm7QU89jTQi2VnQoleXEafkXgWzV6ZXOF0wXAqm/fhJDdr2y5fp3OO2eykI8lt5BVLpLp6H3gPUsqOvr+RVysplui0S5IwlpSz9+x8CjuukewbyaAt3juqqgpZ3/I8sHxjpn0hAkv7wlkq4Ncxle4wsRWWEhIJnwrc6pHldDT3siywFwPV2XeLktaa6XRK+4JZvzfyHYoPh6X5PGcQ+/VFCVIb+c4kAeOnMZV+gu7uULtToqQE4bvfJSEmbDWffC+5fJh3Iaj0gpHfUpa0jlEbv++I2yJhKusO+SnuYVxdg/mWtsZUTJrkCRnN0ql+G3m10t/tSexLqTaYyuuQ0/Ppk+T0fEoi1rCXADuk+ZTAXvAgBEpr8phh7kXklRzRUZZlt6+urIhZulyXE/Z0vhGgx9NJx1usFpakEGMM+HBwWMiq1W4wldcgSfdta6ibcFCcNRtM5XWItZaqKs/wVKwdAStM5TzrYkU2TfFLKwsz9amK+KWzlrqqyNyLH3v6SjCVvg8ofNj5wae4khUg25foIZIWkz6zNi3S/VtCXpaN+/NapOsz121xyo3r+Vokpab4JEwlMWHPX1TO+3fKwx+/634QMT/y+dvTn0ZeCabST3zdP0xs7RDyU2BQyvUqRDr0KgVBpWTa6cD0cDZssno28hrEhyRQeZZ3/epfkMuwke9M+mfy9CXl8Q15UgTen5f4TPQSn0mMjUfXetvNp5Buw8fcQHLFQXoBefWYyqlVLyUbPrsY9tl/vkO9Q3ZwvXbshZCC0WhIMyg2mMprkA2m8r2Tb4ep+N6c+aR50J9TASux8WTEtOuzeqEn0umLegCvDFPp8qlo0TUgxCiY7gyZviSCZt//a5ombilX8VgGAV5gWsPh4XOqG8sNpvIaxPuYx7ZpqXSNGQw2mMprktPzKYkxAVNx3nUY42lZ4ShhTpk2nHWV5lNRFPFl7bt5Nhj6M3Pz08qn2pBWWnDl5oB88O1uW/FU0mLS0XF8KnK1A7S+E5QwlfAJqR5VPGYjo65bPOFNubu7c8Yk3MgrktM8lZg/dSOvXoLFvppP/aRR4ffz55P3Yt329wKlwvHBa/PJh9CYcIRHSgL1Gt2f8TTjj/1XX6ReWu5/a85Hv37C/EDz+H5/FQ3+WZejNhOoXpLelDrv9Hq2wlRE/D2c7OZ9ODUtZNUfdGbe0dHRmdV7I69IfMirqrOMvCiiRbkxU16HBExlNZ+S9HkpaeE5LaqHqUgpusyCq/k0RMmKVUpJ2cV2vYh86teNs562dTSVo60do7LhUu+oSBmT+qZDjvrMy7CgrDCV/qcv6ZDoPC9QSjKZTMiykBYPgp959erVeMjWd9nyjXzHkjCVFci+if15XaJUCAZcHcIWPmngnzeXujnV6x8hBEWRo7Van08iYig+YCp1Xb/e3Z/Fcctf+HNfY3bcYprgd707mSCb1VsrxCpU3VGPNuZT8TF/Z8BUzDmYyuqgpXRkaFWFYxxPTkKOh7zIO6zl/v37tJdufPct38h3LCueSsinYofDGM/1va7Z97+k2J80n5JYM4KYLvK8+QThyFN82O2x1tDWS9JZQc45RqMRzsUcw4QD2ieT/IWt0E9lqVjref607haUT5J0gFL4rIg5ATsJrs95PmC8u/vvLAtHem5t7aB1wWJedqHeN2/eivk0P32jN/LdSSIm9nMQb+T1yGlMJSU1CybJJ2AqXnTB/94L8nyAUvlqPi1KnBNIpbtFKZ0R/iLySngqSqm1c3/WeSqJo7Je8YSj9P3DFFCYDhPb2poQTlPw7O8/pN27+fKrv5FzJZjhAVPhJXAZNvKdScr5fAZTUeGcZ8H58wmIuaEhnEUkaarT82kLoVqcNeiY62g6mV488ls6WS3tDnTnsyDWFpYzWefF6h/pt8FgENPfhcPElsvDUGmtefPNt3g82dpgKq9BukPHYv9JEdiXG0zl1UvCr84ni67+fe4pDmu4i+yOFVklvi4Z5yHmx0WCYzrq5kXklVgqxpi1HLXepVyatsNVzmAq8dyf5P8BLJcLwHN4GPgqo9Gww1Q++ugj7Pbey6/+Rs6IJxya3pp+jtoNo/Z1iPeszackgU3uOwzy22EqLl5TVnP682ky2cK5eXdeUNu2bG+NLp6lkg5B6ij0UkT/LxyGnhLHrJLKpPtSgM/qt+EwWCrT6TaLxYKTk8MOU7l16zbPRqMNpvI6xBP7znUBob1k7ht5hXJmPkVJxLZwzdn5BCE/tI8XOOfJ8zSfpiwWc2azGZOdEP3vrMU5yfHx0cUMKDx9lrKK+VSkkjFHreT0wUbBugtmtdYrTAV8PBbTM52uMJVH+w9pr956+dXfyFkRId9ppjPyIu9c2I28egk5mbMzmIrSunN7tD47n4CYt4jumqYK1I/VfNpCRkxFaY3Wkt2tSxcvSVPiMqScDEqLiHskvy/ttZ+5s/ubEjgNBgPa1jCdBh9wsQxHTGqteePNt3g8nrzs6m/kE0R2L4XekNmsK69F+vMpSUpqFmOVz8UWRdrcjYvP6sibMJ+Wy5LJjkTpEGMnpWQ2m1283Z8U5diGMy1xBPfHEzCVFbZyXih3yrsSzo0ty7Cv/vx5QK3H0d1p25Z79z7GXr6+AWpfi4h4nrTt+nUjr0dOz6ckq/lz/nyCde6Xc46mSvPJkA4Tc26JNRZBwGDGk/HFS9LknKNpmi5Rr/Z98tvqMLHTflvy00NKg+AvDgYDrLVMJmFlPZkdxJQIgr29qxzm+QZTeR2S/HpjaNtmFRC60f0rl9PzKckq2RnnzqdwzSoxk7UWrYfdkTfhMLEZ422LkApjLa1xHB8fdcDtdyuvBFMpiqLzAXUmO0xFqeDbZZlEynN4KjEuKGEqIe+Dp6oWcWUdkdy9w8MD6pvrit7IK5J4JozNshg6oTYBha9JAr2++ERMRcrz5xOAjtCDjDhlWxukXM2nra0xSjfgXUwlKdmZ7F48TCVJloVD1nWWQL3E/JPnJpTpIpQRQEp8XWCMZTQaU5YVVRXOulVac/XqNZ5uopRfj/iQGEvH3B6wMVJetyS9J1EynCgYLJFPWgTS92FOZVnY/QnzqaSqGka5jClFPEJKlsvlxcNU0s5AMqE8ooeX+IiBnJdTM/4OgMN7QduG/fTlcoG1lmFcRKwxHBw8w9x8a4OpvAYRQkSug8UY0xHhNkDtq5fT8ymJi7yu9PmkHLWrv462rdfn03AELGPag3DdcDS8iJhKSipTAqC0xMb8Dwnoa9uzZB1rg49uraVtA1ArZY61jsEgwxgb4hIiPjMcjmi6fLYbeZXivQ8HibUNVaVoR+Pgw290/8pllaSpXPu+NZMOpzxvPqV7U5KmtrWEdCK2m0/z+ZzRVphrxljq2jKzJxcPU0lnlIRVsM9TEehMkecaa/WZTFVKhXBupcI1IamMjBiKQynJYFAgIm05WTEbeQ0iAvfI5QXD4ZAs05vE169JTs+nJJnO4lazJs+zc4FarVWgeEhJlilsG079DPNJMBgMyfIGITxKawYDzdbwQh7QHiyJ5AMGnkrEVLzAufA5azuHJE0hujI0SgiFcyBlBri4EHmkUgxHI8oNWPh6JHIYdMztkTLAbeTVy+n5lEQmTMWlUyfOy2Ebz/TxAc88PZ+McejIZE93pxSuLyKvJPG1lGoNU0nx10J4pAxZ8s/DVAQpg35SlGXFW3Ex21U496dtLv5hYlrDbzT3pIQ8h7oGWzc4e/Gsr5TKwrqwrRzY0epCYyrWOKp5w7erpPdQzWtMm1HkCVd4fXX8TiTttJ12Sbx3CHzM7HZ+zESM++/97lifT1mPiRuyLmqtLx6mYq1luVx00Y46Exh7KRJ4LE3T0jTtuZiKj5hK07TRFwyAlFKatjXhe+exxtI0dVxVX3YLXo5cvQo/8RPw4AEUA0e5v8+x3+Xt2xXtMeztgbXh99/1u+BLX4Lb2wcsH1+8Ha1EvqrrmqUQtMMh1pgLi6kUBbz7Rsnyzh1an/HDX7TcvweXLsHRUegb5+D5kcM9usNs+Bb/4o+3PP4Inj79Xtd+XcJ8Wp6JHm6aIS4mPmsac67707YG5wPvq21bbKvW5pNzHq8M3kXsZrkkc+XFi/1JPuBo1MNU4nmtWif/Lz9TcaVUh6lkeQYe8jzHOUdRFKtUlDI8Zzgc0pwyCS+S/MiPhEXx85+Ho2PPMG9p73+L29dqLk3C4LYWmgaMCQPeygLai8e9ER2mkjMcDMmy7EJjKrdvw2QLpFmS5yOuX/e8+xnY3ob9faiqYCHeekNCViBw1EZzigpyIeT0fEqSZXkPU8m7yP4bb8/Yu13z6M6E0SSkqZBKkmUZWhbxLOXV0TZ5lkWcUjEYavKsuJhRyt57tE48lR6mgsC58Jb4pLNfvQ/YS7BaQnRl2xqs9XEgB5OvbdsXRqlfpfzar8E774S/rZF87l/aJbu0y8Nf/Zj3v1JTVWHRyTI4OICPP4YfPnZc++FLwMV6XfoOU9HoLOv6+KLKgwfwzmc17fAqVub86leeYxrLlSvw/DmUZYhRGwwdb/6golk2PD+w5Pn3uuZn5fR8SpIwFYlnsF2xVCXee975lx/ye37fEXUpwUvyywb9CEBQ101YXHRGWVZonXVJzNMcfRmBoq8IU5Hdytkl6MUjhENKIvtvfVAG2pvvMJVwgprAGOJukMG7sC0GMBqNaAaDC4upPHoUPgCDkWCwu8Xlm0M+/B+fcvfuem6MBw/C3zK7QrF18dyfjqfiQgi+EIElfVExlaqCb3xU8Hs/f5PFScuTZ5L5keXjj9evG4wkk7fe4PL1Af/7Tx/w4Yffm/p+O0nzSVoL5gYlwZwKhn7GblvyueIRv5ZnMQzGUS9zvvKLV2lLx5vXjnBORDzTo7VgMhmxXM4AE+aaFAGjEaLr3xeRV4KpLBYL5vN5KCCTGLPb7afXdUNdN2cwFdPDVOqYnd+YcNCRcy5aJQHtbpuWJ0+e0Fx788JiKt9P4r2naRqqqmKBoI0Z+S4qpvL9JAlTyY6PGbuW59kAUBizhfc5h3LAN71kqU/weJyuyQY1X/jt98Ersh0P99s47xTGOIQ4oCwrimIQ8E0bAg6XyyWD8YsfJvZKYn8GgwHD4RBImIqKeVK+HaYS3nyqRwUP6SQtk8mEslxignfD9wAAIABJREFUzCz493nOtWvXODjlZ27kFYkIvAiXh7OUtdab2J/XJCn2ZzAoGLqGd3zG8+xH0dogBEx9w157m/IJWGsQB09p68d888tXacqWd984QpAHTMwohsMhN27c5P79exhjyeJuTzhbKCXAvmBbymlrquOpRExF9LLon5//YYW7BPNL0LYhEnOxWOKcYzAYBrqLc+HY0+ubw8Rei3g6TGUV+7MxU16HJLxDZxnaKi75hjr7FZTaAfY40QXP1Ay7M8fjkbuH5APDZ3/sGd5Ctg3igYs5jBRNY9jff4QxaT7VWBcPE4ug8IUDaqVUnW8G9DKvJ0xltV++LgFTSdeFIwWyGKo9oiyX1HUZy5BcvbrHs/H4wmIq30+ScnrYmLoixP5cXEzl+0mUUtwohxyYL2Jsi/COVowj/0mwY5fcYI9ynmOdxZ1Y2tpw9/1LtKXlvXcPwotchDlXFAU3b17n/v17NE3JaOBQUuGcBaEoy/LiLSrOOaqqoiyXwCr2x3kXD6QKh1J9Ek8l7buH72zkSITYhjwvYuLrmjt37uB2r7/s6m/kHEk8laapKaXEjEZYt4n9eR3inGNUPqCuvoV24Vzy2mlacxXvb3IoBnzwZEhrDAJLLuYo3XL97Wc4K1Fj8L6lbQxtG/Kq3Llzh6ZpGI/HtO0MY8I8q6qKyVb2wjt7r8Qx1lqTZXn8ZOFIB0Q8ElV1rL3+R/bOfU3fjUYjiqJgd/cSw+GwW6iyLOett95iMplsgNrXJEqpzv2RUkZ3diOvXHzAG3WWxe1gHeZPjKebZPC7hydk+jMU8i2utBprNM8eTHl8d4RZeoTIujk1Ho95993PMhwOqaoq5lpR4CHTmrIsLx5NPx0mlsdNf6UFQop4HpDq/p7mqSQcJS0q3otosfgub+YknvMTDhPbp7myOUzstYhYnembZ1l3DtBGXod4dNuSZxmZc2Tek2dZR6WvLejyYzRbGKl57ofo7ITdaw2uBT0Izwgvbk3TtNy5cydugEyRygRM5f9n7826JMvu677fGe4UY46VWWN3V09oNBoNgyRASOJMy6Qk05KnB79YtJeXv4qf/QH8AbyWKK8lPUg0BUoGB4EECGJooLsBVFdX15CVc8Z4hzP44dwbkZmVBRKozOwkGLtWVGZG3Ii4cW+cc8/ZZ//31hqpJP1O/4XP7bmPVJo17uMRjU3tT/DMbH6evp32hnAkSYxSkn6/RxTpOpIxcCq3bt2edTILXDQCp+J8mMbOyJTFsb9wKO85OBpga59Z7xzOxjivAUnXF/SUpO9beL/GDVfgrGA8iBgeamw158TAkaYJr7zyClEUMZmM8L7mVGzwqR0OBy+8zxcyUqmqijwPKzMqErWfipuJc4L+5CSn0uSWeBceB2b1Dru7+3jvyOol5LIsuXfvx/ila+e/+ws8i2MB7UVe4Nr2Sitqf96Q+xDSHjtHz0G/Wqp1KpphmfL9SlGxhREjfiwzXuYQrUtEfQG21mCMxRgYDkd8+OGHM1d9ayez9lZWFb2rGiYGcDz2tInogCbCg2dGGLO/RajL8D6EiVVVRb8fwsTGo30gSJbv3HmZ3fYiTOyy0GTMiOP6lMWxv3B4H6r3ZR1rozHE4h5SXEeI67STKdGrAtqHKJ8hXjqsPVQ81EroMPUJbazdbnHnzkt89NE9xuMhnSWP0grnPVIqhsPh1SsoBEFci6TgeEB7yIxRSqN19MxIZc6pqDpbRtQ9qGA0GuGcp9utw6O95+nWE4r1RZjYpaApBo0i0iSZyQYWuBw0YWKJc8SVJKnJWhB07Zjl+30ecQspOoiXHsKXn2DKFqawSERteBaeU5YVH3/8MdY6er0lhNrHOVsTwIqVzhUNE3O1fSQc96eYx3Q8vyDtpN9mkiQnwo/G4108ILXixs1bbC90KpeEcE787NwshiiXCV/7gHTNMs4nOJfgfReI6ZdDildS7PJTBAPEa7tI6Wj1ptgKvHL1yD+cuzRNuX37Nh9//DGj0SiMVGpOxXvJYDC4eqs/jaFPEyit7MncnyaD5BlOZdYJOWxN7jbLWwcHB4SA9hZ4qMqSBw8+xq1eP+/dX+BMiJl3cHHcGWzRoV84pJSz7J9bk0c81gmV01i7AazxSXSbnXvX8DahooNZdZjPP2F/K8EUDiqFMfOsrclkwr1796iqina7jXMTjHUggqF8q9u6eiZNTWDYDMdM14PL1PEVn+Ob+WO/B5FPHMf1SKVTx56G1HqlFJub19m7igYYP4+oO5GmkKJZCVpoVS4e1jma2nxBFdqQUEABOJJIcOf1j9hpSyQp6nP76Cjm2u0jnFGIxNaZymHVLk1Tbt68yYMHD5hMRrT7HiXrCz+C4XB4NY2v0zSdcyrRnFMJ4rfncCpyXvfTcCohOkCS5wXeQ7vVns3lDw4OsLcta2vrHB0dnffHWOA4ak7FxRFJmgYhlVSsr6/D1pNPe+9+riEINEBiDFFVEccRSe1r0/gT3bgv+Q6vI2njbz/CfHaPJ/fWqXLD59/Zwzk541SstWxv74T21O6gVYhAVVoRxxFLraUX5lTOXafSTG/md4T/wnyc2VTo9K3ZLrwGtTGNRghJlrVQSjPNcyAYBq2urqJ1ENmdNgVe4Jxxao49j7B1dDrdT2mn/v4gaL3qczCzlA2/pFRs2ArKu6jqFdaSIVFS8tJnt7n77iGybVH6eJuKWV+/hlKaPM/rVR+Jry1Gghbsisn0payVfkVBURSUZRE0KLMOhNr9zZ+4NY7g4QsbbmVZzfJ+yrIiSVK8D8FKe3u7GGPY399jZWX1vD/GAsfQFIhWVUVZc2VSSg4OD1haWlqQ5RcIKSUeMGWJrNYoypfJi1cxZhNIkbljYCzWfUzpPmF7uEKZaz78q3V+8PU+dqgx1bxNFUXJ9vYOZVkRxynOBYdF8DPr1ivIqdgTCfXzTq+OCzihoD2NpqA+/K+UBCxJEuN9MftCCynpdDocIMjznHa7TRRFJ953gfPD8dU6zzwQ3FnLJM+5vhitXBistRhAeE/kHyHFLlJohNgErlOmmipqQZWSCMXLvQfEqeetLz3BO4XuWZSeq9W1Dgr1PJ9Sljlp7JBSzEy0J5O5GO5nxQWGic1NmmStvJFyXix4WucgZfhb1rU/zWtJKWuP1ODRIoRHHo9V9bC3t8/KyipPn26d98dZgLnxtT9m0tSco8PDA3r9G8+qGRc4F8w4SmOQoz7OXcOJBO8zQJGVJUt2hIpbWDpsD1/ilekW7/35BtXU8uqtQ5xVJ9pdWRZIKdA6QqlAKSipSNOETtyZtcWfFReiqP1J7HEz1Tk9bTuuZ5n/HcjbMKVqYgjELDGv+R4XRY6qHcMXOH80GpX5325GtDvn2NvbRamVT2v3fq4RRoZh5JDqHdJsQqY1UbQOrDKJU6a3HlO0/4LKZxQbOWmr4N1ffYR3EC1b1BN3rM1JoighyAQc0aydhXZbckXDxIQQs9ofHQUSCO/m9T3+DB9M7wkLy42eZV6UaEzwU5EylGi7en5/PEysGa1Mq/3z/kh/7yGEwJo5pyLa7Zn9J0CR57XCc4HzhpKKZb/E+/kGVfWQolimMAnGdICYdpHTfdQi4lUkHezLW+TjR3zrP16nmlruXDvCVM2FQNR+RcEjWmuN8ycXUKQUV49TaQi9BvOrnJj/fUZPeHyg4o8/98TNzbZt3qd5qdlohcVo5bwxO4d+fuyNmZs0eQ/GmBf+Mi7wLKw1LBePkcIjxBFCjBBCAxvANQZxxt5LjymXfoQjQ98pSdsVv/hfPgQPyapDPTm2eFS3o3k79Mfey9ZCuSvAqSgt+e3//jbjo4qjp5LuUkqWhZUaqdWsViToVCKUMoRI0zkaywQhFEpqvAetE6w1xHF4rWCLB1ppWq0ORXQyqGVvb587dxeVy+cNIQSRjvB1DUqo4TrZgVhrF9PPC0A49pJEOrQWxJEg1gKtw7i+LQ0vP2qR3n+DER3stTBS+eZXNzFTuPn7Q5xVSCVrQyZNq9WapV1IKevYHEmaJkQquhpVykLCm19c4sbLbUwp8dMx2dIG8Z+N+NPiMzh3iPcR1i4xHvextoP3njiOKcsQx+H9I7zXGJth7AZaafLc1kVQEWVZ1PaSMVUlKbYccf+k90NR5DUBtRiKnydmIxXR/O3OnL4KIWm32xTTF/fkWCDA+7qERdTSdDGXqIcgMMvTboXrjJDCE728T9Yp+eXffQjek65Z1FM7e6pzQaLh3Pwi0MwcrDGgOHMm8dPgfDoVIE4UH/1gwAdfL7izfouIFrb/gGz8HaADaITYQYgYIQKRmyQdqmpUv8phLUMeIPgErVMgrKWnaYq1I6TcA0qUGrHaecJUvfbMosPOzg5avwRc3fTCv3OoOZWyLClUDq1WvaJ3crOiyFleWWF/d9GpnBeUkmCC77OpKkpZUBg1WwxZtYfkdoLLKywl5UHEZKj45n+4TjmFzf91iDUCaw3WhorndrvNcDigqkpUHBY/nLNYJ6iqcqY1+1lxLp2KB8rC8spbPW6/KrHjIX/y77/L4zTHa4XKuiAkGk2kolps4xiNxjQrPEqFXrOJ8mgCxSaTKVUVCqJ0Pd2xzjEcDvBnBLQbY0JUwWKJ8/xwSqfinDvT+No5x3QyodPpMhoNL38/fw5xupbOn/oZ24L2nkOITaTIWNOPyTqWX/7dR4CnteYQTxxB5xosWvf29uuIjhTPtF5ACQJHlegZd/mz4vxGKqni/vtDfvCfJ9xZu8H2jxSy36K31Kbf7iKF5FX2+UFxE0+X499IISRx3MWjcC4Beidev91eZjKZMJ1MAIWUXbqdu0SFQZ1xAKqyJG1dvfjQv6sQTe2PjojjuM6IOVuMfXBwwOry5qJTOUdEogW+i/dPwffwPgbfBzT98ohBFKO8BhJGeyvk45xvfvUa1VRx/fe/D14jpUBKQZYl3LhxnYcPP6GqCuIsjIaCHiaZJVi8CM5vpJJbXnqzy42X+4g85yDX3M8HbLsRwzwj7ba4L5exaR9VmRM7LqUizwuEaIij+fAriHXCEliWtcJ0xxv2JkN+qSxplSUHp/bHOT8rYlzgxXHc6qDxO33eF6+Jz1yMVs4HHlgzJan2KAVah5tSYYS/r/o8chLECC0tnZVtso7hy//VNmDDSGXLztwWy7LkyZPHGFPVYWI5zlmkDCOVtJVeEaIWiGLFgw+HfPiNgo3uOj/+9hjnJcsrS6xna2ghKVzCJJ888/wsixGi8VwxODdfktZas76+ytbWEybTEQ1ntbyxijDj5+6TqQzLy8t8wuKL/cIQAmMNVVlR6ALa7TM5lQaHhwfcuHFz0amcA5SUSDHFmodYN8LYCRYVPIeIiVTEhpK46jbKOqLdjMmw5Fv/cT2MVP7lEGfD6py1wU7k+vXrPHjwMZPJmJY2CBk4GmthNBpdjU4lFDw5br3W4drNHmJq2RslDB9MGQ0nPNnd53prE+9j4rhHWVazeZuUktHIYq0kxKFGeJ/MHqsqz8OHO1grSZM+IDEWBvcfo9vPn/sZa0nTdFETdB5odEL44OZ+IiXhWSxGK+eH5lg37m8nKvuB3MLjtQK/8jGbbLFzK+LdtuOLv7ED3tJadYgnfibJmE5L7t9/QFUZ2u02+AJrHVIEM6isk12N6Y8AokTy+KMxP/xmzkZvg4NPFC8l11jOgtkuwiHlEGufImU4KEIIOp0Ow+EQKScIDIIJSu3jPfR6PcbjMaurawwGI8pqG6iII8P1TY0e/+TOYm9vj9XVVba2FjVBL4RaG2R1RJwk9dTyJ1/NFqOV80G7VfLJGwaXxGwfZkT33iKyfbTKAEeXnJsHgnTX0XUx9qWUYir59p+sUE01tzeH4DWq1qm0Wu3aTvI+eT6lkwq0CiRuHEfkeX41OhUPVKXj+kstllbaxA4Ohpofi0NumykvZzHtTsLS8ohI36GsLN5bvIfBQABdvN8CIoTs41wICTs6EgjRY3dX4twqcSTxPmE8jnj04y1eiWM67V9hMynp+RGFiHG9Hp0IpE6I41+C9grLy/uhF6ZgxR3SF2M24hVi3afd/gL9/jvPfCaFY6M3phMnZN1bLN9cxnuIfYlHousl6411TSfOKLM+tzY/x1Yne+a12pljKUuIkjbda++ydPPszrDbS0jihNbSayzdvEnXjdEYDBonBGPRorsakcYJSafNzRsKZUpKETMW8/ftbSraSUJBTH/zl8gY0PETYl9xIPsMZRsdCTrthDhO6K5/jqWbYbWt5adEhP07kl06Swlew9iljOizXy2z4zyPBzF65W1WozvcWLd0kpTDVof+zS9T5nWVeX+J9fguVVnSXRL005gkUdzceIMyV5TipFhOSOh2UpIkZWnlNV670edQ9DAicGzaW2Iquis9siSh3Y1Zv9lGeIfEhfNfu3mEY5BhM8HN62/ztPMscZ9kgk4rI0oTuhvvsHRrfl4ib+j6MZXQ9PvLJEmL1vKrLN0KFqaZL8h8jkEzkG166xFJOya51qP/iy/RlL9pLN2pobufkG106KTtcF6u/wJWnRxpR76ir3NWWx3ipEv35dv0tiz6oOKwstjdmMHogCMxYdl0QWYUUjJZe8p4bZu2P6R7q0eaed75BwNwntZyWP0JJmmSosi5f/8jjDG02x2EKLHOIlUo3O12u1dj+oMGHQuePpry0XcK+ukq93844FbVpdd6nZ5dpVWVvOIK7vlvMO1t8GRYnngJLw/xoiROc9APQx2CkPSXluj3+2xt7TAtH+GpcL5Nmzf5M3OTweRzbIgj7rqH7Ihl3i9fRro/ouUr8vI3efRkeSZH/rJ/j1vs8Yp8RN8npF5i3K8wdp995iNJ4cjbf0Q//guizgaTjTfxHrocYlC0yFliQncdkuQxrSrh9sZNHrTfxJyyqWmlYzrZt4ljTbn6JSYbz1oFCAG2c48k3oX+Dezmdd7238N4yVC0UVi+yeuUy3vo+MckWZvljc+yagds02dHzJMF2usFIvkeLTz5+q+wwRYtSj7vH/OeeJWvi5fRr+7irn9EsjzBfOF1plnYJx8PWVv7ERk5T8VtzC9MGPePmHwm5f3fusYON/ha8h7317/Jgze+wpobEr+ak3S3SFzK9Cu/QFFK6E7I+1MEofYrbln07U9opyWd31vG7y+Ri9apYw72s2P0Zon7HzR8RVKgqVwCj18m8zmyLLBvJ0QbR0Sfy3D/03U6ZkpUQXn/XSa+A8pSfOn7+Bt7qEIw+h9fJ89Pqq8BiDzulRFRF6rfvUn+BXXsoQl9nlIRIb/QQd5wuN+MmG6GlUnXO4RrOzgERa4x/QTxikN1YvL/+Q7WeUTew1Sau+VDrg0qqv463OwSA8W/eJN8dFIPUuHoyX2y149Q6zH+v+vzn45GfHjQYfxXn+GjG9uUe6s8rTa4vuZxnT3KnmBzP8bsXyc2nvJ2Rj494gd/0cUUmpdu7eKdx9oKYxztdpuXXgoRHcPhEZ2lCikVxlQYozg8PHz2OP2UeOFOZZRqxOsO2/esLaWkmwlkhu1rCWJ7n6PdXYbqLlm0zLfWCvTn7pG7pwh3yl/2+h6+XZKvbMHbFuEhShLG/gGy14G1Edzdx3dyytzyo9cqds0u9u6PMHrKbrXNyA+QfYNfHuEyi3znI5KN/aBd8Y6pfJ/vf/kTvrtU8nv/UJCst5G/8/8Svfy1E7vSrBqVb48ZrHrsK3uo3/puqHuROZX1HEQtJtLDqqVcLTEdy+N/7FHD9zi9yu3igvz6CNlLEF/6Ier2s4ddSYV4bYhZyvFvPUa5Ad+RitgXlDisF8jqu8hXC+zyBGsrhr+1w6HMEHYbxd7stWTP4dZGOCHQv/Y+W2YHd23KQyq69h6aTVRUIdYSfFvBjafIai8ET0nJQK+ji8cIbyAKfsHi1kO2fmuL0n/CD+QO43yC27RMKThazaj6YLoD1D97H1Wb/nDQJVIJlamQKsK2YKITpi0NE3/ClxjCSEVoTyQcuIxJdRc/rQCBkBXSC0hLRBpjlcK1HO7GBDNxTFaH2M/8GdrpENO6XkILfOIQb+7RGkRMtlZhshTerDdCrE4hMxBJ5OuPkBtVff4FJZYnFFihMTc8ItEgLV5X6ChC0MPsL9GSHzO4MYKkRWQjdKHwBXgnULHH4ThKM4a9lFvpLi5OENLC5kcwmn921QWVrzCgYtyKaCuHOdzEPlSM7D5ms2Bc7VPdnLL73iZOlOA9eXvCk7ePMOp7FMWI/msdspbm9S+MUELQ6oN/6GjM48bjCe+//yHOWXq9HoKyDmgPGq8slp9+RIfxCvuBRh4IDvYKPv5eyXKyyf43HKbK+IpKWKqWiCcpvY/WyL4Dh/YNBCev1vKX/ho5+gD5+A7iu18EDzJJaEWCu298wA9dD+U7aLaJXIasYnbsa4yXO/TlU+5P32Ll0OHjO3h7D+lKfH4bM1qZEV1PhST5i1d5xDL27p8hWyPYTvD32yf2RWkdyLBrFW6qkY/u4L7+C3gvUOzQTcc8LjRjoHt7iv/FD8imkvJbn6Hckc/wl0VSYb78IcqX+O9t4H548gqtIx3ypW9/hFpzZI82Kf60T9LrsTMazcRP3nt8NUB+rkI/bdH5zk0+Gl9HrA7wrzxEZPVqmPa1p5/HScthuYraUgydgWwf59aRXuKrId5WYDK8iXFhvZ4032fMEp4eWBA258YH13j1z1v0XcrnbcUDcYtd+RZR9wndZIArUvQkwf/oGt4AyiGiCqcUWIuPFM4PsQKGywOscgiZgZf4MgEPQkl8WmE0GO85tB50jDhaQSztk5ox6rANVuKcwOQR+W6HqQeURCg7Ixz9MANT4p2gfLSJzTMwBuJp/cV1sNOBYoyIPf6jm/itMHLwQAmUIogxXS+HzhjhPcq38SVYK5l4kHYT/+gm/iaYGwMMHln2EELiO1uIyLPnPYaM9fQILwV4RXJtH7lcG4oLgY7G2PQhBZ6yu4GyPXgqsPcV+2KdZTGg7QTbLmWpO4Q0Au05ig07PcuvmR1a77/F1o0exbv3efBhi066RvXGPt6HEHarm5GRD6HvWoFWyFrKEUXBy6hxE/hZcT7THw/OenorMXfejOhFGY+ftNmxE3bMgCNxSJooUjHlUC6D30P4/NSLDEEYhJggxU5YUTICZSbw14eMeYmlFciY0NIFq60HvLw24GDaInJHuEzg0pK1zg+I0n2qOGJl7Y+pqvkXJceRTQqW77+BeRrjrrXofNjh2n8+KbZr5pT9pRz5X0xQh1M27n8UyOPoiPzuPv0k8AGdyCDFlCNSHI/op8+ekCTxIHJKqWhHR/TTk0vhghB4nqgJVnmcP6IbF8hyl452eD1/zVaUI6TBSMOBOCRLxvgRpPdK0GG/OyseNYbCx3TuQXkQ3NS9l+R+g24ZoVND/K7Fpor0YUXvQ1/viafFPodC0Gef7LYizTU38kNeyh/RH6W8aXKur0x5MtnnMNe4pI3/gsMMUvrvZRSlAC+gjGtdC3Q7DvmuxZLQ+ddrdLOHaO2DCWBeG3RJiDfBZIr4fUHnL5sr5iEQ3OJTv0e6nCNeV8j9it6H+41rBuBnOpr2dYn6nMZPI7rvHaAmB6SnCMg0EURfVhgZ0/54l979Z6tzhYD4NY1fj4juO/p/mdffpqYAR9LnKS0vkSOF2JH0/+oIZ8GLmGaJLBOG9K4mfttQiJjkrzboDvzsPdL2LtNUoQTIVkLVF2Stp1xbhQ1T0Pu+47WDnEiNuTH+Me17y8jPpNz8ZI2lP3JI1Wfn1gPk2svoCK6/VCJ5ShSXCJHUo++5VcjMX6U+JEoptFZ0Op1njsFPi/PpVARIJZgMDdufVIzEiN0nQybe4E2JnTh8BduujfcW5yzOnzyBDe8RitUM3guSJEVUnnavg5568sE+8RhWpwW/NnJ8Y8XwtT/9Ax4N5m76veWYw9/7PFlbs/O17/H4x6MT7/OI4DK3M3yL1WKJ/f2v8ejR2Y7wO/s3GRUvMRh+j0ePP8A7zyOAj+fbtN/oMvxv3yY/Muz+p28zOnyWhE1bmqPfewctUo6+8VX2/vrZeasQcPTu60xfWWfw/W+x99UHZ+7TobjG+DdeY/rwPk+/+h7WPLusLm9kjP7xO3gPB//uO+w9Od2BQxRJBv/oc/R0m8Gf/pC9/2939tjuse2OVl8hfud1bn48ZvUPBjyMpvyKjnCva/7wR3/MB9vbLP/CEpN/8Bb5oym7/+a7FJNnG2e5EnP0T98h62gev/c9Hp46LxDOy+Dzb1H0lhj++Ufs/Zuzz8steZPp2y8x+eCA3X/9/pmrFa03uox+822KgWHv336b4XPOy+DX3yGqUg7++AfsnnVegKOXXyffWGf0rYfs/MFzzsvhOpMvv8703pC9/+c9zBnnxd7I+I0vBkJ9///6DrtnnBcdSUb/x+co3ugw+FcfsrK7ye8oxd5jz91SY+KYjisZRDGQEtmK5TRhWcDHgy52JDEGth8pTKF487OAd3Q6bYrplHa7w8rKCltbTxgMjugsWZRSdd6y5/Dw8GrI9PHgnSdpa5bWJW2ZkrYVg90pYmgRuYBKYk1Qu1prsac6lWCOHSpgjbXgBZPJlMSXHBwMmPoWWZbhPVSm4mBnG3/rbnitY56a1lp8bThjrTnx2Oy9JPhjwWbP849w1s0MpYwxZ+oyrA3qYO8ctrJnvp81x97PnL1NOAbz93vuNrWM2jmHrUxdR3V6nyyNybh5zvsJMdc//MR9skGPIgqJ846jW5Z7XYG4kVP90NaFarb26HBYY848ntbKmb7Cmuefl+OBc3+rY2DMM/VfQH1/uEg97xiE8+IDkfk3HAPvPc4+/7zYU98Va55/Xvgbzkvjd2Jt3bg9jMUTvM/xfg98GHV6fwvpPLvTirx7QBnHYRooHN3lCm9KktjjvGcwGFBVMBwOmEwmszAxayehvRFCANvd9tUxaZqOwwEaDx2IAiWFbQY3AAAgAElEQVRj1t5a4Yvbhl6nU+f5KIwzaCWJ6mXCTqfDaDSqZccBUW1dkCQJS5HizlKfD7c1RbGLEBDpmNW1de7XQ+sFLh5SCrRUrD1V3D7QDPorwNlX7QXOD845hq2XiaJldLVNpJfQrkKr20EoSonzGQf+Bm1fUdYrj+VUYCuF9boOd/d0Om2MMXQ6nbpjKWhlqtapBPX6lTG+tsbzf/+fP2Q6NGRpl9/+7bcY7nriQcLRGLJJQttneL+JR+DcEk4EHmM81vV0ZxfPU7xfxblXACgKybgc87Q4pKxu1vPBGGNgvJuynB4sMvIuAYJgSC6FJLKKpBJEVj1XUbvAOUIIBpua+OlHSDVG6QHKWqRSwAZSOhBTWuMRZpxxMI0QSKSKkGiUsHghAEVZOrwXjMdTrPWkaQtBqKsLnIqml/WuhvG1956j3aA7SRMfvEzLkrIseWRyVjgAESHEFpEWSDNEEFZcnKt9Z8Q+QhQodYiU94PQLE4Q5og0LYmFx/vHQInSFcvLYyblT9ipBc4NTspwqy0PvJPPOpcvcCEI0/0SaUzwPLEGa12YluKRgL07ZGc1YcQE8bZGSI+KKiwVxodRpsdhrSHLUq5fv8GjRw/J8yntxCGkqu1ZYWiGV0NRexxSKrz35PkUPJSuqufAYW7rbIjXqPxJ4szWc/cmNyiw057UlYz8iNx2glOVB2ss48EAsdZehIRfEhyB5zACvNZhhWxx7C8cSkkMkry6hTGHVKJP5SqM3cT7hMQccvu+5YP7HRQph5sbmDcfMTpS+FIibWgvpjJUVVgM2d7eJs9zkiTFVGbGGVlrSdpXNEysqTEASKq8dthXRJHCRpJIaJJTBtVaNdlAIdMVIIpiYpOTZRlpleCcDcImrWl3OgydXwzBLwlSBF1DiEYJ4VOLY3/xsNYyVZJJ95DI7BMnE2JriXSGFOu03ZCDW0fsXjtk5GPUZzOiSLC6UeAMiJg6HjjCW0UcJywt9amqAvBEceO1Es5vVVUvbHx97oYjIXgqRusQCK2VmgVNeS/Bi5q5FidvswTD+X1BBSgwlcNakDL0gQIYVxWuWsx/LgUC2t6hpKRbl08snPUuB0KIYIylQUpPu5XQ6YSOQ2lF3vdk44jl+31695fh3k2qErY/6bD9YAWXe5ybtylrPdNpgbVQlpY4zmaZTnme0+l0Pn1F7Wl47ynLYmY3YKw5prKpxT7Hfj/jFebbCY8QYQgo66lR2MJjs4xKnVHPscD5w4OuS/C1ny/7LnDx8N5TFMUs+6oyFZVzYQnbOchTJvEBeVJSSYnqTogTwc3XRnjr0G0BwgKeKIpwztYG8YFycM4HyaN39WPFs6bmPyUugFMJeoTxeIwAcldhrMU7hzEVtpKUpqJ8hlMJnqfWOsoyPOa9oHIVlTKUZTXjXYKGwSCi5xsFLXC+aGpDKiHwcbzgVC4JTXuaTCdUVVj8qDyBdwSUE6jK4UWJq72d86nnR99p4UrN25/ZwxofPIysDt4psqIsq3qqI2d8SlmGdMIrN1JxziGECAYwQGpytFIIKdFRhIwEsdDEpzgVVU+TlJLESSBktVZoq5EirKHHcSgWa+wmm45ogYuHqM9BJOSCU7lENO2plbWI8oIoScnLZaS8gRAJkbVEThD5iEhEpElE2oK3fnEIzpH0PDoKnIqtVJ1AGDyHhYAoqksk6iXlUPtzBUcqSZKgdYQAlDd1LY0Iykwh8TVvchK1TB9R8y5152FDkLT0cqYelVKSZhmxXIRXXQpEqE2SQiJqUk8uRiqXgqY9lVojpWRqLVvplBvqEGslJZrObkxLdjCiRbXTJ5/s897Xl3FlyuuvHOFM4CqlVDgHWsdY61AqoSiCfaSSipXllTpe+AqOVMqywJgwhWlk7AKPEB7n7ez30whdj5s95pwBHJUpcc6itazvt4yGQ4ps8a2+FNTyeucd3gW5vl+MVC4FoT2VM07FWkslp3iXh7aCq83iBW054ebqI7I2vPuPDsAbkr4hXHsD1xkWUCTTqSWO597Q4CmrkjThao5UnPNMJsHgOncl1tpAMlUWZwRVZc7gVJpQ9nr+V49UrPXoNMJVnuk0n3G+7U6HUiWLq+VlwYd6mkoIvFtwKpcFWYsOp9MpVVVRSEle54g774lcAULhXBtRGcSWZjKs+MZXl7BFxO2NAa5qBKkOpTSdTo+jowHT6RSvDCAwxmKMpxTlC6dQXBinkqbBvi8xAtlwKlphlUB7TXTqrZUKpKuQAh3pWXGhECH5DjxZK0OEWRRHR4fkLbG4Wl4WRF0eX3Mqi5HK5aBpT0mSoKdT4jgiqSUbQoTovcJGIPuMk5jd24rPdSf88u/sIbyns+bY2QocShQpvHfs7e0AnlarhYpKPB6lFEqG7J8rp6gVQhJF0SynVVFnjtTJgyHaQSKekciEyY+gfkxAkqSoqqDd6hIVCWURRjdaK9bXr7HtFpnJl4KGU5FyNtRejFQuB8E8KQqLHLRwbgXnMrzvARrlPbGeEsstlGiRP3mZ6Ujwjf9wDZvH3Pj9I7ASpSKUCvzM5maQ6U8mU7qJQB0zMq+q6pko4Z8WF6JTMcZgjEHQlKlDMNCxOO8RWII7z4ln1voVByIsHZdljnMl48kA47ukadClGGN4+nSLvLNy3ru/wFmYcSqhtN81ERGLkcqFo2lP1hiWrAl8o/B1hy6wSEYGni6tIV95THx7n1bX8ZV/so3E0lk37Dy1xLHCW0WeT3j48KPaViHcgv7Ls729w8rduy+8zxcwUglJZ3keDGgKF0jWUPvjsAYq46jO8FPxtbDKVMGkKcsicJJWq4OYKIbDECYmhWDj2ibb6MXV8rJQ11xZIfDO11Wgn/ZO/fxDiOBzUhQF3g4D90FUe7NkeCzOww+PEl7/Vsb0epfRF4d8/Q/XcYVi83+fYMuQWy58BxBkWZvxeIJzFmMsQiissayurTEaPWue9dPiAkYqDilFqBEBtHU18ROGz14GLYryJ6c/zXC68V1pxFbOOYaDAVb0ZvEBznkeP35E2V9bXC0vC7NI2nrqsxipXAqafKwoCkvKWoXyl/mURTBczymWthj5PeK7Ldo9w6/+N09RArprFU8fZyilKPNqJky11ob2pCqcC+5vUgq63WeTHn5aXMhIRddB3gBR5eovYp2RrCTSKaTQzzwPmu003kOWpURlyVJ3hTTPmEwCwRRFEXfu3OGxWVwqLwWCwHQpOdOquGihEbosBJI1JvUC3F2c6+J9CiQcrApSMjL3Kre95PBgjel4m7/4w3VsoVj/XwZgQz1epNqUZcmtW7d48uQx02lBJ1EorfBAFEVMJuOrR9RCk9sapjfW2dk6eLDJA48DTldCNjU/Dl9PjfJ8Suoqjg4PKUSbTie40FdVxcNPHlD21y9i9xc4DV/XW3lfnztB2Wr/jU9b4HwQfFQsXWeI5AOkTBByHbjG8p5nuAv7g5jpjT300jJZ2/AP/9k2EkH/mmH3qceYkjIPXNjHH3+E955Op4P3E6yxM9pi6SoWFELoVIqiAKByVc2XBGMZa4MmxZwy1230Nt75mWlwliWIStLr9VETzdHRMHAqSnLr5m223LkXWS/wHHgfSHdbz/EXuDwYE+pygvgtx0qLteWsUDeQuZa9B9eZftxnPJjwl390DVt4Nv+3Ia4MfKbWMcYYut0e4/GIo6MBnb5DKo01BmMkh4eHV0/8BsyWHgUgfRMLIEJYVF15fHriMlPYihDV4JvVH284PDqkokWn2w5Jfsby8JMHVEvXLmL3FzgDYXYa+JTFcvLlYtaeRKAHRM1tNStAAoikJ/aOa6u7tLsVX/ndJygh6a4WPH2cICWUdU7yYHCAc45utwOywFoTtGQClvpLVyT29BSUUjPxW1RRH5DAlaAEymv0qYLChswVQqGUBoKALq4MK51VsrzNdBpS+KI45s5LL/FkwalcIkQQSDWdSrhrgUuAUookiWealSRO6jYiUcKTxpp06TodhnRHB+TTiG9+dQVbSDZXDxFWkiQpSRQ4lZs3A6eS5wXtfsj7gcCpjEajq8epNIRrM4RqeJRmmBZMmPzMGOZZ+NmHyvOc1BsODw8pRIdOXflsjeHRw4cLTuWy0HQe89SuRX9ySWhGho3kookBybwEUrxXmErxyeAG/Zvvs3RX8eVWxRd/fQ+Jprdq2HniQ2lMPgY8n3zyAGttzankWGNDgWgd0H4F7SRDQWFRFAgaTsXVJjAOa3yYm/OsTqUhc5u8kzRNkUbQ7XRRU81gEDgVIQWbm9cXnMplof4yW+ew+LlJ02JJ+cLRtKeGU6lMRSUEwkyBCQ5L5Qus/RHj+wn2B12mn33MX39tHVtU3LmxjzehEFHrDGsN7XbQqQwGA9p9i5QaYw1l5Tg8PAwZVy+AC5j+iHrNOzR44cWx5eKaTxGN+9uxZx2rWm5+r6oC5w2j0QDjO7Tq2h9rHVtbTyh6a+e/+wuciVlcpmg0RYuxymVACIFSdZ2PmEfkHh8qDjcr9No21j8g2lwmaRne/vJTpNe0exWoFCE8VRk4ldFogLWWdruFlFOcM0gZdCq9bu9qrv4ED4gUgSeu/CmdikB6hTr11iFrRMzEb1AXUZmSbqtHUqSUZQjkjLRejFQuHeJEQeFilHJ5aAoKpZREcdCAKaURCLSA64OY20WXG7bL7sNrPL63zScfdtDS8uoreygRzJeMkHVEx3UePXpEWVa0Uj2b7jRhYleOU5FS1iSSP+FEO+dQxEz3cBwN73L897KssM4yHo+pfJ80DToV6yx7+7uYzspicn8ZODYq8TSjzcUK0GWgaU+zhj5rJ+Fvg2CaC7A5yine+5NrvPcn65hK8tYXD/Dm4zqCo/GPLtnaekpVVbRaLfBTnLMz7qbdukKxpw2Cee50rlOxZZ2T7OscZYd1Hndmp9IQUeEPrRV4SZpmyEIFj5Z6u163RyHk4op5GWgykK3F1ToV793i2F8CguYrn3MqVUUpRPAfAvA+tCcbCj3LAqiTKZzztctiMLiOohhjbD3VUYzHU1o9F2p/rKUsHEMzfGFO5QLmD80ckNkcMNwdPmjgVY676x8fz9RXv/px5wx4R1EWOGdDHlBddjIcjV44n2SBvyUEaClRCJwQFMUiGuWyEMpe9GwZf86tzLagcWsNd55sV/NBpsfa4KQYqv8tSRIFfyLvgvZFKdrt9lXkVHxt0pQBEJe1TqUpKKx9ORQnh1iy6XQIfpkQ5njSSuIoQgs9W6ZWStLtdMh5sWHaAn9LeIjxtAWMoghvzCKi45LQFBQGTiWEucVxSBE8PvuUUiK9PDF1mS2WCIlSEuFDG4rjBGDmRxv8hwNn1jjqvwjOfaSiVPjg3vszd+55veBZCgh/fNjtXOix6/uLskTIxbz+UlBfCgfXIG8BZ6xALHAxaILTA85o7MfPwU98WBxrT2bWno4/UUlZk8BXjFOx1jKdzjmV0pTHdCoeayzOeuwpk6YgiBMndCpSekKJkMQ5qCoTBnUhuhBrFhEdlwLvGQqYTsAbM7OmuMrH3jPn6X7idv75MsyrgOPtacap1Pcf52ydDSZaTdsBjgnmXB0c1ujBQvpnWRpk5Os0UEte5GiXvzCtcEE6lTNedjYnpOGRnvN0MXu8YaRn9SbHtmnqIa4qpIQ7d2AwCP5axbjElDFaO5SCOA5f+jSFd9+FH/4IOnab/OjF/SwuAs574hFUEqI0riUAVxe+LDi4/xQft4kjj1IQRVBV4SeAko7Rx58gpn3eeavk8Q9hPP509/s0Gk7l5J2nNzrjvjOe0KzazW/UHkZhm2Z6dQVrfwI5FHQqEMsm8UwgpJjN36Q4bdJUP5d6inSsG27s7rQO80ghJNY1NnhXE1/6ErzxBhQFRLElHjzg4D3Nr/7SkM/cCZ1JVYWO5ckT+Ce/C1k3ojrY/7R3/Uw0IqxIHjO+vqK4cQO+8iWDHGwhpOKf/o5lbw+uX4e9Pciy8H2bTDytzKPLQ9pdRadz9TqV5jjPdCrP41RE7e587EIbig79zF+4GYAEbtKjlJ5xmccv0ldOp9JwKqc7u6Yzbaorf1JfKMIwJRw4H1yvFCGqwBO+EFmaMlXxlZ3XOwd5DkdHsL8v2PhMFzcdcTQQ7O97Dg9Dh3LtWviyf/gh/OLGFJmsA1fsm92MMvHImogX4upGzjaV+5VVWNnl3v0R7cyT57CzE86LENDvQzUpkFGHVjZlfR2ePv109/00mvY0fd4G4thP789od80oxYfECjxRpGcWrzSaI3w9IvKzBNCfFRfCqUwmk1nuT2HnnIq1FmcC8Wr8ybXwpndstmvEOpkz5OSUtpwNy6wJRYbT9tKVndd/4xvw7W+DMZBkkl//l+usvnGbf//vvs8H3xqcmO9HEZQlXH/3GjevrXDlOhXv8TUfZqTDRfZK61S2tuAb323xzj9/k3zi+O73thkdObSm5hXCdmlL8fn/+mX6t9r823/1Az784NPd77MQOJUJeZ5j62CxgmCG7evi29lihncnNCah45i3KVNrXSBYtSZJUi+C+Fm2UJL5F54BXAincnxd/fjVbGZvgOTZwKLZWAYIHixRlKBsQZa1iIp4FtwulWJ5eRkj4vPf/XOCc2Hq0/yutCRKFcbMh6ENmu1UohFXdZX8xLxdvPC8+6JhrSBpRRhT4Tw1MXlyG+cgacVEsaKsBFV19mt9mpjX/tSnoPFQaerpjv1rylzmOPl7FMVYa8myNnk+paoMOp0/J+QovzilcGE6lSQJa+HRsdqfMLerb5zmVOZkUjO3s9bgnWMymWCxZFnwaPEeDg4PKFpL57/7C5yJRj+kZpzKp71Hfz8wN74OnErj/yyVPN7Hz3Qqz3Iq1HV3kqoI+qLpdIJzjjRNUTLH+0ZlW9fsveAF49yXT6RUz1nn9nWH0XxQf+KG8PPpYX1fkkQoLel02kSRpgwaZJSUXFu/FmoXFrh4nKFJWehULgdKNe3pOb34rNHUbehEmzq2Wd2e9LH2VFUFiMCheO9RUgXLkqu2+hMySvJZ7k9pi7qgyQXRjZFYa57lVJyv54gWYw14mEwmxL5gYAbkvj1z6K+qikePHlL2FiZNl4KaUzHWYJ3Ex9GV5lR+ntBk/hRFgbWOqiopCJaqPhjdHONUTnKVM27SWYwxVMVkFk7mnKPVas1N6r0nL3LanejqKWqh4U7m6qjwf8OXzHmT4zfvm95Rgg/3xXGGVjG93hJxnDIeT/E+FBreuH6DLMsuYvcX+Bux8FO5TMxHDv7Uz9kWNGtzJ9rVrE2FNpckGVrP29NkkoMXSKVDcqgQV9P6gDrsuakviEzDqZyu/TnZn839VES99AXGlDjvGAwGGNGj0+kgRFAFbm1tkfdWz3/3FzgbzRL/sdzdBS4e3lO3p5ikltZHURxqeep/UtQ6Ez9vOxBSJ4SY1/6UeRmKcYdDfG0dKVSFswatFEpJep3e1Zv+zEO858VMxysspZQIF1aATmPOqYTH0jQlqgqWOkskecJ0GkQESitu3b69ML6+LDQrD8Co1jCI2X8LXCTCwkZoQ0pK7MxJPxx8iUPhQzs7tfozdwhgVuQbIjq6TCYTptMp7VigdBipKKUYn4P670IC2quqmnEq1UynEqwMrG04lerU81zNqTisrfAeJhND7Ar2y0MmpGStMN2pyopP7n+EWd44791f4Cw0HrXWUQmL13pBp1wSvA8cYlmWVEBZGUp/jFOptSrOmppTmberuU7FYq2hzEf165V1REcXa0e1tiUYOPW62dVb/Wncvme3Y276oQ6wEezwzK3mnertII5TlNIsLS0TxwnD2vhaacXtW7fJ0gWnclkIBXp+noRwxQsKf15wvD0FwrxpU3PjcU+ozTrdntwxtzjn5u2p318K7Wk4xLsg1w+LKZ7B4OhqFhTGcVzn/njiY7k/SimEEmiv0af9VKScFQo2OSTGVIBnMBxg6dHr9WacyuMnjxfG15cIUXMqWutQt7WY+lwKhCDwKU3uTxwRRzFKq7kATojAiXiJPibn0HVAmJAh26fMw4hkNBrinKfX6yP1Ps4alNZEkWK5s/LChbrnPlJpRk6BV2mIPZirAJ+3AjR7hXpeGNhqpSL6vdCzjsdB+q+15vat2wudyiUiqDlPV4t/arvz9w6hIw+FuPJMsvzZFdWTJyjYsioV0euFkf9kMgVECGivV38aEvdFcCFhYq6uUYAw2phlKddh7c5ZHGfV/jScSnhsOp2Q+oLDw0NyMtrtJqC95PEnn4TY08UX+1Lg8VhnsVbiT1XILnBxmLWnqsI7R2UMlSBMV5hzBs4FnYoTJ2t/qGt/nDPkdZjY4eEezjk6nS7OjTEmTHdCQPuVNL4OHUpZlgjAOFNXF/s6YDoIdZ4NE3OzA9DM6dI0QhhBp9tFTTSDQSjEk1KysbHBtteLef0lwdfz+SCo8oswsUtCMGYqqaoqmDAZQ0VIlJj3KaHDd96daFdNVX8jjtM6rP602x0mkxAm1umHzB9rLVVlr26YWJqmM2FabGouRcgwD9SCSGgif/KtlWo4FUUUN52FQ0rIpxOEWJoFtHsPu3u7lJ2V89/9Bc6EFCEqIoqi5wy/F7gIhDq6tK7TCXaPaRzNi3aFQEhJpBXaS6JjBmlaq1ktXRRpTGlRSlAUU4Rw9HodVFyBt2itSRLFylXkVBpordFa1x1KvWbua+WfP4tTOWYHVytqtU4QQtNqdVAqJp+GKZVWimvr18haLXR0IXloC5yGmGsmoqqCY0WjC1w8mk5EKlWbK51susHp5nmcSmhvz7SnvMTXRYgNpzIej6+eTL/p5aqqoqoqrDFhiev4GqSf+0DMDbLn1tceV+tdynmYWFXNqpSNNezt7WEqw8bG5nl/hAVOo65Kds30xzmclKyurV1pS8+fBxxvT642rQ48ZZOc1UxD/XPaVSMFCNMoa82sPTUrtNbNt0vT9CpyKpY8n87Eb4UrcfUX0RiDrUQImT4lfrO2NrO2FlNVeC+QMsZZS5zG+NzXvWjYvt1uk/tQbNVqtZlMrpix0c8T6i+lsRZTZ/845xgcHbG8vAJcXVvPv+uw1pLneTC+trVJU13cyUyb4jCVwWCo3LxdmTpKxdVtz/sY5yxRFLiV0WhI1q0QiDq0zJxLmNiFrP60Wm3a7TYAWaXqmpFgiycjQSxjEqKTO6JqKbJWs2pkrRWR0HhfEEWKNE1nc8SiKPBpwsHBPisry4tO5SLRzMu1Jo4ilHMIIRmNx2RZhlKTT3sPf24R2lML02qhlKKVpGRxTKSj2RJ/0K9oIqdJ9LxdRVE0y/OJ4whbSaSMaPyeoygliiuECFaSaarpZS8e0H5hitqGU5FKzUg978Xs5tzJm0cEmb6bPw6qnvNpvJezpS8hJFmWBTNfY8nzMFpZ4GLgPbjal1bMvnBhuH14eFCPVha4CDTtSdXtaKmu0RHH0gzCCk9oQyfalK/blKfmMVU9A9CAxBh3zB0g4MqGiUkp55yKbdLsfG0IAwL3rEkTtTneMbMZ7y0Q1tjBEdWkrHeWqqpmYWLNaGWBi4EQIlgyeoerc2Uak6bRaITS+gx70AXOA017aqYy3gZvFO9ONvzmsny6Xc3aVBDzc7w9hdWhhpkJJmlzU6ifHRdufJ27aqZtMJXBloLSRJTPcCp2tp5eldWsfqGyBqscVWWCoM6DreeIpgpmTmHe2YxWrqDR6N9xHJ+XVx5KEWNCygMAe7u76GhBmF8EmvY0nU6xzlKWJbkQ806m1g9VxmC8pbTz739VGVx97qqqwlbBRV8pHR5zHq8M3oGzlmluiPwVDBMTQpBl2YxTSat8plOJIl1zKhGxP8mpKKWCZ4fWxHFUFxTGJDYmTiyJjOv6INBKkyQpSs971IODfa5fv85gsn3eH+nvPRqPm0gHnQpxgo3n588YM6tDWeB80bQnk2UoqYiTmCxLZ0vMM04litBOEavjnEq9DC0Dp+JVML5O02RWOhPHUS0VUKRpRBwlV89Ppek9m1Q17dSsIOhkFeVZOx5iTgPvQq2+9VSlwTo3yyPx1OXbYn4Am9FK05ktcH5ookEbA2Vmw+k5jDGhw1ngXNG0p/+/vTf7lSy58/s+EXH2XO5a99Ze3VVsNnu4zXAocjiQLMmUNZqB5ZEAAzL8bvjNMOBXQw968P9g2IANAwb8YOnFMGxpPOJoRjI04nAkks292ezu2u+WmTeXs0aEHyLOOZn3VjeXrhq3PfcHJKpu5jmx/GL7/b7xW5TfRJR0diqXMRV82uC17/1Vc7vemsalHq6qBq0NQRB23sxteS/DqPGVYyqtmNbqe07YsAhhNj54nc7pgu47pQRSWqIoQErhMRb3fpqmLrrcGg8mkzN2dnauDsyXTEII7z7vMJWorLiYTGwdTLyil0c9ptLaqXwUpmIurKt1TMUQBAIpIYpUt56Ez2BofT4grfXHxsdeGaaS5y6nmrNTMT7RkUbXDh+pL9g2aG28dKKpqgYQGFOSmJqlXVHqEhd3052KZ2dn5MOdjQOzrdtdSW8mgL+iX51aTEVr58xWJ6mL1WE3HgJgZ3eXp1cq6EsjrTX1Cop8C22OqaqMQoyomwRrlZNCjPWYiqFey9vTNNrnPDLUtaapSh+bxRnRxXHisRX3XVEUpJntEo79qvTKfH+ctR5ETRsr0/kAoQQBAYHdRJid70+b5jHAWhdOMm4qRgNBUiQ0zanDVMKQ/f1rHL2g+ZPJxJswX20qL428nUoXT0XJDfG7paIoyNIMKeXHnphX5EgIwZt1w79NMqQMCKPYBbBWEQiJFk4VCgIfT2UtZWnnIiMkYagIVYLWmsFgSJ6vvJOh8tKQII4jrF1D4H9FegX3gK5BrZ1K0GVX6xOKtRkK1z/rfgrtd3XtsJTlckXTaBIf6c0ay9nZKWWb2m+9du+xeWU+/hLJzzEpJUoqJsPKu11cfvDKbuXlkrWW2BRYYwiMUz7mlbkAACAASURBVHvaUCLOoUVhXWr2D1lXLU7i15O2rFZuPcVxihAuK6GULpxFknwCw0lK6fTqpmncRzdrgJEBYbE4+5PNTztJjWeYs0tREoaDlDBUlKVTqYQUXDs4IEuzF+InTV0TRSFX4MrLoTaBtzEGbTT7RzWyd9XaoMVi0RkmXtHHJyUVd7QmMZqBbWOotFKgYCUijsQYMNhLa8o/Z907URSgFAwGqYsEV+W02QmN1iAEeb765N3+GGMoirVkYuZignZnyddciqdiOzCwDxqTE9uaaT1jZYdEUUwbCPjxw4fU29deKKk557f+BuqKPh45TMXHwRECzEfHU2mlldPTk7/Yhv7/kIw1iNrQ1HsYG6L1Fk2zhzEKrKJCURpBow3aGhq7jqkYf7vj1lRV5N5Rd4YxhsFggG4WND6IdlkWDIfRJ8+iFpzPQRRFRGs+CvjcI/1HbXxaC00p+t+yLCWKInZ2dknTlDzPEQLCIOT2nTukHxFOsmkarl07eBXd+8tHa2EPWrcL8RFS4JW08nIpECVh+H2kWBIE77v/q6cgCrQP2araz8a6cqFc2zU1GGTEccTu7g5pmlKWBVK1MaEFURhRFMUnL5wk2M4YB6CQu8Au2AhrD9Fagt3GMrrw3jHwDGO3gHtYC0UhSG3GdHpKyXWiyAIhTaN4/l6J3vrwVrRWhIPB4KXkMvlLTRbAGUgpqUD8fIvLK2nlJZFf4KEPdK2UdGC5FD4XUxuoSSGM7Gy5oM+f1QY/q4raR8x3cWgHgxFS1miju4N9PPoEJhMTQmItnQrzTnDOl0lAhAiOXSIks0Rw0UhtCtRIcQ48RAh3+xPUM7ZHDXF+RFU9AmqCwPD6geWZ0chEokqJsiCNIgwjH3RbsFgsuHbtkLp+7G1lIDAGJSyBlCAFMpLI5AWJzSyoUCCkQAYClfjgwH4Tb9muIufcJZQgiF9clkpcFgEhBfJDnhEIZOBuVUQgkYlC2tbN0tVmBMhIgsTVl0hk47XstXkgY387Y0HFyrXLT06DQCMQkUR4z3AZKkTkJqNrWf+sCCRWglaWOvAfC43UELn3VOh4iZSISCE0rOqCnYN9pstzjNHueymQwvFMRuqS9iSlcG2SAhkogkhiEN1zHZQf9DyXUdCN7fp9k4jcrYiQwo1RdPk2SkSBb/cmD9q6pI/xIwJ/wRAo944fEenHxgDS80Ao6es2XTkKi7CWIHR9sxZkFGzU1z4bhMLxQQpEqCBSKGUYVvepWVBVX6AQN2iaAotgKiSNLbG2za3Vb/gOmwSswVpNFLXJxMasVkuWywXD0KB8OEljBefn55f49MvSK5FUmqamqtzNjLICYzXYNheQwLwgRm3rdGjWYtSuVitiW3J2NiMnJcsGWCtZVoJ/lUU8Oojh/gO2Gkvy3gFvPYx5tHeDUfxDtsKCrfHvcjLfZn/fRYzb1zO+Wv2YB/opw3SHaGQYvnGX0Vcu5A8SkNqKB/dPuD4yfHDrkOFXfhss7NgFGsnIukHdu6fYGhcoJfnClw75zuqg2wRa2klKDvfOSMYBg8/9XUZxeKk+ISC7s2Awyhk9uMPoq1/nrjnjQE+ZioxaKN6X18jeLMlGc0bXD3nrr9xn3Kw4I+Oh7FPADvY12fYMiWb4pX/A8KjgS+aYzK74lniDn9kUFUC6f8ZgVJJ8+g2SVYJAcMeesidyjNF8W94lvrOgluecbkf85FN3OVFjdpv3+ea5Zfba73L3TsNnP33G9tBS7IUkv/FlROn6P1UByQ030dORYX/7MduDks//xm9Tbx0wEZsHi5SQHk4ZDnMOHtzkb37plB9wg1MxBGBEyTY5Ow8CRsNz9m9c4/DLX2XL5CAEZzbhHBeNLrnbkI7PSFTFm1/8D/ne8hBjNzeWJLGke6cMxzXJW3+PJHAhN4SQbNslb9lnVDJi71ZMNmpI790j+c3fQQjBDTvlrp0wtyHfk7eI3yhIhzMG166TfOlrONxTcGgmvGGPuG0nTA72GGyNAEv8+S+Q3OwPl0BZth98wChbcvBpRXo9I/07v80HH8T8X/LHTD9n+cYPB5x/6z7z6nVm5QnWPuSHyT32xTlaG+fnI+jUF3dLJJzfXWOpihXWQlmeApbRaAutV9SNcfGkm5qd8eCTJ6m0YelaT8dASWSbn0RCmYWYwxx1wY5EHJSYxGD3S9Sn5wBO6tA5YWKJ65zFzhF1YinjgNXsJuXxNrn4PFEUc1aVTK99wHRLYgJNGUqmY8m0CKhrt6EpK6nTIVN1i+0tg6gt9fldypPNTIcO4C2IV28TmBl2tU918hkviU6wBCg7B6mIrgUE9Q8JzZBRcY3y5BbmwqbSJAvi+t9Bragmb1CcjDfrU872wy6/h6iPkeVrlOd7JPEp4/PHLM02hpBC3qWZHSPrn0CxxWB5nV1VMysqCvo+VEmJqL+PkAJTvsU0h1H2LtvNhEN5i3cXW5gQpC4RBmx5A5PvEEURA54x3BoSTN7DVPcR9UNEucTmCrtMaESGsAHvvpchozcYRZDb50TFTxE6wxSvYUq3WCogSzNWxQobVUT6mAjBXT3i28UdjLigv0qL1D8llIKBuoFMbhHOUgzuuTjS7EQl25lF8CNiMSKMfp3t5jl5vMdgfs60cpuKaEqUWYAJ2FH3GEQPmM1mG9UZNKpZoWyArW5hCrd5ZWlGGpQchPvkMmUcnBLaE6j3MMUtkiRhLE/JoppwfoqpXsdWZyizQjQDxwMtSZOEsHjI7miHu837DE2M0pEzpy/vYIqoa8vusOZBdMI82CIWE6QNsHqXxSrj2DzEIPjj8WvYzzTMmmcsD3LsoGExPiPc08gZBCjGwyHzuVs/SrUpUiXetc57zFj/u5eshO0SjxVFzseEVF6N8VsYhl38UhV4Uc77jTxVt8lP5ki7KamIeYCsBWoZIY+d5KARCBtRs0SLkPHrO6gagkIxOJKwY5HbOZqceBygrEFmBUQaGxjkuKCZTxApjLIBLAuemhXfDK/zn8VPyAKDHFTInXyjLVIFCEp0UrEUApIGuZ37qH0FWTaiXhoEkiousMpSi5p3oj3kzo3+dqSlJKZRAUEQosZ7iPFmmAaNV1+SIVZNqcIQ+aVjJtmM8Xd20PkhmhDEPcgEVn2ACYcs4z1+YK7D53+AHMx7Xm5VmB2H6DefO0PfEfwrWyHIEOIpAokKBOawxow1fHaJyKAB3g0XvLPznGvmOVIY7BeXrPZrjj9X8s2/N2NpDWfa8Ej+kHNxwlk0JjqsWFyvqEcN6ve+i6r7TbUJFEprRGJY3iiwseV7X51QftoQSLeI8b5FUoC9P6PZKph+tuLPopDKCKSXaCYY5qJh/0FDtZszeU1z+u/9OScWEI/B9hNa7Bv0/opyu+H9/+CH1OUxwcNDmPW8VxHYLbCZRr5mCSSApWLFM+B/4wAh4HB8xt0U5A1L8JZFk1ObM/5E3Obe4QIlJPKOwGbADqg3JRhBLSoaK3nPFPyh+C3+9tY3+dQwcsD3pyThQdgZCeaiomKP46lhURUMNMhCIZeKRAuMkNSxZfraU3KxxB5abFahr835o18fw6rk3XeGFPNiI3SBbmqiyN2c1uXmbrFaLRluuwRkQRBgbcPOzi4fU1B5FZgKfZpGQBjRxdC01mIagS1CrLkQs6FUoAWUCjt3O7jDVAy7o5AoH7E8mYBW0IQ8XX2F5zsSbW8jhKSpDYUVaHsbw2OgxtgHBAxI7ZTJckxoIxpKVuYeZfmclBDDdRpzt2vGHjNWdpvSGgzHSJ5h7DaNve+uszkjX1nO5etkIie0P8FgCEOoBwa9/HF3pya8Lm1liWosKjfoxzX2/c1wfUHoAoQz0cjCwBHo/+NzPMFwX7/NdmqZFjlWLLD3ckSpEfOS4L1zhNwlf/hp7LX3IfUR2PZBnDvAPPsgo3gyI3rtKfmWYLhfI/PnUIxRusAqjRAngEaamKoIsU/GCFthxR68BlQ1yTxi/GzIg58N2S8Fp8mnOZl/mYXYpn7zGPHWv0EeZ+hv/DV0uTapvdQWbC0Jv/iHyCxn8K9HhA2YHaeWZklKcd64m4ovGpIdSfz2mPhfZggC5h7UbwCrFHEwR959Dz5I0H+yv3GyJklCURQ0t0vEF+bYVcb5//4W1fkAZVMwAbXPSWVTjZgolxv6nZT4vX3y/EIUOwHmiwHyXoB9lGC+PUAAd0fbPK22yIojrEggjRALAacB9u2UNBqwylfEJiIj4RaCZv8zyPMzjFCY7/8azcmwA2KXaJBjpDxAff1fwmiFefdr8O07vK6PmNgh2sLg/A0end+DnW+hXnuI+N4Ngj9KyeWAlUwJwpCydOYcYRgShKH3wauxF6zYXTK+0pkKaAfWzmbTF6zqX45eWTKx1to1MGItQXtr73DZv8B0djouETjAalUQWc3JRJDbASQ3mGUps62IP30r5SQOIZhgRRtIaA7DCQQ1Iighm1EONCUSJQuMznnIFvNAoHdXiCCA5ASGPbMXlAg1QaDRyRmlMhDNYehOwhNhicIQUz9jAeTZABNKKlmxuLlE7ESdV29mV6QULOMtzrZC9sc14rMLSDeB2ga3n9rbJWak4cEC8fvfJk41z+qfURES14b4WYb49NI9c1ix+K0FpXyEJiDcPiO6/j65DGFksAc5DYL8yz/EzEuOVMBcDDngDDvYgjjDxA0EDfZagZifY2zvqfrESgRHsLXCRjU/G495dHvOn94PUSQUxRMa/oB9BeH1CLN7jg5nyK//n8i1PVNKZ7Fpk5r6cIqJQ975qwVn9Yp29y2WGjuOscJiRrAY1eRfe8zkpsJgkGvT1ALlfQvXGkxyCvH32pmHsAGlEAhrkaMAbmXY85ibf/uPyZubFM0FuT4Ec+8cPbLYr79N/vwHL5zT9gs59V6F+c2fQfQUC3xrKlnNNA+FwdpTzJtzzFhjD3Psl09YmlMQgufRksfXp4T2iMk44qs3F66tf/cfo1ZBvw6E5Yk658wOWT44Z2cP+Ov/FF4P+edPloh//nkeLGb82WrEkVlQGwcjt347SZYxW9bkTdEBtEVRUdcNgUoB2a2rls7PFwy3vTWtcKrPzb2tj20K8EqM35zHqmtYlyNGCO+l3HohX/Cy7P52zzjfn5BVM+BodEC8alitFoiVpJ6mzH4wxhQKKQRJkpIXOafXtuDNGaKuEKGBxYyokF0kcmVnVNTksmA63eLawRxZ5Mh5vzvXuEUVURKVNVZbKEvEfNrd/BilCNvwissFugFlA+KlYH6ycP0BlM0JKCAJwdYIKjDPEGbzNFBKoaQEMwUqRDODh7tUIiA1AWk0YKt8zhPxHpgGbAVmwRMRYUcnSGMIi5zht4es9B52t0Z8uSIQguhH9ygfnxNTswr3CAafRk8NIrTYLxSozMLbtzFvjwnD0GW6M6Y//XeeI2+cUjw6IPqzEc/VfWwTcGCmRCi2WVK/sYX8Qk1wGmD//C627F0utLeTiLdKgt/8ASoN0d+5i30adyExVBRTVSVWWOxnLfGOpPrOdfJv7l1yB5BSElQzOPgA9XCM+YM33B1NHcFqTBRFLiTizRKufYBaKq5/K+T7xWveFF34HN1gEwO//jOUreD7N4me7FB6o821iYm99YRgd4Z8bw/7zWuAIBjFxEXFWROC1XBdI2qLyIFjTRymlEXBSgzg4aeogHSvQvzmuyghsN++jZ6EnQGhFvBUCJQyiM9/gIqW8KNDzNsjfqIFyW5BdTxkleyg9NJ7ILc4iaUolgRBQhwE3YEeRS6HcqM11jaXvI+Hw9QdtkZ7Y9GQ8/PpJzNIUxzHxLFzKFSBM5oS3s5BtvEgxAWg1vv/OOzFNUtrg0UwzycYoxkOBaARokGqZac7ap2TxJJifoP4BwuCWYDUCvXjHXh/G2UMw+GQ9PwDYhqm8SHpcoJa1sj3D1Hfvb3JlDAgswXZ/QlysUAd7xB8934Xq2I4GrFaLp0D5HyKOn8MywHmGw8YLDOqqnLBcOyCsV2yGO4R/N4UZUPS73wG9c3NWw/hLJSIPlsT3GuQP7qJ+sYDbt68gX7yLmMTcrv+gO/KvwrmCPXXvoF8dB37T/8+pnZXh7GZMWTGc3EHe/Oc8Pf/CRZJ/Ye/Q/SwICXnWN7mOIqgrpCxJfj3/zEqOYVvfQ3+5HW0dNfmUkm0j6gu7/xr1JvfQfz4M2T/rCHL7qEtjIuHlCLkU9uSiU4Jzp6hng1Rf3wflfeS33A4ZLlcEuwuSH/3XfQoRv3pXdS7I8IopM2wp5oGKS3Bb08RBxr19g22v/lWBzqu80qMPyD84gnBj/YJ/9cvbsbmUYrQWoafrwh+5znNIubBv7nO98VvcXx66h7x0oHKGsLfe04oQ9S3bsP3rqEuRJKXUjD4skbdLZA/uob6o08BkMcxpmnYSlPXP/uE4K8fox6PUf/iPhCR+ABK7SJXN1eE/9EThFCo//se4/l+Z0OllOLw+nWOTx6h/tYJKtWob99E/YkD4E0Y8jxQNFXd+dABSOHWVJoNWOZOalE+oVhrBR0GEWEYUV1AHKqqJktUZ/uilGFra+eTefujtdv5AOcj4sLvdubz6zlJ1t6k3bbb34IgoGk0aZqR5zm5P0UsrJUhCIKQsiwRAmJvPt7WF0URZVmyWq1IrUCT0TQZRd7gkpalWLu5yJtaUmMRRIDE2gBjBl27lguQcogQEmMKQBJJyTDImBWhd0m3ne2AtQOEiLC2pqqCS/VJGTjPXh34+iKsHXJyUvGMa+ylKa/XP0CIGYIFggZrC4w5QSmXdsGO3kcHpyAWiJ0cEy5AKKcS5TMMJUG4Yry9zcnJCaZJwZY42ewcOCMIXGQwF4fW4gxiVkADouDP0y9RVIUP+pNhCTmfL1jlIAiwKKwdbOjuq5UCRl5ydYHMrc2wdkBduZMzSRJqs8DuHENSI2IwImK5lJd4JYQiCIY+QHqAtcMNTEWphKoqKXLd1VeVgknRIKW7RdLaYyq2AQKMqbE2JQh2qKplNw+dJYqgrgRCKCB27RnPGNx1dlC5nmBHGnbnEJquTVE09Bbgrp2uPme1gpBYBuR5Pxe0FpyelFgzQMoY7AJrk+73upY0jSCORzRNAcS+fSHWpqxyhRUCpQK09puYt6xtdO1M8e2mpBJFMZB77UIDgsVicxP/VeilbyqtRV8LFjVGer8e24nVLa6yTtZbbTovYwNWUJYusvdisXTxH6LEP2swui3DUvqgQUKANt5YzNvF5HmJMc7d+3k5RJAgsMRxisXFCLko7oWhBCuotQIkxiqaZtSdiFE06AA9rYdYG9LUmnJRo9QuVVVhjEbbEk2N1jHatJJYitabmf2METSNABFhrcBYidk/YXR4jZMfRpzlmhNuYu1NbwMTgxgixV1qH5LUJCt0DFYcYrMFNkjACnIxQmcRmpJa7nFWKuzgOuTbWN7GUmDNLYx5g9KrLS50gZMIsT8DYmymmO2FbtEAMz1G8xS1pQmH2xgrsEagdYTW/bRKkgHL5YqyFG6zBf9M7COPWfLcokWIiQU6kNS2wdiAMNzyi7wnraEsAaEwUYMerjY2lVKW2NiitjU2sNhAY3YtqZacPa2hirvFpbUDL52nbsRqJWma/rpfCIPCoFTi4pJo5cauSpmeVOgmJkkTqnKFrhdY46LVax2xWlmEyBBCdJuYCwKvwDgeyCihUseARUnFcH/I2XSFVjVGGUxSoIdunoVBiJQBq0mIaSKMCd3cNJJKh5xkB8xWM6ypu7XlvJJbj31xac3leU4WGL9hOp+6bC/7JGIqLjJV2zDZxt0QwqvQPsqbuCipQHtCOGNQl5tEa02axhSFparbUAfO5qWNWhWGirp2wbK7yOG+vigKqCpDVRUYIYCSwFbU1QKH31QIsTlxrVXMsbwfXuMtzhDCooIV1jgdtmkK4lj6GCM5QmhEmGGHY5rFouufFA3SNghZo2RrkFQgxGZwbid6SqwPBi6kQaqK8/kRsE+YjfhgoZDiJ0gxBXIEM4T4ocvnojXh8YzYFkixQuoSuTIIqcgmMcXDghhDFCm2vaQiohOkOEeIAqkeoZRTW90ma1DK+mE7Q1Ai5Rlx+lPKskBYOBWWAMkqP6GqhkjR6vd1N7ZCQFnOCQKIIlxkMgKkrBGi9pKCc7fPc4t4coiav0vUFAijKIqym/AtuRw2sZMa4wq5O+k2FQHEifNpqZMlhA3EsMgmzPOfEQ1vwSJ2AdTBq+AuU4BL+5KwWk3oJRVHTeOkYCENUtaQJ4zTWywWC8rTBmFSxGyF0G3uYncAupglolP1peeNEAFSKGqTI69Nuvk6YYrcbZBZA6FGjBfI3YmbN0JgjCKt3iSftzGB3Xz/UXCArVegFIGSPlp+a6ciu1AJF9WaKAoRMvcStVMtl8vlJxNTWQ/S1GIqne+ICjymoi+912MqqvtOiBa1FoQ+UVIb7NdhKv7KMgj9gFZuAuDKsdadvHGcdMxSShKEQVf+xZQEyseAaVqjdlEj5dxX5ZI7OT1ZIOQSaLC2xpopcRw5YNhopF0g7AopE6BCCEMYVSh1ESdw/VCyRgiNtBXiaIut/X0mYoJzT18iRYAQKxCNm7hJSVmsEMIg5QJplyg5R8ocpWqMNVjzHKkWSFsiREhdzwnDFUkicKhijZQzlIqBECEMadpfSwoxB1HDSmEebhGy5S00a6TV7Awl03sR0DisSy42+JmmmS9rCaIBESDlyuvxLrGVtaUbN2kRosTYBinnDAaLS0niXN7fqduwFzHy4faGpGLDCNmkJOMMmUvkKmL3eca2ucdsMQdylPJ4kdIIUaCkRsop1sYotRmjxx1aGofllW4egJcQC9I0JM9zpMwdD3Btt7YhDB04WteVb3sOVLhUNaekcofi4VbXr729faazIzhXyCJAHA2RD7f9/A7cfObEz/G553lFIzVJlGIrNyc35rO1SG+HcjHzRrs2WmPVKFIMBp9Qi9o2Lq37e+PXNZzhhW/T4yrtpuJOp6a5rKa0kokTMS/urq4sKQVa4+/pu1ZsPH+xLe3OfbEsa90NVtPU/lTumd9udC7VyPr7fZ/AYvTFsvGbobiAMzlXdGtNL+1t/OpCArY8Wucb2O5fqXpR1i2QABeG4kJpa/x2fbhUZRcrtQ1eDrbL7bRuRNxJDoIuhWbPq5aX+OtU220ueF8b6Z9dH7PNdrT+QC1WtzkOeN509RlNVZVd/3osdg3Ds9aPwWZdQtgOb1inMAyoa+H7tzlubRvr2t1ybs6F/t+2jdaD1UVROG+itXnVvttePX9YOI+2LIfh9Lxo48866GFTrWm1iRb/M9p27jUfh176ptJKD208FRU4OxWscf4Jpk30vXn704KurZ2Kc0p0aHarG4qOCe59J1riy7Xd/1t/B60tTeOeDcP+nl4qiRQOTH1RW9qrN2N8Wnlj0I0Dht14S5+WwnpQU3QxKyDEGNcOjfHBivs2rdvhrNVIG56kXWxOBQl9/7UrTxiPTwk/26QH4FyZ2rpnnO7sedC4YNXaGprGUFUNxuBMxX2Fjpeu/cYYwlB1bTTWrrVJdwug7Z9UDndytzj9uLQURbIbg7bdLkuC8VKHdbGLtXGGgr58t4gu21ZYSye5Ws8nu+ZN6er3/UdgjWXLroikYNFofwCZ7tl2AWrTz5XN+pyZe4sJNo37va4bmsZ4Fd1HY0N0492IdmNer29tXIybE2154CQ3szJ+LmzOzRYzbHnV2XWZfn43TY1Sm/UZv/m3c3Kdmkaj2vlrbJexYt3T+VehVxL42p3kPehH657tTxF3qm/u/OvxOVopoPVV6A852z99oYz+nYsYjl1ri9dDXWH+sRe0pTez6L6QskXv2zL7OjfJdpKHsK5Xcq3AD61PrPFgrR89H8Rm/xBdXV0/aD1cL7ZHIDb44d52bvM9D3pe255XYs3FHjZ4KTpjua4nPu7Kev8smywSPX/EOj9F95y9UM86bfwtnFRjP6Q+r616P+d+zNoypBDrQ7zR774K0ZezMXa9BNqP34X5ymZ96+MiLv62tjbW6+5/3yxTrDW8f3ezD31mQrFR1yav+v4Zo7117ScwQftlTEV4OxXRxW24tBi7Ce/z9Vo63TAMQ9oMht2mtLbIgiBwaVC7762vT3qfhlbK6AfQeODqRW0RnsvrMSsuGg61CdLaAZVSEfi0rF2SJ9bi8m5slOJSWe7K1W9I/v1WvQnDEFlsbgw9lhQ4hN/0fWkDf0vh4gQ3wvFfKUUcx132SGfN1/OyLavtQzcsgi64cl33YrYQEtOOyws3vvX+KVefb9/6WDjTgValtF17Li4y6ANw9xvR5rh0fWjnExLQGylENvoobFdu6E3aN+eCoLVQXe9bFEXds1K2TrPWY3mym7PrvHTjYpFt/qR1PnspRLSbO5u8bP8fhqGXkrnUppbPrarUt6v1v9vkZRiG3uHQtSlJ0i5J2cehV4+pXNBFHQp9+fZHdE+6GCLtzgmGpqmw1viMhP0x1JahdbN2y7Sut9q1vLGSqvIni1wHs17QFr942z6ItbrABcrRugZ6y+A2hUVrN9KeEsKrTJZ+Q7xYn7W9+tb3DeI4YrVaOgvQtg2i/10pSVM3/aK2vi9+8To1xU1AYcFa7W5vhPNQpeWmL9uYBmsNQRDRtCbta/x015OiMwsQWBdHWMlOirw4tkpJ7yXe52xqc2W7MWvHqD992/goynvQbpJBm2ZNwtj83c0FUGvzQUpJFAXYcv2G8KJE2mJlF+dCjz2ItblSVc5UIQzDNYmg5ZcHsiWb472WtxjsRv+EkMRxSFGuzbu1+qR0ksbFNrbPKOVzA5m+f9Yaf3jib+cu8qomXJO2Lm6ovyq9MjuVNu9P0MjNGLWm1bsvxKj1/jLtc9a6WxhjLFIGWFt3nW6faZr2SjnsrgmjTu93zzgDtYayrLrAUQjTLcZWp1+nDtC1ttNtHXbhvnd2KNYDs+11oZt8rTWtMQaNp/ubRgAAFOVJREFUprGaRmvo4lo0l+oLQ4mzOfBOl97By0U9b7pTTwtvmGbdhltVFc6YzCeZsobGaHSjcYerwy0ardFWYwOI45j5fE5VscGnptEdv6uq51VrY2SN6axD2/okmrKsqOoIcCd602jWjVIdr/x15oX6Wn6maYrWRYffCEGXN/gir5TC34KANY6362FSwjBy8Vjr2mMqLgd0XuWdtNqW6czXhcd5tAeiN+tzQH/Liz5+cmtU2baxt8Fy/QsD6Q0y+/p0o7E436TWP679TUoX5V5r7VVN43OG625OSmmIoqjDENs2uVxZjs+bfXBSoTHaY0CbB3wcy+7ioO1jXdcf207lpQcRXbdT6fx+PPWpOPo0HB+VosMNlkPFtTZEYR9/oldJBHXdoHxogYt1VD7ZexwnXblt/hTAT+LNtrTX3i3Qtt4md+rFnQk0XrzU2i0wF3lObZaJ7IBod129WZ8xbrMRF/Cn4XCMlMob9/n+ir49YdhPsF7N6su1QFlVHa+0Npyfz1EqIGx5ufZOC1yGYbzWdtHxoKoqgiDs+SwkSZoShdHajcNm39pg5e6WZJOXQRCiVEBZVu2IOl4ag0AQRfGl8qyFuqo9HnQ5LUVdNx1v2v4FQUiWDTswen1c1nlQdSbw6x+FUmE3fu33i8WSptFdG531seh4XZbVxpxcT5nRlrXePykVo9EWCOE3jL6sdk4GQUhVeVumXv8B1vnc968F4J0ph7rUt6pyG2/Pu9r7f328nE0vfVNpfX/awNdRHHlQrr8Pbzec9U9vp9LaqkgX+iAIGI1GxHFE6a+7WtzF6dfuOestaDvd1i/MNE1RSlGWZVcX1lKWzoRaycvtaSWrQCkPqLUAZDsYlUseH8ednhyGEYNs0F2htn2SosWS3CRoT5P1Txt/xnaiqqvHuaFbhsNhP/l8/8BducZx3OnBra4ufEpLKVSX3EtIQRRF7O3t+RO31ctb8LjntxPdNw8FKSVpmnVSWBuyc7lcUlVVN8YX+1ZVFWEYuPg6Xi1r6zPGXb9nWdaPjcDnipK+3Iu8CrrxbnG69d/T1OWtaerazQOcyrBYLPox6573GJV1ONZ6O/r+41WOfs5JKdne3iGOnSFdhyV1lxCSwWDYSRFdWR6jk7JPDdz1GxfX1wWp9tbXa/U5Ca/xbVT0e8plPq/zSgWqk6Iu9i3LMm906QJUZFn2UlSgl76ptKJx/0X/H4dT9JjK+qfDUuj18rousVazXC5omprUg7/rz4C7Ww+CgDBUHd7gnoGqKrBWk2VJ944KnPWka9Xl9oSh8+7scADR4ypCWNI0Qeuaui5p9dS6qSmKFXEcuohaYv2GiE4FCEN1qT6ta5qm6sVO//3e3g5KSfJ82fe3w1RcRjmHN+mN9rU4gMVSlLn7DlfPZHJKEChiH9JS0PetqgqMaYjjaK0+V6dL4ZATRcFaH2A8GpKmcReq8WLf0jT24nd1qT6XcE5RFKv+HY/dtHy+WJ4xmrIqekBTbNZZVQVSOjyqxYuiKGJ7e9zxeZ1P7fgi2GzHGu4TRmE3P9vvZ7MJdV2SprHHTlpRzc2qolgShoooCi7U1ycCS5K4n5NKsL+/6+aD0Rt1OV4poiikKFasR+Ntn0uS2GsJff9aFxSXWVJe6psry3YbXlVV3QXLx6FXgKlI73PjMBUVCC9Wu522VY8ux1MxHlPR3WmfJAlN05CmqQ/Uu3Q4gC+jBROzLPa+OAIVNx1W0OiGIAgoipL5fN6Va23DatWaJ5vu+5baTdFtWW4i103t7CyA+XzuTaCVz5kCgVJEcczkZEUbP6axDQ2NB1rdiVAUBU2z6fvjUHjV2ZwYn4T76OiIsiwZjUbolaYR3gDQgjENq+UKCH0falefdEncWhUijmIWzdzlWQoE29s7PHny2PPaduPSNA1JkngspzfVNto7gHpQcrVadfwVtmE6m7FYGITv3/q4OF45twWlVD8uPtFcW8dwOGI+P0dIZ0/hgHDNYjG/NDZKKaIw8nYVjTeQ61Xs9nbLtVNgjaYoak7zU4RwEl2Lv7UXCsZodNMQRdElr2ig8zJu5y7AtWsHTKdT5vMFrWuDtf0zg2zAfD5HCNHNdVef8AveHZYtD7TWPH/+HG0ahxl5rK+tz220giwbUFWLznBQ+/qWy0U3l3o3BOkNRyuP32zKEA7LWnq10N00Lhbzj42pvALfH9sDc3jdrz0KkH4CvKjR7Xf972XpRLHz8znGGLJsuFae7J4ritLjAAJB1d0jCSR57oDF8XjcxShVgSLLhsCx118329Pq40a3V7fC4SK+3MGgjQPaYyp1XbFYLEmSsR/AxuvsPQgLgjCML9XnjK6qtRspp0ocHNzg6dMnLBYrr6+7slo9OEkz5uc53dWp1+1bFwXjU8a67xz2dHR0TBBExInq+ta2seV3lmV9WhPfP2uFC5oVJRhj3MQVku2tHfQg8QaOm+OyzqtlqWlwkdwE94DdDtRfLi1wiDuBP6Cul8B1guAt75Hbk9aQ5yVCpAh2gDccX23NiHeY5s5fKEnanFCCOE7YTfd5+LxNFyLX/nXuIwjJcplfGhspJXGUeNC+n5vHxydorRmNRn4utPPEPbNYrAhDp4q0hqAthtNidWk6YLFY+HoUh4c3efL0Z+hGd9JoW18YRiil/GEoLtWXpkOWy7kfQ/eOA2e1x65aq+WelsucYdiHJKnKnOG10cfGVF5JCr+LMWrlGk7SJw/bfMddLwq/u7Yu8Sl1XTMeb7FaLclzhzG0O3Cre2ZZxmrl0jVKJb1I6OobDocURcFqterKtcayXLpTJFBh931L7lSAMAq8uO6SaLVjkuc5SZL44EpzWq/nra0tnj50yZjCMEAZRUCwJn5KsnrFQL3JyvSgs+uLQOvHCBEjxDWk/BRPn0q0vufE5JVAiB2EOEHwDtYOKYobBIGLHiaYIuw5QtxGiDnGfMeBnfEbLGVOKT4giROuXTvg8eNHVJVew4scz9PU6dRlWXY8aY2jlFKMRqNuswmCgACYTKfkqzFKbuJcLeX5ykli2Ra5sAyokOoJzofGTYLxuJdUhJgRhhYpT2ianyDl5gQPw4DBYIm1OULMCYKHbg6YgltMaAZvsFwuyQuXeE4JSV41nK1OO7ylKJwULZVTl62/yRuPt5jPN4NjO4C69HhVP+euX7/BdDrxfj8t/tLPzeF4m9lsxsWAZYgeUymKYoNXz549dXMldCEwpFDd7y2WNR5vsVjMXQoWcInElKQocqIo9vih28TiOCYMA3/rZC/N89FojAzOOjU/e0k5sl5Jio4W3YZWUnHfbxryfJiI1f/mrkwt5+czXPKjgX9is4yiKIhjL6mIsq0aIUSnho1Goy6nSRAqhsMR2FOP8VyUVBze4IJEtXp7ezq0ZXnRXLQ3IyWLxYIsc5LKwTBke3nKJL2L0EtAEAcSJQ3D0Yxivh5sW3j7ghlSaoSYMBicsLW1xfHxMXWtkfIpSuZIMQNKlCoYDE5YzHMHVjJHsURikHKFkhXGQF39lHOZshAjaBqeP39GFEWkqerAp5aX7XVxu0lDL2Ra61KmJImTSkZJyLXyKZPhr7E7nHan28WxdapNe4IKEB6Mls5L1tp2g+/rag3hxuPhpTw0Wjfk+aoDkYfDAVkgubY44ix+jWLlfXwQSKUYyIbn6R2uDQ54dHTq29humC7vgfBlLZeLS3NBSkGcJGs2S62kcoQxhuFw5BZ5C+DgsB4HDDtJpXfOdPxur7YHg2GntiiluHXrFk+fvY9umjXsqZdUgkB1z6+ZZSKE7JLmOS3BvdM0DXVdE4RDwiCkEhcllSXDkO7ypK5rxvubmR5+FXolycTc9aqPp6LbGLU9pqJ1fckPwXjwylpNo2uwTudzyY9c9LD5/NzprVajm7rzmxgMBt0iUHGzZg/hQMeiKJhOJ93Et7ZmPp93RkhteMGWeucs3zbj6mt19+l0Qhg6CcfoBovbiAZZxpPTc6y1TKcTRsmUx9MxcdpgjcXYJXMjOJrNuitYcEBiEKg1HjXM5xPyfE7TaA4fpEyeh8AQY04dhhNIynJFksQkW2DCKcXJIXpeef62unqF1oo4y4jjmCwb8OTJY+97so6p1B2/F4vzDTsI95wLQeEwEjBlzYE6452TIZ85nyGkw1RcWX3nZrMpUgqiMMCyWV/L5/F4zPn5DOHtdMIwQBu9MWYtBUHQbWzGNMxmE1bUXMtOeTjb8gu1dHNEazSG47zm2eIpKkg2DpqgaTwO0qB1Q5omlzYxIejS7TrMyM2V69cPmUwmzGaTNb8o2/FgOBh16na7IfXzyvoxnnZ81rrm4cP3QdSoIMB6I7+2vtaIsd3EWkzFYTg18/k5UgqCIOrxTCUJg5C6KinLnKbZ9OkZj8dYu6JZc62ZTM66ze9XpZd++wPQOoQZ4yz6WrWhtcQ0pgUJ16LArT1j/eTK84K6rjk7m1AUJYOhT5VqwdlkWX/SrQiCkDCMWKuONsBT02hGozGtd7T0ojzWegOozba0thgtcOo2Kbr3R6MxRVF6/da1pywLZrMZaTpAyoBchRT3B96gzRlzyaGEKGU9+p21ztgszwvWHbmshVu37rrQgM0J8zjh+bzqNiNnUxAxny9YTKcM0pD353ajj9DzabXKmU6nPH361C/MrCur7VvL7zQdrLWv5+V8vvAidQiJ5fzekL29fYbDUWdEtclLx6u61qxWucNc1p5xp2/AbHbeO29aJ6FinUR4cWzqumG5XHZgojGWSigWnxpjjBtvIQRZOnB8HyiiJOPg4JCiKMjzfKN9Fm9MZ+nSgW7MSyHXNrHW4RGePHnKcrlyEm93b9nOfctsNlszFVirz/bBqlPfRnwbbt++i7V0sYHsBq9C4jjl/HyO1j5yr4U2wuFgMKSute+fe9cZJtYubIIKLvVtPp+jtfFmFc7sYmtr+2Ov/1dg/OZOtvX7cAtMTzKqIiAIIAis/7f/CGFZnocspkn33WAQE8eK/f1tsixitTynqiSTowFKtu8KRqMUYyq0LlGB27TOng8wjWI8zogiyXI5Iwhga2uAwFkgnk8SikV4qS3rbSpWAbNTl9Gv/V4pSxBYlLIeC5EsznYYj7coywXQsL3X8NmvzglDUAGoQGJlQL7Ul+pJkpDBIMaYhsU0xtbbhKGgqpYEAbz+1pxbr+coZZDSUuaSyVGKkhalDLsHBW/9xhylTNc+reHs2RCMJAgEW1sDggCuX9/HmJqqcteJs5OMKnfjMhwmJElAWS7WeACrecRimjIeD2iaAq0rDm83fOYrS6pqhZTWhWx8PvCnJZfGWSq32NpxCTb46dq9sz1yksF8RL4MWS7PX8ArxWCYsZxLZicpQQCjLc3nvzYnimE8zhDCUBQLtIF0CCZRSCX8ePVtUoFbtNOjDF2prh2X5wEsZjGr85jRKCXLQsbjjOEwYbU69+MCRa6YHg8IAsHOzhitK5qm2Jg3WsP0aAxWUZZLgsCyu7uFEJq6zgl8m2anKVUerr27zit3JbxchMzP0g1+K2WJY8X29hClwOiIo8cRVjeX+rW1NSQMBHXTMDvWSELOzk4vWbv/siQ2Y3hc+PHF4dk2aG9vj7Is11BsycHBQW9EIwQHh5Kz0x3m56059+V4KtcOFygFp8cj6tr6snzeWW/8k2QlBwdLnjzapqp6Ea29xgZQgeHeaxOePd0mXyl/1WnWTgT39+275yyXEdOzhItgdyv+be+uyLKa509HGybO6/XFacOtW+c8ebRL06jORPrXvjLg6/9gxH/3D4+ocs1X/2bJ3/hP7vLf/tcTzp5fdFpzdR7cOEc3iunZgKaxXnIx/Mf/xR6TI80/+58njLZKdnZynj7eRmvXjr/yt0b8xt9I+R/+0TF1ZQkjzZ17M5482qYsZMdDY4w3bnNhG+68NmU2HTCfRRjT83t9TrTjcnI0xJi+37/1d8Z87msp/9N/c0IUV+zvn18aF2ivh82lcbF2E2Non71xa0JRpExOI140t4WA3f2SJCm7cbn/2ZTf/8+3+O//4QnLcychx2nDW1/I+fv/5af4H//RjEfvNJ0zZD+OlruvTzg9GbOcB5fmQVvfjVsL6lpydpLhQlj0bW/50Y/LFnUtun6vUxhp7tyd8vTJLkXexz1pnw0ChTaaO/cmG+PSzkln72T9uCxRynJyNKRpNudki8UkWcnB4YInDy+Pi+u/REjNvddPOZ8adOMccI+Pj7sbKykVN2/e5NGjh5fetxsRx3t6JSk6nj17tvHd6QnA0Ue+9/D9n1/2agVnJwCPPvK5778N8OQjn/nJj35+ffnjn/9MUcBsArD58I37rzHcNgy23mF6uqQw11HRku3D93jy/tkLy3rvp5e/SweK/VtfIB5U1M33OX5uOX4O4AdZwI0Hn2Jrf4cw+zHz84KigO9/93KbLtKPX5zmZoNeNC5CwI37b7B9sIWKf8DJUcnJEbyMcXnnxz+/TY8vzO/D12+RjQWj/Z9y/MxhIkUB08UOuzcMB/ce84N/++J6f/g9+Hl8evedn9+momBzXD7kmV+EB7/quFykX3i9fPfnl/XL0CvBVP6ykwoEezcSilxzcMelcD24k7Ka1xzezX7O25u0tR8jlSAdBGSjy2dAFEu292Pq2nDt5se3hvxFKEoU472YprHs3fiLqfPDSEi4ditltWi4foG3t98Ykg4C7n5mdMmE4YpeHb0E9We/sw68Ik8CBqMQKaEsDFWhSYcBQSCoK0Ox+sV1VhUIsqGLYL+aN94gb60qAYOxi89b5Jq6/HiGS78IbdS50tTVq6/zoygbBSglqEpDmfe8/bWv7vCf/ldv8Af/y0P+xT95+v9iC/+/S1IqDg4OePjwg0u/vTL1Z7FYsL+/7/OyXtFFSkLwqYC7v0eDD338Iynd/QXq+gumZOsvvs4Po8Tdund0/81ddCW5+2Cfg4MXx929oo8mIeiuxn/hdz6upHJFV/RJpcE4IEoVTWWYT15OAKIr6unDJJWrTeWKruiKfiX6sE3lCqi9oiu6opdKV5vKFV3RFb1UutpUruiKruil0kdiKld0RVd0Rb8sXUkqV3RFV/RS6WpTuaIruqKXSlebyhVd0RW9VLraVK7oiq7opdLVpnJFV3RFL5WuNpUruqIreqn0/wB9H812FR9hawAAAABJRU5ErkJggg==", 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" - ] - }, - "metadata": { - "needs_background": "light" - }, - "output_type": "display_data" - } - ], - "source": [ - "sram = mpimg.imread('Results/sram.png')\n", - "#core.shape [:3]\n", - "plt.imshow(sram)\n", - "plt.axis('off')\n", - "plt.show()" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "### 5.3. Discussion\n", - "We have zoomed in on the detailed images to further demonstrate that the two dies can be coupled. The following image shows the core die and cache die in the sky130A and GF180 process respectively." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "Our objective is to mimic the AMD 3D Vcache model. Both dies have identical footprints, with corresponding signal bonding pads positioned internally within the die.\n", - "\n", - "To simulate their respective real-world conditions as accurately as possible within the entire 3D system, we have conducted separate simulations for the two dies. As you can see, we have modified the BEOL of the core die, with Metal4's parameters derived from the top layer of GF180, while the RC parameters for the ‘F2F’ via layer are calculated by the average of two PDKs' cut layers. To avoid potential debugging complexities related to the interaction of two different PDKs, Metal4 is not used for routing for the cache die. Instead, it serves as a bonding layer, where the routing endpoints of both chips converge." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "## 6. 3D Timing Analysis with TSV Modeling\n", - "### 6.1 3D Parastic Extraction\n", - "We extracted parasitic parameters based on chips' geometric dimensions and material properties of the TSV structure. In this model, copper is chosen as the filling metal, and the relevant structure and parameters are depicted in this figure:" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "The parasitic resistance $R_{TSV}$ consists of two components: the direct-current resistance $R_{dc,TSV}$ and the alternating-current resistance $R_{ac,TSV}$. The former one follows Ohm's law, while the other is determined by skin depth and proximity effect:\n", - "$$R_{TSV}=\\sqrt{R_{dc,TSV}^2 + R_{ac,TSV}^2}$$\n", - "\n", - "The external inductance $L_{ex,TSV}$ arises from the electromagnetic fields present in the dielectric region, making it dependent solely on the geometry of the interconnect and the dielectric material. The internal inductance $L_{ex,TSV}$ is related to the distribution of current within the conductor. The total inductance can be calculated by relevant literatures, where $\\delta$ represents the correction term accounting for skin effect and proximity effect:\n", - "$$L_{TSV}=\\frac{h_{TSV}}{2} + \\delta$$\n", - "Finally, we calculate the insulator capacitance $C_{insulator}$ by the coaxial capacitance formula $f(h_{insulator}, d_{TSV}, t_{ox})$" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "### 6.2 Timing analysis of TSV\n", - "We have developed a symmetric H-type equivalent circuit model, as depicted in this figure, which incorporates both signal TSVs and ground TSVs:" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "Due to the conductivity of the substrate material, $C_{si}$ and $G_{si}$ represent the parasitic capacitance and conductance, respectively, arising from electric field coupling. Additionally, $C_{IMD}$ is the capacitance of the metal interconnect layer, and $C_{RDL}$ denotes the parasitic capacitance of RDL interconnections. In this model, we solely consider the impedance contributed by the bumps." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "### 6.3 SPICE Simulation in KiCAD" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "v3sqOBn77kLu" - }, - "source": [ - "To investigate the impact of tsv on timing and RLC characteristics, we perform Spice simulations utilizing Kicad.\n", - " (ps: Kicad has been integrated into our environment but we cannot open its gui in this notebook, so we just put the code and simulation results here):" - ] - }, - { - "cell_type": "code", - "execution_count": 26, - "metadata": { - "colab": { - "base_uri": "https://localhost:8080/" - }, - "executionInfo": { - "elapsed": 580, - "status": "ok", - "timestamp": 1711026986099, - "user": { - "displayName": "Yifei Zhu", - "userId": "15764558996168935466" - }, - "user_tz": -480 - }, - "id": "W5PwiyIK7kLu", - "outputId": "dcc94b41-1da7-445c-8a91-dfdbc0d74b82" - }, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Writing tsv.spice\n" - ] - } - ], - "source": [ - "%%writefile tsv.spice\n", - "## take frequency of 80Mhz for example\n", - ".title KiCad schematic\n", - ".save all\n", - ".probe alli\n", - ".probe p(C_insulator3)\n", - ".probe p(C_insulator4)\n", - ".probe p(R_TSV3)\n", - ".probe p(L_TSV2)\n", - ".probe p(R_TSV4)\n", - ".probe p(V2)\n", - ".probe p(C_insulator2)\n", - ".probe p(L_TSV1)\n", - ".probe p(R_TSV1)\n", - ".probe p(C_insulator1)\n", - ".probe p(V3)\n", - ".probe p(R_TSV2)\n", - ".probe p(C_IMD1)\n", - ".probe p(C_Si1)\n", - ".probe p(C_RDL1)\n", - ".probe p(R_Si1)\n", - ".tran 31.25p 12.5n 0\n", - "C_insulator3 unconnected-_C_insulator3-Pad1_ Net-_C_IMD1-Pad2_ 164.343f\n", - "C_insulator4 Net-_C_RDL1-Pad2_ Net-_C_insulator4-Pad2_ 164.343f\n", - "R_TSV3 Net-_C_IMD1-Pad2_ unconnected-_R_TSV3-Pad2_ 0.00347282\n", - "L_TSV2 Net-_C_insulator4-Pad2_ Net-_L_TSV2-Pad2_ 6.19242p\n", - "R_TSV4 unconnected-_R_TSV4-Pad1_ GND 0.03\n", - "V2 Net-_C_IMD1-Pad2_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", - "C_insulator2 Net-_C_insulator2-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", - "L_TSV1 Net-_C_insulator2-Pad1_ Net-_L_TSV1-Pad2_ 6.19242p\n", - "R_TSV1 Net-_C_IMD1-Pad1_ Net-_L_TSV1-Pad2_ 0.00347282\n", - "C_insulator1 Net-_C_IMD1-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", - "V3 unconnected-_V3-Pad1_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", - "R_TSV2 unconnected-_R_TSV2-Pad1_ GND 0.03\n", - "C_IMD1 unconnected-_C_IMD1-Pad1_ Net-_C_IMD1-Pad2_ 4.11862e-16\n", - "C_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 1.27899f\n", - "C_RDL1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 2.79443e-16\n", - "R_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 27188\n", - ".end" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "UTQkhymp7kLv" - }, - "source": [ - "Signal delay detection is determined by a threshold set at 90\\% of its peak value. The figures and table exhibit the delay profiles for signal frequencies spanning from 25MHz to 2GHz, where the normalized delay signifies the proportion of delay to the time period:" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "ksIYK-hM7kLv" - }, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "q89AZQ6H7kL0" - }, - "source": [ - "| Frequency （Hz） | Time period (ns) | Delay(ns) | Normalized Delay |\n", - "| ---------------- | ---------------- | --------- | ---------------- |\n", - "| 25M | 40 | 0.60 | 0.015 |\n", - "| 50M | 20 | 0.45 | 0.023 |\n", - "| 80M <-our design | 12.5 | 0.41 | 0.03 |\n", - "| 100M | 10 | 0.40 | 0.04 |\n", - "| 500M | 2 | 0.30 | 0.15 |\n", - "| 1G | 1 | 0.26 | 0.26 |\n", - "| 2G | 0.5 | 0.18 | 0.36 |\n", - "\n", - "Notably, as the frequency increases, the delay introduced by TSV becomes increasingly significant, particularly exceeding one-third of the entire signal duration for frequencies above Ghz.\n", - "\n", - "We have integrated the corresponding delays into our design flow by 3D times, ensuring that subsequent steps such as CTS and routing take into account the influencing factors of TSVs." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "## 7. 3D Thermal Simulation and Signal Integrity Analysis\n", - "### 7.1 Thermal Modeling and Simulation\n", - "When stacking chips, a major issue arises as to how to dissipate the heat generated in the middle of the two chips. Hence, during the development of chip packaging, engineers should employ CAE calculation and multi-physical field coupling simulation to analyze heat flow within the packaging. This allows them to manage heat transfer paths, reduce chip die temperature, and enhance thermal reliability.\n", - "\n", - "In this work, we divide the core die and cache die into 30 module grids and 5 unit grids respectively, as shown in the following figures:" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "Core Die:\n", - "\n", - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "Cache Die:\n", - "\n", - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "We proceed by computing the number of active cells in each grid and allocating the overall power consumption accordingly. For thermal simulation, it is imperative to extract critical parameters related to the 3D stack structure, encompassing material properties, electrical characteristics, dimensions. These parameters include chip thickness, thermal conductivity, volumetric heat capacity, package model, floorplan/stacking information, and etc. Subsequently, we establish a model of the external environment, configuring factors such as heat sink, heat spreader specifications, ambient temperature settings, and so on.\n", - "\n", - "HotSport, an open-source pre-RTL thermal simulator, serves as the primary EDA tool for executing this step. Within our simulation, we have established five material layers to facilitate the transfer of thermal effects: heat sink, heat spreader, cache die, core die, and package layer. The geometric arrangement of these layers is depicted in the accompanying figure:" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "We use HotSpot to do that simulation, a demonstration flow is shown here:" - ] - }, - { - "cell_type": "code", - "execution_count": null, - "metadata": {}, - "outputs": [], - "source": [ - "!mkdir Thermal_sim" - ] - }, - { - "cell_type": "code", - "execution_count": null, - "metadata": {}, - "outputs": [], - "source": [ - "!cp -r ./Open3DFlow/thermal ./Thermal_sim" - ] - }, - { - "cell_type": "code", - "execution_count": null, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Overwriting Results/script2.sh\n" - ] - } - ], - "source": [ - "%%writefile Results/script2.sh\n", - "#!/bin/bash\n", - "cd /Thermal_sim/\n", - "git clone https://github.com/uvahotspot/HotSpot.git\n", - "cd HotSpot && make SUPERLU=1\n", - "mv ../thermal/ ./examples/\n", - "cd examples/thermal\n", - "sh run.sh\n", - "cp outputs/*.png /Work_dir/" - ] - }, - { - "cell_type": "code", - "execution_count": null, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Cloning into 'HotSpot'...\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotspot.c\n", - "hotspot.c: In function 'read_names':\n", - "hotspot.c:190:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 190 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "hotspot.c: In function 'read_vals':\n", - "hotspot.c:224:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 224 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotspot.c > hotspot.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c microchannel.c\n", - "microchannel.c: In function 'microchannel_build_network':\n", - "microchannel.c:296:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 296 | fgets(line, MAX_LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "microchannel.c:324:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 324 | fgets(line, MAX_LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 microchannel.c > microchannel.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c materials.c\n", - "materials.c: In function 'materials_add_from_file':\n", - "materials.c:31:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 31 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "materials.c:82:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 82 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 materials.c > materials.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature.c > temperature.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c RCutil.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 RCutil.c > RCutil.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c package.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 package.c > package.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_block.c\n", - "temperature_block.c: In function 'read_temp_block':\n", - "temperature_block.c:631:4: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 631 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c:659:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 659 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c:677:2: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 677 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c: In function 'read_power_block':\n", - "temperature_block.c:744:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 744 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_block.c > temperature_block.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_grid.c\n", - "temperature_grid.c: In function 'parse_layer_file':\n", - "temperature_grid.c:631:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 631 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'count_num_layers':\n", - "temperature_grid.c:770:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 770 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'read_temp_grid':\n", - "temperature_grid.c:1573:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1573 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1605:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1605 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1623:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1623 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'read_power_grid':\n", - "temperature_grid.c:1709:17: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1709 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1733:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1733 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1742:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1742 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_grid.c > temperature_grid.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp.c\n", - "flp.c: In function 'flp_count_units':\n", - "flp.c:1015:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1015 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_blks':\n", - "flp.c:1070:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1070 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_connects':\n", - "flp.c:1138:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1138 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_create_grid':\n", - "flp.c:548:43: warning: '%d' directive writing between 1 and 10 bytes into a region of size between 0 and 511 [-Wformat-overflow=]\n", - " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", - " | ^~\n", - "flp.c:548:39: note: directive argument in the range [0, 2147483647]\n", - " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", - " | ^~~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 3 and 523 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_wrap_rim':\n", - "flp.c:722:38: warning: '%s' directive writing up to 511 bytes into a region of size 503 [-Wformat-overflow=]\n", - " 722 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 10 and 521 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:736:38: warning: '%s' directive writing up to 511 bytes into a region of size 502 [-Wformat-overflow=]\n", - " 736 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 11 and 522 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:752:38: warning: '%s' directive writing up to 511 bytes into a region of size 504 [-Wformat-overflow=]\n", - " 752 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 9 and 520 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:766:38: warning: '%s' directive writing up to 511 bytes into a region of size 501 [-Wformat-overflow=]\n", - " 766 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 12 and 523 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_connects':\n", - "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 1156 | x = get_blk_index(flp, name1);\n", - " | ~~~~~\n", - "......\n", - " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 1157 | y = get_blk_index(flp, name2);\n", - " | ~~~~~\n", - "......\n", - " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp.c > flp.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp_desc.c\n", - "flp_desc.c: In function 'desc_count_units':\n", - "flp_desc.c:51:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 51 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c: In function 'desc_populate_blks':\n", - "flp_desc.c:103:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 103 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c: In function 'desc_populate_connects':\n", - "flp_desc.c:155:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 155 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "......\n", - " 172 | x = desc_get_blk_index(flp_desc, name1);\n", - " | ~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp_desc.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "......\n", - " 173 | y = desc_get_blk_index(flp_desc, name2);\n", - " | ~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp_desc.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp_desc.c > flp_desc.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c npe.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 npe.c > npe.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c shape.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 shape.c > shape.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c util.c\n" - ] - }, - { - "name": "stdout", - "output_type": "stream", - "text": [ - "util.c: In function 'read_str_pairs':\n", - "util.c:334:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 334 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "util.c: In function 'count_significant_lines':\n", - "util.c:540:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 540 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 util.c > util.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c wire.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 wire.c > wire.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotspot hotspot.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotfloorplan.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotfloorplan.c > hotfloorplan.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotfloorplan hotfloorplan.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", - "rm -f libhotspot.a\n", - "ar qcv libhotspot.a microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o\n", - "a - microchannel.o\n", - "a - materials.o\n", - "a - temperature.o\n", - "a - RCutil.o\n", - "a - package.o\n", - "a - temperature_block.o\n", - "a - temperature_grid.o\n", - "a - flp.o\n", - "a - flp_desc.o\n", - "a - npe.o\n", - "a - shape.o\n", - "a - util.o\n", - "a - wire.o\n", - "ranlib libhotspot.a\n", - "Computing steady-state temperatures...\n", - "Parsing input files...\n", - "Creating thermal circuit...\n", - "Simulation complete.\n", - "Computing steady-state temperatures...\n", - "Parsing input files...\n", - "Creating thermal circuit...\n", - "Computing temperatures for t = 0.000000e+00...\n", - "Simulation complete.\n", - "succeed\n" - ] - } - ], - "source": [ - "!docker run --rm --name thermal_sim -e DISPALY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Thermal_sim:/Thermal_sim -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script2.sh && echo succeed\"" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "The following figures show the thermal simulation results of cache die and logic die respectively：" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "- Core Die:" - ] - }, - { - "cell_type": "code", - "execution_count": 21, - "metadata": {}, - "outputs": [ - { - "data": { - "image/png": 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JCT3S2dKdaGm9ydS/Gna9hzqMog2KiorQ6XRkZGQAwsGZl5fHxIkTOXLkCOXl5SQmJjJ48GDKy8vJzMwkJiaGAwcOMGbMGI4fP87YsWPJzc1lwoQJOBwOiouLg83SiIgIEhMT2b17N5IkYTKZGDt2LMeOHWP48OHo9XoOHz7MlClTKC8vx+FwNPHTKIpCbm4uaWlphIeHc+DAgaBTPisri8OHDzNt2jQqKyuDvrScnBzS09N5/fXXmTRpEuHh4cER9larlb179+J2uxk/fjzh4eGUlZUxbtw4vF4vBw8epKGhgYSEBNLT0wkLC2PHjh3ExsYyYcIEdu7cGRwHNm7cOI4cOcKECRMwGo1YLJZg2hMmTCAlJaXD44lsNht79+7FarUyYsQIhg8fjsvlYsuWLdhsNgwGA7NmzSI8PJz9+/fT0NAQvKZDhw6RkZER7J2tqamhoqKCsWPH4vV6OXDgALW1tVx88cXExcX1qzFOAWRZ5tmnnmLFG2+0aoHJ4eF8c/BgE4vrPKLVH6VPBExRFHw+X/DNHnhoWjuu0r3IssxLL73E/PnzmTZtWl8XR6UdAgK28o03WrXAvOHhfH0BClifNCGrq6t599130el0PPXUU2i1WhRFYfPmzWzatImYmBgee+wxdTJwDyFJEj/60Y+Ijo7u66KodJCAD0xtQjalTwQsMJbq3XffDTqBPR4PX331FT/5yU9YuXIlR44c4eKLL0aWZaqqqnA6nXi93mAXsUrXCZ20rdL7hIWFMWjQoA63NHQIP1hLtD/E9fykT9RAp9MRERHR5IeTZRlZlomOjmbQoEE0NDQAYlrDvn37KCsr45NPPmH69Ono9fpeK6vZbGbbtm1ce+21vSqeVVVVHDhwoNnocC+wEeg54SkpsVNQYOHKK5PpzRa82+1j/fpy5sxJJjy89+6z3e7l66/LufbaFIzG1uSh+7HZvHg8l/Hyy693SMAkhHi1VsILdTxUnwiYLMs4HA48Hg8ul4vq6moiIiLQ6/WUl5dz6tSpYC+VTqdj3rx5+Hw+Tpw4wZNPPtnqOKCe4NSpU5SVlfHkk0/2apP2yJEjOBwOfv7zn4cItgMoBep6LN/t26tYt87N009notH0noKZzR6OH6/gscfSSErqvbl2VVUuCgoqeeKJDGJieu/FWFHh5N13O9fwa8sCUwWsFwlMV6itrWX9+vVoNJpgrPbly5eTnp7OmDFjgLOjI2g0ml6djxXIK5B3bxE6p60xX6nZ357IN7BJvSpggXw1mt7PF0CjoU+ut8PnowpYS/SJgEVHR/OLX/zirOMpKSn9ap6Vikp/IjASv7XPLkRUj3i/xwJsQ7hpPfSk/0ul/yIBeloXKlXAVPopFmAV4Ovrgqj0MYF5j81RUJuQKv2KC3VUj0prqL2QLaMKWL9ERlhde4C/oFpfKtC6BQaqgKn0O8qAeuAkF+7jqRIgYIGpTvymqALWrzgE5COakOY+LotKf0O1wM5GFbB+xUFgg///hr4siEo/I9AL2dpQW9UCU+kjbMBp//89N8JeZeDTWhNS7YVU6UPygVf7uhAqA4C2RuKrFphKDyPT8iBUV28XRGUA0p4TX7XAVHqYUoSl1XyMV/+Nw67Sv1Cd+GejCliv4UP4uNRBqiqdJzCZWx1G0RRVwHqEDcDhZsfsqOKl0hU624Rsb9Hg5p83X8W8re/2F1QB6xFOAvv6uhAq5xHnMoyipKSElStXYrfbueWWWyguLmbt2rW88MILpKSksH79evbu3Ut4eDiPPvpoMMS4LMt88cUXHD58mKeeeorf//73OBwOxowZwx133NGrAUXbQxWwbqMC+M7/f1lfFqTvURSoKwFPJzooLD5wWKCqCJRueiyN4RCb1j1p9QPamgspKQp1dXXU1NQQExODTqcjJSWFBx98kJ07d7Jz507uvPNO9u/fj8vlQlEUtm/fzp133snatWupqKggOjoaRVGC62bW1dWhKAo1NTWMGTOGyZMn97uQ7v2rNAOak8D7fV2I/kNZLtg7Ma7NihgSV1Ir/nYHMSnnjYC15wNTvF4+//xzMjIyuOWWW0hMTESn05GTk8PXX3/NddddR3R0dJP1NjMzM/noo4+w2WxERkYCYpX35cuXc+WVV7Jq1SqcTiff//73cTgcvPfee/z6178mLi6ux6+3o6gCpqIyQGjLB2bU67nvvvuaLKvmdDqZNm0a0dHRrFu3jquuugqv14vb7cZut3PixAl++ctfsnr1avLz84MrtScnJ7N7927y8vIoLS0lKysruJK7w+FQBWxgUwosb+H4eTSKvr4M8sxd65t3WbutOOeMrRZObG37nFoZLPWQvwOiOnHBg0dBdHLXytcJ2vKBBUbiB0KQBygoKOCzzz5DURRuvPFGNm/ezIkTJ1iyZAmPPfYYV1xxBYsXLyY8PJzx48ezbt065s6dyyOPPILFYiEmJob09HSWL19ORUUFEyZMYNCgQb1zwR1EFbBOY+O8d9A7rVDfMPAHF3ldUF/a9jkNgBtocHQualF8RhcKdm60FdCwJd/YuHHjGDduXHB/woQJXHPNNcH9m266iZtuuim4f++99wJCCKOionjkkUcA+MEPftANpe8ZVAFrk++AHIRT/hvABFT2aYm6jMcJtSWtf15nEU54lbYxV4DPe+7fr/aAb3CHT5cQ75POBDTsynCH/jRUoi3OawGz2WzodLomjktFUTCbzURFRXVglaFNCOHKAz6ko7fLYvFgMmnR6xvTVxSFhgYP0dH6Hlv9xu2Wcbt9REY2NjQURcFu96HXSxgMWnDboHhv64mU0+nhak43yDKEh6yGpihgdYDJAPoeesocLlGxTY0/L4oCFjtEmEDbQ6M7bQ7QnynCoC9qkq/ZBlHhYoWjdqkBvFM7la86kPVsBnojoU3WrFnDwYMHmxzz+Xy8+eabWCxVQElwczoLWLbsz/z5z7/H7S70H3ecU77//OdJ8vMtTY55PDJ/+MMxXK6m7ZQzZxz85S95LF6cR0mJvc0BhO1x7GgDyz88Dvb6xs3RwOrlx8nZWyr2ncI35fPBun/Dm8th/U7wdWFp5z1HYN2OpscU4B+fQ3H52efLMny+HT7bfu55Any9B7Yfapa2AotXQXWzaERWB/xhidi27O9avqs3w3f5TY95ffDGMpFPKIoCe3LhTyvgm73i2s+F0LmQLW3ndUVugwFlgRUXF/OnP/0JgFGjRlFUVMSYMWPIzs5mzZo1xMTE8MADD3DgwAG2b99OWVkZ2dnZfPDBB9x+++3s2bOHpKQkXC4XPl8en376PLm5DYwbF8PcuYO55BIrb711Aq93PwaDjsCC7QUFVv73f0/g9SqMHx/D8eNmLr00kYgILRs2lJOcbOK++7LYsqWSQ4fqKSy0cvnlg3j//UIWLMjiq6/KGTs2GpfLh8ej8NlnpygstDJtWjxTp8Yzb14qJSV2Vq8u4YknRgbXC7RYPLz22lGMRg3x8UZkWcHnU7jppjSWLSvG5ZK5++5MJAmWLi3G5fIxyHWcr/7vMNmpoNfCkUJw14JPC/sLYeMeiIuCe66Bi8fC5FHwuw/hknEQL8YxUlUPv/9QWBJpg4RlERkO35sKSzeI9Qzvnwe1Zvh4M1jtMGE4fLJFpFPbANX14PaICvvvQ/Dv7yAlEe66GgpLYUeOyO+GWY2/b3U9vL0SwowwNA3OVEN6kijjR1+L4w9cDwWlsGEX1DTANZeKMs27DI4Vg07bmO9Xe2D/MRiWBpdPhrwSuPdamDBMCEvgPp+uhP/9l9gfnQWFZTB+KGQkw5qt4n4tvB72HRXlLq2EERnw98/gzqthZw6kJoLLI14Ea7fC0ZMwfhhMHAErvoQ5l4hr6krLTJ0LeTYD6rotFgtOp5Obb76ZL774gnvvvZevvvqKDz/8kFtvvZXIyEg2bdrEp59+ysKFC4mLi0OWZXJzc/F4HJSUnKSurhqQOXWqgTVriklPN7J69UnMZidZWeHo9RLCm+sj0Jaqr3djNGqYMyeZjRsruPfebNauPc2KFadYuDAbm83Lzp3VbNpUwQMPDMFk0qIocORIA16vQmGhFatV+EuOHm1g06YKUlPDWLq0GJ1OIi0tjPx8C6NHRzd5wN1umRMnLNx3XzZbtlQwc2YilRUO/v73AoYNCWfunCRW/quYj1eXcM2cJCaMj8bj8lF8RqHBomC2KhSVKaAoOJwK769VGBSnkJMPB46JyvTuGtHMC23+OZxw8gwsnAfrd8F1l8HRIvi/T+HicTB1DKzZAis3wu2zRcX0+qDgtGheVTfA6SqRVoMVPvhcCOG/D8G3R4XFd+10ISJyiMHpcEO9Be6ZKyy6O74nxOHvnwmhyhwsyrPqG7jvWkhJEIJxvFiIR3kNVPk7gytqYfmXQgDX74Q6sxDLojJxzd4QQ9hqB48XbrpcnHvftUIgP/xClMFkEFbbZ/8W9yQmUpQ9t0h871SFcB2CuG+fbhf5rvpGvECOFovPP1wnxPVcCO2FbGm7UJuQA8oCA8jIyCAxMZG0tLRgl67T6SQmJobY2FhsNjEKMjo6mtjYWP8K0+W4XM9jNuehKAnASez2QiIidAwZEsGiRcOJitIjy/g3BUVRgo5MjUYiIyOChAQj6elhJCUZcbtl9HoN0dF6YmL0WK1edLrGfRAC4XL5sFg8Qb+41eolNlbP8OGRjB4djVarYdWqErRaidmzk8663sGDTSQmGklJCWNQgo5oVwmnC+3EDTYQZ5RwnXLj1UDcaAMWs0yppKDTCr+U09XYNPTJ4PVC1mAYkQ6jsiA6An6+AF5bAmVVQogCpA2ChFhhWQyKhTATNFggPkrIut0lKm9sFMTHgN0pfE4uN5itoPjzdXsBSeQ75HphyVXWi8pdUCosm+T4xnzTk/35DoLEONDpRLMsNkr4tvJLxG8UEwVx0eIeazUi3warKCuIfYMehqTC0JuFoAxLFwLywrvi3gR8c5IkxDExFtKSYFCcuEaXW4hVbJQQZo0EMRFiX0JYqC6PsFAD2J0QGSbyXXQr6PUweSTcfAW8/L64H0bDuT37akDDsxlQAub1ejl27Bjx8fEUFRWxadMmSktLyc7O5plnnsHhcHDbbbdhs9l48sknKSwsRKfTYbdX88tfHqW42IbPl8bJk7WUluqpqXHx4YcnMRo11NS42Lq1io0byzEYJGbPTkank6isdGG1ejl8uB6Hw0tBgZXNmyupqHAyeLCJJ5/ch9Xq5Z57sjhzxsGTT+7j2DEzWVkR1Ne7efbZg+TlWUhONnHqlJ3aWjeFhTb++c+ThIXp2L+/lr/+tYCZMxOprXUzfnwMkgRFRTYqKkT8sE2bKigutrNtWxUnChwkRHh4/QMPBp1oXmkU+NXrbpwuUVFHZgrflqJAcgKEG4XDOyJMWAFGA1wxSVhDHo8QlCOFwnrIyYfyWjAYYPM+OFUOWw5AUaloUr30f+K3uHKKqMBPvSGakpNGCnF6+X0hOOOHCkGJjQKdBj5YJ5q010yH2VOE1eLywOECkbfNIayvgtPC2ik+I/IvLoehqfCrxUIw588UYvzkH6C0SjTNHC74z79CZa0oV2GpaAa63PAPf74zJ4rrcHuEtbn7iCh/vUUI0LGTQtCLykS+ZVVCdJ96U4jSnd8Diw2e/KMQ3jAj2B3w3NuirBpJ3L8zVcIK/OcXQkCvvliU56d/FAK/K0f8rTWLcneUwEh8NaBhU6R2nMb9pj/d6/Vy333Xk5FRhsmkw+v1odPp8Hq9aLUaPB4PGo0GnU6Posh4PB4kSYNOpwVkPB4vGo2EVivh8ynodBKyLJzrWq2ETifhdsvIsrC4DAYNkgQNDR42b67g2mtTMBg0yLKCVqvB6xXf83hkNBoJnU585vXKSJJIT1HA65Wb5avB51OC39doRL4AOp1IR0KhMq+IfTkOvjdNwmCQ8HoVdFoJn09GI4kmkKKISgKiYkqSqJRaTci+BAT+IkQAhPXh9QlrRqcTIgNCWPJKhMDp/OfotMLpr9EIKw6EZaEoIr2AFSRJYl/jL4eiNPbIub3CStDrRWWUFX/e/prn8ohm49XTICqiMV+vT6QdyEev61i+Wq1I3+MVx3TaptceuB82J3y5SzRpw0ziOsqbCtQAACAASURBVLXN8tVI4l6E5hsod+BzrVYIqy4kX61GfM8ni/T0OtD687U6QEp6mNdef7fd3nBZlnnlqacY/MYbhLdyzq7wcH588GCTkfjnEa16DgeUBZaVFc5vfjOGiIjeK/apU3YsFg8vvDCe8PBeyldROLK2lL/4HPzXDxUMusB7pOffJ9sPCSH5fz9qrOS9gdkmrJ5fPghJvThTpapeWG7/+QPRPOwtKmrh3R3tnxegvbmQahNyACAsDKnHxlG1RODlKHxpPZCv2wHWqqbHFAVJ9gQtqA6NK+omJElUFqkv8u2j66UP73NnUH1gZzOgBOy8xF4H+f8++7i794ui0n9pLx7YhVqRL9TrVlEZcLTlxFctsB5EURR27drFjh07mDJlCldddRWSJLFv3z42b96MxWLhkksuISUlhc8++4yYmBjuvvtukpN7b7Z/j+OyQdnhs91YbnufFKfTWIFd9JwbzgmcAbYAkT2Q/iggswfS7UXUVYnOplcEzGq18sknn7Bo0SLeeecdxo0bR1JSEhdddBGjR49m8eLFREdHU1pailar5corryQhIQFoOzb3gMLrhqrCvi7FueMCcglMTuh+3EA9cBwxZ767SWRAC1jAid9aOJ0LdRhFrwiYzWYjIiKCrKwskpKSqKmpISkpCb1ej81mo7y8nEmTJlFRUYHP5+Pjjz/GZrMxY8YMfD4f27dvp7y8nOrqaiC1N4rcNaw1wuIKxd0P4mM1pxaobnasBBHaLI+mXmYL/WhQzTlQBZxo4bjZv+VDi2MUEoH4Fo73AWoT8mx6RcCMRiMulwun04nVasVgMOB2uzEYDOzbt4/Ro0cTERFBZmYmWVlZxMTEkJuby4wZM9BoNGRmZhIXF8f27a2NgulnVOZBdVH75/U1BUDz/oNKRPSgdXS+m6w/k+vfmuNExKj8EmhphPwM4JIeLFcHURe2bZleEbCoqCiGDx/Oa6+9RkJCAnV1dRQWFnL11Vdz+PBhbrzxRgB27drF7t27sVgsLFy4EACNRsPQoUPxer1ERPQzAVNkEV+reTNX7kxkvB5CRsRebMtqUhcFbx8XwkLrbqx0ujne2VWJLgR6RcB0Oh0LFy7E5XJhNBqRJAlZFiPWf/SjH2EwiFff9OnTmTJlClqttkkMr36LxwlHNpwd2K4/CJgVWAa0FXOvHxSz33OAxsWmuhMHkNLx0wMWmNqEbEqXBCwQHHDPnj3k5eWh0+mYMGECkydPDgpVMCOdrsmSTFp/tLlQodLr9f1qzbkWCbW2FEWIl9yFyJzdQUtWlgJ4aFvAVNpHpmc6Ljx02qeojsQ/my4JmMfjYdWqVSQnJzNr1ix8Ph/5+flUVlZyww03BEXqvMLRAEV7AEU0IftavEBEvT7S7JgPVbzOI9qbSnQe1rQO0SUB0+v1LFy4EEmSqK6uxm63M23aNFJSUjoQrnmA4vOAraavS9EUC2JdXZXzGtUCO5suCZgkSej1elatWsXBgweJi4vDYDDw4IMPYjL1xGCeXqbmJJRVg70WSnMgTBJzF/sKL7Cfs6cZtbPwjsrA51x6Id1uN9XV1Wg0GhITE7Hb7ZjNZgYPHoxOp8PpdFJdXU14eDhxcXFNXD4OhwO73U58fHxw3+FwEB8f368W/OgWJ77H4+HOO+8kMzMTSZIID+9nvYXnSt1pqCwBO3CmAcL6uDw+4BDdt3K1yoCiswNZKyoq+Prrrzlz5gyTJ09GlmU+/PBDXn31VTIzM3nvvffw+XycOXOGn/zkJ6SmijGWXq+Xv//975w4cYLf/e53APztb3/j1KlTvPLKK0182X1Nt5QkKiqK3/3ud6SmpmIymXjqqaeIiYnpjqR7H7cDnP5+c08fjTNQEKvWWIHTNP5KHgZcz6HiBU8t7TqsPV6QneCpArcBJA3oEsRflfYDGmoQhoTH40Gn0yFJEunp6Vx++eVs3LgRm83GrbfeyuHDh5Fl2b9alZ3s7Gyqq6vx+cSDpSgKO3bsICYmJmiIbNmyhYSEBP9A8v5FtwhYSUkJL774ItnZ2QAD23nfcAaKdvdtGRRgD2Kg6ccMaAeHzwH1m2lXeM3415etEFaGJgzi56sCFkpbPjDZ4+G9994jIyODe++9NziP2Ofz4fF4cLvdTVbulmUZjUaD1x+h0uEQrpGGhgaWL1/O1KlTyc/PJycnh1WrVjFt2jTy8vIoLy8nPT29py+1w3SLgBkMBl5++WUyMzMxmUw8/vjjREdHd0fSKioqtO8DM+r1LFq0iBEjRgRFqrKyEo1Gw7Bhw8jNzaWmpoaamhpOnz5NfHw85eXlXHvttZSWllJfX8+BAwfIysri0UcfpaamhsjISAYNGsSjjz5KVVUVkZGR/c633S0Cdscdd3DFFVcEwzqHhfW1s6gDOC1QVXD2cXvD2cd6kjrOHgKh0C/8XIoCjuOiaXeuyG7OaRyV4gFbTvdZYIY0MAzqnrT6ivaGUWg0mia9/263m927dxMeHs73v/99CgoKSEtLIz8/n7Fjx/LII4/w7bffMnHiRCZOnMjevXvR6XRMnjwZp9OJwWAgNTWVjIwM7HY7ERERQad+f6FbBGznzp1s2rQJk8mE0Wjk8ccf7/8DUl02OHO0r0sBDUBLC2X3YWdnEAUcBeDriak07WXtFeLZXWjCBraAnUsvZEZGBvfff39wPzExkUsvvTS4n5CQwOjRo4P7M2fODP5vMpm44oorgvvh4eHMmhWyiGc/oVsE7MyZM/zwhz8kM1PEK+l3PjB7nQhn0/xYX+EDyhGWSVU753Yzsge8ta1/7q0Hnx08FSApQkjOB3wWcLcwVs7jFhamuwrcgWXW9KCL69oitD1Ba3Mh1XA6XSQjI4MXX3yRjIwMTCYTTz75ZP/ygZUcEs75/oIb+BQRCaGX8Zmh/pvWP7cg5i/XFw/ovoOzcOSJrTkNNHYeBDpK9YMg9upeLFwHUOdCtky3CNiJEyd4+umnSU9PR5IkIiN7IqRmK8i+9qfzKD0Vha8dFIQaNB9C4GzhWHdnrYDSQlx95RxXhr6QUGRx7zr9E0nCeusRy00CSdtyhCMFLlgF6xYBM5lMvP/++2RnZ2M0Grn//vt7T8TMFVC4q8WPrA6xTp9J21hrFUUsZhoT2XOr0JhtYjl6g4QYBmEWD1mdG2INYiHanghl4/KBS4ZoPch2qPsaFJ/oD9DjD3fVA1ruRLSKQ1clUxDWXBith4DpKnZEhQ7tMlIQQzIiOfdmlbcWaj5v/fMm9zP0eCxkXtWDTc+2aqsqYJ0nEO75uuuuCzoHtVotBoMBRVF6Z8qBIoO3ZTVYsxGGp8Ol4xuP+Xzw5gr42QIhYgGq6uCf68HhFCtYP3Z746KxneWfX8DsqTAmA1G7HeDxwR8Pw6/GQejykk4frDwFVS6YOQgujj/3CnDMDHtq4NHhgAKySwjYp8BoYGLIuTKwA9EBOgq4gnOvAwcQgV1vDDmmAP8CvgcMCTnuBb5BxBb8AUL09vjLUkHnrJ5tiOjTV4Yck4EPgAVAqM/eDaxHBJx9GPHgr/eX/Sz7XQGljRfM58AIYFKz6/qLA37lg+iQG+nwwsoSaPDAD4eD1QMr/L+3ZXDHrzU4krU1LlAnWJejUSxfvpzs7GxSU1Px+XwUFRVx4sQJ5s2b1+1TDk4WmvnDi7loNBIjMsQq0qNSXQyNhU+2iKXhH7oB9h0TC7SeqYYhqfC3tXDXHNh1GAbHi1HfPll85+hJGJMNN8yERbeKc44UNq68DJBfAm8sFysujxkiVq6+dBxEmODL3TAoDh64Hjbthe/yofA4XFEL7zbA/QbYcBrGx4BbBo8My07CSRtMjYe0cCiywW3psKwYpsSBzi9gZg/8zxEwaSHOICq3V4Zb0mFpsbC27skUo9eXFoPLC4luWF0CmT7AJ4TC/y8HEZU+GpgHbAQWAe8Dw4HA8MRq4A3Ew5GEsHTCECK3ClGX7kSMAFmHsEjGA58BU/3HaxATB2RgJ/CtP62bgQmIQLABjfjKn95G4C9AFJDhL0cyQnjXAEbgHqAI2OTP53sIoZyLiBitC8n3G+AwIhT+PH/ZdiPExgBchAjEWgK8gxDwYf79UUAaQuSi/fkeQHQYlwNDgSXALQgBTgGcdqjdBp9KYgzySOB7Cox3wDseqDkt3rczXWL9knWT3MEBpR1CS+tRci9QC6xLl63X67nmmmuorq5mzZo1rF+/PrgoR0/0RFrNbuT6Cu6YWs7Gr8t5YEY5m7bW8c/1QqDiomHTPrGy9EM3QmKsWML+xCnwesXKz/UWkVbxGfh0G6QNgrVboc4imn27DsPVFze1ghqsEBUulp/fdhC+fz18th1WfiPy8Xhh53ew9SA8fCNEmkApg+OHRfCKYhvY/K/5o2bYUgWpYeJNHKmDSie8WwDZEU1Xw/bIQugeHAo7quHKJNEM/aAIRkXD9SmwqgQ+rYcrymF0NTjMUFwOtVViJlJgnrcTWA4kINbNOIqoxFv8+6GTRJwIa2gBQmjmIkRjOSK68lRExf4cUYGHIUThFGL0Rz2NwTHMCIEZjKj8RYjKHhgO2QDE0BjbzwrcAWxFiN1BYAUwB2HJbUKI5t2I1RFkf5ou/zUEOlirEKKXAmxGRMpOpbHZpw3ZtyF0YT5C4O/2578KuBUhqDsRgrgAiEO8TAr8133Gf52KFwoqYF05xJfDmnKorYBkM2gcohdUVwVJZsgzg1en77h4hS4M2dKmWmCdR5IkBg8ezG233dZd5WknQ0hPgvhoSB0ECbHisMsNkWEQHQ4O/2s9MkxYZBLC1+V0Q721sYnidIvPR2cJCyw6AirrwGqHoWlNBUyj8ecbIwQvMVaIFjrR3IwMA3sl6KohIh8inYBR5O30CUsqkK/dCwkGGBMDE2KFuI2PgRvT4M3j4FX8vjM/SSaIN8BgEyTqwWSBUhuY3KKJa6sCjUdUsmjEG0mHqNBOGl1eMqIMQxHWxRCE1VSOsFyaz1xNBmIRVlM8QnACviUQTTKvfz/an1cg3waEqDQgmojVCH/YWISw7EVU+kP+tIqAfQjxAjjpL2ux/7uyP58ohEApIfsg6m4g38SQ8pkQ4jocIdyB2IQ+fxqBvxJC6OIQQhvvP+72lz8SIcxSyD7+e+3yX1sAp/9+DEdYYBH+fELz/hoxxTW2s74CLRespdUa/WdaeQfw+kTzLiocCk7DV7uhpAKyU+Bnbwghu202WOzw+O/hVLmwaGx2eOYtOF0pLLHCUmGBVdbBO5+AUQ/Xz4T9x0TTcsv+xjyr6kR6B08I5/yJU/DVHtE8TUmEx38HdifcPQ7KjsHjRyHPAulDodYNT++HAiskGoU1VeEUn7+XL3xhk+JgXRnsqhFNx43+Mp+0wRmnsCC/LBfNzG/K4UgZxLrhD1XixTsRUTFeQlS4FESl/cJf/iRERbYimmAfIqyOmYiFeMoQ9aIAIRzHENaTDmGdnUJYJUWIJtVriIo8w5/+rxHCNh5Rsf+AsGhsiMpd4k9vqT+fbIQo5fnzGuLPez9CsIz+9I4iKvth/zW95N+fg2giPoewqi5HNHFfRjRbZ/jLmokQnX8g7tNsRBNwi//7l/vz3I0QxWOIZvJJhMVWhmjG/qf/Om5ACNVz/msKWG6/RVi5AcE97b/eD2n0z+1AWHQahLC9C4wBEhwOfD5fx60wHa03IQfyilFdQGpn3cUO3ZaGhgZ27txJfX09er2e66+/vtunE3m9Xu6/6yqGRP0bo0EIjVYjnPIajRA3SRK+K0Vp3Nf6n43QfVkGrVaIg9crvq/TiuOSdHbzcdM+mDcDDDrxnWC+gLdSCI7WAXI5+BR/PpI/4nTIvqw0/vX6/9dK4n9FEQIWyLvSCXtrYc4g0FhFOhoFXBWA3Dg3OvAGCjiiNf7Ni3jWA5cihZwX8AcHLIPQelGKEJSZCMEJjLP1haTbPF/J/5kUsl+GqPiBdAOWoAbxUCkh+yBEpRAhaAb/5xoara/EkHIrbeSrCfmu3v/dwPe8/vQCrTEvQoS2IprJJv91aptdr8Z/TAnZD5Q7dF/2nyeHfF8bkm/ovg2IeOgh/vjee+0KmCzL/OnZp3hoxRvEtHCqAiyRw7l040FGjBjRZloDlFZN1W6xwFasWIHJZCIjIwOdTtdj0VgzB8Ov7xLNtt7iVLloev76IeG0b4IV8ap1I9oz3ThV5XAD/CUf/nMIWL6k5xaUbcZuRBPnGfwVg0a/UmfobLwCF6JST6fl5RnPpWM2C+HDaosaxPX9BNH06y0qgVWdbUK2FU/nAh3f1y0CFh4eTmJiIpmZmWi12h6bSiRxtoXU0wTykmghX4mmNmo3litgPUlS7y/PGGq5dSWNcz2/O6+3o2l1xzV3hk7nFTAjW7MNBlicuO6iWwQsISGBPXv2kJOTg9Fo5OGHH+7d0fi9iZXGFZ5d9IhlpCjgKgNvHTiK6PlR+wiflAVxaeUI/xD0yWynbsOM6BxoiwEVdlMVsLPoFgGbMWMGFouF+vp6LrvssvMnpHRLmBFOk55EAddJ8DSAvbrlBaO7m4MI/1cJwnG/lYG/MHcd7f9Ul/VGQbqD9kKynieT7jtLtzirVq9ejUajYcqUKaxYsYL6+vruSLb/EAjxXImoFT2Ezy7CL3vrxAj6nsCDuIzQrYoL1oWCBWFlVtF4P+rop5162ja2C3R4RbdYYC6Xi8zMTOLj49HpdMhyH02e7ik8iFGRXnr0ybYfBYe/edpTLYJaxILdzemXFbYX2IMYOrESMYQDxHCRO/qqQK3RkaD4FyDdImC33norK1euZM+ePcyePZu4uLjuSLbvCSwOq9C0778bUQIjKqHHehpDB232sAYPWAIDfQP/B1pk/cq4UQXsLLo8FzIvL4/6+nrCw8MJDw+npKQEl8t1fvjBtiJWvS5GDNPugc5VTxWY/cE0Wgp/0x34gNWI5tIF6uvtFBWIAbAgpk1NauPcXqO9kKzqVKLOo9FoiI+Px+12M2bMGCRJwuFw9KuFL7uEHVHrPfSY2aJ4Qe7h+PeB0DZ9EBl6QOKj8V710cJ6LaNHFbBmdEnAtFotUVFRvP/++9xzzz2Eh4fzr3/9i9GjRw+MhT36CNkD1oMiuKDcjbHvFcSk4+bLkij0jxD7A5E8Wh7IexHCV9ZrnEtQ/AuALvvAvv32W3bt2kVDQwMGg4HBgwcP3EVtewsfuE71TJPxJI2RIFS6ThUtL1uQRS8LGLS+LFFg7tQFSJcEzOfzMWbMGH7729/idDrRaDQdGomvKAoejwdZljEajUiSFDzm9XrRaDTB471OPSJUAqhtLpVWKePscXImxGT1Hnlq2+uFbOG4LMu4XC4kScJgMODz+fB6vRiNRjQaDT6fD7fbjVarRa/XN6lvPp8Pn8+HXq/H4/Hg8/nQ6XTBVb/7C10SMFmWqa6uxm63c+zYMWRZxmAwMGbMGAyG1odfVldXs3jxYjweD9dffz3Tp0/H5/Px6quvotVqyc7OZsGCBV0p2rlThohyp6LSBjn+LZQkhID1GJ1sQpaUlLBmzRrq6uq45pprqKqq4qOPPuKVV14hPT2dFStWcPLkSdxuN0888QQJCQmAEK8VK1aQm5vLiy++yNq1aykqKgLgxz/+cb9yD3U5oOG4cePQ6/XccMMNeL1enE5nmxaYoijs3r2bcePG8cgjj7Bhw4ZgaGq3201YWBiZmZnBY7IsU1xczLFjx7A7Bq4nR/GJpb28FvDZ6NZOgUAQwXr6tpcxtByd3cyIOfHmFj7rB2v8dggfnbveTo2aCVhgrWyKJFNQUMCJEydwOsUEsPT0dO666y7Gjh1LXl4ec+fOZdy4cXi9XhRFIS8vj5kzZyJJEg0NwnOqKAo5OTlYrVZkWUZRFObNm8cNN9xAVVUVLle/6tbonnFgu3fvRpbl4I2pq6tj8ODWA343NDSQnp5OZGQkbrcbRVHQarX8x3/8By6Xi8WLF5OdnU16ejqyLH6Y8vJybLaB8iifjdcMdV/5dxS6dczXQUTIZuhbATvg384FBTEi/gxnN8GGAdd1oVy9RQ0iOElHCESB7RQ6Wl0hRUYWL3m7naSkJEwmExqNhlOnTpGTk8PUqVMxGo1B40JRFBISEti9ezcWiyUY/t1qtbJ06VIuv/xyvv32W+rr6zEYDOzZs6ezpe0VusX1N3LkSJYtW8asWbOIiYnBaDS2eX56ejrHjh2jsLCQmJgYSkpKcDqdwSXZNBoNXq8YSqjVapk9ezZ33XUXiYmJbabb7wkEp+/mAauB+FN9PcYrtBznsimtHB9I8zo6eq2dnrrYjgWmNeiYP38+t956a7ATzWKxMHz4cK6//nqOHDmCw+HA4XBgsViw2+0UFBRw//33M2TIEE6dOkVxcTEej4fLL7+cmpoa6uvrsVgsOJ1ObrzxRsLCwqiurm6thH1Ct1hgs2bNwu12U1hYyLRp09rshZQkiUsuuYTi4mK2b9/OggULOHDgANOnT2fz5s2UlpZy5ZVXkpGRETw/+N3uKOx5gh3R4whN49n3BnWIiBXNOZe4YR0hEKG1OfGI0NcXDK31QkLQiR9aX8rLy1m3bh0Gg4EFCxawa9cuzGYz69at46GHHuL2229n2bJlJCQkMHnyZL7++mtmzZrFjTfeiM1mIyoqipSUFNauXUtpaSlTpkwhKyurxy+zM3SLgH3yySfYbDYyMjJYunQpTz/9NLGxsa2eHxYWxgMPPBDcz8zMBOCee+7pjuJcENQCG/oo71OI0My9RSVi5aLmTOICErDAOLBOTCUaOXIkI0eODO4PGTKEq69uXHI8OTmZWbNmBfdvvvnm4P8RERHcfvvtANx9991dKXmP0i1NyPr6eiZPnsyUKVMICwvD7e6hOTE9Raj31d59ySqKcNh7LWKhWZXuxUXjz3ZBRNMI9EK2tKnjwM4NRVGYPXs2y5cvR5ZlLr74YuLj47ujbL2HFRGiobtnOstQv0X0Pqp0P8dojC15I2Ihj/OW0GXVWkKdSnRu5OTk8Ne//hW9Xs9zzz1HcnJyvxro1iECYRp6wgs+0LzQrRAajKO/RLNoHsgjcJt7Ozx0r9HJJuSFQJcFbO/evSxatIiTJ09y5MgRkpKSAAaeiKm0SQNiMVuZ/jmvcjMicq0RsQRa2/3gAxDVAmuRLguY2+1m1apVNDQ04HK5yMnJ4Qc/+AFRUVHtf1llwOCjcZHZ/khg1peJ/lvGLqNO5j6LLgvYggULgqN4QYTY6S9TDcw20OsgLOR1rChQa4bYqMY1I7ubejeEaZvGslcQww9i6blnzevfQld/C6ww3daz31UCTUqphWPNj/d0viAGxBrpufvs4uz7GRiIa2qhPN2GGtDwLLp82TExMWRmZga39PT04KjenkJROrat3QqH8poe8/ngTyvAag85Djh88EEh/PEYuHxg9cLfCuCv+WD2dC7fJSfFatzB8iJ6yf6CePhDA7xaEcHzPqBxcKML+ITGKTRKCxstfFaDcGw3P+84IqJC8zSKEKtu2/37BxDz+ywdzC+wBQawNj+/eTDbwOZFiGro91s7t60t4F5sfvwAopnbPM9cRLghjz//b/1bQwvlb2s7gRja0fwefNvsugK/+3f+zwKDWHMRqz5Z/QENOkRgIKu+la1nq1y/pUuXrShKiz+ARqPpER9YURn87kOxqvawNCithBGZMDQN1myFqHB4+EbYexR2fAdl1eKzd9fAgmvEscEJYpVunw9Wb4Ljp2BUjPCbzE6G14+LVbBNGrglHfIs8FkZvOYfSTk6WojTxfEQoYOvyiHRCA8Oha/LxYK0RVa4MkksTHujT8wNH4uoRB7gc8QS9BMQS9zPAv5JY2XcghCjOuB1xEKvkYiXrxuYjxC8A4gl6kFUCp//vEIaLb1Q4TqDCC5rAMYjJh+X+NM0+fOL8v/9tz8/A01X5w4MVwiskB1womtoXI0amopeQOBClzYMXGvoqtoBoQmkF/i8+YrggXwVGlcYD6yILYekXYAQmhhgFJCBmKsv+69rMiL0UC5i+TUNIvCuBTFINgYRD8yIiP9V5t8Cnx9C/K4l/vsWyPs4YpxeAjAcEXrnWxr9hxX+71WUluJyuTr+wm9rIKtqgXUet9vNa6+9xvPPPx/cXn75ZSyWnhk3YHMI8bpnLmw9AA/eKP4u3QD3XgNJcbB5H2zYBY/cLMRKUaDgNHi9UF4DZr9ldLIcPv83pCTC5zuhwQmpYaDz665OA+VO+KAIqpwQb4T5qbCrGh4aCl+cgY9Pw6PDxPk7qmBntdiP0YsKlG8RYlhG4/CyE8AuhHh8ihCPZBp/iDzE8mbjEZbYGeBeRGWZhbDYliMq4whEZcnz/5+CqMxWf7oeGn1DXoR1FYYQxwoggkafsORPw4gorxWYiBDJ48ARf3qBjrCANaGjscmkhPwN/T8gUAFhaf7Qyc3SaC5KXhpj04fmGxC55lYY/vIfQwj6SYQ1GxmSd2BcaGnIdY1GiNEExGDdXGCc/56dQlisE2lcObzOn3fgfoOw5gr8eeUjfsOokHyN/jIeBCLj49HrW/PKN6OdqUQXqoB1yQIzGAw89thjeL1ezGYzHo8HjUbTc/HwJUhNhNhIITzx0eKY2yP8XOEmcPlNhMA+gEYDDhfUmUFJFcfcHuEHu2g4TEyCmB3CKpMVITo+BYZGwo9HwDcVkGKCWAOkhEGCETwyoAGTVvi7XDJoJPG/SRssLk6laVgxJ5CIEKiLEJaPnca3dz3CWX6Cxjd1DDAIYR1EIKbxpCN+vID9G2hJBCwWD00jYQf+JiIEM5amFR+EAMqIShfmL5uWswWqhZ8lSPMmZwCNf2u+mHng+6HCEroF0mxehpbs++ZWnwHxokhCiE5oc0+hcTm1CITImBDCE/Dg+mhsnYVakKGi76XRLRD4jikkXwNN77PFn/4kIOfYMaxWa8fHTbbmyGzprXCB0CUBkySJ6Ohotm7dypIldaFjiwAAIABJREFUS7BYLCiKwp///OceWZnI64Xv8oU45Z2Cdf+G4jOQnQI/+QO4vXDbVcJ5v+h/RBMTBSw2+NkbcKZaCFx+idjOVAt/mMkDcx2wtQI2VoBHgSlxsKUSLB6odcH+OqjzwDEzrCuDUocQtUXfCp/ZXZlQaodFe6DQBmlhUOOBX3nEWz0WYQmcQVhM7yEq1UzEEIC9/mu8BGEBmBFv/NPA1/7/NyOsoXhgKaLyDRaXyDeIyhPt//wYooJFIH5kJ+L53+f/m4WwFvL86QxDlNOCqKBmhCWhAVIRomqjsQkZ8CUHLI9A/fGE7IcKSvOmYaAJGJpOc99W4BwpJJ/m5wfy9SKEIcZ/DdUIYfnW/50hiHtf6C/jEMTLItDxUelPq9Z/3Q3+tL70l2OU/x6u96ev8af/NcICkxEWWZ3/872I+56NsN6K/ecMRvymFcBFI0YQERFBhziHgIYXAlIg7lYrtPlhgLfffpvs7GwcDgfl5eXcddddwfFg3YXX62Xh3VcxIvbfGPXCUtJowOe3fHwySJLoWVQU/z7iHGi6LyviPFkB2QeSC7TfCd9YoMJoJWGFNXhgUwXcmAYGjb/S+D/TIP5KkjhfVsQmSf6KqoD1BOBu9PuENnsClkegompofA4rEc237yEExRfyXQlR+Q7TWIGbD+IM3Q8l1IIJCIYUst+AqITZzfKzIZzRHXogzpFAs/FcGI14SQSuN/T64Gy/W+DaPAjBGo64z0rId2n2/dD0WrMIO5qvC5j68MP877vvotG0bT7JssyfXn6KhyLfIKaFDn4FWLI/nEufOciIESPaTGuA0qpDvVv6LiZMmEB8fDxLlixBq9X22DCKjGT4xd0QYWr/3E7RgAjk1EKMk1N2qHPDs2MhvJO1S5Gh9iT4zmFq6DHEg/8kLY9dLAU+6nyy7XIaUaFn0PSpqeX/t/fe4XFVd/7/a/poVGfU60iWmyzcbQySCwYDBkPWLC2UhJLCbniyJN9svtlddvNLviSbkA1kQxIDIYBN26W50XGvuMqyjWyr967RSCNNL/f3x5kZSbZcZEuyZN/X89xn5s7ce8qdOe/7Oed+zucI628kQ/ZInN1P83xM5+KmEjkQ1uYCRtf51c4Q6yo7sg7KsAjYhAkTiIuL4+mnn6a2tva88cAulvDYyEg52gySbv+PLibfi53W0v+8s50/knMdzlbukfbpupQ8Ruo6jxlkR9YzGJZqf/zxxzgcDgwGA3v37sVqtQ5HsqOHEjEgZWCg9+kwoNCBUg+KYU5XRrTl0M92xRsg/cfABtuuUgEbFgssLi6OTz/9lNzcXOrq6kbMAhsxooCHgu9LgW3DlK4S4m4AJPB1Q9eWYUpXBhDjXgXB9xfb9RxXnC2kdP+nIVcZl6TbkiQhSRLf+MY3SEhIoLq6mkcffXT8rQupRDz71jOsLUGhAKUWlDpQXBUtbHRR0/ezXfHtt39Aw9M32Q/s4vB4PBw9epSOjg6Ki4sBaG1t5R/+4R/kydxXGDHAyuD7SoRj7eVgDn1Ll0VdpjJcCrMRLisWYOdQT76AkNJXG5ckYBqNhry8PMrKynjooYdQq9U0Njae97GwzPhDg3CeBdH4LhfGfuUYjxgRsyh0DLHxne8p5FXa5C5JwJRKJS6Xi7Vr13LXXXcRERHBzp07ycnJuXAHPZmLIhrh9ArCAbX5HMcON0nAvEE+b2DwxT4uBg1itsLphkXiMKU/EhgQU4/O9TTzkrwj5aeQZ3DJg/g1NTVUVVWxY8cO9Ho9eXl5I+KFLzOQWIQXP4iJ16MpYKnB7XR2M3wCpkX4Zo2nh7dRiN9kRNwxQmNgZ5tKJHchL4558+axfPlybr/99vG/biOI+SihNXmHcVlohQrUCYTd8H1djKxb+2UgmotfJSiA6JqaEG3RwDjwywqSiCjziK8EMcR4YHa7nYqKCtRqNZMmTaKzs5OmpiamTZuGXq/HZrNRWVmJ0WgkKysrPPQjSRJdXV1YrVbMZjMNDQ1YLBbMZjMmk2lMRVu+ZAFTKBR4vV6efvpppkyZgl6v55FHHiEqajwOsSJGiLOD7z9l2AZ8VNFgXCbeS26wfALSOFu86XzMCG4XgxuxdNqN9EV7GA+oEaGYRvy5++kzyU9nEGGz2WzU1tZSXV3NiRMnMJlMvP766zzzzDNkZ2ezatUq0tLS+Prrr3nyyScxm81IkoTH4+G1116jtraWX//61xw4cABJkvjwww95+umnRy5Yw0UwLH5gK1asYMaMGeh0OjQazfjzA+vPCN1c+t+0rjDDK8ylXDrFWd6PB0ZtEZFzWWAKie7ubqxWK9HR0ajValJSUsjMzKSkpISIiAiWLl3K4cOHw6cYDAZsNhsKhQKttq+zvnnzZiZNmoTVakWv13PPPfdgs9koLi7G77/c678PZFiG/qqqqnj11Vdpb2/n0KFD2O3D1O+SuSAyEAP61yKiT8iMDCb6rnNom8cozqE8W0RWNfgkHxs2bOD999+nq6srfEpKSgq5ubk0Nw8cJfV6vdhsNq655hpiY2NpbxdhK61WKxs3bqS0tJSjR49SU1ODw+FgzZo13HrrrWOuZzUsFlhxcTHLly/H6/XS09ODy+UajmRlLhBzcJMQYVvk28fIkEDfg5NRp39Aw0FQ6zR864FvDYhGUVdXR319PR6PB5/PR01NDTU1NRQXFxMbG4vdbsfr9eLz+ZAkiS1btjBz5kz+4z/+g87OTurr6zEajTz//PNEREQQGxuL3+8f8ZDxQ+GSS+Lz+Zg2bRpr164lEAiQkZEx/jzxz0Yc4rm3nuF9TK0EjQkCXpC84Led/xSZy0MUfQ6zl/XZ+vmeQirFeHT/AXaDwYDdbsdsNjNnzhxqamq4+eab0el0qFQq/umf/oljx45x5513kp+fT1lZGQaDgYSEBJKSknjiiSeIiori+uuvx26309LSwrRp00apwhfGJQvY1q1bKSoqYsmSJWRmZoafcFwRFCDcpusQz/MHCbdzMSg0EHuDeO9phu4dw5OuzPAzgz5/u8vOEAMaJiYmcuutt4b38/Pzyc/PD+/HxsaSmtrnENNfnLRabfjYZcuWXVKxR5JLFrAlS5aQlpbGjh07OHjwIKdOneL++++/MkRsFAb0h5v+ztrecx0oM4CQo/vp9A+pfdmRHVnP4JIFTKvVMmHCBLxeLx0dHezatYuVK1deGQI2DlmBCDrYA3zAyAYgvJLQAPdypgvHmHGkPc8YmCxgF8nBgwdZt24dycnJrFy5ksmTJ8vidZlQ0NcA+6/0I3N+QusHjK1nbKcxRD+wq4FLFrCMjAx++tOfEhcXd8YgYghJEj4qlZWVZGdnh715u7u7qaqqIjIyktzcXLq7uykrK0OpVJKfnz925lOqgZuCr1Zg7zAmbYSYheK9q1KMiQ0HBuA2+hbJ2EHf0m4yfUxHhO9exsAVzccc57PAZAG7ONLS0s57jMfj4U9/+hOZmZmsXbuWf/u3fyMyMpKysjJqa2s5ceIEN998MxaLhUOHDlFQUBB2mOu/6MhlcwBVIrzzIxCLJg4jqghQZYr33jaGbVKjBrFQBYixsD3Dk+wVRxJiClQ242Bxa7kLeQaj8pvZbDZ8Ph8PP/wwzz33HE1NTUyaNIn58+czd+5cHA4Hdrud2NhY3G43+/fvJz8/n5iYGHw+H1u2bKG5uZm2trbRKO65MSDCJIBQhnL6lgC6RDQJIAWXKFI00LeW2CWiRCwL5jzt83bE8l5XG0YgPfh+3Dj89A9oOBiygI0ckiSFu5ZKpZJAQLT4QCDArl27sFqt3HvvvajVaubPn8/OnTvZtGkTjz76KCqVihkzZpCbm0vxrpjRKO65iUP0N0AsCFjFsAmY3iw2KQAqC8MmYCrEqt6nc4CrU8DSgZuD7zsuZ0GGimyBncGoCFhMTAyBQIBPP/0Ui8WCy+WiqKgIh8PBm2++ybe+9S16enro6OjAYrFQXFzM7NmzASF4aWlp+Hw++eHAMBPBmREUurlyBv81iO7h6YyRkdWhca7J3FdxOJ1R0W2dTsc//uM/otfrefLJJ0lLSyMhIYHExETuvPNOenp6sNvtREdHY7fbWbZsGUuXLr3kfLcdhtLagZ/5/fD252B3nvl5eR2cqBaL4EoS1LWIlcB9Q3Rg/aQR6k+bz+MNwBvVYhXv/jj9cMwKx7vEd5IENXY45R+6C0QtYoXu/kiI0MVVp30eQDTu6QjXi4cQzylyGLqAtSOCKp6ebznCSD09305E3DA3fWF0Whm6n3ATZ1qQEnASsYp2GvBwcPsmIr7YTIRzqg+xfksJQ/eX24UIq90fP8Jt5fRuuidYnpJgmUKL3tYj6j8k1GfZNFy1AjYqFphCoSA1NXWA12+IKVOmDNjPzMw8azo2BxwtB48XJmVCZSNMSIe4KDh8CmKjYMZEsNjg6wo4XAq66XCiCiZmQosF9FohUisKob4VyupgShaYYqGoDDbthxd+Au1WeHk9ZCZBYzsUl4mVuydlQlk95GWDzgdFrZCigqkx0OKCUhsc7oTsSCjpgikxUOuAOA183QV3Z0JjL1T3wjVx4PTB191i8dySbphvglcqQBnoW33bjQggaEP4JU0ATiAaxKzgtSlGrObdiYiMGo24O/XftwHHgXiEUBUHj/kc+D+IBv0RYi5lC6Jhxwb39Yi4+CHBSEE02maE1RZ6QBuJEAdfcD8e8fSzLViG6OA5CqACmBvMy4eobzuiW2cMljcqmGZLMI9khCi09jvOEixnaAauBRG2uRPxwNgcLPvXCMHcB3wbMcGiNVieE8HvcoAaxKB+NGI18lggL5jeqeBnhuD1mhBMQx/cvyV4XBXiIYqSPvE6AjyIuNH8lSHGD1MglpM/m8kxhmJ0jSbjqudc2wyvfwRNHfDzv0KPHVZ9AK99BA1tsHEXHCmDFz+Erl44WQ0BCdZ8Kiyu/haZtQdeWQ82O/zlAwgE4O6lYAz2Obp7ITYS5k+DygZ4bzOU18OvX4fuHvjrOnjpE7DmwNteOKWFv5RBrxdO2URjeL0aXAH4uBEagj4MzU5YUwVdXvhTKaRFwANmmGmEXh8UWeGGZFiZAa06+KNOWDG/RazG/S5CcHYjrICPgc8Q1k4loqHsAKoRd/nNwWvnBd5GNO4NiEa6ElhE3xDeDYgGqUaIy2REY80OHl+KEJJmRAMtQTjMWhBiVoYoawdCHEAIUzFChI8jLJR8xCrafoQgT0MIjhuxWEioDi6gKJhPJ6LhNwTTcyAE0hzMPwdhiITiUZoRgtUDvBGs492IaUHOYL55we8bgPcRFt3vgnVYDbwTrO9nwTKsRohqGcKKejdYjv4WbhfwVvC41xAieDdiMQ9HMO2twGKGSnCugGKQ7So2wcaVgCkUMG8a3DQfUhPg1uvA6YaqRritAK6/RlheDifcXgBz8/pW8pYQXcMQDW1Q0QC1LRAfC97T+i9TzDAxA77YJ0Tw+ulwwxxIT4Ll10ObFdq74bYHYMYSKIkEtQKWpwnLKoQkgV/qcwGp7BUWWb0dEnTglYTg7WwTohWQxI02IheU0TDRCEsR3aEFCEvsMGJQfhlCqKoQg9KL6Jv6Egz8Gs7XhRCQRkQjlxCN6V1gOQNDwiQB1wPfRXS3HkFMCW1GCMUEhGh0I6yMLMQfKWQD9Hd3cSOsL1swDwkhIMcRAqIM7n8dLHsSQjCjgq9KhCBOCObTgRCCicEyzQ5+twghjDOD+3kIy7EB8dzFFyzHWoRwqxGW1ZRguWYF00hBXG874gZwE2IlpFC3dFnwmvSva/9nOI0IsW9EWFjeYDpfAHcChxC/2VGgqalpCJFbQpOdtGfZxrwTyIgwrgRMQoFX0tDj1eNHjc0bgVdSExOn45O9CnYeVZKZIkTgkz2w7zj0OkGjgs0HYPdRse/2QFQEJMRBfo7oDvr8cOgk1LfBkVJhoSUaxTEKBXj90OMUx9kcwmJTq+HTvXDwBGQkg00Fn7XAkW5hTUkSbG6BQ53CMnMHwKQFowamx4nuZXUv/OYEzIgDqxvMkeKcLS1gCK64bI+AgBocetF9SgK2A18iQrwkIhrIdkTDi0A8YdyMaOxOhLWTGdzyEI32jyJ5dAhr5hSiO2RF5NMTPK8XIQCJiMZZg2joJoTV1xhMJxYhGPXBfRWi+5cUPDYlWLbdwVdlMP3diC5ZMLTVgFclohtaE0w7FdEdrERYefZg+XchfN0cCNHUBvOdiBApB/AswjJzB9M6EjzfH6xvL33TsHzBMm0G9iOeXPoRUWOLgseqg/keDKbjQQivKZjnJITg/hfCmu1FLMb7UPC7+Pj4AYEEz8/ZxEvL1WqBKfo7ig7CmAke6vP5uOOOZQT8JzGZtLS1uUlL01Nf78Rk0lJb58CgDWCOs9FjF0IUoYUkkxC0+lYw6CDBKLqHqfGim9nUDtEGyEwWFlmvA6IjIScVaprB7oK2TpiXB5ERYLVBcryw4OKixEB/TBRkJIrvmjsgwgOpAXD5odkFESpI1oPFDekR0OGGVrcQsmgNVPSAUgGJOkg3QL0D2lzifHMkZOih0QUpWmhpAYNfWBNe+qJf1yAafBRCSGoRf+sIxF9bj7iHh8QlE2G5+RACEBrLaUA09ikIq68JITyhMazQ+FVW8Nxa+sbHIoL7EcFy+IKf+4LpaoNpViCslgiEMFQH69KBsKKSgvklI7pwcQiR1ATL7QrWIwIhbqp++3HB8icEXxsRQpSM6Popg2VLDZ7jCuY1I3huR7C+jYjxtYbg+ekIAWoK1jcRIWhN/cphC5a9O3gto4NpVATLGIsIPqlEWLCTHn+cF1955bzLEAYCAV544f/y2GNvExt75rGSBG+/DQsWbB8QD+wK4qwDfOPK7szLi+WppxZgMJyl2C4bnNouHKkGIF20FDe2w+/ehN88KQTwgtiJaC1w0T5ip2ywuhqemQ6a4H9W8oJ1CwRO73UM423mMKL4TzG65nkv8AzwfxFiMFp0Iiyzf2dwl4sL4iLGzzsQ1tzQMtEy+K9yekf26mFcCZhWqyAxUUdk5FmKHdBA4q1nfl5zEHraLypPlwf0OkiMExbYBbEMMaDiRzzW6xl6vm0u0YVM1IM2JGA6iL+RMwTLUSrmUQ4HsQiLI4HRFTAtwrKJD+Y9muiC+V6Um7QSYheDaojrXMS6YfuF/p+AvjGws/0qV2fwpHElYOdFqYKIQSaHKEe5mqEwnj6GVQUUClAP0sqU43gNlXGPAtTRoBpiGAuVExRD/m+c62njmBntGVWuLAE7G8mTwZgBfh80HofAMIVWPR9KRFTX0Ij4gZHJRpcBqkhAAvtJCMhB8YcNbTrozhWvQAGKUbmBhLqQZxOwUfpPjzGuDgGLC/4DfW5oPjG6Ahby021DPK4agRulJl5skgTOKlnAhhNNPERMPP9xI0+oC3k2Abs6mvLpXF21ViiFmPm94HVB7yhO5dUhHJdCAbrqGJFxV22yGI+RfOBp5WrtWQwdBWhTxArq/VFd9Mj+cKNA/InO1mSHPDHpiuDqEjCVBiZcJ953t0DpttHLOxaxhDMIx6w19M19GSYUCogKzi3y94LlU+SY0heIQg3R1w59MH50CXnIDcbV1ZRDXJ21BlAqQRN8DCRJ4BvltSwjEb0BP8MuZAAoRLBE6TQBkwIgXZ036z5UoAz6jyolUHhBGXKUG7OExsAuPByF1+uls7MThUJBfHw8TqeTnp4eEhMTUavVuN3u8OrbsbGxA6Ipu1wunE4ncXFx2O32AeeNJcZWaUaTqASYsUK8d/dCyZeD+I+NEHrg/uD7OsSExmFGaQDj8jM/91mha8vw5zee0GdC1Dzx3u8G3VEwzg6K2JjlXAIGgzXllpYWvvzyS1paWpg3bx5er5e33nqLZ599lqysLF599VXcbjetra089dRT4WALPp+PNWvWUFpayrPPPsu2bdt46623+K//+i+ysrJGrIYXw7iaSjSsKJSiS6nSBN0sRvH2G/ovjuAUNoUClJozt9PHeK5KlP2uR/CnV6jHQ0AHzTk2FT6fL7zKNkB6ejpLly4lOTmZ7u5uli9fzuzZswkEAkiSRE9PD1lZWWi1Wrxe4UcmSRJfffUVkZGRRESIHsrtt9/OrFmzwoFIxxJXr4D1R6UGY7pwtTAMKcjJpWNATNibyKjEN1ZoQZcZdL0YN/GULx11nKizLgPUo/wTDw/nnszt9Uq88sorvPDCC+HQ6wqFArfbjd1ux+/3o1Qqw93EQCCAWq0Of+d2i3GF7u5u/vd//xefz0dVVRUtLS0DzhtrXL1dyP5oImBioXjfXgXV+0cv7yT6Bve3I2LFjCDqaIgNxpe2nwD70ZHNb6ygnwCGKec/buwSego5+ORvjSaCJ554gokTJ4bnVra3t6PT6cjLy+PYsWNYrVasVitNTU2YTCaampq47bbbaG9vp7Ozk6NHj5KZmcljjz2GxWJBr9ej1Wrp7Oyks7OTpqYm0tLShjgBfWSRBex0VOq+wX2fhyv5MZ5CDcrTprMoA4z7J/KDDcgrxv0/PWSBnX1hSKVSiUrVN0bgdDrZtWsXERERPPLII5SVlZGQkMCJEyeYMmUKjz/+OAcOHCAvL49Zs2axf/9+srOzmTdvHi6XC61WS0JCAvv27SM5OZmSkhKmTp2KyTR2TNhx/7MOO3EZEBuMHFu1D5obLm95RpCIXNDnDPwspgMRI2ac6rZCC8ZbxOuAz6+Isb9Ql3EwzmzKZrOZRx55JLyfmJjI9ddfH95PSEggPz8/vL94cV+YRb1eHw7rXlhYSGFh4aUVfYSQBex0lErCQ4NDn6w2rlCozmzY476hBwfklWczVMYt/cfABmO8/3AXhyxg5yJjOnjNEFMK6k5GfL7ZbMTUowDw3shmdS70WWDMFTHKQvh7wbaPy+7Zb5gGuvRzHKAIRlm+4uj/6Howrs6mfHXW+kLRx0CkCtQ6RuWBbWxwC3D2oY5RQKkHdQKo+gnYWBEFVbRYAPjq5NxjYFcjsoDJXBBKHURO5wwLzFUD/ouId3Y+FGqImHJmL15tHP68xgehp5Bn87YdI3eYUUYWMJkLQqmHyPwzP/d2jJCAacCQdyWOZV0s8hjYYMgCdkEoICoetD4RycLRNfJZmuhbEWMUg2YMFXWciHxxqWgkUPaAJkqE0FbqxoNn/Ggy9KlEVwNXZ62HilIFExeIGM+9HXBy8/nPuRQUiDXUGhHrpb3LmA15HjlzeNJRekFzCGLnQJwcYfYsaBm4AF5/ZAtM5nyMlkmgOMv7MchwXpJQUrLlNRjnc2S9Opvy1VlrGZlxh4K+1TIH48r2WTwbsoDJyIwb9MhPIQdyRcv2li0tnDzZPeAzvz/AG29UY7cPHHl2u/0cPWrl8OFOHA4fbrefffs62L/fgscztAGojbvEgrf98frg9Y/EquD9cbqhqBSKy8R3kgTtVjhaLs5BjVhVNR2xKuw5frHKXvi0aeBnkgSbmqHMNvDzgATlPbCvQyy06wvAQQsc7YJWF7iHMJXoWBfsbDsz3/UN0OgY+LlfgpPdsL8DuoL1bXHCwU7oHeL0pa86oKjzzHr9by1YT7vO3gAc7xJ17PGKfGvt4vwh/rxsaoHS066nLwBrqsBx2gMNTwCKrXDAArb++VqHmm//LuRg29Vpi4yrWnd3ezl8uBe3O8CUKdFUVPSQmxuN0ajlwAELcXFaZs820tHh5uhRK8XFViIiEjl2rIupU2NoanKg16soLbXh9QaoqbFz6pSNvLwY9HoVJ0/acLv9HDhgYcWKNF5/vYrCwkQ6Oz0cPtyJxxNgSqaf0gOQPwF0Gjh4ElIT4JoJYhHcUzVQdApy04QI5U+AqkYwxcDJGvD5oa4Oqppg+kTweqGyHiw2OFENy66FFz+A2CixJuXBBnBlQUYSdFlBVwl5WtEAXH5YEFwFdl+HWO27ywNVvRCnEZ707W6oc0CsVjTqQ51iBfC8GDhqFc6qGxrg368R4uKXxDH7OsRzg5xIaHGBUQsTooQAAFwbD+6AEKJ6BxjUolGnRYDTLxpydS9MixFrXB6xQqYBsiKF4KkU8Hkz/J+p8PwpmGUMCplFrIM5KRpq7JBhgNQIIQARKphnEkJwqFPkNzkGSrpgQrRY+VyBEOYbkoR4Hu+GiVEQr4OSbiEgO9rg7kz4WyVMjoZGJxzuFNM/p0SL8ydFi2t20CLqPssI7S5R9iIrxKjhmBWmxop8QvX3BkS9S3tE3Y1aUf9OtxD5e7NgVbm4Fp12N4FA4LwrcwtkN4rBuCwWmCRJOBwObDbbgCBpPp+P7u5uXC5XOChbf+rqHLz1Vg1Wq5tf/OI4Xm+Al14q57XXKrFY3Hz+eRNFRZ289FI5bneA8vIeAgF4++0a7HYfO3a0UV4unJY6Oz387W8VuFx+Vq0qx2BQcf/9WcyaZcTt9qPVKomL03L0qJWvv+5iw4YG6usd/Oa3J3F74a/r4aV1QmTe2yzE56W1QqDK64Ul8OZn4vvP9kJj0EJp6hCf253w5/cgJQHuuQmm5YDLDUfL4EQNVDcJS+y5t0Wav3gF2qzwTq2wbPa2izv5B/WwrkE09tpeIR5bW4WI1dnhi2aRrzcAr1ZCtwfW1otGek8WLE4S36sUQgzTI4RovFQhrIr/OCYE47VKeL8Ovu4WovB5M7xVDRYPVPSCxw8fNwqxO9ENu4PrCLv88HKFKNeb1UJk7jdDQYIokwIhTE1OaHPDmzXi2P84LqzAlytEPnV2kebudnilEuw+UQdfAN6rF/U6aBGiDNDjE3Vw+8Xx/gDcnwXzg8Lb44UoNcwICuc7taJsv/xalOulClFnq0dYtcVWeLFcWE3lNiHub9UKod7WChVBXziLR1xnl18IlUIBuVHiukRrhPU51yQEtLu5FqfTeYGtpv9UosE2WcBGjdbWVn7729/y+9//nl27diFJEoFAgA8//JA//vGPPP/88ziXqZw7AAAbVklEQVQcjjPOUyhg3jwTS5Ykk55u4KabUnC5hCV1880pLFgQz4kT3Tidfm65JYXZs40oFOI8SZLw+/tEsbHRQXW1nbo6O6mpenw+iepqOx991Mi992aRlKTn//2/6TzyyAQMBjULFiSwaFEimakall0LHV1g6YKbr4XpuXCyGlQqYUHlT+grsySJxhPKuaoR6tugoQ3SEsHnE+K35yj83RIhVjMnwbdXQHsXZCXDjfMgMxmuz4f0KGGNLE6CW1OFUFX1wvJUuCEZ1ArxVw8tfhS6D7j8ohHWO0RDUipEo19dBXdlgk4prK897aBXwbRYuDEF0gywMFFYI0WdcFMyLEsW1kaDU+S7MDE47Ugh8gv0u/fYvPB1lxAgky7YRXbB6mp4IBu8kijrXJOYtTU9DpYmC0vuhmSR7kkbLEsRdT7RLYRmeSosSBD1CNdX6rvO7S7Rba6zQ5JeXIsmJ/xPLTxoFpbTNXGwtUWcM88ES5KEgC9LEcJUaxfv55tEvu4A3JwCs40iz/75hmhwiJtJnV1Yjv6AsHjnmoQl5pX6Gt1gN+lzcy4BG1edqWFj1AVMkiQOHDjA3Llz+f73v8/WrVuRJAmPx8ORI0d46qmniI6OpqysLHx8IBAIh8H1+QI4HD4CAQm73YffL2Eyadm4sZGdO9uZMCEKpVLBhg0N7N9vwen0ExGh4osvmtmzpwOn04/XGyAuTktSko5Jk6LJzY3GYnHz858fY/LkaLq7vdTW2tm2rZXdu9twOn34fAGcTj9+CRzBRTj0OvhoFxw6CTnp4vOPdkFxqRjbUirgi33ie6dbjGklm0R3cqoZJqRBbTP852qYNkEIYlYKdFjhQAlEBJ05HS4IBEQanoDofnzZLCyx9AixrW8QVpHDB7Ea0V35tFFYMx6/aGgTo8WxU6KFSP26RJRRCXR7RVfzlE00zIAk0pIkcPiFVZJpgI+bxJYdKRrmunrY0iKOiVUL6++LlmC+AVArxbHmSJEvwP93HBJ0olw2r7ByujzgC4q9/bR8UyPgo0ZR59woiNIIq3NnmyhjlFp8t621L1+DGtINots7KUoc9+/HRFl6fX0WWKxG5CEh8gtIYPcLUTJqRb672kU6CmBjI+y3iGP1SmHh7u0I5hs8J1Enuqa5UaJue4PjjE4fmA1i7O7jRohNNYfDNp+fc0dkvVoFTHGeu8Cwxx6QJIl33nmHjIwMrrnmGp577jmeeeYZPB4Pv/jFL/jlL3/J//zP/zB58mQKCwvxeDy8++67VFdXs2HDOqZPT8Fk0tHS4iIjI4K6Ogfx8TqqqnqJilKTnR1JT4+Xmho7BoOalBQ9gQDU1PQSGakmKUlPV5eHtLQIurq81NfbiYnRkJSkp6SkG6VSgcmkJTU1gopgv8DvlzCbI4mMVNPZbiclzkN9CxhjhEVljBGWUqdNWFYGPaQngt3h5+CxZibnZpCaIKy2jCRhWTV1QHyMGOs6VSuEJMkE5hQxltbaKdKJ1Avrq74V0uKhvQmiFNDsFA11crT4kcp6hBUVowGTVuzrVRCpFlaMQSXyqOgVnY0JUXCqRzRenRLyYkV3q6bLRVdXFznpKaRHCFHLMIj8jFphWYAYI/IGRD4GtfguUi26dZEqUQ5vsEH7AuIBgy4oZiU2IRQGFUyNEeN0zU4hGukGSNaLcaUMg7Bo4nViXEmnEuV2+kQ9ItVCLNQKiW0n6smbkEm8ToHdJ6wuu09YQ5EqkW5J8HlOjEakU9Ur6uyXRF5xwfGqUL3jtVBlF0KXHSnEttYu6puiF3WosYtyJOuFWKVFQJdXXKc4LaTqobxX5JsTKdJqcEKrw8/Ua2bwwp/+PCAI4WAEAgFeeOH3PPbY9cTGRg3SpuDttz9nwYJ7mDRp0jC11DHFWT0DL4tsZ2dnc+TIEVQqFSaTiYqKClJSUtBoNJSXl1NTU8OSJUsA0Gg0PPjgg/h84vHOv/zLv1zgoOflp7e3l1deeYUf/ehHYzam+OnU1dWxbdu2AYHwxjqBQIDf/va34+q/4XQ6efHFF4fwv5DD6QzGqNdaoVAwb948mpqaKCkp4aGHHuLYsWMkJiby8MMPs2XLFgoLCzGbzeHjQ3eonJwc1Gr1uPmTarVazGYzarV63AhYZGQkaWlpqFSqcVNmv99PdnY2KpXqvNbMWEGj0ZCZmTnUs5DD6Qxk1LuQF4skSXi9XjQazbhpWOOxzIFAAL/fP65Edzxe56GUWXQhn+exx24lNjZ6kLTg7bc3sGDB7XIXcizhdDqpra0lPj6ehIQEtFotkiTR1NSE3W4nOzsbjWbgHcnr9VJdXR22JBQKBT6fj9raWjweD2azGDhta2vDarWSnZ2NTqejtbVVjP3k5KDVamlpacFms5GTk4NGo6G5uTmcp1qtprGxEafTGd5vaGjA7XaTnZ2NUqmkoaEBr9eL2WxGkiRqa2sJBAKYzWYUCgW1tbUAA76XJAlJklAqlQQCgfBd2uVyUVVVhV6vJycnh56eHurq6jAajaSnp9PV1UVDQwMmk4n09HQ6OztpbGwkPj6etLQ0Ojs7aW5uxmAwkJ2djcVioaOjg+zsbPR6fXhVmtC1sFgsZ1yLnp6e8PVubm6mt7eXnJwcJEmiqqoKgNzcXFQqFY2NjXR1daHRaMjKyqKjowObzYZKpSIrK4v29nZ6e3tRqVSYzWZaW1ux2+2o1WpSU1NpaWkhEAigUqkGzfP0669SqWhtbT3r9VcqldTX1+P3+zGbzXR1ddHU1ERUVNSA69/b24vBYCAjIyOcvlarJTMzk8bGRlwuFzqdjoyMjPDvrdfriY+Pp6VFeC6HrO7T8xzsN29oaECpVJKVlYUkSdTU1KBWq8nMzCQQCFBTU4NOpyMtLY3z+YFJkpKKigoiIyNJTU3F4/FQU1NDbGwsycnJeDweqqurMRqNJCYm0tbWhsViITU1dUwt0jFUxqyABQIBVq9ejdfrpbm5mZ/+9KeYTCZqamp45ZVXiIuLIycnh3vuuSd8B5MkifXr11NdXY3VauX73/8+OTk5OBwOjh49isViYdOmTdx7773893//N+np6RgMBpYvX86f//xnkpOTMRqN3Hjjjbz44ovEx8eTmppKQUHBgDxnzpzJ6tWriYuLY8qUKUycOJF33nmHqKgoZs6cSVpaGh988AF6vZ4FCxZgNBrZuHEjKpWKG264Aa1Wy5dffokkSdxyyy14vV527twZ/oP19PQQGRlJVFQUf/d3f8f69eux2Wx4PB4ef/xxXn75ZVQqFRUVFTz33HM8//zzGAwGKisr+cMf/sCvfvUrjEYj1dXVPPfcc7z55ptUVlbS1dXFG2+8wQsvvEBGRgYqlYqVK1eGr0VERAQrVqzghRdeICkpCaPRyLJly1i1atWAa/HXv/6V+Ph4zGYzdrudjz76CEmSuO+++5gxYwa/+c1vKC0tZfLkyWRkZGCz2di3bx/5+fkYjUZ8Ph9fffUV06dPJzIyEoVCwb59+7jmmmvIzs4OC8x11103aJ6zZs3itddew2g0MnnyZCZPnsxbb71FdHQ0M2bMICMjg/fffx+9Xs+1115LfHw8GzZsQK1Ws2jRIkpLS3nhhRdYuHAhjz76KD6fj/fff5+mpiYiIyNJTk4Ol3n+/PlERkbicDjYv38/1113HWq1Gq/Xy4EDB7j22mvJzs7m1KlT6PV6zGbzGXkuXrwYvV7P559/jkKh4Oabb8bn87F9+3b8fj933HEHNpuNvXv34vF4uPvuu2lububIkSPY7Xa++c1vEghInCucjs8HBw4cYMeOHfzgBz9g+/btdHR00NbWxg9/+EM+++wzent7aWlp4cknn2T//v243W7efvttfvaznxEbOz4XCVX94he/ONf35/xyJPF4PKxdu5Yf//jH4btbZmYm27ZtIzc3l9tvv53169dz0003DRCwd955hx/84AdotVrq6uqYNm0aWq2W6OhoKisrw46zBoOBhx9+mPXr1yNJEunp6Tz44IO89957+P1+JkyYwF133cXatWuRJIlJkyaF8/R6vcyaNYubb76ZDRs20N3dzaJFi7jppptYt24dVquVG2+8kYKCAj7//HPa2tpYvnw5c+bMYdOmTbS0tLBy5UqmTZvG1q1bqaur44EHHuDIkSOkpKTg9/tJS0vj1ltv5eOPP2bjxo1MnTqVQCBAQ0MDu3bt4tVXX+XYsWNUVlZy+PBhVq9ezfbt26mvr6eqqoo///nPfPnll3R0dNDc3Mytt95KaWkpU6ZMQZIkHnvsMTZu3IharSYuLo5vf/vbfPjhhwCkpqbywAMP8MEHH6BQKMjKymLlypWsXbsWlUpFbm4uK1asYO3atWzfvp0f//jHTJkyhU2bNuH3+8OWoMfj4eDBgyxZsoT09HSMRiOVlZXMnj2bnJwc4uPjOXToEEuWLGHChAkYjUbsdjv5+fkkJCTw+OOPn5Hn+vXrcTgczJ07l1tvvZV169Zhs9koLCzkpptuYsOGDXR1dbFkyRIKCgr47LPP6Ozs5JZbbmHOnDl8+eWXBAIB4uPjuemmmzh27Bj19fU8+uijLF68mD179lBcXMzixYuZOHEi8fHxHDlyhDlz5pCfn09iYiI7duxg0aJFTJ06lZSUFJxOJ3FxcSxcuJDly5cPmmdTUxN3330311xzDZs3b6a+vp777ruPqVOnsnPnTiorK3nooYfIysri0KFDlJWV8eijj5KcnExRURGNjQ0sXFiIXh+JsDsGbiUlpdx2253o9XpaWlo4fPgwP/zhD3E4HNTX13P06FH++Z//mY6ODjweDytWrGDy5Mls3bqVOXPmEBUVNaAr6/f7w4vhhtycQIxJX4Zu+i/P9sWYHQ0Pjc0plUrUanX4KaTP50Oj0YQv7OnnhLoeGo0mfA4IwUpNTcVms+F2u9FqteEfIjQWERoA9nq9qNVqVCrVgLGKUJ5erxetVhveD5VJrVYTCATw+Xyo1Wo0Gg1+vz+8r1arw/tarTa87/f7UanE0vBerze8RLxWq8XpdKLT6fjud7+LJEl0dXUhSRIajQadTofD4UClUqFWq8PHh8quUqmw2+2cPHmS9vZ2GhsbOXnyZHh8S6FQ4PF4wnUJ7feve//9QCAw4FqE9rVaLVqtNlzu2bNnk5qaSk1NTXiMR6/Xh8fWACIiIpAkKVyW/v5Qod9tsDz7X/9QGQe73qHfY7D90PmnX//e3l56enqYN28egUCAiIiIcFc+EAgQGRl5RpkVCkU4DYVCMaQ8Q2X2er1n/G9D34esPa/Xx9n9wPrmQobSCw21bN68OeyG9MUXX/Duu+/icDjweDz84Q9/wGKx8Morr2C1WsPXPxAI8MEHH/DMM8/g8/lYt24d//mf/8mqVavCK3iPFcasBaZUKjl8+DAOh4MjR44wd+5cqqurSU1NZfv27XR1daHT6Zg3b15YiBQKBZWVlTQ3N3Ps2DFmzZpFZWUlsbGxVFZWIkkS5eXlLF26lC+++AK/309PTw+LFy9m06ZN2O12PB4PhYWFbN26FZvNhkKhYP78+QPynDVrFtu3b8dqtRIVFUV+fj67du2ipaWF+Ph4Jk2axL59+2hsbCQlJQWz2cyhQ4eoq6sjOzub1NRUioqKqKqqCt/lv/7663AXxuFwoFQqOXr0KIsWLaK6uhqn08nXX3/NPffcQ0VFBZ2dnezcuZPvfOc7FBUVhbs8TzzxBDt27MDpdFJUVMR3v/td2tvbSU5Opqamhu985zvs3r0bSZKwWCwsXbqUzz//HK/Xi81m44YbbhhwLRYuXMiWLVvo7e0NX4tt27Zhs9nQ6XQkJSWxb98+Tpw4wYQJE3C5XNTV1aFQKOju7iYlJQWXy8WePXuIjY3F6XSiUCjYsWMHUVFROJ1OVCoVO3bsICIigri4ONRqNUVFRWGh7p+nVqtlzpw5bN26lc7OTiIjI8nPz2f37t3h6z958mT27dtHU1NT+PofPHiQuro6srKyiIiI4IMPPqC3t5eJEyfS0NBAbW0tL730EsuWLSMxMZHGxka2bdsWtgrVajVbtmwhNjaW3t5eNBoN27ZtIyoqitTUVLq7u8NDF+np6WfkmZGRweHDh6mqqiI3N5f4+HhKSkooLS1l2rRpREVFUVpaSmlpKTNmzECr1VJRUcGJEyeYO3cuFosFkymenh4HFkvXgK2zs4uDBw/T3t4etngtFgsej4fm5mamTp3KqVOnmD17NuXl5dxxxx1s2LCBd999lx/+8IfU19czZcoUjEYjkiRx/PhxKioqsFqtzJs3j3fffZd//dd/Zf/+/SQnJ5OQMOqrqpzVAhuzTyElSaKjo4N9+/aRnZ0dHljNy8vj0KFDdHZ2UlhYSHR09ACTtqenh927d2MymcjPz6esrIyJEyeyZ88eAoEA8+bNIzExMdx1KCgowGg0UlxcTFNTE4WFhcTExHDkyBFaW1tZuHAhUVFRA/KMjIzkwIEDdHd3s3DhQvR6Pfv376e3t5eFCxei1WrZt28fLpeLhQsXolKp+Oqrr/D5fBQWFqJQKNizZw8KhYKCggIkSQqXLxAI9Lvrernllltoampi//79JCUlsWjRImpqajh48CDp6ekUFBRQWVlJUVERWVlZXH/99Zw6dYpjx46RnZ3NtddeS2lpKWVlZZhMJgoKCjh58iTV1dVcf/31xMfHc/z4cerq6s55Ldra2igoKCA6OprDhw9jsVgoLCxEkiS2bNmCUqmkoKCA2tpaXC4X9fX1GI1GrrvuOo4fP05jY2N4TKq8vJzm5mYiIiJYsGABJ0+epLW1FYPBQF5eHsXFxbjdbuLi4li0aNEZeQ7l+hcWFqJWq/nqq6/wer0UFhZSXl7OkSNH0Ol0zJ8/n87OTqxWKy0tLeFBe7vdjsViISYmhrlz51JcXIzVaiU2NpY5c+ZQVFREV1cXRqMRs9nM0aNH8fv9JCYmsmjRogF5Lly4EIVCwd69e5EkKXzd9uzZg0qloqCgAL/fz549e9BqtVx33XX4fD52796NwWBgwYIFHDt2jJMnT561vfj9/rDg33bbbeH8LBZLeOggLi6OTz75hJ/85CdUVFTw6quvMnPmTLq6uvjxj39MZmYmvb29/OpXv2Lx4sVs2LCBp556irfffptf/epXvP766+Tn57NgwYLRkID+nLXPOmYFTEZGpo+hzptUKBT09PTg8/koLy9n8+bN/OhHP+K5557jrrvuwmw28/Of/5yf/exnrF27lhkzZmA2m4mMjGTHjh1YLBY+++wznnnmGVavXs2TTz7J66+/zmOPPRb20RxFZAGTkbnaKC0t5ZNPPkGj0bBixQqqqqr4+OOPSUpK4vHHH6e0tJQDBw5gMpm4//772bRpE4sXL8ZkMuFwOPjkk0+4++67KSoqYsuWLeTl5bFixYrwOOYoIguYjIzMuOWsAjZmn0LK9CFJEp2dnRcRfmXwtLq7u/F6vUM+1+PxYLP1hSL1+/1DKpckSdhsNvz+oYVevdjzZK58ZAG7TNhstrCPWXt7O5988slZhcDv91NdXT0g+OP56Onp4cMPPxz0nDVr1lBTUxNOe9WqVTz77LOsWbPmnAH2ent7aWpqYt++fZw8eRKfz0d1dfUFl8ntdrNmzRpcLtcFnxNi27ZtHD9+fMjnyVzZjFlP/Csdl8vFkSNH+MY3vkFPTw8lJSXMmzePNWvW4PP5ePDBBykpKeHkyZNMmDAh7DKwceNG6uvrufPOO1Eqlezdu5ecnBzuuOMOXn75ZQwGA9HR0eTl5fHiiy/S1dVFQUEBn376KVqtlm9/+9thvyMQPj+1tbU89dRTrFq1ir1793Ls2DHsdjv33HMPNpuNLVu2hJ94njp1iq+++gqLxcKjjz5KaWkpU6dOZfXq1XR2dnLHHXcA8Pnnn+P3+7n99tuZPXs2CoWC8vJyDAYDAM8++yx6vR61Wk1ERATd3d18//vf529/+1s49ltycjL19fV873vfY9asWaxfv54ZM2aMm8n8MiOP/E+4jJw6dYrf/e53vPTSS9jtdr744gumT5/OsmXLWLduHXV1dZjNZpYtW0ZZWRlZWVk89NBDxMXFkZ2dzRdffMETTzxBY2MjpaWlVFVVcf/991NWVkZsbCwLFizgW9/6FkajkYkTJ1JZWcmBAwfOKEdvby9bt26lq6uLkpISMjIyWLlyJe+99x4HDx4kIyODhQsXYrfbaWhoYObMmXzzm99k6tSplJeXc/DgQXQ6HQ888AAffvgh7e3taDQa7r33Xj799NOwWNbX15OUlITP56OyspL77rsvLNxKpZKysjJKS0tZvnw5VquV1NRU0tLSKC4uxmg00tHRMcA5WUZGFrDLyJQpU/jJT37C9773PQwGA263m5iYGGJiYsIe8mazGa1WTOB1Op288cYb3HXXXSQlJaFSqYiKisJgMODxeDAajSQkJKDX65EkKextv3btWux2OyaTiZ6enjPKodFoyM3N5emnnyY5OZno6Giio6Px+/3cd999mEwm/vKXv9DdLSIChjzRQ5aQx+MhOjqaqKgoAoEACoWCzMxM4uPjw17hIGZDhLqPcXFxJCYmkpycTFJSEjExMbhcLmJjY0lKSiIxMZGUlBRMJhN2uz3sbT9eok3IjA5yF/IyoVQqiY+PR6PRhD3Qly5dyurVqwH4+7//eyoqKtDpdCgUCkwmEwcOHKCkpCQ8PSc/P5/f//73GAwGJk+ezFdffQUIcYiJicFgMPDuu++SnJzM8ePHw9EWYmNjB0TxSEtLY/r06URFRbFw4UJefvll9uzZwy233MLhw4c5ceIEiYmJREVFERMTQ25uLuvWrUOv12M0GpkzZw6rVq3ixIkTLFmyJCyoKpWKuLi4sOhMnTqV4uJiJEnCZDKhUCiIi4tDpVIRHR2NTqfDaDSiUqmIiYlBq9ViMBgIBAKUl5eTn59/OR7hy4xhZDeKy0T/OZZiwREx983j8SBJEjqdLjy/TqlU4vV6USqV4bloofmLbrc7POculF7/19BcPo/Hg1KpDM8fVKlUA+YWhkQxNP8xEAiEy9B/rmho3qDb7UatVoe9v71eL36/H51OFw4LpFKpBqTt9/vZuXMn1157LRqNZkBZQ3X1+/3h+YChsobWUZg6deq4Dv0ic9HIfmAyl5/+/7WhdAUv9jyZKwZZwGRkZMYtsiOrjIzMlYcsYDIyMuMWWcBkZGTGLbKAycjIjFtkAZORkRm3yAImIyMzbpEFTEZGZtwiC5iMjMy4RRYwGRmZcYssYDIyMuMWWcBkZGTGLeeLTSLPnJWRkRmzyBaYjIzMuEUWMBkZmXGLLGAyMjLjFlnAZGRkxi2ygMnIyIxbZAGTkZEZt/z/FN9FbOvyiMsAAAAASUVORK5CYII=", - "text/plain": [ - "
" - ] - }, - "metadata": { - "needs_background": "light" - }, - "output_type": "display_data" - } - ], - "source": [ - "import matplotlib.pyplot as plt\n", - "import matplotlib.image as mpimg\n", - "core = mpimg.imread('Results/core_thermal.png')\n", - "\n", - "plt.imshow(core)\n", - "plt.axis('off')\n", - "plt.show()" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "- Cache Die" - ] - }, - { - "cell_type": "code", - "execution_count": 22, - "metadata": {}, - "outputs": [ - { - "data": { - "image/png": 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h2tramDRpEiUlJVitVtRqNeXl5XzxxRfMmjULQRA4fPgwCxcuHKY9nD59GofDQVVVFceOHeP48eMUFxczf/58Dh48SG1tLSqVyhOQ3drait1uZ//+/Rw5coSFCxdSXl7OzJkzcTqd7Nu3j46ODqZMmcLUqVOpr6/n/PPPRxAEGhsbOXbsGOeddx56vZ6amhp27dqFyWTi0ksvpb6+nr6+PgoKCqisrKSjo4PCwkKKi4txOBzs2bOHc+fOMXXqVE+7IsHdrra2NkpKSpg/fz5qtZrt27fT3t6OIAjMnTuXKVOmcOTIEZqamjzHaGlpwW63M23aNNra2ujv72fGjBlpoYGJosiPH3qIl3/3u6AamGg08snevcM0rnFE0Js0JgJMkiRcLheCIKBSqYYNQQJ9r5A83n33XVpbW7n33nuV652iuAXYa7/7XVANzGk08tEEFGBjMoTs7Ozk6aefRqPR8NBDD3nsRZs2bWLjxo3k5uaybt06JRh4FLj00ktxOp1j3QyFMLhtYMoQcjhjIsDy8/O59dZbefrppz32DofDwT/+8Q8efPBBXnvtNQ4ePMiFF16IKIqcO3cOq9WK0+kcYbBVSAzuiQOF0SMjI4Pi4uKINV8Nsh0sEOFdXMcnYyINNBoNmZmZw26cKIqIokhOTg7FxcX09fUBcjzX7t27aW1t5a233mLx4sWj6HzYCoxmxz4L9Izi8cIhAY1A8FnP9GEyUBB2rdHCbHbicCzhscf+MyIBJiALr2ACbKL6Q42JABNFEYvFgsPhwGaz0dnZSWZmJlqtlvb2dk6dOsXMmTPlBmo0XH311bhcLhoaGiIO30kM24HTo3QsgH3AiVE8XjhE4AiQWt7XsTENqBrrRng4e9bK009HN/ALpYEpAmwUGRgY4IUXXqC7u5v3338flUrlydX+0ksvUV5e7om38s+OoFKpRjHbgUDyH41uYP/Q/2ZC2CtHCRvwOeC2i6VCmxJBA9AS4Pu5wKRRbgsIgrxEvD6KAAvEmAiwnJwcfvSjH434vrS0NOkBwamHHega60b4ICK3xzHWDUkw5qHFH/toNyRm3J74wX6biCgW8RH0Am1D/yfL/uVEti25gLEsfHEO6PD7zoHcrolCC9AX4vdJQPEotSU4AqAluKBSBJjCEL3AoSQfwwUcZezf/p3AgTFuw1hzKszvc0kFAQbeuEd/JJQh5ARnNLxoRttTJ5LjTVTvoWhJxHWKz46ozEIGRhFgAFiBncj2n2S5DAwAXyB3Bonk25isyLOooYaDg0luw3jgBF6TQqwUAfHbdoNpYKAIsAmOC9lwnUx3QBfykG20EIeON5HsWclgkPgFffx+i24NTDHiD2eCCTAX8hvVP3TGQWKHU63ItjRfrIFWjAMzcDLE7w4mrn92qjHASFujE9m5NnIUDWwkE1CANZB8z/JWoDnJxxgEDib5GAqJoZ+R90oClgRYNzDuWchgupyigY07LIz0+3GSWK3Ehaxp+Wtv8QpIaWi/oYKs/TW8UcQupUZ0kQ7Qjwcn28gINoRUZiHHJa3A3iQfww58SmhBEwsSsgE+lH/SGNIDNKfADGYJUDVxBFgoT3xFA0sLRGTbTiQzeIk0XksEFlKxziQG258bkYTa5CQpsbtMFdOaBDiTIEjdEWQplB8tnBFf0cDSgl7gE0AfwbqJFGAuYDMjDfHhBFEw7MBGgjuySiR0jCYBRxM47EsVAdYJ9CRBgGUB01JHeLlRjPgjSTMBJiLbtsbCKdRGYmcSLYyqJ36kims6IZIcYZqC18kdzK24UQwnzQTYaNABHPf7LlqN6Bhybq9guIhJc3NJsu0pFqUvBTtlymIFjrkdjhPMJAHyYtPuoh1ChkoX7y7O4v9duO1810sF0kqASRKIonxx3XURfVPrDAxYOXu2lylTvPUCRVEuya7RqCO88IPE73ndA5yJcx8BkJDt+oowSi5OkjfJmxvbZrG4UbS0tPDaa68xODjIDTfcQHNzM++88w4///nPKS0t5f3332fXrl0YjUbuuececnJykCSJo0eP8vbbb5OVlcUdd9zB1q1b2b59OxkZGdx9993k5eXFdhJJIK0E2PHj7bz//h7WrFnKxo0HUasFLrpoOi6XiMGgRaUS0GrVfPDBPgQBli2bzYYNX/DBB3v55S+/QVlZvs/eggmq7jCtsBBeOEWRANAmRd5ZJGIbMknIgQaKU75MBpAzRsfuH9JuOqWo70eoWEhBkujp6aGrq4vc3FxPRfI777yTbdu2sW3bNtasWcMXX3yBzWZDkiQ+/fRT1qxZwzvvvMPZs2c9Auyvf/0rU6ZMoba2Fr1ez6effsrXvvY1PvzwQ1pbWxUBFis2mwOTyQLAwICF06e7efHFz5g2bTKZmXouu2wen3xSz7lzJlpbe5g8OY9rrlnEwYMtOBz+465+YnOzMAO74zwTHywk3yVBRE4smwq+W6lAMWMnwLqBbkl+oURhCghnA5OcTv7v//6PiooKbrjhBoqKitBoNNTX1/PRRx9x1VVXkZOT46koD3IdzldeeQWz2UxWVhYg16Y4ePAgy5Yt47PPPqOgoICqqiqPJpebG6MKmSTSavLCd9wuSeByiZSU5PKd71zB6dNdDA7aGRiwMXduFStXXsD8+dUYjXrU6rQ6TQWFgLhtYIEWvVbL2rVr+fa3v+2pgm61Wrngggu4/fbb2bVrFw6HA6fTid1uZ3BwkIaGBn7wgx9QV1fH8ePH6eqSE2tOmzbNUxG9q6uLw4cPs379ehYsWEBDQ8OYnHsw0koDy8oycPp0F729ZlpaOikoyMJqtaPRqAGvcFOrVVitdkRRwuFwYLf3YrHsQBTzfOxgNsIbaY8wMgDbPXMYYtuzgClCrSpcGKYdOSopXiUt0eGegThH+BF4OCqRh3jJpA85HVs8TCZuLS6a2xHKBub2xHdXindz4sQJ3nvvPSRJYuXKlWzatImGhgaef/551q1bx7Jly/jjH/+I0Whkzpw5bNiwgcsvv5xbbrmF5557jsLCQi688ELMZjPPPPMMGRkZXH/99XGdc6JJm8rcTqeTW2+9kbNnT2Cx2MnI0DF3biWNjWdZvHgGGzceYM6cShob26mpmcyWLYc5//waurr62b79MCUlaq65pozMzJEyWxQlJEkKoKk1E5M1t5vA2YtjwYEsEFPmToSgl/jrf5QQmZvfKOEUQa0KkM2rAIijtkz/INhyv8Vv/r+nw9Z4EEWRXz30ENLvfochwO8ScNBo5Od+hW3DzSbGyhjMQqZWYdtYycoysGrVFej1ArJRx8VXvzoFcDBnTi0Ay5dPAeArX1k0tFUut92WRSifqy++6Ob48VPcdFOW3y8BjEYOwlc+ywh5OG/a+UgM8u7OHOmz2M3YzVLqid+2NNoOTXkEFZhOEf57G1w9Gyry/X40EleWnF4RjkZZ1ENFdAkNU8ndIVmklQArLMziuuvOJzNTQh7aRdpTQ1ed0etVaLWHuf76gQA33e/R6JfgcJxvNgdyIaJkhFDWkzjtL1r85X86MBUoDPyT3QkbG+CrM6CuNLGHbTdBS5TKveLIOpK0EmDyvLO70Ea86rETb08P0uNtAaa6I5nJsxNaODkJ3XwJ2Zky2lOM1c3Cfx+WOPcxWmiQM1LEg53g+Qrd/sbWoXXUjNnwVomFDEyaCbA+5BhCDfELsC7gn0P/u3u+n/bVIsVmlD5N6OSrkTS9gdgESSKM/YdID5+xycRfq7aJ4BYWd6LeBmQ7ZCEwPci6o4ASCzmSNBNgks8SDYFSMfh+56O2SJL363CHCdaUcE2M9PdITzORUS+xXuKxIBGxkKHMRFKAJRHHi8E0pSQ0DEyaCbBY2Y08x+9LkDFeD3B6qPeGi7V2Inta+D/U4UxzLuBw8CYA0TmdthM69DIaJNJD+wJZy403ZVo1siE/EnqBfXEerwK5xkcMKAkNRzJBBJiFiIvUuog86YTbVhXtW9m9XaKM+A4Sn3I/HXARv7CN5t4l4ngx3nO3J76S0HA441iAncWblz6C6Z5e4GSQnFnuUBz/hy9ckkD3dv4amUjojiANbRdptp04Zx0lCQb7wJXGQeLGXNDEYtBvJ7hbjETiZ3Q7h/ZpJupZW8WIP5JxLMBMhK7a44cZeZQZyD7hDoaOJX1XF7FpR92M6myg3QKONNbi9JkxCrBQjrduTTmR9A8tFqKKOAgXC6kIsLTAjpyvKxKFOYy3qUPyjiqDjS77hw4ZibHYhlw9y5dwmhZD+/c/fox2KEmShZAYg6FZTBe7VxAcVvn8I0GtAW2k7hDh6qsIyClyRmEMp9jARpJmAswEfE68ZdoB2a/n+NAT30rgoWA7kbtRDCBPt8fSjmMxbBesGd3gHMVEr6nCYBTGfEMWaIsjXNmFbIkIpt2pgHkkXYCFm4VMs46cMCbqeSsopB2hjPiKBpZEJEni888/Z+vWrSxatIivfOUrCILA7t272bRpE/39/Vx00UWUlpby3nvvkZuby80330xJSUliG+KSZBcJF8FdHfrxelwEMuBakfMZRlsK0oZsmPcnjLbkcoI5UOnJEOvHgxM4RerU7fBnEvGHWzqsYPL3qvFBrZUnBSJCRL5g0WpgDiDK8CTFiD+SURFgAwMDvPXWW9x33338+c9/pq6ujkmTJjFv3jxmzpzJH//4R3Jycjhz5gxqtZpLL73Uk9MooRH1bmN8qE5uZaTLmC8OZDNctDjD7DcIkgjWCD1AEoGI3MxUNYllE78AcznB5W+v9EGrj0KAQWzRGk6iushuI36wdDqKG0USMZvNZGZmUlVVxaRJk+jq6mLSpElotVrMZjPt7e0sWLCAs2fP4nK5ePPNNzGbzSxduhSXy8Wnn35Ke3s7nZ2h4nNC0C95jfHB5KEF+UEM9GC7DbmR+ogNMFIji8Ax1WEb6coQq3E9WM3wcIQL0xxrBoi8s+qITdiJItjM8iPjcsgztFb7kPE/UD6bUUIZQo5kVASYXq/HZrNhtVoZGBhAp9Nht9vR6XTs3r2bmTNnkpmZSWVlJVVVVeTm5nLo0CGWLl2KSqWisrKS/Px8Pv3UGFsDWqXwHtvdyMb0QPMDItBI5G4UZ4lJ27IOgCXefFpDOJBPJ1WHgrFylsiDDvKA2TEcw+WQh5h25GXAKk8f6TMhd4wEmBLMHZhREWDZ2dlMmzaN3/72txQWFtLT00NjYyMrVqzgwIEDrFy5EoDPP/+c7du309/fz2233QbIVYemTp2K0+kkMzOMABOlwLatQL3YXeQbgtvDHHhdIcKpJb6V0sJoTZIUWLOSopA2vs0PxFhOREoETgCrIq4UWlEjEl7xDaXV+COJgW2MKvXoFPFWYiFHMioCTKPRcNttt2Gz2dDr9UPlzkQEQeA73/kOOp08R7148WIWLVqEWq0eVnwgYmzAIWlkzwkkGPrxuj00EVhANeG1b4QTLn14y0mGWVcSoad1pMCKxtw3gJw0IhRjqX0dY2SWmiJgyii2wQTsCbPODOTkqpFgt0C3/0SMAAVlsuE/mbg1MGUIOZy4BJgkSZhMJnbs2MGxY8fQaDTMnTuXhQsXegSV50AaDRqN93BqtXwrfAWVVqtFq43gSQjW06N1ABX9/rr34ft7KCkg+f0fYl3/JktSZAIr2CqJSv2VLAJdunCRV/ESbPQfimgTbwS6Z1KQ7xON4ok/krgEmMPh4PXXX6ekpIRLLrkEl8vF8ePH6ejo4LrrrvMIqYTjRHZCDdRD4qUXr7tDOIO9E1nViKDQtss5NHU/9KBHOly0DR3Cv38kYpawk8QlsfAn0KXrBQ4m6XjVxJYQtpmRVT4zkRO1RoQEphhmpXsBVwyzkEpG1uHEJcC0Wi233XYbgiDQ2dnJ4OAgF1xwAaWlpWELFcSFhDw+ScZcv4PAM5HB2jFARIJTEsEZQ11GcegQyXjBOxjd7NNOEp9F23ffsRBI0EZrzool8sEJUd9URQMbSVwCTBAEtFotr7/+Onv37iU/Px+dTsedd96JwZCE6RobsiOqnti0LRdyeJCL2Iu82vCqLUGM+1bzSGEViTtENyPDImN1a3Ain2qoyxSpnE4HzhE6Ljsf2YcsEmzIvqkO5PvRChiQ63hEGoGUaGKZhbTb7XR2dqJSqfKWPoIAACAASURBVCgqKmJwcBCTycTkyZPRaDRYrVY6OzsxGo3k5+d7TD4ul4vOzk5EUWTSJLmehO/npI2sYiAhRnyHw8GaNWuorKxEEASMxhjdHcJhR+6VsdYNlIa2j0cNsCM/0aFWGZRdIqKlF7l5icAFtDH+3CiCEc6XVEfkAsyOPKx0K+Nnkd+ZhYydAIPoHVnPnj3LRx99RFtbGwsXLkQURf72t7/x+OOPU1lZyTPPPIPL5aKtrY0HH3yQsrIyJEnio48+or6+nrKyMq6//nq2bdvGnj17mDx5MqtXryYzM456cgkmIQIsOzub3/zmN5SVlWEwGHjooYdSqwT5IF7P52DqjA35FR4ohY3vUDFIihvR5R1KRON86sA7WxfNSMRJ8FoU7n2NtkOqlcjPIYPRdamwElhDi6YdDrzuhBnEX08kGsIlNFQhKxIOhwONRoMgCJSXl/PlL3+Zjz/+GLPZzKpVqzhw4ACiKCJJEoODg1RXV9PZ2YlryCDncrl45ZVXqK6uxmw243Q6efnll6mqqmJwMNQTNzYkRIC1tLTwi1/8gurqaoCUUjEBeTwQzpH1HLKFOdhU1jFC9k67NTZj7gByduloGYxxu2TSgaz1RcI0glYzSwrBHGCnE7kbhQnvJMQ0whXrSzyhbGCiw8EzzzxDRUUF3/zmNz1xxC6Xa6g6vX1Y5W5RFFGpVDid8nDEYrF41jeZTKxZs4aNGzeya9cuzGYzq1ev5rPPPmP37t0sW7Ys2acaMQkRYDqdjscee4zKykoMBgMPPPAAOTnxRqwpKCi4CWcD02u13HfffUyfPt0jpDo6OlCpVNTU1HDo0CG6urro6uri9OnTFBQU0N7ezpVXXsmZM2fo7e1lz549TJs2jTlz5tDe3s7AwACFhYXMnj2b9vZ2+vv7U2r4CAkSYF//+tdZtmwZDocDlUpFRkasRqoE0o83p2GsWTU7kVUdkYB2M1EcykMlgTNMOmY7gbWTcE1zINvF/IeDifS0l5C1p1jnNdxEEwXVRWwzoAUktn5uJ7IWrEJODhHp2KGL0Alzc5AnDhJJODcKlUo1bPbfbrezfft2jEYjd9xxBydOnOC8887j+PHjzJ49m7vvvpudO3cyf/585s+fz65du5AkiXvvvZdNmzZx4YUXMmfOHEpLS/nkk09YsGAB8+bNS/BZxUdCBNi2bdvYuHEjBoMBvV7PAw88EJlDajIxE/l4JhjdhLQOSyJY+iJzYnQbhqPFiXwaybZndRFx2ZOEECZfblAMJFaAuduhRh4SRirAegh/DokUYLHMQlZUVHDrrbd6PhcVFfGlL33J87mwsJCZM2d6Pl988cUA5OTkcMstt3i+LykpGfY5lUiIAGtra+Pee++lsrISGEMbmAtZcEWSyzyCwtzxEoHtP+h2ZuTTSYQxPhJ3tVRNn+OPldDmTAFZwEXrFyUhC3DfDhEqbVw4bIRup4noZ4iDxUIq6XTipKKigl/84hdUVFRgMBhYv3792NjAbMh1GiPp8b7W82AppeNEQrb9xzKCbSRxNT1E4ATxDxFTgTZCK9Ya5AzP0QowEW8oqxsX0Q2LfekkdHH2HqITjkosZGASIsAaGhp4+OGHKS8vRxAEsrISqeSHwbdwRiRZI6LZX6C4N8kbBhRN9ohIcOF9K8dyGu5QUP9t06XQdqIIpE2qib2TuzUxFWOo6QggqIMXzZqoEiwhAsxgMPCXv/yF6upq9Ho9t9566+gJMROyegGJ6aXdyFkoIGBPcNqh18fbNJFBvK14k73G6mt7nMAj4mSF8KQaTgLHW1YQm9uDCziK/FjkE0WMZDII1VsVARY97nTPV111lcc4qFar0el0SJI0LBtF0ggyQxgzUpj9SYnXvNxEEBMelmTGG6YLgc4/1lvm1mqjzACdeNyerMGYoEawuLNRvPTSS1RXV1NWVobL5eLkyZM0NDRw9dVXD0ufkxAsyDm8fFOFRWNIcCFra0nu5a140zmHc3cYwJv8Ilab1znkWURIfB3WcLQQ2xxIGfHnto+Gs3jrs+cSdT0NQDbyHxn6v3RoP6OKmuCR5ooGFj1arZYrrriCrVu3snPnTjQaDbNnz2bp0qXJmYl0Ik/txJDrEJBfw30kXUUZxNtZwuE+pXgINzOXTMwxHnu0YwqteIV7rCFAvqFEoxlFAHgLQyoCbBhxZ6NwB3imPQPIHqMBgrAlSQ7ODpZSGGTtye0XFC5izF35RyQ6jUlEntnyH8okMquEa+gYkQ65Yp3Z7CVyZ1wDifWpGsQ7k5k/tP9ocb8HBeRMs6OS2jiemYhxilLY1o17zBfgDSdJYO4JHaQ9iNf2Hw4X8rAxWkVQHNouVt+kSHAhDwuTbe+Jpr5UAYkVYGa8w149sQmwrqFFhVw8ZHRysxNcA5tI08w+JOS69/X1sW3bNnp7e9FqtVxzzTWpEU7kxorXEptmN9rXCTYRXiK+OBipBaXiJfL1OfZFS/wZIWxD+xaQBVksDrAW5HujGtpHUqau3I5gwRo4UfIm+ZEQAfbyyy9jMBioqKhAo9EkNxtrLJwkcqNUimFDdgtIhlA5h6xtpTom4ECA7ycDVXHu+9TQXzWyA2y0AlHCWxsmE6iLsz0hCZVPJ5lqeQqTEAFmNBopKiqisrIStVqdeul0FBTSHbcbRTDdIF1iwRJMQgRYYWEhO3bsoL6+Hr1ez7e+9a3R9cZPErZBuchpsApCLmTHU3fsYigceO0+4YodJRoJWdvyf8ZHM3g7GQSK11chz3DGEkrUgazg6Ig8R5gv7swhochB1tRiQhFgI0iIAFu6dCn9/f309vayZMmS5KWUHmWsA3KJ+WA4kYcgkTw7drzDldFGRPZNGw+xkL70M1IIa5CFTyy2LHe2kGxiE2CR3ONqYhRg4VKyTlDv5YQYq9544w1UKhWLFi3i5Zdfprc3BQxO7oTmA6Td28ltGDYTu3OriHe2zZ3SbCLgLlhlJnanXpfPPhL96LgnDSzEcE/UIZYUMzuPFgnRwGw2G5WVlRQUFKDRaBDFFOguXcjG+zTlOOH9yULhQK7cnQJ3YlRx4fWWzwVmhlg3GIPIkwZuv+dE4s6mYSbKzhdJUvwJSEJOe9WqVRw5coSXX36Z5cuXk5+f6FyUMRBu2s4d5JZo3wS/Q7iTW0QrSFLNlWGikqz7ENN+NSGWCSrA4o6FPHbsGL29vRiNRoxGIy0tLdhsttS3g/XjzWKRpMqxErI2YGfiaUIKCSZcStYJOvEflwBTqVQUFBRgt9uZNWsWgiBgsVhGJwtFvIh4rdpJ9KGxM/6M5wpjhBZFgPkRl+KpVqvJzs7m73//OyUlJVRXV3PgwAH6+sYqtDi9OYds+zpBbEU7JORQo+NAM4rWN4h8LY4Tux+ziDyzeJzEFR2OCV8NTBlCeojbiL9z504+//xz+vr60Ol0TJ48ObWK2qYRZrxpcWKll6Sl+E87HHivZ6xeiSLe9M8Ssvf/mBGsLJGEIsBiweVyMWvWLH75y19itVpRqVQReeJLkoTD4UAURfR6PYIgeL5zOp2oVCrP91HhxJsSQunFCuOJcLOQAb4XRRGbzYYgCOh0OlwuF06nE71ej0qlwuVyYbfbUavVaLVaT3+TJAmbTTZ86PV6z76cTic6nS6lTERxCTBRFOns7GRwcJAjR44giiI6nY5Zs2ah0wWPKuvs7OSPf/wjDoeDa665hsWLF+NyuXj88cdRq9VUV1fHVsbJjjz+UqbwFMYjUdZVa2lp4e2336anp4crrriCc+fO8corr/DrX/+a8vJyXn75ZZqamrDb7Xz3u9+lsLAQSZLYuXMnH3/8MQUFBaxduxaj0cibb77Jjh07ePTRR0P27dEmLsVTq9VSV1eHVqvluuuuw+l0YrVaQ2pgkiSxfft26urquPvuu/nggw88qantdjsZGRlUVlZ6vhNFkebmZo4cOcKgJVF1emLHncPLimycTwVZ6cTbnolu9wqG+xpZSdO4Z7cGFmSRBJETJ07Q0NCA1Sq78JaXl3PTTTcxe/Zsjh07xuWXX05dXR1OpxNJkjh27BgXX3wxgiB47NaiKPLcc8+h1+spKSlBq9Vy4MABTCYTkiR5+mWqkJCR8/bt2zl58iROpxObzUZPT+iSn319fRQVFZGVlYXdbkeSJNRqNffffz+rVq3i3XffpbW1FZAv6IkTJ9i/fz9m89iPC83AXmAPcpaIVBAY7cD+oWXsRXxq0or3Gp0Os27KosFbHNJvERE5cuQIBw4c8AgwlUrFqVOnqK+vJzc3F71e71EuJEmisLCQ7du309/f70n/7nQ6OXXqFEuXLuXEiRNs27aN5557jrKyMjo7O8P27dEmIQJsxowZvPjii1xyySWeCxWK8vJyjhw5QmNjI7m5ubS0tGC1Wj0l2VQqFU6nHNylVqtZvnw5N910E0VFRYlobly4nVNTqVSZRGq1JxWRSPPrFEYDU+s0XHvttaxatcozidbf38+0adO45pprOHjwIBaLBYvFQn9/P4ODg5w4cYJbb72VKVOmcOrUKZqbmxFFkdraWjIzMzEY5FSPy5Yto6uri76+vpRQInxJSCjRJZdcgt1up7GxkQsuuCDkLKQgCFx00UU0Nzfz6aefcsstt7Bnzx4WL17Mpk2bOHPmDJdeeikVFRWe9T3bJqKxCgrpSrBZSPAY8X37S3t7Oxs2bECn03HLLbfw+eefYzKZ2LBhA3fddRc33ngjL774IoWFhSxcuJCPPvqISy65hG9961ts2LCByZMns3jxYgwGA3a7Ha1WS1VVvBnYEktCBNhbb72F2WymoqKCF154gYcffpi8vLyg62dkZHD77bd7PldWVgLwjW98IxHNUVAYf8RQmnvGjBnMmDHD83nKlCmsWLHC87mkpIRLLrnE8/n6668H5PRYtbW1w/al0+m46aabYm190kjIELK3t5eFCxeyaNEiMjIysNtjccNUUFAIieLIOoK4NTBJkli+fDkvvfQSoihy4YUXUlAQSzYlBQWFoLjLqmmD/D5BQ4niFmD19fU89dRTaLVafvKTn1BSUpJSjm4KCuOGKIeQE4G4BdiuXbu47777aGpq4uDBg0yaNAlAEWIKColE0cACErcAs9vtvP766/T19WGz2aivr+fb3/422dnZiWifgoKCmyg98ScCcQuwW265ZVj2CZVKlVo1IROMATmvOXgL1I61X5FvYdV2YstkMd7JR851D5DimeqCo2RkHUHcAiw3N3dCZZ/QAWVD/9uQPbzHOuV+9tAiIWdfUATYSHIY40wS8eJ2ZA02hByV0uCpR1ynLUlSwPz3KpVqbGxgamR1REKWLkpcjUKcCMjCL5s4yqElilCOrIoGFj12u53f/e53mEwmz3d6vZ7vfe975OTkxN24qNHjreLQBjSNfhMUxhdqYAow5kFs4VJKKwIsenQ6HevWrcPpdGIymXA4HKhUqtTPh6+gkI4EE2BKQsPYEASBnJwcNm/ezPPPP09/fz+SJPGHP/whNSoThSIDcId1dZGUFAUCcB6yjczOyCrS/hQgTxJIQ+vGkvaldGg7J7J9bqwnGMYSA1Ay9H/az4nHkNBwIpAQ0199fT1f+9rXsFgstLe343CkQcYlPXJvB28y+QQjIJe5BzkNTzgBljO0SMj58aO9igJQOPS/beh4E1mA6Ulzw70/yhByBAkRYHPnzqWgoIDnn38etVo9rt0o0gUVcmFX9xRLP6mRuyzZCMjalkDsRnc1cg59CXnWOSVQHFkDkhABNnXqVPLy8njkkUdobm4Omw9MIfloAXceAhdQz8Qo76YGphG8n0eCEajFW5EoZVA0sBEk5LTfe+89BgcHMRqNbN26NTWyNqrxvrFi9OgQVKBSy38D/u5ziES/AN0uP4l4w/i6EI3XF3UCbnfS8H1OfJeod+K2gQVaJqgAS4gGlpeXx4YNG6ipqeHUqVOpoYEVIVvFARqAGEpVZheAlA+SBD2tIPp5rGqBeUP/dyPXDkwUbu3JChwiPluWgNe7xIxcLXy8MRXZfgipJ6RzkLVCX3qJ4XkJ5sgqkXonPUrEJbfdSf6/9rWvUVRUxMmTJ7nzzjtTwzNfhdfxL4kamPsQiXx+Er3fZLUzlUjA7U4agbJBq4mynb4JDf0XJR9YbNjtdvbt20dnZyd79+4F4OzZs3znO99Rgrn9MACzhv53Ao1EFoKkw6s9uYa2c8bRjgyfdvjSjFzJOtUpRQ628Cdez0MVUEN8Qt4dJ+svmBIW5RNBSumJRlzXVqvVMmvWLBoaGli7di0ajYYzZ86gUk3Q10EI1HiHOA4if/v6bueMYrtI9ucmnUYgBka2PxEIyDOP8cw6uq9tUjTAcLOQE7TLxSXAVCoVVquVN954g1WrVpGRkcHmzZuZMmUKmZljHjnmpRB5Tl0EzhLYnyAb2et0ENlAESUZQ5uDXBw8lDajQvZPcteY7I7wGO7t3I6xndE3MyhFRO7saSYmk2LE7QglRBL9VOUj3zv3CC1S8hip9SXd5UKZhRxB3NptU1MTjY2N/POf/8RgMDBr1qzU88KfNPTXgewhGkiA5QIVyFIhBgFmxOvY7yC0AFPjFXa9RCfA3JkwTCROgAl4L1EktJM8ATaJ0fWa953riYYCvE7Ko0KoWMh0UqETTNwC7IILLuCqq67immuuSYm6jclAADR6eRZSEsGVwEADNV6twk7k3ve+zpa+WEi+w6qW5GRmEBgdRUKD7KXv/j+W7eLxM4uZKPOBmc1mjh8/jkajYfr06XR3d9Pa2srs2bMxGAyYTCZOnDhBfn4+lZWVqFQqJEnC6XRy/PhxXC4XtbW1tLe309HRQWVlJUVFRSmVbTluASYIAg6Hg0ceeYTa2loMBgN33HEHWVlZiWhfaiBA7pCK4rBBb7iYoCjIAuqG/m9GHuFGghGYHeD7g8hDvGRSQGxaS6qQj5xhIloCuUOMGuHygQUQbCaTiebmZk6ePMmhQ4coKCjgL3/5C7/61a+orq7mD3/4A2VlZRw4cIAHHnjAU/PxzTffpLOzk6qqKiorK9mxYweiKPLqq6/yyCOPpNQEXUImSK699lrmzZuHXq9Hq9Wmhh9YAvF94ST63RPr/gJtN1pxj6nz/o2dRF73USOUBiZI9PX10dPTQ3Z2NhqNhsmTJ1NRUcHBgwfJyMhg+fLl7N6927OJ0WjEZDIhCAI6nWzBczqdvPXWW8yYMYPBwUEuueQSVq9ezeDgIHv27AmY/28sSYjG3tjYyLPPPsu5c+fYtWtX8sqP65GNQL5LNKqA24h0HsETPBmHfj8P2brrvwsNGPPAmAsZQabD8oHyoV1EY5rIxXtasb5Zihl5iUqjbMd4IdDjUkZgN4xgqJDtctE+aknBrYH5LxpwSk7efvttXn31VXp7vUbcyZMnU1NTQ1vb8GGDw+HAZDIxZ84ccnNzOXfuHCD7dgqCwF133UVhYSH79u3DZrPxt7/9ja985SsppX1BgjSwvXv3ctVVV+FwOOjv78dqtSZityPRMVKwdBO5Fdzfeh7ICp6J18BjYURWV7UGsobmKFxOsPbLnvq+FA4tInKmnkhTTucPLRLyTGa0/l4C3vQxvriQL9FYp74ebQzI8zLxoEK+pvHuJ258vWEDoNFrue2W25g+fbrnu1OnTtHS0oLdbsfpdNLU1ERTUxN79+4lNzcXs9mMw+HA6XQiSRIff/wxixYtYuHChezYsYPTp09z0UUX8cQTT2C32/nSl76Ew+FIqRFW3ALM6XQye/Zs3njjDURRpLy8fHQ98TXIhiR/HKRE9HImchNFonMUNTJSa5KG9hHtUFEY2l8ow7OF9BNwWrxG9UDEmhNFhXy9XCTeWK8f2mc0voBA+FlIlWyP9jWwG41GzGYzVVVVLFq0iKamJi6//HL0ej1qtZoHH3yQ/fv3s3LlSurq6mhoaECv13PPPfewa9cuVq1axfTp07ngggswmUy0t7dTW1sb+8kngbgF2CeffMIXX3zBpZdeSkVFhWeGY9TIJrA1+yyyVXwMEfDGNJqB/VFsWxPgO9fQPmLJEzY9zDqHkVPupBMFeF1XEkkmcrSCE9iW4H2XIfvynUOecImKKBMaFhcXc+WVV3o+19XVUVdX5/mcm5tLaWmp5/Ps2d6OtGLFCs//y5cvj7alo0bcAuzSSy+lrKyMf/7zn+zcuZMjR45w8803j54QC/Ya852TD2R39P09mCVQFWYfDMVJikNakZ9qJPj9rx65SsBdhzolNV5NKVJzarg3vTsjcbwGUYnItUOB+A3iqgTsI1A7or0O0awfV5sVR9YRxC3AdDodU6dOxeFw0NnZyZYtW7jhhhtGVwsLRBFea20jsuenL9nAgqH/DcjGKn+qkI0fInJKCD/VR6WG/CHPUvsg9AfaxxAZPofzpY/IsxKokDUDCVmjOxbhdpFQQ/z+Y61AR4TrVhGdMT0QiZiYqEaePPElGlkgIA8AIrUKxdzhwtjAFAEWIzt37uTNN9+kpKSEG264gRkzZoy98AJvpD4EfuWpCO+V6P7eFXgfgiAb9QGEML3J93CBDhEJAt5wlUSa99xhdvESjUDxdQodS+Jth/uejMq5ROkHNhGIW4CVl5fzwx/+kLy8vBFGRDeSJPuonDhxgurqagoKChAEgb6+PhobG8nMzKSmpoa+vj4aGhpQqVTU1dUlLp7yPOS5cBeyXSyQtboQOQ2nCTlWxhcVsuejO3ixZeTmWj3kDDm7WkzgiHAiNnPosCCb7SKNYsogtF3LgXyqo5kTv4jA8ymBGG0352ICa3zRtCMbbyiXL6PilR9OA1MEWGyUlQW6pcOx2+088cQTVFRU8MYbb/DTn/6UzMxMGhoaaG5u5tChQ1x++eV0dXWxa9culi5disslSxnJx0ch5s7odl1xEjxHcAayVTiQcBOQ/RsgqKVbrfFqY/bByA3tOryFOKKJL9QS2i/JhnyqoynAjMSf1iZZGInfj8v3Xo0JyhByBKNSkNxkMuF0Orn11lv5j//4D1pbW5k+fToXXngh559/PoODg5jNZnJzc7HZbGzfvp26ujpycnJwOp18/PHHtLW10dERqYUliWjxRj67Haz8pITWwIghp+QCWxg/CndFIl+cBDbPhUOFrHVEatfqJbYybmNJBpFrUNG4VLhfDg5kwVeE7As2psFxvgkNA6EIsOTh9u4FOQWPOxxBFEW2bNlCT08Pa9asQaPRcOGFF7J582b+8Y9/cOedd6JWq5k3bx41NTXs3TIG1b79MSDnLwY5+rqHEVInI1tefHHYwguwIkYGCAwSUEaGRYtsoI4ECdmNIt0EWC7JcaNw32IH3iQlgdxaRh1FAxvBqAiwnJwcRFFkw4YNdHV1YbVa+eKLLxgcHORvf/sbt912G/39/XR2dtLV1cXevXtZuHAhIAu8srIynE4nBqNBfrp85whcRNfzDMhqjYgsgPzR4H1d2wnv3ZkxtE6w/Q0hCKAOYCyRxJG59n1RDR0ilABzF7KNBz3pJ8ASYXvSMVKpiXkKymdSJxxqiej8KUIFcyvpdJKLXq9n3bp11NfX88ADD2AwGLBYLFgsFlauXEl/fz9ms5ns7GxOnTrFZZddxrx580buyAjUCcMNLb3A8Qj1EzXefMom4GiAdfLxWnuPETpMSYs3lUSYqh5qLRScN/J7uwX6QqSg0OMtHBKMFuBMmHXCMZX0K4KbiMDqahIX46jRQn4pETXM4ZLdcKI7AIoR349REWCCIFBaWjrM69eNf2hCRUWIqDO316HKNz1EFN3O12sxlLdouHViWDfWFEqJcPiM5Bi+fycSCc9BJkR+r6MPJVIFb2wK5egaTUZFgCUVHYFTY1qAgTDbuY3xrQR0jSAXr/t8F6Et4gaf/ZmQ3S0iQK0BQ4AAf5tZHl5GQhaBg7gD4SDy2Pd0R4d38jgY0fhvqTWgDTEbEOnwMTaGvPWC5lGamCpY+guwTAGmBLirZyUYCKGdZeDNateGXLran5KhxYXs4xDCxkUmXuP+CSIWYBod5PhZ7iVJ9iNzRSjA3NkvImGAiSPAjCTW+K7Rj7xXo4fb3TiYppX+XTkWxu9Zq/FaY+2E9yfQ4jXIB7JmGwicHiKQoNIRet4+2HY+BDL4D9uFBGIMlnv3pECysRLaphbIeJ5oYvaOHzLGawDBJY/c1EIMNquEoyO4AJuY05DjV4AVAgVDN/uYFN5LdBIwFzlH2Em/39xBiP7YgX2MFI7ubIbBcCKnlQghgHLDVNlwWKHXP2IgAjKA+dFvFjX1hE5tXUXynUJjtQppdZBXCnYJDF2QmwMFSS85FA530NLEFFTBGL8CTBB8rNPSyKc5kHogMNxqLvl97487hUOwfQVtW5B9St6mhyWFJwXcHgLhLkHKdsWhhgs+9ynkPYnlgka9TSgBJpH8Ui6pyfgVYL5UCSPv7wBw0it5HE4QRVDlg00Hei0Ip/Bobic6IS8DMnWg08hDOLMLpBrI0IJW7fNMthDa0KRBTmHgL/haibhWmlYX2C0jEJIku2qE8jdLNDMI3aVGW6Ex5oIhQld6X2ElIWtikiSfjxPQ+/zuAuonQd0kECXQqeTnwCWBVQSjOoisshHlRXDbwIKJ/XTz4ksMKfsSTCh6ATL8Fr+H54Pt0NQGLgH+6x1oH4QeK3T0y8Z0o1b23njsQzh6Fho74aG34K/74eQg8tjMHQwYzlYi+K3vXqJ4nQgqeQIgoiWU7TcJCMgmQ//Ti/FUE4JKHfn1Umu9QmxAhJcGZEHW7IS/9EOvC865oE+UTzYnG4464HenoFsNYgZ80AffOwSOYBciQLhZeLTID26gZWLoIv5MzLMGWYBUDz1BJyQsNnC65Ddtvxle+Rjazsja1vJaON0DFcVwoBc2HYPFU+SH3KCFbH/X7WJGVme1Ed7btJDILexW5NnTSBDkPP6RumWMR7QxuteLgDkbpCngtEDHWfjRIMwrrKT/fQAAGMFJREFUgtMm+H45/O9pWFAEu7vhwgKozISTA5CrJYHewe4hZLC3Y7yxGOnJxBVgOsHrt5UnIQjeZ01CHk5e8WUoyIXP9oPBCMbJMKsK1iyQhdYvroZjHfC3nfCjFT77zmVkljwz4QVYNpGXpTYRsQAThMiHTwrDEQRkjakEpH4QzJCtg2/NhicaoCMHbN0wLQsuLIQvT4Kf18O8PPi8C9qsUGlMhJ+pewgZTIBNzK6cZmetR57ei+RpMBN5di3IyIJDrWDIAbtDtoFptaBSeTUzSQJBA31aUOnl31QD4NCDmElox1kV4b0q3UjIAiqUzUoTxf6CEaDq0rhCS+QvhACIImgGoMsGZwbhYB8U6cEypOyokG1d7kkLiwtsLrisBM7Z5PUGnUO2QD9NTBz5VRgE5Oc/WJdNgQo2Y0CaCbBsYAmRNfsY8EVEe5UkcKrg18+B0wpTi6DhFOw4BDotnD4LWg1s3Q/nemHNLqitgqNDCbcW1MK/foicmSIRSMi5mZM9KhhgZKrt8YS7BFCMiBIclsBghes3g0YFi/LhiAl+cQD29UDDADSYYNAFn52DbZ2wIB8coizE/npyeOSbG7MTNJGGT3gYKgIZkDTrygliHJ+1b1oJN8E9SBcuhFtvFRD6pcCJ3cNN8gwwMpOr/6EjnSiSkD37Q3n+++IitppoesZ3AKQRuapvHFwzFJwtgKxy+fSY66qHr/t1P7f/r00hKN022BlV73PbwCJPR+FwOOju7kYQBAoLC7FYLPT391NcXIxGo8Fms9HT04PBYCA3N9eT8koURbq7uxFFkaKiIlwuF11dXWRmZpKVlRUw6/JYMY4FWBWyR6kvduBD/CWDIEBlJSxbBoIkjNTtXcBBKbQACueKM4hcGCQSJKJLD3GayA36vhRFcYx0JZHe8wUkLDapvR/qo6pjF0qAQaCu3N7ezocffkh7ezsXXHABDoeD5557jscff5zKykqeffZZbDYbZ8+eZf369ZSWlnoK3O7du5fS0lJuuOEGXn/9dc6cOYPNZuOhhx4iJycF8vINMY7dKFQErMEeTuVQCXLcyLAl/GbDMmYGWqItdeMuoRXJEutdVIVp83hYEok7J1cilpja5v88+y5qnE6np8o2wHnnncfy5cspKSmhr6+Pq666ioULFyKKIpIk0d/fT2VlJTqdDodDfju7XC5efvllbDYbdrsdq9XKgQMH+P73v09FRQWHDx+OpeFJYxxrYIFQIZdl8FelLIT0IBWQZxVD2aTshI6dUSO/wSPVeMIZ8X1x5/OPlvFuxPfF7XsVD2OeU9rtBzYSh0Pi6aefpry8nLVr11JSUoIgCNhsNsxmM5mZmahUqmHDRI1Gg9lsxuVyYbPJkwAul4ve3l5uvPFGNm7cyM6dOxEEAb1ej9FoxGJJrQdmggkwLXBRgO9bgS0ElS6qIBkvfOmWQidWNBC+PLYbCTmYMNJnpZjAKYXCcYbgRU7GG5OI2x42trhnIQMLMK02g/vuu49p06ahUskq+blz59Dr9cyaNYv9+/fT09NDT08Pra2tFBQU0NraytVXX825c+fo7u5m37591NTUMGfOHDo7OxkcHKS4uBiDwcCOHTs4evQoS5cuHb1TjoAJJsBC4R5iOokpLMM9YvUn1ggPLaE1MHdcSzyoGf2YnrFizDNJxItbAwteGFKlUqFWe0/UYrGwZcsWMjIyuOOOO2hoaKCoqIhDhw5RW1vLt771LXbs2MGsWbNYsGAB27dvx+Vycc899/DJJ5+wYMEC5s+fT3FxMZ988gmXXXZZ6ISjY4AiwDxMQ0450Qzsjn7zXGCen5YmAoek2Fx0ZoT5vZ/AKbGjYRKxaW7pSOpMnMWBO2woECO7clVVFXfccYfnc3FxMUuWLPF8Lioqoq6uzvN52bJlAOTm5nLbbbcN289dd90VX9OThCLAPLjnyGN8VQvCyE2jSXc9bLsImpGI6ZdxPIUz/ghtAxsHKmZMKAJsBKXACr/vXMA2olalBGBaALcMJ3BCis13y00mckaLSJCQC45MzIQF8TGJkbXuEkEPkfpZD+F2o4hcA5sITMyzDol/3TaQe34M6oogyILGH0eA/GTRoibyMBkXirYVKzriCkcKip0Y7kloG9hEJM0EmBF5Ki/YTbQhJ6RPNCpgJiNVGCfQQNTJ5FRAaYAcZb6clRIXSqQCJhOZxudCjigYbw6uecTmBpEyPpvuWchgviCJqJKZfqSZAMtAtm4Hu4kmoJHE9z41ga3qg8hjsygFmFoIPaUvSXJCxEQJMAFZgEWCHTmUahSTH44KuUR+DVISxQYWiDQTYOFQEzg+po/kGIBUQ8dzIWt/CYyMzmTk3ZGQnWWTqR0JyJpKvLnDzHHuQ0C+BomaPUx7d5HoQ4kmAuPsrI3AlwN8v5XQkdaxogeWDf1/eug4CSKQ46wLqA8TkxkvGqA27FrhOYCsoMbTjpkotrth6Ahea0nRwMYBwV7XauQ3l0Ric9T4Hi+BnqzBov0FST4VdzKpZGRYTYTG406OEE+fcj+Z48J/KxGEc2QdZ105QibIWS9C7u124J9EnqcmGiYDV/t9JwIbCR0kGQUqYJbgHUoeS2FL+3TiG+qmdNmiscAdSR5MgE3MizVBBJjbAKIiea90NSPzj7kSezxB8D6/thQWXm5lQSHBBHLxcTMxL3haCTCz2UZHh4kpUwx0dpqGErV5nXS6uvo5fryNmprJCIJAXl4mJ0600909wPTppRQUGBCEAuRhnQPfarfnztmwWFwYDGqam82UlxvRar1vtX37eigu1mOziZSXG3G5JA4d6kMUJWbPziUjQz26id6C+YHFazxXSFGUIWQg0uqsT57s4JNP6vn2t1fw2WdHsNmcVFdPor9/kGnTSsnPzyQ728hzz22mp8fMmjVLaGhoRaVS8X//t5t/+ZfVGI3uWLAO4FPPvjdtOktLyyBTp2bx3//dyI03VmC3i/T3O/jSl4rIytLgdEr89Kf7uP76ci6+uJhz56ycPm1h9+4e7r03QZnuIiUDmBlAYB6SEjZiVUglFDeKQIyJAJMkCYvFgtPpJCsry5P+w+l0Yjab0ev16PX6sBpNe3sP7767i1tvXcYzz3zEzTdfzPvv7yUvz4hWq6akJJc5cyrp6upn587jyHne3Pv0NbqPTHT4j3+043SKFBXp6eqy0d/vpLY2m+xsLWVlGUyapKevz8jevb1UVgZyt3fjfmsmeAIh0LWRUnhYqRAn4UKJFAE2apw9e5Y//OEPAKxYsYJly5YhSRKvv/46R48eRaPRsH79ejIzhwsGtVqFwyF7WDoc/397dxrb1JU2cPxvX984Nllskw2yQwIhEaEUVCoSBiEBhbKoVIS1rZjStF+QQKqqUlVq+2o+tHRKpxq10BZGIkhUoojlRYU2ogEmbwsoDIQhxHE2ErI4pCnZnXi7vu+HTG5J2RlBbHp+kpVEN3aOb64fn3P8POcoSJJETk4yf/pTNqWldvz+oWMxMVEYjQZiY6Pp6nLxj3+U8OKLszCbb/7n24CF//n+3+h0F1GUoQCgqipGo55nnx2LxRLGP//5CyaTRFiYREyMkezsaIxGifHjTUybZqGi4k67H+mBuQyN6XoY+gBBEB6WqIX8vcf+rFVVpaysjBkzZjBjxgx27drFnDlz8Hq9lJeX884777B3715qamqYPn06qqqiqiqBQICxYyO5cqWJEyf+zb/+Vc8zz2TS3d3PwIAHr9fP4KAXr9ePwSBht7cwcWICX399guTkoWrcnp4BDIZb36ncbhg71sixY06mTIlCUVT0eh0eTwC3W8HtVtDrddrX8+dvkJIyhuvXB+ns9DI4qOBy+bn9hP1wPsHwqX7EvaQB/jirrIawAffQrkf3715DSBHAHpu+vj6SkpIwmUz4fD4tSA31fIxEREQwMDCUBenz+di/fz8NDQ3U1bWQljaOv/71DLGxUQwMXKery8NHH/0fLS069u2roqfHzS+/tFJd3cbFiyfp6HBx4UIvP/zQzJQpScjyrQGsq8tFXFwuZ88GKCnxk54+kfZ2BbtdQpJ09PQkIEk6Kisl3O5U/va3AVJSoKVFRZLCmTAhhr/85dbaG0VRaGtrIzExEZ0uHMh71Kd2KID9F5P4breb7u5uEuITQiYHS1VVmpubSU5ODqodc+7G7VHQmcO09evvbbgW8k6JrCKAPTZpaWmUl5cjSRI2m426ujoSEhKQZZna2loaGxuZO3cuALIss27dOvz+ofmjrVu3anNmwa6/v59du3axZcuWkHlhNTU1cerUqREL4QW7QCDARx99FFLXxuDgIDt37nyA60Isp3M7j/1Z63Q6Zs6cidPppLKykvXr13P58mViY2N56aWXKCkpIS8vj9TUVO33h5fJTU9Px2AwhMxFGhYWRmpqKgaDIWQC2JgxYxg/fjyS9JjTQv4LiqKQlpaGJEkjllQOZrIsP8TyzGI5nd/T3aMLGzQfa6mqis/nQ5blkHlhhWKbA4EAiqKEVNANxfP8IG0OBAL8/e+f8uc/P0d09K3Jf6oK+/b9L7NmPU9m5v3uHBNS7niCgrorMzg4iMPhoKOjAxjq0QA4nU5qa2u1veyCSV9fH3a7ne7uoU8mw8LCGBgYoKqqivr6em0oHEw6Ozux2+24XC70ej2yPPQu39rait1u1+Yjg4WqqrS3t1NdXY3H40Gn0yHLsna9XL9+/QHmlh4Pr9dLXV0dTqcTVVW1Nl+/fh273U5nZ+c92nzzJP7tbmIIGVQCgQB79uzB5/PR1tbGW2+9hc1mo7GxkV27dmGxWEhPT2flypVB867r9Xr5/PPPsVgsXL9+na1bt2IymWhvb6eiooKamhqeffZZ5s+fP9pN1fT29vLpp5+SmJiIy+Vi8+bNyLLMpUuX+P7778nIyMBisWA2m0e7qZr29nY+++wzEhISiI6O1ubrvv76a8aMGUNrayuFhYUkJiaOckt/09XVxdGjR+np6eH9999Hp9Ph8/koLS3F6/XicDjYunUrkZF3W/71bsvp/DGHkEHbA/P5fDQ0NLBx40YmTZqEw+EAoLy8nDlz5rBhwwbKy8tHuZUj9fb2Mjg4yGuvvYbJZKKlpQUYmrubMGHCiPm8YNHa2orNZqOwsJCuri56eobKq44ePUpnZyd1dXXapqfBwm63k5uby8aNG6mpqdF64k6nkwULFmA0Grl48YEWnH/k4uLiWLt2LQbDb30GWZZZtWoVK1euRFVVvN67LTJw84qst7vd2hcJBAJ4PB48Hg+qquL3+/F4PAQCgRHHhzMB4Lehrdvtxuv1oqqqtvHtzb8XLIK2BzZ8ovR6PQaDQRt6+f1+ZFlGr9cH3clUFEXb/dhgMGgXCoDVaiUmJoYbN26MYgtvdfN8183ntLe3l2XLliFJEidOnKCwsDBoerq/nzsaHpIVFBRw6NAh2traRmwXFgxud+50Oh1ut5t9+/aRl5eHzXa37dXvlgemcruXcnNzM0eOHKG7u5tFixbR3t7OgQMH+PDDD0lMTOTAgQPU1dWhKAqbNm3S/v62bdtQFIVJkyZRUFDA/v37aWxsRFVVNm3ahMVieZhT8EgEbQALCwvDarVy8uRJHA4Hubm5nD17lsmTJ3Ps2DFu3LihfVIZLKKiovD7/Zw+fZqOjg48Hg8VFRWYzWZ6enowGo24XMFVqJiQkIDT6eT06dPo9XqamppwuVzMnj2bmpoaDAYDcXFxo93METIyMigqKiI8PJyYmBguXrxIRkYGNpuN2bNn09XVxbRp00a7mSN4PB7sdjtOp5Nr167R0tJCdnY2+/btY3BwkLy8PHw+nzbPezOdToeiKNTXNxERcfuF/dvbf6WxsRG9Xk9SUhJGo5GkpCTWrFnDTz/9hMPhoKCggCtXrmg9qaqqKubPn09JSQnd3d1aAPN4PFitVtLS0gBwOBwsXryY4uJient7gyqASR988MHdjt/14KOWlZVFc3Mz+fn5JCcn4/F4yMnJITw8nEAgwJIlS+6rZvJxMRgMZGZm0tTUxOLFi7V/tCzLVFdXEx8fz8KFC7VJ8mBgMplISUnB6XSyfPlyZFnGaDQybdo0XC4XVquVefPmBVWbLRYLVquVvr4+li9fjs/nw2Kx0N/fT0NDAwsWLCA9PT1orgsYShCuqqpi3LhxmEwmTCYTNpsNl8uFyWSir6+PlJSU2wYwAKMxnKoqB62tztvezGYzLpeLjo4OkpOTMZlM6HQ6rly5QmlpKZmZmWRnZ3Pu3DlycnKIjo6mqqqK2tpaurq6yMvLIzo6GoDMzEwyMjL45ptvyMnJ4dq1a9TX19Pd3U1+fv495ukeif+504GQSaMQhD+yB50u0el09PX14ff7qa2t5ccff2TLli1s376dFStWkJqaynvvvcfbb7/NoUOHyM3NJTU1ldjYWHp6epBlme3bt7Nu3Tp2797N1q1b2b9/P7NmzWLWrFmP6Fne+enc8YAIYILwZKqurubYsWPIssySJUu4evUq3333HXFxcbz66qtUV1dTVlaGzWZj9erVnDhxgvz8fIqLi2lrayM7O5vnnnuO0tJSLly4QExMDKtXrx6NT6RFABMEIWSFZiKrMERV1ftIdLz/x+rp6XmoJGCv10tv729bxymK8kDtUlWV3t5eFOXBNp182PsJTz4RwEZJb28vhw4dQlVVOjo6OHbs2B0DgaIoNDQ0jEjLuJe+vj4OHjx42/sUFRXR2NioPfaOHTvYtm0bRUVFDA7eeS2e/v5+nE4n586do6qqCr/fT0NDw323yePxUFRUhNvtvu/7DDt16hQVFRUPfD/hyRa0aRRPOrfbTXl5OcuXL6evr4/KykpmzpxJUVERfr+fdevWUVlZSVVVFRMmTKCzs5MxY8Zw9OhRmpubWbZsGXq9njNnzpCens7SpUv56quvMJvNREZGMmXKFHbu3El3dzezZ8/m+PHjhIWF8corr+Dz+UYkM167do3NmzezY8cOzpw5w+XLl3G5XKxcuZLe3l5KSkpITExk9uzZOBwOzp49y40bN9iwYQPV1dVkZWWxZ88eOjs7Wbp0KQA//PADiqLw/PPPM336dHQ6HbW1tdr8ybZt2wgPD8dgMGAymejp6eH1119n9+7dBAIBVFUlPj6e5uZmCgsLeeqppzhy5Ai5ubkhU8wvPHriShhFDoeDjz/+mC+//BKXy0VxcTFTp05l/vz5HD58mKamJlJTU5k/fz41NTWkpKSwfv16LBYLaWlpFBcX88Ybb9Da2kp1dTVXr15l9erV1NTUEB0dzaxZs3j55ZexWq1kZGRQX19PWVnZLe3o7+/n5MmTdHd3U1lZSVJSEi+88ALffvst58+fJykpifz8fFwuFy0tLUybNo01a9aQlZVFbW0t58+fx2g0snbtWg4ePEhHRweyLFNQUMDx48e1YNnc3ExcXBx+v5/6+npWrVqlBW69Xk9NTQ3V1dUsWrSIrq4uxo0bx/jx47l06RJWq5Vff/01KGtJhdEjAtgomjx5Mm+++SaFhYWYzWY8Hg9RUVFERUXh9Xq15XiGc4MGBwfZu3cvK1asIC4uDkmSiIiIwGw24/V6tWz/8PBwLTtdp9Nx6NAhXC4XNpuNvr6+W9ohyzITJ07k3XffJT4+nsjISCIjI1EUhVWrVmGz2fjiiy+0MqObM/dhaG4sMjKSiIgIAoEAOp2O5ORkxo4dO6L8xGw2a8NHi8VCbGws8fHxxMXFERUVhdvtJjo6mri4OGJjY0lISNBypfx+f0itkCE8HmIIOUr0ej1jx45FlmVMJhMWi4V58+axZ88eAF588UXq6uq0RF2bzUZZWRmVlZVaGU1OTg6ffPIJZrOZSZMmcfbsWWAoOERFRWE2m9m/fz/x8fFUVFTQ39+P2WwmOjp6RGLq+PHjmTp1KhEREeTn5/PVV1/x888/s3DhQi5cuIDdbic2NpaIiAiioqKYOHEihw8fJjw8HKvVytNPP82OHTuw2+3MnTtXC6iSJGGxWLSgk5WVxaVLl1BVFZvN9p+t7yxIkkRkZCRGoxGr1YokSURFRREWFobZbCYQCFBbW0tOTs6IWkJBEGkUo+Tm9aCGC2YNBoNWQGs0GlEURevp+Hw+9Hq9VlgdFham/SzLMgaDQXu8m78GAgFkWcbr9aLX65EkCVVVkSRJq328ubZwuKg4EAhobRg+LkkSijK0mYrH48FgMKCqqva3FEXBaDRqy4NLkjTisRVFobS0lGeeeQZZlke0dfi5KoqCLMv4/X6trcP7KGRlZd2jXlB4Qok8MGH03XytPchQ8GHvJzwxRAATBCFkiURWQRCePCKACYIQskQAEwQhZIkAJghCyBIBTBCEkCUCmCAIIUsEMEEQQpYIYIIghCwRwARBCFkigAmCELJEABMEIWTda20SUTkrCELQEj0wQRBClghggiCELBHABEEIWSKACYIQskQAEwQhZIkAJghCyPp/8a+pFi3GNv4AAAAASUVORK5CYII=", - "text/plain": [ - "
" - ] - }, - "metadata": { - "needs_background": "light" - }, - "output_type": "display_data" - } - ], - "source": [ - "import matplotlib.pyplot as plt\n", - "import matplotlib.image as mpimg\n", - "core = mpimg.imread('Results/cache_thermal.png')\n", - "\n", - "plt.imshow(core)\n", - "plt.axis('off')\n", - "plt.show()" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "### 7.2 Signal Integrity Analysis\n", - "As data transmission rates soar into the tens of gigabits per second, digital signals exhibit characteristics reminiscent of microwaves, becoming vulnerable to reflections, damping, and crosstalk. An overly ambitious design can easily be compromised by impedance mismatches or interference among copper traces. As a consequence, in the design process of 3D ICs, SI analysis stands as a crucial element.\n", - "\n", - "The key for SI is to extract the s-parameters of the circuits or the chip. We consider studying the transmission performance between the V-cache die and the core die, as shown in the figure:" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "Similarly, when delving into the intricate details of the chip, 3D components such as TSVs also require corresponding modeling. We have investigated a range of existing open-source EDA software and initially considered utilizing OpenEMS, an open electromagnetic field solver that employs the Finite Difference Time Domain (FDTD) method, for this purpose. However, the primary challenge lies in the fact that there are currently no open-source tools that can convert GDSII files into the three-dimensional mesh required by this software. Therefore, we are exploring a compromise approach. Firstly, through circuit modeling and RLC parameter extraction, we abstract the respective metal stacks into electrical circuits. Subsequently, we leaverage an open Python library called SignalIntegrity for S-parameter extraction. Finally, by combining information such as the dimensions, materials, and external environment of the 3D chiplet, we aim to obtain eye diagrams, Smith charts, and other relevant metrics.\n", - "\n", - "As of the submission of this paper, our SI analysis is still ongoing. We are committed to developing a comprehensive 3D IC design flow, which encompasses every aspect of the design process, ensuring a seamless transition from concept to implementation." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "## 8. Conclusion" - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "In conclusion, we have designed an open-source 3D RISC-V processor for this competition. To realize this architecture, we have developed Open3Dflow, an innovative open source 3D chip EDA Design Platform equipped with TSV and thermal modeling. This platform leverages existing openEDA tools, incorporating appropriate abstractions and modeling techniques tailored for 3D design. Additionally, we have adopted the openPDKs to facilitate future openMPW tape-outs.\n", - "\n", - "Our design mimics AMD's 3D V-cache structure, featuring a cache die stacked onto the logic die. The back-end process incorporates distinct technology processes, sky130A and GF180, for the two tiles respectively. To further enhance its compatibility with advanced packaging, we have incorporated bonding pads for hybrid bonding, along with TSVs for electrical transmission. Furthermore, we have thoroughly validated our design through thermal modeling and SI assessments, ensuring a comprehensive evaluation of its performance.\n", - "\n", - "Looking ahead, our 3D RISC-V CPU design, powered by Open3Dflow, holds immense potential in driving innovation within the semiconductor industry. By enabling the creation of more efficient, reliable, and cost-effective devices, it marks a significant milestone towards the realization of a fully open-source process for designing 3D chips. However, our current design remains a preliminary blueprint, and we eagerly anticipate the development of more realistic and feasible 3D chiplets within a fully open-source toolchain. There is ample room for improvement, such as optimizing the thermal performance of the chip, enhancing multi-objective optimization for 3D interconnects, and gracefully resolving DRC issues arising from chip stacking through the integration of two PDKs. We are committed to continuous progress, employing more comprehensive modeling techniques, developing new tools, and realizing increasingly complex designs to refine our design platform." - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "x6zyRsZi7kL2" - }, - "source": [ - "## Quick Start\n", - "This chapter is a collection of all the codes. If you only want to replicate our simulation flow, a summary is provided here. When running, please do not execute the previous codes." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "#### Prerequisite\n", - "- vnc (https://www.digitalocean.com/community/tutorial-collections/how-to-install-and-configure-vnc)\n", - "- docker （https://docs.docker.com/engine/install; ps. Colab doesn't support docker, you need to use your jupyter notebook to run these codes) " - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "GNVlNZEo7kL2" - }, - "source": [ - "#### 1. Pull the environment" - ] - }, - { - "cell_type": "code", - "execution_count": 1, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "latest: Pulling from b224hisl/open3dflow\n", - "Digest: sha256:9c3d749d616d89b7e1b938f5bdd9cd7446bfb51aecb905d1962a49de9aef2942\n", - "Status: Image is up to date for b224hisl/open3dflow:latest\n", - "docker.io/b224hisl/open3dflow:latest\n" - ] - } - ], - "source": [ - "# pull our image:\n", - "!docker pull b224hisl/open3dflow:latest #For it's about 15GB, it may take a while\n", - "!docker tag b224hisl/open3dflow test # rename your environment" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "5GvkCWk47kL2" - }, - "source": [ - "#### 2. Clone our source code\n", - " The codes include: riscv32i RTL, gf180 sram marco file, back-end scripts, Open3DFlow platform, thermal config etc." - ] - }, - { - "cell_type": "code", - "execution_count": 21, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Cloning into 'Open3DFlow'...\n", - "remote: Enumerating objects: 824, done.\u001b[K\n", - "remote: Counting objects: 100% (34/34), done.\u001b[K\n", - "remote: Compressing objects: 100% (27/27), done.\u001b[K\n", - "remote: Total 824 (delta 7), reused 27 (delta 5), pack-reused 790\u001b[K\n", - "Receiving objects: 100% (824/824), 113.77 MiB | 4.14 MiB/s, done.\n", - "Resolving deltas: 100% (197/197), done.\n", - "Updating files: 100% (787/787), done.\n", - "Already up to date.\n" - ] - } - ], - "source": [ - "!git clone https://github.com/b224hisl/Open3DFlow.git\n", - "!cd Open3DFlow\n", - "!git pull\n", - "!cd .." - ] - }, - { - "cell_type": "markdown", - "metadata": {}, - "source": [ - "#### 3. TSV Modeling\n", - "spice simulation in KiCAD: (This has been integrated into our environment but we cannot open its gui in this notebook, so we just put the codes here and simulation results are in previous section)" - ] - }, - { - "cell_type": "code", - "execution_count": 3, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Writing tsv.spice\n" - ] - } - ], - "source": [ - "%%writefile tsv.spice\n", - "## take frequency of 80Mhz for example\n", - ".title KiCad schematic\n", - ".save all\n", - ".probe alli\n", - ".probe p(C_insulator3)\n", - ".probe p(C_insulator4)\n", - ".probe p(R_TSV3)\n", - ".probe p(L_TSV2)\n", - ".probe p(R_TSV4)\n", - ".probe p(V2)\n", - ".probe p(C_insulator2)\n", - ".probe p(L_TSV1)\n", - ".probe p(R_TSV1)\n", - ".probe p(C_insulator1)\n", - ".probe p(V3)\n", - ".probe p(R_TSV2)\n", - ".probe p(C_IMD1)\n", - ".probe p(C_Si1)\n", - ".probe p(C_RDL1)\n", - ".probe p(R_Si1)\n", - ".tran 31.25p 12.5n 0\n", - "C_insulator3 unconnected-_C_insulator3-Pad1_ Net-_C_IMD1-Pad2_ 164.343f\n", - "C_insulator4 Net-_C_RDL1-Pad2_ Net-_C_insulator4-Pad2_ 164.343f\n", - "R_TSV3 Net-_C_IMD1-Pad2_ unconnected-_R_TSV3-Pad2_ 0.00347282\n", - "L_TSV2 Net-_C_insulator4-Pad2_ Net-_L_TSV2-Pad2_ 6.19242p\n", - "R_TSV4 unconnected-_R_TSV4-Pad1_ GND 0.03\n", - "V2 Net-_C_IMD1-Pad2_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", - "C_insulator2 Net-_C_insulator2-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", - "L_TSV1 Net-_C_insulator2-Pad1_ Net-_L_TSV1-Pad2_ 6.19242p\n", - "R_TSV1 Net-_C_IMD1-Pad1_ Net-_L_TSV1-Pad2_ 0.00347282\n", - "C_insulator1 Net-_C_IMD1-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", - "V3 unconnected-_V3-Pad1_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", - "R_TSV2 unconnected-_R_TSV2-Pad1_ GND 0.03\n", - "C_IMD1 unconnected-_C_IMD1-Pad1_ Net-_C_IMD1-Pad2_ 4.11862e-16\n", - "C_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 1.27899f\n", - "C_RDL1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 2.79443e-16\n", - "R_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 27188\n", - ".end" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "zhOlzyTg7kL2" - }, - "source": [ - "#### 4. Chip hardeninng" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "hlB-TWHN7kL2" - }, - "source": [ - "i) write the configuration files of the core die and cache die:" - ] - }, - { - "cell_type": "code", - "execution_count": 4, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Writing core_die.mk\n" - ] - } - ], - "source": [ - "%%writefile core_die.mk\n", - "export DESIGN_NICKNAME = riscv32i_3d\n", - "export DESIGN_NAME = core_without_dmem\n", - "# top = dmem + core_without_dmem\n", - "export PLATFORM = 130_180 #sky130 & GF180\n", - "export PLACE_DENSITY = 0.5\n", - "\n", - "export SYNTH_HIERARCHICAL = 1\n", - "export RTLMP_FLOW = True\n", - "export MAX_UNGROUP_SIZE ?= 1000\n", - "\n", - "export VERILOG_FILES = $(sort $(wildcard ./designs/src/riscv32i_3d/*.v))\n", - "export SDC_FILE = ./designs/130_180/$(DESIGN_NICKNAME)/constraint.sdc\n", - "\n", - "export DIE_AREA = 0 0 1200 1000\n", - "export CORE_AREA = 20 20 1180 980\n", - "\n", - "export PLACE_DENSITY_LB_ADDON = 0.12\n", - "export MACRO_PLACE_CHANNEL = 6 6\n", - "export TNS_END_PERCENT = 100\n", - "export MIN_ROUTING_LAYER = met1\n", - "export BONDING_LAYER = Metal4\n", - "export MAX_ROUTING_LAYER = $(BONDING_LAYER)\n", - "\n", - "export IO_CONSTRAINTS = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/io.tcl\n", - "export IS_CHIP = 1\n", - "export MOTHER_PIN_GEN = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/pad_gen.tcl\n", - "export TSV_DELAY = $[from_3D_times]\n", - "export PDN_TCL = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl" - ] - }, - { - "cell_type": "code", - "execution_count": 5, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Writing sram_die.mk\n" - ] - } - ], - "source": [ - "%%writefile sram_die.mk\n", - "export DESIGN_NICKNAME = fakeram4\n", - "export DESIGN_NAME = dmem\n", - "export PLATFORM = gf180\n", - "export MOTHER_PLATFORM = 130_180 #sky130 & GF180\n", - "export PLACE_DENSITY = 0.7\n", - "\n", - "export VERILOG_FILES = ./designs/src/riscv32i_3d/dmem_real\n", - "export SDC_FILE = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc\n", - "\n", - "export DIE_AREA = 0 0 1200 1000\n", - "export CORE_AREA = 20 20 1180 980\n", - "\n", - "BLOCKS = gf180mcu_fd_ip_sram__sram256x8m8wm1\n", - "\n", - "export MACRO_PLACEMENT_TCL = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/macro.tcl\n", - "\n", - "export MACRO_PLACE_HALO = 1 1\n", - "export MACRO_PLACE_CHANNEL = 0 0\n", - "\n", - "export PDN_TCL = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl\n", - "\n", - "\n", - "export GPL_ROUTABILITY_DRIVEN = 1\n", - "\n", - "export IS_CHIP = 1\n", - "\n", - "export MIN_ROUTING_LAYER = Metal1\n", - "export MAX_ROUTING_LAYER = Metal3\n", - "\n", - "export MOTHER = riscv32i_3d # mother die is logic part\n", - "export MOTHER_PDK = 130_180\n", - "\n", - "export IO_CONSTRAINTS = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/pad_placer.tcl" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "xvJ45AS97kL6" - }, - "source": [ - "ii) Write the script executed in the docker environment:" - ] - }, - { - "cell_type": "code", - "execution_count": 22, - "metadata": {}, - "outputs": [], - "source": [ - "!rm -rf Results\n", - "!mkdir Results" - ] - }, - { - "cell_type": "code", - "execution_count": 23, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Writing Results/script.sh\n" - ] - } - ], - "source": [ - "%%writefile Results/script.sh\n", - "#!/bin/bash\n", - "source /home/dependency/oss-cad-suite/environment\n", - "export QT_QPA_PLATFORM=offscreen\n", - "cd /Flow\n", - "\n", - "# sub die\n", - "export DESIGN_CONFIG=./designs/130_180/riscv32i_3d/config.mk\n", - "make clean_all\n", - "make\n", - "cp ./results/130_180/riscv32i_3d/80MHz/6_final.gds /Work_dir/core.gds\n", - "cp ./reports/130_180/riscv32i_3d/80MHz/final_routing.webp.png /Work_dir/core.png\n", - "\n", - "# top die\n", - "export DESIGN_CONFIG=./designs/130_180/fakeram4/config.mk\n", - "make clean_all\n", - "make\n", - "cp ./results/gf180/fakeram4/80MHz/6_final.gds /Work_dir/sram.gds\n", - "cp ./reports/gf180/fakeram4/80MHz/final_routing.webp.png /Work_dir/sram.png\n", - "touch /Work_dir/script_completed.txt" - ] - }, - { - "cell_type": "markdown", - "metadata": { - "id": "onjhYLPf7kL6" - }, - "source": [ - "iii) Harden the Design" - ] - }, - { - "cell_type": "code", - "execution_count": 24, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "\n", - "New 'server1:1 (yzhu)' desktop is server1:1\n", - "\n", - "Starting applications specified in /work/stu/yzhu/.vnc/xstartup\n", - "Log file is /work/stu/yzhu/.vnc/server1:1.log\n", - "\n" - ] - } - ], - "source": [ - "!vncserver" - ] - }, - { - "cell_type": "code", - "execution_count": 25, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "rm -f ./results/130_180/riscv32i_3d/80MHz/1_*.v ./results/130_180/riscv32i_3d/80MHz/1_synth.sdc\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/synth_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/1_*\n", - "rm -f ./objects/130_180/riscv32i_3d/80MHz/mark_hier_stop_modules.tcl\n", - "rm -rf _tmp_yosys-abc-*\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/2_*floorplan*.odb ./results/130_180/riscv32i_3d/80MHz/2_floorplan.sdc ./results/130_180/riscv32i_3d/80MHz/2_*.v ./results/130_180/riscv32i_3d/80MHz/2_*.def\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/2_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/2_*\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_*place*.odb\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_place.sdc\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/3_*.def ./results/130_180/riscv32i_3d/80MHz/3_*.v\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/3_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/3_*\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/4_*cts*.odb ./results/130_180/riscv32i_3d/80MHz/4_cts.sdc ./results/130_180/riscv32i_3d/80MHz/4_*.v ./results/130_180/riscv32i_3d/80MHz/4_*.def\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/4_*\n", - "rm -rf ./logs/130_180/riscv32i_3d/80MHz/4_*\n", - "rm -rf output*/ results*.out.dmp layer_*.mps\n", - "rm -rf *.gdid *.log *.met *.sav *.res.dmp\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/route.guide ./results/130_180/riscv32i_3d/80MHz/output_guide.mod ./results/130_180/riscv32i_3d/80MHz/updated_clks.sdc\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/5_*.odb ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/5_*.def ./results/130_180/riscv32i_3d/80MHz/5_*.v\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/5_*\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/5_*\n", - "rm -rf ./results/130_180/riscv32i_3d/80MHz/6_*.gds ./results/130_180/riscv32i_3d/80MHz/6_*.oas ./results/130_180/riscv32i_3d/80MHz/6_*.odb ./results/130_180/riscv32i_3d/80MHz/6_*.v ./results/130_180/riscv32i_3d/80MHz/6_*.def ./results/130_180/riscv32i_3d/80MHz/6_*.sdc ./results/130_180/riscv32i_3d/80MHz/6_*.spef\n", - "rm -rf ./reports/130_180/riscv32i_3d/80MHz/6_*.rpt\n", - "rm -f ./logs/130_180/riscv32i_3d/80MHz/6_*\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/metadata-80MHz-check.log\n", - "rm -f ./reports/130_180/riscv32i_3d/80MHz/metadata-80MHz.json\n", - "rm -f ./results/130_180/riscv32i_3d/80MHz/core_without_dmem.lib ./results/130_180/riscv32i_3d/80MHz/core_without_dmem.lef\n", - "rm -rf ./objects/130_180/riscv32i_3d/80MHz\n" - ] - }, - { - "name": "stdout", - "output_type": "stream", - "text": [ - "/Flow/util/markDontUse.py -p \"sky130_fd_sc_hd__probe_p_8 sky130_fd_sc_hd__probec_p_8 sky130_fd_sc_hd__lpflow_bleeder_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_1 sky130_fd_sc_hd__lpflow_clkbufkapwr_16 sky130_fd_sc_hd__lpflow_clkbufkapwr_2 sky130_fd_sc_hd__lpflow_clkbufkapwr_4 sky130_fd_sc_hd__lpflow_clkbufkapwr_8 sky130_fd_sc_hd__lpflow_clkinvkapwr_1 sky130_fd_sc_hd__lpflow_clkinvkapwr_16 sky130_fd_sc_hd__lpflow_clkinvkapwr_2 sky130_fd_sc_hd__lpflow_clkinvkapwr_4 sky130_fd_sc_hd__lpflow_clkinvkapwr_8 sky130_fd_sc_hd__lpflow_decapkapwr_12 sky130_fd_sc_hd__lpflow_decapkapwr_3 sky130_fd_sc_hd__lpflow_decapkapwr_4 sky130_fd_sc_hd__lpflow_decapkapwr_6 sky130_fd_sc_hd__lpflow_decapkapwr_8 sky130_fd_sc_hd__lpflow_inputiso0n_1 sky130_fd_sc_hd__lpflow_inputiso0p_1 sky130_fd_sc_hd__lpflow_inputiso1n_1 sky130_fd_sc_hd__lpflow_inputiso1p_1 sky130_fd_sc_hd__lpflow_inputisolatch_1 sky130_fd_sc_hd__lpflow_isobufsrc_1 sky130_fd_sc_hd__lpflow_isobufsrc_16 sky130_fd_sc_hd__lpflow_isobufsrc_2 sky130_fd_sc_hd__lpflow_isobufsrc_4 sky130_fd_sc_hd__lpflow_isobufsrc_8 sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4\" -i /Flow/platforms/130_180/lib/sky130_fd_sc_hd__tt_025C_1v80.lib -o objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "Opening file for replace: /Flow/platforms/130_180/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "Marked 36 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 0\n", - "Writing replaced file: objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth_hier_report.tcl) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/1_1_yosys_hier_report.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/adder.v\n", - "2. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/alu.v\n", - "3. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/aludec.v\n", - "4. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/controller.v\n", - "5. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/core_without_dmem.v\n", - "6. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/datapath.v\n", - "7. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_communicate.v\n", - "8. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopenr.v\n", - "9. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopens.v\n", - "10. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopr.v\n", - "11. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/inverter.v\n", - "12. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2b.v\n", - "13. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2c.v\n", - "14. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare32.v\n", - "15. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/maindec.v\n", - "16. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux2.v\n", - "17. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux3.v\n", - "18. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux4.v\n", - "19. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux5.v\n", - "20. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux8.v\n", - "21. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/regfile.v\n", - "22. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/riscv.v\n", - "23. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/rom.v\n", - "24. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/shifter.v\n", - "25. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/signext.v\n", - "26. Executing Liberty frontend: ./objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "27. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_clkgate_hd.v\n", - "finish synth_preamble\n", - "28. Executing SYNTH pass.\n", - "28.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "28.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\core_without_dmem'.\n", - "28.2.1. Analyzing design hierarchy..\n", - "28.2.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem_communicate'.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:30.9-30.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:31.9-31.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:32.9-32.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:33.9-33.38.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:39.9-39.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:41.9-41.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:43.9-43.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:45.9-45.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:47.9-47.25.\n", - "28.2.3. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.4. Executing AST frontend in derive mode using pre-parsed AST for module `\\ROM'.\n", - "28.2.5. Executing AST frontend in derive mode using pre-parsed AST for module `\\riscv'.\n", - "28.2.6. Analyzing design hierarchy..\n", - "28.2.7. Executing AST frontend in derive mode using pre-parsed AST for module `\\datapath'.\n", - "28.2.8. Executing AST frontend in derive mode using pre-parsed AST for module `\\controller'.\n", - "28.2.9. Analyzing design hierarchy..\n", - "28.2.10. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.11. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.12. Executing AST frontend in derive mode using pre-parsed AST for module `\\aludec'.\n", - "28.2.13. Executing AST frontend in derive mode using pre-parsed AST for module `\\maindec'.\n", - "28.2.14. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux3'.\n", - "28.2.15. Executing AST frontend in derive mode using pre-parsed AST for module `\\shifter'.\n", - "28.2.16. Executing AST frontend in derive mode using pre-parsed AST for module `\\alu'.\n", - "28.2.17. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare32'.\n", - "28.2.18. Executing AST frontend in derive mode using pre-parsed AST for module `\\adder'.\n", - "28.2.19. Executing AST frontend in derive mode using pre-parsed AST for module `\\signext'.\n", - "28.2.20. Executing AST frontend in derive mode using pre-parsed AST for module `\\regfile'.\n", - "28.2.21. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "28.2.22. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopr'.\n", - "28.2.23. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopenr'.\n", - "28.2.24. Analyzing design hierarchy..\n", - "28.2.25. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux5'.\n", - "28.2.26. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2c'.\n", - "28.2.27. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2b'.\n", - "28.2.28. Analyzing design hierarchy..\n", - "28.2.29. Analyzing design hierarchy..\n", - "28.3. Executing PROC pass (convert processes to netlists).\n", - "28.3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "28.3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "28.3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "28.3.4. Executing PROC_INIT pass (extract init attributes).\n", - "28.3.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "28.3.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "28.3.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "28.3.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "28.3.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "28.3.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "28.3.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "28.3.12. Executing OPT_EXPR pass (perform const folding).\n", - "28.4. Executing OPT_EXPR pass (perform const folding).\n", - "28.5. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.6. Executing CHECK pass (checking for obvious problems).\n", - "28.7. Executing OPT pass (performing simple optimizations).\n", - "28.7.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.7.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.7.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.7.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.7.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.7.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.7.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.7.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.7.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.7.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.7.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.8. Executing FSM pass (extract and optimize FSM).\n", - "28.8.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "28.8.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "28.8.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "28.8.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.8.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "28.8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "28.8.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "28.8.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "28.9. Executing OPT pass (performing simple optimizations).\n", - "28.9.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.9.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.9.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.9.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.9.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.9.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.9.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.9.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.9.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.9.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.9.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.10. Executing WREDUCE pass (reducing word size of cells).\n", - "28.11. Executing PEEPOPT pass (run peephole optimizers).\n", - "28.12. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.13. Executing ALUMACC pass (create $alu and $macc cells).\n", - "28.14. Executing SHARE pass (SAT-based resource sharing).\n", - "28.15. Executing OPT pass (performing simple optimizations).\n", - "28.15.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.15.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.15.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.15.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.15.8. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.15.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.15.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.15.12. Executing OPT_MERGE pass (detect identical cells).\n", - "28.15.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.15.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.15.15. Executing OPT_EXPR pass (perform const folding).\n", - "28.15.16. Finished OPT passes. (There is nothing left to do.)\n", - "28.16. Executing MEMORY pass.\n", - "28.16.1. Executing OPT_MEM pass (optimize memories).\n", - "28.16.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "28.16.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "28.16.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "28.16.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "28.16.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.16.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "28.16.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "28.16.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.16.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "28.17. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.18. Executing OPT pass (performing simple optimizations).\n", - "28.18.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.18.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.18.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.18.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.18.5. Finished fast OPT passes.\n", - "28.19. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "28.20. Executing OPT pass (performing simple optimizations).\n", - "28.20.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.5. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.6. Executing OPT_SHARE pass.\n", - "28.20.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.9. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.10. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.20.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.13. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.14. Executing OPT_SHARE pass.\n", - "28.20.15. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.17. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.18. Rerunning OPT passes. (Maybe there is more to do..)\n", - "28.20.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "28.20.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "28.20.21. Executing OPT_MERGE pass (detect identical cells).\n", - "28.20.22. Executing OPT_SHARE pass.\n", - "28.20.23. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.20.24. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.20.25. Executing OPT_EXPR pass (perform const folding).\n", - "28.20.26. Finished OPT passes. (There is nothing left to do.)\n", - "28.21. Executing TECHMAP pass (map to technology primitives).\n", - "28.21.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "28.21.2. Continuing TECHMAP pass.\n", - "28.22. Executing OPT pass (performing simple optimizations).\n", - "28.22.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.22.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.22.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.22.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.22.5. Finished fast OPT passes.\n", - "28.23. Executing ABC pass (technology mapping using ABC).\n", - "28.23.1. Extracting gate netlist of module `$paramod\\flopenr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.2. Extracting gate netlist of module `$paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.3. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001' to `/input.blif'..\n", - "28.23.4. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100' to `/input.blif'..\n", - "28.23.5. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101' to `/input.blif'..\n", - "28.23.6. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.7. Extracting gate netlist of module `$paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.8. Extracting gate netlist of module `$paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "28.23.9. Extracting gate netlist of module `\\ROM' to `/input.blif'..\n", - "28.23.10. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "28.23.11. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "28.23.12. Extracting gate netlist of module `\\aludec' to `/input.blif'..\n", - "28.23.13. Extracting gate netlist of module `\\controller' to `/input.blif'..\n", - "28.23.14. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "28.23.15. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "28.23.16. Extracting gate netlist of module `\\dmem_communicate' to `/input.blif'..\n", - "28.23.17. Extracting gate netlist of module `\\magcompare2b' to `/input.blif'..\n", - "28.23.18. Extracting gate netlist of module `\\magcompare2c' to `/input.blif'..\n", - "28.23.19. Extracting gate netlist of module `\\magcompare32' to `/input.blif'..\n", - "28.23.20. Extracting gate netlist of module `\\maindec' to `/input.blif'..\n", - "28.23.21. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "28.23.22. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "28.23.23. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "28.23.24. Extracting gate netlist of module `\\signext' to `/input.blif'..\n", - "28.24. Executing OPT pass (performing simple optimizations).\n", - "28.24.1. Executing OPT_EXPR pass (perform const folding).\n", - "28.24.2. Executing OPT_MERGE pass (detect identical cells).\n", - "28.24.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "28.24.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "28.24.5. Finished fast OPT passes.\n", - "28.25. Executing HIERARCHY pass (managing design hierarchy).\n", - "28.25.1. Analyzing design hierarchy..\n", - "28.25.2. Analyzing design hierarchy..\n", - "28.26. Printing statistics.\n", - "28.27. Executing CHECK pass (checking for obvious problems).\n", - "29. Executing TECHMAP pass (map to technology primitives).\n", - "29.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_adders_hd.v\n", - "29.2. Continuing TECHMAP pass.\n", - "30. Executing TECHMAP pass (map to technology primitives).\n", - "30.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "30.2. Continuing TECHMAP pass.\n", - "31. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_4' - skipping.\n", - "31.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "32. Executing ABC pass (technology mapping using ABC).\n", - "32.1. Extracting gate netlist of module `$paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.1.1. Executing ABC.\n", - "32.1.2. Re-integrating ABC results.\n", - "32.2. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001' to `/input.blif'..\n", - "32.2.1. Executing ABC.\n", - "32.2.2. Re-integrating ABC results.\n", - "32.3. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100' to `/input.blif'..\n", - "32.3.1. Executing ABC.\n", - "32.3.2. Re-integrating ABC results.\n", - "32.4. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101' to `/input.blif'..\n", - "32.4.1. Executing ABC.\n", - "32.4.2. Re-integrating ABC results.\n", - "32.5. Extracting gate netlist of module `$paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.5.1. Executing ABC.\n", - "32.5.2. Re-integrating ABC results.\n", - "32.6. Extracting gate netlist of module `$paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.6.1. Executing ABC.\n", - "32.6.2. Re-integrating ABC results.\n", - "32.7. Extracting gate netlist of module `$paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000' to `/input.blif'..\n", - "32.7.1. Executing ABC.\n", - "32.7.2. Re-integrating ABC results.\n", - "32.8. Extracting gate netlist of module `\\ROM' to `/input.blif'..\n", - "32.8.1. Executing ABC.\n", - "32.8.2. Re-integrating ABC results.\n", - "32.9. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "32.9.1. Executing ABC.\n", - "32.9.2. Re-integrating ABC results.\n", - "32.10. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "32.10.1. Executing ABC.\n", - "32.10.2. Re-integrating ABC results.\n", - "32.11. Extracting gate netlist of module `\\aludec' to `/input.blif'..\n", - "32.11.1. Executing ABC.\n", - "32.11.2. Re-integrating ABC results.\n", - "32.12. Extracting gate netlist of module `\\controller' to `/input.blif'..\n", - "32.12.1. Executing ABC.\n", - "32.12.2. Re-integrating ABC results.\n", - "32.13. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "32.13.1. Executing ABC.\n", - "32.13.2. Re-integrating ABC results.\n", - "32.14. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "32.14.1. Executing ABC.\n", - "32.14.2. Re-integrating ABC results.\n", - "32.15. Extracting gate netlist of module `\\dmem_communicate' to `/input.blif'..\n", - "32.15.1. Executing ABC.\n", - "32.15.2. Re-integrating ABC results.\n", - "32.16. Extracting gate netlist of module `\\magcompare2b' to `/input.blif'..\n", - "32.16.1. Executing ABC.\n", - "32.16.2. Re-integrating ABC results.\n", - "32.17. Extracting gate netlist of module `\\magcompare2c' to `/input.blif'..\n", - "32.17.1. Executing ABC.\n", - "32.17.2. Re-integrating ABC results.\n", - "32.18. Extracting gate netlist of module `\\magcompare32' to `/input.blif'..\n", - "32.18.1. Executing ABC.\n", - "32.18.2. Re-integrating ABC results.\n", - "32.19. Extracting gate netlist of module `\\maindec' to `/input.blif'..\n", - "32.19.1. Executing ABC.\n", - "32.19.2. Re-integrating ABC results.\n", - "32.20. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "32.20.1. Executing ABC.\n", - "32.20.2. Re-integrating ABC results.\n", - "32.21. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "32.22. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "32.22.1. Executing ABC.\n", - "32.22.2. Re-integrating ABC results.\n", - "32.23. Extracting gate netlist of module `\\signext' to `/input.blif'..\n", - "33. Printing statistics.\n", - "Ungroup modules of size 1000\n", - "haha\n", - "34. Executing HIERARCHY pass (managing design hierarchy).\n", - "34.1. Analyzing design hierarchy..\n", - "34.2. Analyzing design hierarchy..\n", - "Found module core_without_dmem\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module ROM\n", - "Found module dmem_communicate\n", - "Found module riscv\n", - "Found module controller\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100\n", - "Found module aludec\n", - "Found module maindec\n", - "Found module datapath\n", - "Found module $paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101\n", - "Found module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module $paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000\n", - "Found module adder\n", - "Found module alu\n", - "Found module magcompare32\n", - "Found module magcompare2b\n", - "Found module magcompare2c\n", - "Found module regfile\n", - "Found module shifter\n", - "Found module signext\n", - "Found module $paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000\n", - "35. Printing statistics.\n", - "Area of module \\core_without_dmem is 66959.219200\n", - "Preserving hierarchical module: \\core_without_dmem\n", - "36. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000 is 394.128000\n", - "37. Printing statistics.\n", - "Area of module \\ROM is 95.091200\n", - "38. Printing statistics.\n", - "Area of module \\dmem_communicate is 228.969600\n", - "39. Printing statistics.\n", - "Area of module \\riscv is 66237.276800\n", - "Preserving hierarchical module: \\riscv\n", - "40. Printing statistics.\n", - "Area of module \\controller is 466.697600\n", - "41. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000001 is 15.014400\n", - "42. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000100 is 45.043200\n", - "43. Printing statistics.\n", - "Area of module \\aludec is 185.177600\n", - "44. Printing statistics.\n", - "Area of module \\maindec is 135.129600\n", - "45. Printing statistics.\n", - "Area of module \\datapath is 65770.579200\n", - "Preserving hierarchical module: \\datapath\n", - "46. Printing statistics.\n", - "Area of module $paramod\\flopr\\WIDTH=s32'00000000000000000000000000100000 is 954.665600\n", - "47. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000000101 is 56.304000\n", - "48. Printing statistics.\n", - "Area of module $paramod\\mux2\\WIDTH=s32'00000000000000000000000000100000 is 394.128000\n", - "49. Printing statistics.\n", - "Area of module $paramod\\mux3\\WIDTH=s32'00000000000000000000000000100000 is 714.435200\n", - "50. Printing statistics.\n", - "Area of module \\adder is 1046.003200\n", - "Preserving hierarchical module: \\adder\n", - "51. Printing statistics.\n", - "Area of module \\alu is 2351.004800\n", - "Preserving hierarchical module: \\alu\n", - "52. Printing statistics.\n", - "Area of module \\magcompare32 is 984.694400\n", - "53. Printing statistics.\n", - "Area of module \\magcompare2b is 42.540800\n", - "54. Printing statistics.\n", - "Area of module \\magcompare2c is 20.019200\n", - "55. Printing statistics.\n", - "Area of module \\regfile is 49531.254400\n", - "Preserving hierarchical module: \\regfile\n", - "56. Printing statistics.\n", - "Area of module \\shifter is 3943.782400\n", - "Preserving hierarchical module: \\shifter\n", - "57. Printing statistics.\n", - "Area of module \\signext is 825.792000\n", - "58. Printing statistics.\n", - "Area of module $paramod\\mux5\\WIDTH=s32'00000000000000000000000000100000 is 825.792000\n", - "Warnings: 35 unique messages, 243 total\n", - "End of script. Logfile hash: 433e72c871, CPU: user 6.12s system 0.16s, MEM: 51.66 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 69% 2x abc (13 sec), 19% 26x stat (3 sec), ...\n", - "Elapsed time: 0:18.90[h:]min:sec. CPU time: user 17.52 sys 1.32 (99%). Peak memory: 52900KB.\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth.tcl) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/1_1_yosys.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/adder.v\n", - "2. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/alu.v\n", - "3. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/aludec.v\n", - "4. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/controller.v\n", - "5. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/core_without_dmem.v\n", - "6. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/datapath.v\n", - "7. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_communicate.v\n", - "8. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopenr.v\n", - "9. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopens.v\n", - "10. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/flopr.v\n", - "11. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/inverter.v\n", - "12. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2b.v\n", - "13. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare2c.v\n", - "14. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/magcompare32.v\n", - "15. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/maindec.v\n", - "16. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux2.v\n", - "17. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux3.v\n", - "18. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux4.v\n", - "19. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux5.v\n", - "20. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/mux8.v\n", - "21. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/regfile.v\n", - "22. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/riscv.v\n", - "23. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/rom.v\n", - "24. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/shifter.v\n", - "25. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/signext.v\n", - "26. Executing Liberty frontend: ./objects/130_180/riscv32i_3d/80MHz/lib/sky130_fd_sc_hd__tt_025C_1v80.lib\n", - "27. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_clkgate_hd.v\n", - "finish synth_preamble\n", - "Sourcing ./objects/130_180/riscv32i_3d/80MHz/mark_hier_stop_modules.tcl\n", - "28. Executing HIERARCHY pass (managing design hierarchy).\n", - "29. Executing AST frontend in derive mode using pre-parsed AST for module `\\core_without_dmem'.\n", - "29.1. Analyzing design hierarchy..\n", - "29.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem_communicate'.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:30.9-30.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:31.9-31.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:32.9-32.38.\n", - "Warning: wire '\\mem_out' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:33.9-33.38.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:39.9-39.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:41.9-41.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:43.9-43.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:45.9-45.25.\n", - "Warning: wire '\\we_mem' is assigned in a block at ./designs/src/riscv32i_3d/dmem_communicate.v:47.9-47.25.\n", - "29.3. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.4. Executing AST frontend in derive mode using pre-parsed AST for module `\\ROM'.\n", - "29.5. Executing AST frontend in derive mode using pre-parsed AST for module `\\riscv'.\n", - "29.6. Analyzing design hierarchy..\n", - "29.7. Executing AST frontend in derive mode using pre-parsed AST for module `\\datapath'.\n", - "29.8. Executing AST frontend in derive mode using pre-parsed AST for module `\\controller'.\n", - "29.9. Analyzing design hierarchy..\n", - "29.10. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.11. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.12. Executing AST frontend in derive mode using pre-parsed AST for module `\\aludec'.\n", - "29.13. Executing AST frontend in derive mode using pre-parsed AST for module `\\maindec'.\n", - "29.14. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux3'.\n", - "29.15. Executing AST frontend in derive mode using pre-parsed AST for module `\\shifter'.\n", - "29.16. Executing AST frontend in derive mode using pre-parsed AST for module `\\alu'.\n", - "29.17. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare32'.\n", - "29.18. Executing AST frontend in derive mode using pre-parsed AST for module `\\adder'.\n", - "29.19. Executing AST frontend in derive mode using pre-parsed AST for module `\\signext'.\n", - "29.20. Executing AST frontend in derive mode using pre-parsed AST for module `\\regfile'.\n", - "29.21. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux2'.\n", - "29.22. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopr'.\n", - "29.23. Executing AST frontend in derive mode using pre-parsed AST for module `\\flopenr'.\n", - "29.24. Analyzing design hierarchy..\n", - "29.25. Executing AST frontend in derive mode using pre-parsed AST for module `\\mux5'.\n", - "29.26. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2c'.\n", - "29.27. Executing AST frontend in derive mode using pre-parsed AST for module `\\magcompare2b'.\n", - "29.28. Analyzing design hierarchy..\n", - "29.29. Analyzing design hierarchy..\n", - "30. Executing SYNTH pass.\n", - "30.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "30.1.1. Analyzing design hierarchy..\n", - "30.1.2. Analyzing design hierarchy..\n", - "30.2. Executing PROC pass (convert processes to netlists).\n", - "30.2.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "30.2.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "30.2.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "30.2.4. Executing PROC_INIT pass (extract init attributes).\n", - "30.2.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "30.2.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "30.2.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "30.2.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "30.2.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "30.2.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "30.2.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "30.2.12. Executing OPT_EXPR pass (perform const folding).\n", - "30.3. Executing FLATTEN pass (flatten design).\n", - "30.4. Executing OPT_EXPR pass (perform const folding).\n", - "30.5. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.6. Executing CHECK pass (checking for obvious problems).\n", - "30.7. Executing OPT pass (performing simple optimizations).\n", - "30.7.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.7.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.7.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.7.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.7.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.7.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.7.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.7.12. Executing OPT_MERGE pass (detect identical cells).\n", - "30.7.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.7.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.7.15. Executing OPT_EXPR pass (perform const folding).\n", - "30.7.16. Finished OPT passes. (There is nothing left to do.)\n", - "30.8. Executing FSM pass (extract and optimize FSM).\n", - "30.8.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "30.8.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "30.8.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "30.8.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.8.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "30.8.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "30.8.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "30.8.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "30.9. Executing OPT pass (performing simple optimizations).\n", - "30.9.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.9.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.9.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.9.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.9.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.9.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.9.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.9.9. Finished OPT passes. (There is nothing left to do.)\n", - "30.10. Executing WREDUCE pass (reducing word size of cells).\n", - "30.11. Executing PEEPOPT pass (run peephole optimizers).\n", - "30.12. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.13. Executing ALUMACC pass (create $alu and $macc cells).\n", - "30.14. Executing SHARE pass (SAT-based resource sharing).\n", - "30.15. Executing OPT pass (performing simple optimizations).\n", - "30.15.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.15.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.15.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.15.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.15.8. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.15.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.15.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.15.12. Executing OPT_MERGE pass (detect identical cells).\n", - "30.15.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.15.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.15.15. Executing OPT_EXPR pass (perform const folding).\n", - "30.15.16. Finished OPT passes. (There is nothing left to do.)\n", - "30.16. Executing MEMORY pass.\n", - "30.16.1. Executing OPT_MEM pass (optimize memories).\n", - "30.16.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "30.16.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "30.16.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "30.16.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "30.16.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.16.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "30.16.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "30.16.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.16.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "30.17. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.18. Executing OPT pass (performing simple optimizations).\n", - "30.18.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.18.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.18.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.18.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.18.5. Finished fast OPT passes.\n", - "30.19. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "30.20. Executing OPT pass (performing simple optimizations).\n", - "30.20.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.5. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.6. Executing OPT_SHARE pass.\n", - "30.20.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.9. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.10. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.20.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.13. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.14. Executing OPT_SHARE pass.\n", - "30.20.15. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.17. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.18. Rerunning OPT passes. (Maybe there is more to do..)\n", - "30.20.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "30.20.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "30.20.21. Executing OPT_MERGE pass (detect identical cells).\n", - "30.20.22. Executing OPT_SHARE pass.\n", - "30.20.23. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.20.24. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.20.25. Executing OPT_EXPR pass (perform const folding).\n", - "30.20.26. Finished OPT passes. (There is nothing left to do.)\n", - "30.21. Executing TECHMAP pass (map to technology primitives).\n", - "30.21.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "30.21.2. Continuing TECHMAP pass.\n", - "30.22. Executing OPT pass (performing simple optimizations).\n", - "30.22.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.22.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.22.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.22.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.22.5. Finished fast OPT passes.\n", - "30.23. Executing ABC pass (technology mapping using ABC).\n", - "30.23.1. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "30.23.2. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "30.23.3. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "30.23.4. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "30.23.5. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "30.23.6. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "30.23.7. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "30.24. Executing OPT pass (performing simple optimizations).\n", - "30.24.1. Executing OPT_EXPR pass (perform const folding).\n", - "30.24.2. Executing OPT_MERGE pass (detect identical cells).\n", - "30.24.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "30.24.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "30.24.5. Finished fast OPT passes.\n", - "30.25. Executing HIERARCHY pass (managing design hierarchy).\n", - "30.25.1. Analyzing design hierarchy..\n", - "30.25.2. Analyzing design hierarchy..\n", - "30.26. Printing statistics.\n", - "30.27. Executing CHECK pass (checking for obvious problems).\n", - "31. Executing OPT pass (performing simple optimizations).\n", - "31.1. Executing OPT_EXPR pass (perform const folding).\n", - "31.2. Executing OPT_MERGE pass (detect identical cells).\n", - "31.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "31.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "31.5. Executing OPT_MERGE pass (detect identical cells).\n", - "31.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "31.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "31.8. Executing OPT_EXPR pass (perform const folding).\n", - "31.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "31.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "31.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "31.12. Executing OPT_MERGE pass (detect identical cells).\n", - "31.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "31.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "31.15. Executing OPT_EXPR pass (perform const folding).\n", - "31.16. Finished OPT passes. (There is nothing left to do.)\n", - "32. Executing EXTRACT_FA pass (find and extract full/half adders).\n", - "33. Executing TECHMAP pass (map to technology primitives).\n", - "33.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_adders_hd.v\n", - "33.2. Continuing TECHMAP pass.\n", - "34. Executing TECHMAP pass (map to technology primitives).\n", - "34.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "34.2. Continuing TECHMAP pass.\n", - "35. Executing OPT pass (performing simple optimizations).\n", - "35.1. Executing OPT_EXPR pass (perform const folding).\n", - "35.2. Executing OPT_MERGE pass (detect identical cells).\n", - "35.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "35.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "35.5. Finished fast OPT passes.\n", - "36. Executing TECHMAP pass (map to technology primitives).\n", - "36.1. Executing Verilog-2005 frontend: /Flow/platforms/130_180/cells_latch_hd.v\n", - "36.2. Continuing TECHMAP pass.\n", - "37. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbn_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtn_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE|IQ&!DE' in pin attribute of cell 'sky130_fd_sc_hd__edfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfbbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfrtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfsbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfstp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sdfxtp_4' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxbp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_1' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_2' - skipping.\n", - "Warning: Found unsupported expression 'D&DE&!SCE|IQ&!DE&!SCE|SCD&SCE' in pin attribute of cell 'sky130_fd_sc_hd__sedfxtp_4' - skipping.\n", - "37.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "38. Executing OPT pass (performing simple optimizations).\n", - "38.1. Executing OPT_EXPR pass (perform const folding).\n", - "38.2. Executing OPT_MERGE pass (detect identical cells).\n", - "38.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "38.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "38.5. Executing OPT_MERGE pass (detect identical cells).\n", - "38.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "38.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "38.8. Executing OPT_EXPR pass (perform const folding).\n", - "38.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "38.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "38.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "38.12. Executing OPT_MERGE pass (detect identical cells).\n", - "38.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "38.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "38.15. Executing OPT_EXPR pass (perform const folding).\n", - "38.16. Finished OPT passes. (There is nothing left to do.)\n", - "Using ABC speed script.\n", - "[FLOW] Set ABC_CLOCK_PERIOD_IN_PS to: 12.5\n", - "39. Executing ABC pass (technology mapping using ABC).\n", - "39.1. Extracting gate netlist of module `\\adder' to `/input.blif'..\n", - "39.1.1. Executing ABC.\n", - "39.1.2. Re-integrating ABC results.\n", - "39.2. Extracting gate netlist of module `\\alu' to `/input.blif'..\n", - "39.2.1. Executing ABC.\n", - "39.2.2. Re-integrating ABC results.\n", - "39.3. Extracting gate netlist of module `\\core_without_dmem' to `/input.blif'..\n", - "39.3.1. Executing ABC.\n", - "39.3.2. Re-integrating ABC results.\n", - "39.4. Extracting gate netlist of module `\\datapath' to `/input.blif'..\n", - "39.4.1. Executing ABC.\n", - "39.4.2. Re-integrating ABC results.\n", - "39.5. Extracting gate netlist of module `\\regfile' to `/input.blif'..\n", - "39.5.1. Executing ABC.\n", - "39.5.2. Re-integrating ABC results.\n", - "39.6. Extracting gate netlist of module `\\riscv' to `/input.blif'..\n", - "39.6.1. Executing ABC.\n", - "39.6.2. Re-integrating ABC results.\n", - "39.7. Extracting gate netlist of module `\\shifter' to `/input.blif'..\n", - "39.7.1. Executing ABC.\n", - "39.7.2. Re-integrating ABC results.\n", - "40. Executing SETUNDEF pass (replace undef values with defined constants).\n", - "41. Executing SPLITNETS pass (splitting up multi-bit signals).\n", - "42. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "43. Executing HILOMAP pass (mapping to constant drivers).\n", - "44. Executing INSBUF pass (insert buffer cells for connected wires).\n", - "45. Executing CHECK pass (checking for obvious problems).\n", - "46. Printing statistics.\n", - "47. Executing Verilog backend.\n", - "Warnings: 35 unique messages, 243 total\n", - "End of script. Logfile hash: 5ac7d40257, CPU: user 4.44s system 0.10s, MEM: 51.49 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 71% 2x abc (10 sec), 5% 34x opt_expr (0 sec), ...\n", - "Elapsed time: 0:14.49[h:]min:sec. CPU time: user 13.72 sys 0.73 (99%). Peak memory: 52848KB.\n", - "cp ./designs/130_180/riscv32i_3d/constraint.sdc ./results/130_180/riscv32i_3d/80MHz/1_synth.sdc\n", - "mkdir -p ./results/130_180/riscv32i_3d/80MHz ./logs/130_180/riscv32i_3d/80MHz ./reports/130_180/riscv32i_3d/80MHz\n", - "cp results/130_180/riscv32i_3d/80MHz/1_1_yosys.v results/130_180/riscv32i_3d/80MHz/1_synth.v\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/floorplan.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_1_floorplan.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef\n", - "[INFO ODB-0223] Created 15 technology layers\n", - "[INFO ODB-0224] Created 30 technology vias\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd_merged.lef\n", - "[INFO ODB-0225] Created 441 library cells\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/130_180/lef/sky130_fd_sc_hd_merged.lef\n", - "\n", - "==========================================================================\n", - "Floorplan check_setup\n", - "--------------------------------------------------------------------------\n", - "number instances in verilog is 5626\n", - "[WARNING IFP-0028] Core area lower left (20.000, 20.000) snapped to (20.240, 21.760).\n", - "[INFO IFP-0001] Added 352 rows of 2521 site unithd with height 1.\n", - "[INFO RSZ-0026] Removed 561 buffers.\n", - "Default units for flow\n", - " time 1ns\n", - " capacitance 1pF\n", - " resistance 1kohm\n", - " voltage 1v\n", - " current 1mA\n", - " power 1nW\n", - " distance 1um\n", - "\n", - "==========================================================================\n", - "floorplan final check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "floorplan final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -23932.58\n", - "\n", - "==========================================================================\n", - "floorplan final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -23.35\n", - "\n", - "==========================================================================\n", - "floorplan final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -23.35\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.55 0.55 library removal time\n", - " 0.55 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.55 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.12 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.00 0.02 0.07 0.07 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.02 0.00 0.07 ^ ready (out)\n", - " 0.07 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.07 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.02 12.48 library recovery time\n", - " 12.48 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.48 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.81 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4862_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.06 0.31 0.57 0.57 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 0.31 0.00 0.57 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.21 0.24 0.81 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 0.21 0.00 0.81 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.03 0.43 0.39 1.21 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.43 0.00 1.21 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.02 0.48 0.56 1.77 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.48 0.00 1.77 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.13 0.14 1.91 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 1.91 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.02 0.15 0.18 2.09 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.15 0.00 2.09 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.10 0.46 0.41 2.50 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.46 0.00 2.50 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 1.44 25.36 18.51 21.01 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 25.36 0.00 21.01 ^ riscv/dp/rf/_2820_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.00 0.56 2.41 23.42 ^ riscv/dp/rf/_2820_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1484_ (net)\n", - " 0.56 0.00 23.42 ^ riscv/dp/rf/_2821_/A1 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.45 0.14 23.56 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 0.45 0.00 23.56 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.00 0.04 0.35 23.92 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.04 0.00 23.92 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.03 2.10 1.65 25.57 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 2.10 0.00 25.57 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.08 0.49 26.06 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.08 0.00 26.06 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.00 0.06 0.06 26.12 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.06 0.00 26.12 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.12 0.12 26.24 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.12 0.00 26.24 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.10 0.11 26.35 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.10 0.00 26.35 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.10 0.30 26.65 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.10 0.00 26.65 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.05 0.15 26.81 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.05 0.00 26.81 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.06 0.07 26.88 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.06 0.00 26.88 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.31 8.89 6.69 33.56 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 8.89 0.00 33.56 ^ riscv/dp/_0576_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.79 0.31 33.87 v riscv/dp/_0576_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0228_ (net)\n", - " 0.79 0.00 33.87 v riscv/dp/_0582_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.06 1.68 1.58 35.45 ^ riscv/dp/_0582_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[0] (net)\n", - " 1.68 0.00 35.45 ^ riscv/dp/rf/_3655_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.07 0.34 35.79 ^ riscv/dp/rf/_3655_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0128_ (net)\n", - " 0.07 0.00 35.79 ^ riscv/dp/rf/_4862_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 35.79 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_4862_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -35.79 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -23.35 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1130_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.00 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.12 0.94 0.67 0.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 0.94 0.00 0.67 ^ riscv/dp/_1130_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.67 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1130_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.02 12.48 library recovery time\n", - " 12.48 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.48 data required time\n", - " -0.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.81 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4862_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.06 0.31 0.57 0.57 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 0.31 0.00 0.57 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.21 0.24 0.81 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 0.21 0.00 0.81 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.03 0.43 0.39 1.21 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.43 0.00 1.21 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.02 0.48 0.56 1.77 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.48 0.00 1.77 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.13 0.14 1.91 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 1.91 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.02 0.15 0.18 2.09 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.15 0.00 2.09 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.10 0.46 0.41 2.50 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.46 0.00 2.50 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 1.44 25.36 18.51 21.01 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 25.36 0.00 21.01 ^ riscv/dp/rf/_2820_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.00 0.56 2.41 23.42 ^ riscv/dp/rf/_2820_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1484_ (net)\n", - " 0.56 0.00 23.42 ^ riscv/dp/rf/_2821_/A1 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.45 0.14 23.56 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 0.45 0.00 23.56 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.00 0.04 0.35 23.92 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.04 0.00 23.92 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.03 2.10 1.65 25.57 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 2.10 0.00 25.57 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.08 0.49 26.06 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.08 0.00 26.06 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.00 0.06 0.06 26.12 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.06 0.00 26.12 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.12 0.12 26.24 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.12 0.00 26.24 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.10 0.11 26.35 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.10 0.00 26.35 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.10 0.30 26.65 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.10 0.00 26.65 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.05 0.15 26.81 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.05 0.00 26.81 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.06 0.07 26.88 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.06 0.00 26.88 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.31 8.89 6.69 33.56 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 8.89 0.00 33.56 ^ riscv/dp/_0576_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.79 0.31 33.87 v riscv/dp/_0576_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0228_ (net)\n", - " 0.79 0.00 33.87 v riscv/dp/_0582_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.06 1.68 1.58 35.45 ^ riscv/dp/_0582_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[0] (net)\n", - " 1.68 0.00 35.45 ^ riscv/dp/rf/_3655_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.07 0.34 35.79 ^ riscv/dp/rf/_3655_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0128_ (net)\n", - " 0.07 0.00 35.79 ^ riscv/dp/rf/_4862_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 35.79 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_4862_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -35.79 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -23.35 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 79.7%\n", - "Combinational 4.43e-04 4.34e-04 1.64e-08 8.78e-04 20.3%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.88e-03 4.34e-04 2.50e-08 4.32e-03 100.0%\n", - " 89.9% 10.1% 0.0%\n", - "\n", - "==========================================================================\n", - "floorplan final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 63008 u^2 6% utilization.\n", - "\n", - "Elapsed time: 0:01.50[h:]min:sec. CPU time: user 1.39 sys 0.06 (96%). Peak memory: 108820KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_1_floorplan.odb ./results/130_180/riscv32i_3d/80MHz/2_2_floorplan_io.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_2_floorplan_io.odb ./results/130_180/riscv32i_3d/80MHz/2_3_floorplan_tdms.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/macro_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_4_floorplan_macro.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "No macros found: Skipping macro_placement\n", - "Elapsed time: 0:00.51[h:]min:sec. CPU time: user 0.41 sys 0.09 (99%). Peak memory: 95916KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/tapcell.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_5_floorplan_tapcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO TAP-0005] Inserted 14868 tapcells.\n", - "Elapsed time: 0:00.70[h:]min:sec. CPU time: user 0.61 sys 0.05 (96%). Peak memory: 92560KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.tmp.log ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/pdn.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting PDN generation\n", - "[INFO PDN-0001] Inserting grid: grid\n", - "Starting PDN generation\n", - "Elapsed time: 0:00.86[h:]min:sec. CPU time: user 0.74 sys 0.07 (95%). Peak memory: 102364KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_6_floorplan_pdn.odb ./results/130_180/riscv32i_3d/80MHz/2_floorplan.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place_skip_io.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_1_place_gp_skip_io.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting global placement without IO\n", - "miemie\n", - "henhen\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[WARNING GPL-0001] ce_mem[0] toplevel port is not placed!\n", - " Replace will regard ce_mem[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[1] toplevel port is not placed!\n", - " Replace will regard ce_mem[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[2] toplevel port is not placed!\n", - " Replace will regard ce_mem[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] ce_mem[3] toplevel port is not placed!\n", - " Replace will regard ce_mem[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] clk toplevel port is not placed!\n", - " Replace will regard clk is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[0] toplevel port is not placed!\n", - " Replace will regard dataadr[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[1] toplevel port is not placed!\n", - " Replace will regard dataadr[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[2] toplevel port is not placed!\n", - " Replace will regard dataadr[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[3] toplevel port is not placed!\n", - " Replace will regard dataadr[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[4] toplevel port is not placed!\n", - " Replace will regard dataadr[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[5] toplevel port is not placed!\n", - " Replace will regard dataadr[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[6] toplevel port is not placed!\n", - " Replace will regard dataadr[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] dataadr[7] toplevel port is not placed!\n", - " Replace will regard dataadr[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[0] toplevel port is not placed!\n", - " Replace will regard instr[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[10] toplevel port is not placed!\n", - " Replace will regard instr[10] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[11] toplevel port is not placed!\n", - " Replace will regard instr[11] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[12] toplevel port is not placed!\n", - " Replace will regard instr[12] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[13] toplevel port is not placed!\n", - " Replace will regard instr[13] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[14] toplevel port is not placed!\n", - " Replace will regard instr[14] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[15] toplevel port is not placed!\n", - " Replace will regard instr[15] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[16] toplevel port is not placed!\n", - " Replace will regard instr[16] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[17] toplevel port is not placed!\n", - " Replace will regard instr[17] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[18] toplevel port is not placed!\n", - " Replace will regard instr[18] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[19] toplevel port is not placed!\n", - " Replace will regard instr[19] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[1] toplevel port is not placed!\n", - " Replace will regard instr[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[20] toplevel port is not placed!\n", - " Replace will regard instr[20] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[21] toplevel port is not placed!\n", - " Replace will regard instr[21] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[22] toplevel port is not placed!\n", - " Replace will regard instr[22] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[23] toplevel port is not placed!\n", - " Replace will regard instr[23] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[24] toplevel port is not placed!\n", - " Replace will regard instr[24] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[25] toplevel port is not placed!\n", - " Replace will regard instr[25] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[26] toplevel port is not placed!\n", - " Replace will regard instr[26] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[27] toplevel port is not placed!\n", - " Replace will regard instr[27] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[28] toplevel port is not placed!\n", - " Replace will regard instr[28] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[29] toplevel port is not placed!\n", - " Replace will regard instr[29] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[2] toplevel port is not placed!\n", - " Replace will regard instr[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[30] toplevel port is not placed!\n", - " Replace will regard instr[30] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[31] toplevel port is not placed!\n", - " Replace will regard instr[31] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[3] toplevel port is not placed!\n", - " Replace will regard instr[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[4] toplevel port is not placed!\n", - " Replace will regard instr[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[5] toplevel port is not placed!\n", - " Replace will regard instr[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[6] toplevel port is not placed!\n", - " Replace will regard instr[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[7] toplevel port is not placed!\n", - " Replace will regard instr[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[8] toplevel port is not placed!\n", - " Replace will regard instr[8] is placed in (0, 0)\n", - "[WARNING GPL-0001] instr[9] toplevel port is not placed!\n", - " Replace will regard instr[9] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem0[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem0[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem1[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem1[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem2[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem2[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[0] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[1] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[2] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[3] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[4] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[5] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[6] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] inter_dmem3[7] toplevel port is not placed!\n", - " Replace will regard inter_dmem3[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] memwrite toplevel port is not placed!\n", - " Replace will regard memwrite is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[0] toplevel port is not placed!\n", - " Replace will regard pc[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[10] toplevel port is not placed!\n", - " Replace will regard pc[10] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[11] toplevel port is not placed!\n", - " Replace will regard pc[11] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[12] toplevel port is not placed!\n", - " Replace will regard pc[12] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[13] toplevel port is not placed!\n", - " Replace will regard pc[13] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[14] toplevel port is not placed!\n", - " Replace will regard pc[14] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[15] toplevel port is not placed!\n", - " Replace will regard pc[15] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[16] toplevel port is not placed!\n", - " Replace will regard pc[16] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[17] toplevel port is not placed!\n", - " Replace will regard pc[17] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[18] toplevel port is not placed!\n", - " Replace will regard pc[18] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[19] toplevel port is not placed!\n", - " Replace will regard pc[19] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[1] toplevel port is not placed!\n", - " Replace will regard pc[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[20] toplevel port is not placed!\n", - " Replace will regard pc[20] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[21] toplevel port is not placed!\n", - " Replace will regard pc[21] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[22] toplevel port is not placed!\n", - " Replace will regard pc[22] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[23] toplevel port is not placed!\n", - " Replace will regard pc[23] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[24] toplevel port is not placed!\n", - " Replace will regard pc[24] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[25] toplevel port is not placed!\n", - " Replace will regard pc[25] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[26] toplevel port is not placed!\n", - " Replace will regard pc[26] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[27] toplevel port is not placed!\n", - " Replace will regard pc[27] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[28] toplevel port is not placed!\n", - " Replace will regard pc[28] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[29] toplevel port is not placed!\n", - " Replace will regard pc[29] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[2] toplevel port is not placed!\n", - " Replace will regard pc[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[30] toplevel port is not placed!\n", - " Replace will regard pc[30] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[31] toplevel port is not placed!\n", - " Replace will regard pc[31] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[3] toplevel port is not placed!\n", - " Replace will regard pc[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[4] toplevel port is not placed!\n", - " Replace will regard pc[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[5] toplevel port is not placed!\n", - " Replace will regard pc[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[6] toplevel port is not placed!\n", - " Replace will regard pc[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[7] toplevel port is not placed!\n", - " Replace will regard pc[7] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[8] toplevel port is not placed!\n", - " Replace will regard pc[8] is placed in (0, 0)\n", - "[WARNING GPL-0001] pc[9] toplevel port is not placed!\n", - " Replace will regard pc[9] is placed in (0, 0)\n", - "[WARNING GPL-0001] ready toplevel port is not placed!\n", - " Replace will regard ready is placed in (0, 0)\n", - "[WARNING GPL-0001] reset toplevel port is not placed!\n", - " Replace will regard reset is placed in (0, 0)\n", - "[WARNING GPL-0001] suspend toplevel port is not placed!\n", - " Replace will regard suspend is placed in (0, 0)\n", - "[WARNING GPL-0001] valid toplevel port is not placed!\n", - " Replace will regard valid is placed in (0, 0)\n", - "[WARNING GPL-0001] valid_reg toplevel port is not placed!\n", - " Replace will regard valid_reg is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[0] toplevel port is not placed!\n", - " Replace will regard we_mem[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[1] toplevel port is not placed!\n", - " Replace will regard we_mem[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[2] toplevel port is not placed!\n", - " Replace will regard we_mem[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] we_mem[3] toplevel port is not placed!\n", - " Replace will regard we_mem[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[0] toplevel port is not placed!\n", - " Replace will regard writedata[0] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[1] toplevel port is not placed!\n", - " Replace will regard writedata[1] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[2] toplevel port is not placed!\n", - " Replace will regard writedata[2] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[3] toplevel port is not placed!\n", - " Replace will regard writedata[3] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[4] toplevel port is not placed!\n", - " Replace will regard writedata[4] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[5] toplevel port is not placed!\n", - " Replace will regard writedata[5] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[6] toplevel port is not placed!\n", - " Replace will regard writedata[6] is placed in (0, 0)\n", - "[WARNING GPL-0001] writedata[7] toplevel port is not placed!\n", - " Replace will regard writedata[7] is placed in (0, 0)\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 73528\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 1.00\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 14942267\n", - "[INFO GPL-0026] IdealBinCnt: 74306\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 256 256\n", - "[INFO GPL-0029] BinSize: 4530 3740\n", - "[INFO GPL-0030] NumBins: 65536\n", - "aa\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20587\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 14628\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20587\n", - "[INFO GPL-0023] TargetDensity: 0.20\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 74964224\n", - "[INFO GPL-0026] IdealBinCnt: 14811\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 64 64\n", - "[INFO GPL-0029] BinSize: 18120 14960\n", - "[INFO GPL-0030] NumBins: 4096\n", - "[NesterovSolve] Iter: 1 overflow: 0.997108 HPWL: 16341346\n", - "[NesterovSolve] Iter: 10 overflow: 0.996962 HPWL: 8055736\n", - "[NesterovSolve] Iter: 20 overflow: 0.997059 HPWL: 7925699\n", - "[NesterovSolve] Iter: 30 overflow: 0.997026 HPWL: 7889535\n", - "[NesterovSolve] Iter: 40 overflow: 0.996855 HPWL: 7862205\n", - "[NesterovSolve] Iter: 50 overflow: 0.996431 HPWL: 7845889\n", - "[NesterovSolve] Iter: 60 overflow: 0.995915 HPWL: 7841907\n", - "[NesterovSolve] Iter: 70 overflow: 0.995686 HPWL: 7850601\n", - "[NesterovSolve] Iter: 80 overflow: 0.995683 HPWL: 7868845\n", - "[NesterovSolve] Iter: 90 overflow: 0.995677 HPWL: 7899971\n", - "[NesterovSolve] Iter: 100 overflow: 0.99566 HPWL: 7949717\n", - "[NesterovSolve] Iter: 110 overflow: 0.995515 HPWL: 8049690\n", - "[NesterovSolve] Iter: 120 overflow: 0.994272 HPWL: 8292064\n", - "[NesterovSolve] Iter: 130 overflow: 0.993953 HPWL: 8974211\n", - "[NesterovSolve] Iter: 140 overflow: 0.993578 HPWL: 10894534\n", - "[NesterovSolve] Iter: 150 overflow: 0.991915 HPWL: 15317766\n", - "[NesterovSolve] Iter: 160 overflow: 0.987364 HPWL: 22556841\n", - "[NesterovSolve] Iter: 170 overflow: 0.974851 HPWL: 34093945\n", - "[NesterovSolve] Iter: 180 overflow: 0.952973 HPWL: 46429828\n", - "[NesterovSolve] Iter: 190 overflow: 0.945298 HPWL: 52126369\n", - "[NesterovSolve] Iter: 200 overflow: 0.931198 HPWL: 59644764\n", - "[NesterovSolve] Iter: 210 overflow: 0.903559 HPWL: 74125749\n", - "[NesterovSolve] Iter: 220 overflow: 0.869349 HPWL: 87010969\n", - "[NesterovSolve] Iter: 230 overflow: 0.84556 HPWL: 97773601\n", - "[NesterovSolve] Iter: 240 overflow: 0.806427 HPWL: 111527656\n", - "[NesterovSolve] Iter: 250 overflow: 0.765486 HPWL: 123987198\n", - "[NesterovSolve] Iter: 260 overflow: 0.725056 HPWL: 133995788\n", - "[NesterovSolve] Iter: 270 overflow: 0.678261 HPWL: 144097506\n", - "[NesterovSolve] Iter: 280 overflow: 0.632655 HPWL: 154629267\n", - "[NesterovSolve] Iter: 290 overflow: 0.584717 HPWL: 163015366\n", - "[NesterovSolve] Iter: 300 overflow: 0.534802 HPWL: 167677731\n", - "[NesterovSolve] Iter: 310 overflow: 0.489636 HPWL: 173610907\n", - "[NesterovSolve] Iter: 320 overflow: 0.450549 HPWL: 179334660\n", - "[NesterovSolve] Iter: 330 overflow: 0.401905 HPWL: 182686103\n", - "[NesterovSolve] Iter: 340 overflow: 0.353443 HPWL: 188131976\n", - "[NesterovSolve] Iter: 350 overflow: 0.31267 HPWL: 191868947\n", - "[NesterovSolve] Iter: 360 overflow: 0.283072 HPWL: 193941211\n", - "[NesterovSolve] Iter: 370 overflow: 0.251722 HPWL: 195365531\n", - "[NesterovSolve] Iter: 380 overflow: 0.221333 HPWL: 197017662\n", - "[NesterovSolve] Iter: 390 overflow: 0.198235 HPWL: 198169738\n", - "[NesterovSolve] Iter: 400 overflow: 0.179627 HPWL: 198673726\n", - "[NesterovSolve] Iter: 410 overflow: 0.155951 HPWL: 199622965\n", - "[NesterovSolve] Iter: 420 overflow: 0.140848 HPWL: 200563351\n", - "[NesterovSolve] Iter: 430 overflow: 0.123813 HPWL: 201715302\n", - "[NesterovSolve] Iter: 440 overflow: 0.104607 HPWL: 202396252\n", - "[NesterovSolve] Finished with Overflow: 0.097488\n", - "Elapsed time: 0:02.99[h:]min:sec. CPU time: user 2.89 sys 0.06 (98%). Peak memory: 129840KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/io_placement.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_2_place_iop.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO PPL-0060] Restrict pins [writedata[0] writedata[1] writedata[2] writedata[3] writedata[4] writedata[5] writedata[6] writedata[7]] to region (20.0u, 20.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [ce_mem[0] ce_mem[1] ce_mem[2] ce_mem[3] we_mem[0] we_mem[1] we_mem[2] we_mem[3]] to region (20.0u, 20.0u)-(40.0u, 40.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [dataadr[0] dataadr[1] dataadr[2] dataadr[3] dataadr[4] dataadr[5] dataadr[6] dataadr[7]] to region (20.0u, 960.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "[INFO PPL-0060] Restrict pins [inter_dmem0[0] inter_dmem0[1] inter_dmem0[2] inter_dmem0[3] inter_dmem0[4] inter_dmem0[5] inter_dmem0[6] inter_dmem0[7] inter_dmem1[0] inter_dmem1[1] inter_dmem1[2] inter_dmem1[3] inter_dmem1[4] inter_dmem1[5] inter_dmem1[6] inter_dmem1[7] inter_dmem2[0] inter_dmem2[1] inter_dmem2[2] inter_dmem2[3] inter_dmem2[4] inter_dmem2[5] inter_dmem2[6] inter_dmem2[7] inter_dmem3[0] inter_dmem3[1] inter_dmem3[2] inter_dmem3[3] inter_dmem3[4] inter_dmem3[5] inter_dmem3[6] inter_dmem3[7]] to region (1100.0u, 20.0u)-(1180.0u, 1180.0u) at routing layer Metal4.\n", - "Found 0 macro blocks.\n", - "Using 2 tracks default min distance between IO pins.\n", - "[INFO PPL-0010] Tentative 0 to set up sections.\n", - "[INFO PPL-0001] Number of slots 1628\n", - "[INFO PPL-0062] Number of top layer slots 11136\n", - "[INFO PPL-0002] Number of I/O 127\n", - "[INFO PPL-0003] Number of I/O w/sink 126\n", - "[INFO PPL-0004] Number of I/O w/o sink 1\n", - "[INFO PPL-0005] Slots per section 200\n", - "[INFO PPL-0006] Slots increase factor 0.01\n", - "[INFO PPL-0008] Successfully assigned pins to sections.\n", - "[INFO PPL-0012] I/O nets HPWL: 58136.85 um.\n", - "begin generation pin location file\n", - "wd=writedata[0]\n", - "wd=writedata[1]\n", - "wd=writedata[2]\n", - "wd=writedata[3]\n", - "wd=writedata[4]\n", - "wd=writedata[5]\n", - "wd=writedata[6]\n", - "wd=writedata[7]\n", - "dataadr=dataadr[0]\n", - "dataadr=dataadr[1]\n", - "dataadr=dataadr[2]\n", - "dataadr=dataadr[3]\n", - "dataadr=dataadr[4]\n", - "dataadr=dataadr[5]\n", - "dataadr=dataadr[6]\n", - "dataadr=dataadr[7]\n", - "inter_dmem=inter_dmem0[0]\n", - "inter_dmem=inter_dmem0[1]\n", - "inter_dmem=inter_dmem0[2]\n", - "inter_dmem=inter_dmem0[3]\n", - "inter_dmem=inter_dmem0[4]\n", - "inter_dmem=inter_dmem0[5]\n", - "inter_dmem=inter_dmem0[6]\n", - "inter_dmem=inter_dmem0[7]\n", - "inter_dmem=inter_dmem1[0]\n", - "inter_dmem=inter_dmem1[1]\n", - "inter_dmem=inter_dmem1[2]\n", - "inter_dmem=inter_dmem1[3]\n", - "inter_dmem=inter_dmem1[4]\n", - "inter_dmem=inter_dmem1[5]\n", - "inter_dmem=inter_dmem1[6]\n", - "inter_dmem=inter_dmem1[7]\n", - "inter_dmem=inter_dmem2[0]\n", - "inter_dmem=inter_dmem2[1]\n", - "inter_dmem=inter_dmem2[2]\n", - "inter_dmem=inter_dmem2[3]\n", - "inter_dmem=inter_dmem2[4]\n", - "inter_dmem=inter_dmem2[5]\n", - "inter_dmem=inter_dmem2[6]\n", - "inter_dmem=inter_dmem2[7]\n", - "inter_dmem=inter_dmem3[0]\n", - "inter_dmem=inter_dmem3[1]\n", - "inter_dmem=inter_dmem3[2]\n", - "inter_dmem=inter_dmem3[3]\n", - "inter_dmem=inter_dmem3[4]\n", - "inter_dmem=inter_dmem3[5]\n", - "inter_dmem=inter_dmem3[6]\n", - "inter_dmem=inter_dmem3[7]\n", - "e_mem=ce_mem[0]\n", - "e_mem=ce_mem[1]\n", - "e_mem=ce_mem[2]\n", - "e_mem=ce_mem[3]\n", - "e_mem=we_mem[0]\n", - "e_mem=we_mem[1]\n", - "e_mem=we_mem[2]\n", - "e_mem=we_mem[3]\n", - "end generating pin location file\n", - "Elapsed time: 0:00.58[h:]min:sec. CPU time: user 0.47 sys 0.07 (94%). Peak memory: 107920KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_3_place_gp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 73528\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 1.00\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 14942267\n", - "[INFO GPL-0026] IdealBinCnt: 74306\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 256 256\n", - "[INFO GPL-0029] BinSize: 4530 3740\n", - "[INFO GPL-0030] NumBins: 65536\n", - "[INFO GPL-0002] DBU: 1000\n", - "[INFO GPL-0003] SiteSize: 460 2720\n", - "[INFO GPL-0004] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0005] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0006] NumInstances: 19933\n", - "[INFO GPL-0007] NumPlaceInstances: 5065\n", - "[INFO GPL-0008] NumFixedInstances: 14868\n", - "[INFO GPL-0009] NumDummyInstances: 0\n", - "[INFO GPL-0010] NumNets: 5303\n", - "[INFO GPL-0011] NumPins: 20714\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 1200000 1000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 20240 21760\n", - "[INFO GPL-0015] CoreAreaUxUy: 1179900 979200\n", - "[INFO GPL-0016] CoreArea: 1110304870400\n", - "[INFO GPL-0017] NonPlaceInstsArea: 18602841600\n", - "[INFO GPL-0018] PlaceInstsArea: 75682585600\n", - "[INFO GPL-0019] Util(%): 6.93\n", - "[INFO GPL-0020] StdInstsArea: 75682585600\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[InitialPlace] Iter: 1 CG residual: 0.00000915 HPWL: 292812822\n", - "[InitialPlace] Iter: 2 CG residual: 0.00000201 HPWL: 122367514\n", - "[InitialPlace] Iter: 3 CG residual: 0.00000623 HPWL: 121901227\n", - "[InitialPlace] Iter: 4 CG residual: 0.00008770 HPWL: 121047584\n", - "[InitialPlace] Iter: 5 CG residual: 0.00008030 HPWL: 119459080\n", - "[InitialPlace] Iter: 6 CG residual: 0.00005638 HPWL: 117120683\n", - "[InitialPlace] Iter: 7 CG residual: 0.00002268 HPWL: 114528872\n", - "[InitialPlace] Iter: 8 CG residual: 0.00001497 HPWL: 112812481\n", - "[InitialPlace] Iter: 9 CG residual: 0.00000231 HPWL: 111804363\n", - "[INFO GPL-0031] FillerInit: NumGCells: 14016\n", - "[INFO GPL-0032] FillerInit: NumGNets: 5303\n", - "[INFO GPL-0033] FillerInit: NumGPins: 20714\n", - "[INFO GPL-0023] TargetDensity: 0.19\n", - "[INFO GPL-0024] AveragePlaceInstArea: 14942267\n", - "[INFO GPL-0025] IdealBinArea: 78229192\n", - "[INFO GPL-0026] IdealBinCnt: 14192\n", - "[INFO GPL-0027] TotalBinArea: 1110304870400\n", - "[INFO GPL-0028] BinCnt: 64 64\n", - "[INFO GPL-0029] BinSize: 18120 14960\n", - "[INFO GPL-0030] NumBins: 4096\n", - "[NesterovSolve] Iter: 1 overflow: 0.977864 HPWL: 78550553\n", - "[NesterovSolve] Iter: 10 overflow: 0.933936 HPWL: 114236175\n", - "[NesterovSolve] Iter: 20 overflow: 0.90914 HPWL: 123178890\n", - "[NesterovSolve] Iter: 30 overflow: 0.900862 HPWL: 126937013\n", - "[NesterovSolve] Iter: 40 overflow: 0.901119 HPWL: 127289711\n", - "[NesterovSolve] Iter: 50 overflow: 0.901975 HPWL: 127142643\n", - "[NesterovSolve] Iter: 60 overflow: 0.902329 HPWL: 127054539\n", - "[NesterovSolve] Iter: 70 overflow: 0.903432 HPWL: 126306706\n", - "[NesterovSolve] Iter: 80 overflow: 0.9056 HPWL: 125005206\n", - "[NesterovSolve] Iter: 90 overflow: 0.908611 HPWL: 123782512\n", - "[NesterovSolve] Iter: 100 overflow: 0.911652 HPWL: 122999599\n", - "[NesterovSolve] Iter: 110 overflow: 0.913357 HPWL: 122728969\n", - "[NesterovSolve] Iter: 120 overflow: 0.912377 HPWL: 122979653\n", - "[NesterovSolve] Iter: 130 overflow: 0.912757 HPWL: 123640007\n", - "[NesterovSolve] Iter: 140 overflow: 0.9134 HPWL: 124747049\n", - "[NesterovSolve] Iter: 150 overflow: 0.911017 HPWL: 126522675\n", - "[NesterovSolve] Iter: 160 overflow: 0.906435 HPWL: 129427211\n", - "[NesterovSolve] Iter: 170 overflow: 0.89966 HPWL: 134022065\n", - "[NesterovSolve] Iter: 180 overflow: 0.889301 HPWL: 139611480\n", - "[NesterovSolve] Iter: 190 overflow: 0.877256 HPWL: 145558364\n", - "[NesterovSolve] Iter: 200 overflow: 0.862431 HPWL: 152617260\n", - "[NesterovSolve] Iter: 210 overflow: 0.836523 HPWL: 161797220\n", - "[NesterovSolve] Iter: 220 overflow: 0.8059 HPWL: 172096219\n", - "[INFO GPL-0100] worst slack -1.61e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 230 overflow: 0.771419 HPWL: 181338070\n", - "[NesterovSolve] Iter: 240 overflow: 0.742774 HPWL: 188529753\n", - "[NesterovSolve] Iter: 250 overflow: 0.697721 HPWL: 197538595\n", - "[NesterovSolve] Iter: 260 overflow: 0.653876 HPWL: 204226465\n", - "[INFO GPL-0100] worst slack -3.07e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 270 overflow: 0.615828 HPWL: 211088430\n", - "[NesterovSolve] Snapshot saved at iter = 272\n", - "[NesterovSolve] Iter: 280 overflow: 0.558622 HPWL: 216418487\n", - "[NesterovSolve] Iter: 290 overflow: 0.51533 HPWL: 220685728\n", - "[INFO GPL-0100] worst slack -2.18e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 300 overflow: 0.47452 HPWL: 226502326\n", - "[NesterovSolve] Iter: 310 overflow: 0.437822 HPWL: 228777212\n", - "[NesterovSolve] Iter: 320 overflow: 0.385584 HPWL: 231723065\n", - "[NesterovSolve] Iter: 330 overflow: 0.343404 HPWL: 235337966\n", - "[NesterovSolve] Iter: 340 overflow: 0.314844 HPWL: 236737577\n", - "[INFO GPL-0100] worst slack -1.91e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 350 overflow: 0.276182 HPWL: 239093792\n", - "[NesterovSolve] Iter: 360 overflow: 0.243931 HPWL: 239372701\n", - "[NesterovSolve] Iter: 370 overflow: 0.220396 HPWL: 239681163\n", - "[INFO GPL-0100] worst slack -1.58e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[INFO GPL-0075] Routability numCall: 1 inflationIterCnt: 1 bloatIterCnt: 0\n", - "[INFO GPL-0036] TileLxLy: 0 0\n", - "[INFO GPL-0037] TileSize: 6900 6900\n", - "[INFO GPL-0038] TileCnt: 173 144\n", - "[INFO GPL-0039] numRoutingLayers: 7\n", - "[INFO GPL-0040] NumTiles: 24912\n", - "[INFO GPL-0063] TotalRouteOverflowH2: 0.0\n", - "[INFO GPL-0064] TotalRouteOverflowV2: 0.0\n", - "[INFO GPL-0065] OverflowTileCnt2: 0\n", - "[INFO GPL-0066] 0.5%RC: 0.9924932957973941\n", - "[INFO GPL-0067] 1.0%RC: 0.9384718482999316\n", - "[INFO GPL-0068] 2.0%RC: 0.8475519785298987\n", - "[INFO GPL-0069] 5.0%RC: 0.7687056235492951\n", - "[INFO GPL-0070] 0.5rcK: 1.0\n", - "[INFO GPL-0071] 1.0rcK: 1.0\n", - "[INFO GPL-0072] 2.0rcK: 0.0\n", - "[INFO GPL-0073] 5.0rcK: 0.0\n", - "[INFO GPL-0074] FinalRC: 0.9654826\n", - "[NesterovSolve] Iter: 380 overflow: 0.195001 HPWL: 239777500\n", - "[NesterovSolve] Iter: 390 overflow: 0.174195 HPWL: 240314160\n", - "[NesterovSolve] Iter: 400 overflow: 0.155183 HPWL: 240750335\n", - "[INFO GPL-0100] worst slack -2.09e-09\n", - "[INFO GPL-0103] Weighted 516 nets.\n", - "[NesterovSolve] Iter: 410 overflow: 0.135264 HPWL: 241374082\n", - "[NesterovSolve] Iter: 420 overflow: 0.116892 HPWL: 242505701\n", - "[NesterovSolve] Iter: 430 overflow: 0.10169 HPWL: 243051499\n", - "[NesterovSolve] Finished with Overflow: 0.099698\n", - "\n", - "==========================================================================\n", - "global place check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -67003.80\n", - "\n", - "==========================================================================\n", - "global place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -68.07\n", - "\n", - "==========================================================================\n", - "global place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -68.07\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.00 1.67 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.94 0.94 library removal time\n", - " 0.94 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.94 data required time\n", - " -1.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.73 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.01 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.08 0.08 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.03 0.00 0.08 ^ ready (out)\n", - " 0.08 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.08 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 64.9%\n", - "Combinational 5.89e-04 1.28e-03 1.64e-08 1.86e-03 35.1%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.03e-03 1.28e-03 2.50e-08 5.31e-03 100.0%\n", - " 76.0% 24.0% 0.0%\n", - "\n", - "==========================================================================\n", - "global place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 81611 u^2 7% utilization.\n", - "\n", - "Elapsed time: 0:55.03[h:]min:sec. CPU time: user 3408.63 sys 3.36 (6199%). Peak memory: 272352KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/resize.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_4_place_resized.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "\n", - "==========================================================================\n", - "resizer pre check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer pre report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -67003.80\n", - "\n", - "==========================================================================\n", - "resizer pre report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -68.07\n", - "\n", - "==========================================================================\n", - "resizer pre report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -68.07\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.00 1.67 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.67 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 0.94 0.94 library removal time\n", - " 0.94 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.94 data required time\n", - " -1.67 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.73 slack (MET)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 ^ input external delay\n", - " 1 0.01 0.00 0.00 0.00 ^ valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 ^ _145_/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.08 0.08 ^ _145_/X (sky130_fd_sc_hd__buf_4)\n", - " ready (net)\n", - " 0.03 0.00 0.08 ^ ready (out)\n", - " 0.08 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.08 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.03 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v riscv/dp/_1129_/A (sky130_fd_sc_hd__inv_1)\n", - " 32 0.30 2.40 1.67 1.67 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/dp/_0000_ (net)\n", - " 2.40 0.07 1.73 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_1)\n", - " 1.73 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " -0.42 12.08 library recovery time\n", - " 12.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.08 data required time\n", - " -1.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 10.35 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5038_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_1)\n", - " 36 0.22 1.06 1.10 1.10 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_1)\n", - " pc[31] (net)\n", - " 1.06 0.02 1.12 v _049_/D (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.03 1.22 1.27 2.39 ^ _049_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _000_ (net)\n", - " 1.22 0.00 2.39 ^ _053_/A (sky130_fd_sc_hd__nand4_1)\n", - " 12 0.08 0.99 1.05 3.44 v _053_/Y (sky130_fd_sc_hd__nand4_1)\n", - " _004_ (net)\n", - " 0.99 0.00 3.45 v _076_/A2 (sky130_fd_sc_hd__o31ai_2)\n", - " 7 0.03 0.76 0.87 4.32 ^ _076_/Y (sky130_fd_sc_hd__o31ai_2)\n", - " pcmux.y[6] (net)\n", - " 0.76 0.00 4.32 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_1)\n", - " 4 0.01 0.18 0.19 4.51 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_014_ (net)\n", - " 0.18 0.00 4.51 v riscv/_063_/D (sky130_fd_sc_hd__nand4_2)\n", - " 8 0.03 0.23 0.24 4.75 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_2)\n", - " riscv/_015_ (net)\n", - " 0.23 0.00 4.75 ^ riscv/_064_/A (sky130_fd_sc_hd__inv_1)\n", - " 48 0.19 0.87 0.74 5.49 v riscv/_064_/Y (sky130_fd_sc_hd__inv_1)\n", - " riscv/c.imm[2] (net)\n", - " 0.87 0.00 5.49 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_1)\n", - " 253 2.88 50.94 36.89 42.38 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_1)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 50.95 0.76 43.13 ^ riscv/dp/rf/_2819_/S0 (sky130_fd_sc_hd__mux4_2)\n", - " 1 0.01 1.11 5.14 48.28 ^ riscv/dp/rf/_2819_/X (sky130_fd_sc_hd__mux4_2)\n", - " riscv/dp/rf/_1483_ (net)\n", - " 1.11 0.00 48.28 ^ riscv/dp/rf/_2821_/A0 (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 1.44 0.18 48.45 v riscv/dp/rf/_2821_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/rf/_1485_ (net)\n", - " 1.44 0.00 48.45 v riscv/dp/rf/_2825_/A2 (sky130_fd_sc_hd__o211a_1)\n", - " 1 0.01 0.15 0.69 49.15 v riscv/dp/rf/_2825_/X (sky130_fd_sc_hd__o211a_1)\n", - " riscv/dp/rf/_1489_ (net)\n", - " 0.15 0.00 49.15 v riscv/dp/rf/_2826_/C1 (sky130_fd_sc_hd__a2111oi_0)\n", - " 14 0.18 11.14 8.37 57.52 ^ riscv/dp/rf/_2826_/Y (sky130_fd_sc_hd__a2111oi_0)\n", - " riscv/dp/pcsrcmux.d0[25] (net)\n", - " 11.14 0.03 57.55 ^ riscv/dp/_1047_/A (sky130_fd_sc_hd__maj3_2)\n", - " 1 0.01 0.22 1.57 59.11 ^ riscv/dp/_1047_/X (sky130_fd_sc_hd__maj3_2)\n", - " riscv/dp/_0065_ (net)\n", - " 0.22 0.00 59.11 ^ riscv/dp/_1050_/A2 (sky130_fd_sc_hd__a21oi_2)\n", - " 2 0.02 0.11 0.13 59.25 v riscv/dp/_1050_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0068_ (net)\n", - " 0.11 0.00 59.25 v riscv/dp/_1117_/B1 (sky130_fd_sc_hd__o22ai_1)\n", - " 1 0.00 0.15 0.16 59.41 ^ riscv/dp/_1117_/Y (sky130_fd_sc_hd__o22ai_1)\n", - " riscv/dp/_0135_ (net)\n", - " 0.15 0.00 59.41 ^ riscv/dp/_1118_/A2 (sky130_fd_sc_hd__o211ai_1)\n", - " 3 0.01 0.16 0.15 59.56 v riscv/dp/_1118_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/dp/_0136_ (net)\n", - " 0.16 0.00 59.56 v riscv/dp/_1128_/A_N (sky130_fd_sc_hd__and4bb_1)\n", - " 2 0.01 0.12 0.35 59.91 ^ riscv/dp/_1128_/X (sky130_fd_sc_hd__and4bb_1)\n", - " riscv/c.eq (net)\n", - " 0.12 0.00 59.91 ^ riscv/_136_/A1 (sky130_fd_sc_hd__o32a_1)\n", - " 1 0.00 0.07 0.18 60.08 ^ riscv/_136_/X (sky130_fd_sc_hd__o32a_1)\n", - " riscv/_008_ (net)\n", - " 0.07 0.00 60.08 ^ riscv/_137_/C1 (sky130_fd_sc_hd__o211ai_1)\n", - " 1 0.00 0.08 0.09 60.17 v riscv/_137_/Y (sky130_fd_sc_hd__o211ai_1)\n", - " riscv/_009_ (net)\n", - " 0.08 0.00 60.17 v riscv/_138_/A3 (sky130_fd_sc_hd__o31ai_1)\n", - " 64 0.50 14.60 10.63 70.80 ^ riscv/_138_/Y (sky130_fd_sc_hd__o31ai_1)\n", - " riscv/c.pcsrc (net)\n", - " 14.60 0.26 71.06 ^ riscv/dp/_0668_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.07 2.85 4.44 75.51 v riscv/dp/_0668_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0288_ (net)\n", - " 2.85 0.01 75.52 v riscv/dp/_0683_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 31 0.16 4.41 4.39 79.91 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 4.41 0.03 79.94 ^ riscv/dp/rf/_3888_/A1 (sky130_fd_sc_hd__mux2_2)\n", - " 1 0.00 0.20 0.54 80.47 ^ riscv/dp/rf/_3888_/X (sky130_fd_sc_hd__mux2_2)\n", - " riscv/dp/rf/_0304_ (net)\n", - " 0.20 0.00 80.47 ^ riscv/dp/rf/_5038_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 80.47 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5038_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.10 12.40 library setup time\n", - " 12.40 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.40 data required time\n", - " -80.47 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -68.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.52e-09 3.44e-03 64.9%\n", - "Combinational 5.89e-04 1.28e-03 1.64e-08 1.86e-03 35.1%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.03e-03 1.28e-03 2.50e-08 5.31e-03 100.0%\n", - " 76.0% 24.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer pre report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 81611 u^2 7% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "19933\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "20591\n", - "\n", - "Perform port buffering...\n", - "[INFO RSZ-0027] Inserted 66 input buffers.\n", - "[INFO RSZ-0028] Inserted 59 output buffers.\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "[INFO RSZ-0034] Found 226 slew violations.\n", - "[INFO RSZ-0036] Found 51 capacitance violations.\n", - "[INFO RSZ-0038] Inserted 161 buffers in 226 nets.\n", - "[INFO RSZ-0039] Resized 2607 instances.\n", - "Repair tie lo fanout...\n", - "[INFO RSZ-0042] Inserted 165 tie sky130_fd_sc_hd__conb_1 instances.\n", - "Repair tie hi fanout...\n", - "[INFO RSZ-0042] Inserted 2 tie sky130_fd_sc_hd__conb_1 instances.\n", - "\n", - "==========================================================================\n", - "report_floating_nets\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1190.19\n", - "\n", - "==========================================================================\n", - "resizer report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.63\n", - "\n", - "==========================================================================\n", - "resizer report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.63\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1153_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.35 ^ riscv/dp/_1153_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1153_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 0.35 library removal time\n", - " 0.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.35 data required time\n", - " -0.35 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 v input66/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.07 0.07 v input66/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net66 (net)\n", - " 0.03 0.00 0.07 v _145_/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.09 0.16 v _145_/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net112 (net)\n", - " 0.03 0.00 0.16 v output112/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.09 0.25 v output112/X (sky130_fd_sc_hd__clkbuf_1)\n", - " ready (net)\n", - " 0.03 0.00 0.25 v ready (out)\n", - " 0.25 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.25 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.25 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.24 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5131_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.97 0.89 1.44 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.98 0.01 1.45 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.07 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.07 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.64 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.64 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.79 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.79 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.07 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.07 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.35 0.25 0.27 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.25 0.00 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.77 0.69 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.77 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.18 0.23 4.54 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.56 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.19 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.13 0.63 6.17 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.13 0.00 6.17 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.23 0.27 6.44 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.23 0.00 6.44 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.75 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.75 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 6.84 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.85 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.07 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.08 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 7.63 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 7.63 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 7.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 8.13 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.13 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 8.54 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 8.54 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.83 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.83 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.11 0.12 8.95 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.11 0.00 8.95 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 9.19 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 9.19 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 9.42 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 9.42 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.17 0.18 9.59 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.17 0.00 9.59 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 9.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 9.73 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.53 10.26 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.31 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.31 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.34 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.62 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.04 11.66 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.76 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.76 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.95 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.96 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.12 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.12 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.60 0.51 12.62 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.60 0.00 12.62 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.15 0.25 12.87 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.88 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.10 0.09 12.97 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.10 0.00 12.97 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.83 13.80 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.10 0.03 13.83 ^ riscv/dp/rf/_4027_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 14.07 ^ riscv/dp/rf/_4027_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0397_ (net)\n", - " 0.07 0.00 14.07 ^ riscv/dp/rf/_5131_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5131_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.63 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.06 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.01 0.18 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.34 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.24 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5131_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.97 0.89 1.44 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.98 0.01 1.45 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.07 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.07 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.64 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.64 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.79 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.79 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.07 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.07 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.35 0.25 0.27 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.25 0.00 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.77 0.69 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.77 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.18 0.23 4.54 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.56 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.19 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.13 0.63 6.17 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.13 0.00 6.17 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.23 0.27 6.44 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.23 0.00 6.44 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.75 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.75 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 6.84 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.85 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.07 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.08 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 7.63 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 7.63 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 7.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 8.13 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.13 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 8.54 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 8.54 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.83 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.83 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.11 0.12 8.95 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.11 0.00 8.95 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 9.19 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 9.19 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 9.42 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 9.42 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.17 0.18 9.59 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.17 0.00 9.59 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 9.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 9.73 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.53 10.26 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.31 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.31 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.34 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.62 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.04 11.66 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.76 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.76 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.95 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.96 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.12 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.12 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.60 0.51 12.62 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.60 0.00 12.62 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.15 0.25 12.87 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.88 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.10 0.09 12.97 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.10 0.00 12.97 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.83 13.80 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.10 0.03 13.83 ^ riscv/dp/rf/_4027_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 14.07 ^ riscv/dp/rf/_4027_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0397_ (net)\n", - " 0.07 0.00 14.07 ^ riscv/dp/rf/_5131_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5131_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.63 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.027497228235006332\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0183\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.0030674519948661327\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0137\n", - "\n", - "==========================================================================\n", - "resizer max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "resizer setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 992\n", - "\n", - "==========================================================================\n", - "resizer hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 2\n", - "\n", - "==========================================================================\n", - "resizer critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0690\n", - "\n", - "==========================================================================\n", - "resizer critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.6346\n", - "\n", - "==========================================================================\n", - "resizer slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-11.618452\n", - "\n", - "==========================================================================\n", - "resizer report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.53e-09 3.44e-03 66.5%\n", - "Combinational 5.64e-04 1.17e-03 2.50e-08 1.73e-03 33.5%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.00e-03 1.17e-03 3.35e-08 5.17e-03 100.0%\n", - " 77.4% 22.6% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 95982 u^2 9% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "20382\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "21489\n", - "\n", - "Elapsed time: 0:04.61[h:]min:sec. CPU time: user 4.48 sys 0.08 (99%). Peak memory: 145164KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.tmp.log ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_place.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/3_5_place_dp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 14501.5 u\n", - "average displacement 0.7 u\n", - "max displacement 19.4 u\n", - "original HPWL 289472.3 u\n", - "legalized HPWL 302734.0 u\n", - "delta HPWL 5 %\n", - "\n", - "Detailed placement improvement.\n", - "Importing netlist into detailed improver.\n", - "[INFO DPO-0100] Creating network with 20382 cells, 127 terminals, 5752 edges and 21449 pins.\n", - "[INFO DPO-0109] Network stats: inst 20509, edges 5752, pins 21449\n", - "[INFO DPO-0110] Number of regions is 1\n", - "[INFO DPO-0401] Setting random seed to 1.\n", - "[INFO DPO-0402] Setting maximum displacement 5 1 to 13600 2720 units.\n", - "[INFO DPO-0320] Collected 14995 fixed cells (excluded terminal_NI).\n", - "[INFO DPO-0318] Collected 5514 single height cells.\n", - "[INFO DPO-0321] Collected 0 wide cells.\n", - "[INFO DPO-0322] Image (20240, 21760) - (1179900, 979200)\n", - "[INFO DPO-0310] Assigned 5514 cells into segments. Movement in X-direction is 5980.000000, movement in Y-direction is 2720.000000.\n", - "[WARNING DPO-0200] Unexpected displacement during legalization.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "[INFO DPO-0303] Running algorithm for independent set matching.\n", - "[INFO DPO-0300] Set matching objective is wirelength.\n", - "[INFO DPO-0301] Pass 1 of matching; objective is 3.033191e+08.\n", - "[INFO DPO-0302] End of matching; objective is 3.028057e+08, improvement is 0.17 percent.\n", - "[INFO DPO-0303] Running algorithm for global swaps.\n", - "[INFO DPO-0306] Pass 1 of global swaps; hpwl is 2.986619e+08.\n", - "[INFO DPO-0306] Pass 2 of global swaps; hpwl is 2.978684e+08.\n", - "[INFO DPO-0307] End of global swaps; objective is 2.978684e+08, improvement is 1.63 percent.\n", - "[INFO DPO-0303] Running algorithm for vertical swaps.\n", - "[INFO DPO-0308] Pass 1 of vertical swaps; hpwl is 2.968698e+08.\n", - "[INFO DPO-0309] End of vertical swaps; objective is 2.968698e+08, improvement is 0.34 percent.\n", - "[INFO DPO-0303] Running algorithm for reordering.\n", - "[INFO DPO-0304] Pass 1 of reordering; objective is 2.968066e+08.\n", - "[INFO DPO-0305] End of reordering; objective is 2.968066e+08, improvement is 0.02 percent.\n", - "[INFO DPO-0303] Running algorithm for random improvement.\n", - "[INFO DPO-0324] Random improver is using displacement generator.\n", - "[INFO DPO-0325] Random improver is using hpwl objective.\n", - "[INFO DPO-0326] Random improver cost string is (a).\n", - "[INFO DPO-0332] End of pass, Generator displacement called 110280 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 110280, swaps 9744, moves 39241 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 2.950980e+08, Scratch cost 2.919564e+08, Incremental cost 2.919564e+08, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 2.919564e+08.\n", - "[INFO DPO-0327] Pass 1 of random improver; improvement in cost is 1.06 percent.\n", - "[INFO DPO-0332] End of pass, Generator displacement called 110280 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 220560, swaps 19042, moves 78126 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 2.919564e+08, Scratch cost 2.908662e+08, Incremental cost 2.908662e+08, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 2.908662e+08.\n", - "[INFO DPO-0327] Pass 2 of random improver; improvement in cost is 0.37 percent.\n", - "[INFO DPO-0328] End of random improver; improvement is 1.434023 percent.\n", - "[INFO DPO-0380] Cell flipping.\n", - "[INFO DPO-0382] Changed 2713 cell orientations for row compatibility.\n", - "[INFO DPO-0383] Performed 1302 cell flips.\n", - "[INFO DPO-0384] End of flipping; objective is 2.894378e+08, improvement is 1.07 percent.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "Detailed Improvement Results\n", - "------------------------------------------\n", - "Original HPWL 302734.0 u\n", - "Final HPWL 288682.3 u\n", - "Delta HPWL -4.6 %\n", - "\n", - "[INFO DPL-0020] Mirrored 328 instances\n", - "[INFO DPL-0021] HPWL before 288682.3 u\n", - "[INFO DPL-0022] HPWL after 288322.8 u\n", - "[INFO DPL-0023] HPWL delta -0.1 %\n", - "[INFO FLW-0012] Placement violations .\n", - "\n", - "==========================================================================\n", - "detailed place check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "detailed place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1161.83\n", - "\n", - "==========================================================================\n", - "detailed place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.61\n", - "\n", - "==========================================================================\n", - "detailed place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.61\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1152_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.19 0.01 0.34 ^ riscv/dp/_1152_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.34 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ riscv/dp/_1152_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.35 0.35 library removal time\n", - " 0.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.35 data required time\n", - " -0.34 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.01 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: valid (input port clocked by clk)\n", - "Endpoint: ready (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v valid (in)\n", - " valid (net)\n", - " 0.00 0.00 0.00 v input66/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.02 0.07 0.07 v input66/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net66 (net)\n", - " 0.02 0.00 0.07 v _145_/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.02 0.07 0.14 v _145_/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net112 (net)\n", - " 0.02 0.00 0.14 v output112/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.00 0.03 0.08 0.22 v output112/X (sky130_fd_sc_hd__clkbuf_1)\n", - " ready (net)\n", - " 0.03 0.00 0.22 v ready (out)\n", - " 0.22 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 0.00 output external delay\n", - " 0.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 data required time\n", - " -0.22 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.22 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.25 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5581_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.95 0.87 1.42 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.95 0.01 1.43 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.05 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.06 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.62 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.62 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.77 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.77 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.05 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.05 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 4.53 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.55 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 6.14 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 6.14 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 6.41 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 6.41 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.71 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.71 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 6.81 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.82 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.04 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.04 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 7.60 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 7.60 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 7.94 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.94 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 8.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 8.49 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 8.49 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.78 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.78 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 8.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 8.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 9.15 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 9.15 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 9.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 9.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 9.55 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 9.55 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 9.68 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 9.68 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 10.20 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.25 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.25 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.28 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.56 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 11.60 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.71 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.71 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.90 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.91 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 12.06 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.06 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 12.57 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 12.57 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 12.82 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.83 ^ riscv/dp/_0663_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 12.93 v riscv/dp/_0663_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0285_ (net)\n", - " 0.11 0.00 12.93 v riscv/dp/_0666_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.84 13.76 ^ riscv/dp/_0666_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[15] (net)\n", - " 1.11 0.03 13.80 ^ riscv/dp/rf/_4536_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.25 14.04 ^ riscv/dp/rf/_4536_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0847_ (net)\n", - " 0.07 0.00 14.04 ^ riscv/dp/rf/_5581_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.04 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5581_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.61 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 v input external delay\n", - " 1 0.01 0.00 0.00 0.00 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.00 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.17 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.17 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.33 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.40 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.40 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.14 12.64 library recovery time\n", - " 12.64 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.64 data required time\n", - " -0.40 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.25 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5581_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.55 0.55 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 0.55 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.95 0.87 1.42 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.95 0.01 1.43 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.62 2.05 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 2.06 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 2.62 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 2.62 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 2.77 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 2.77 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 3.05 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 3.05 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 3.34 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 3.34 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 4.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 4.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 4.29 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 4.31 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 4.53 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 4.55 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 4.78 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 4.80 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.04 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.04 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 5.29 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 5.30 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 5.52 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 5.54 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 6.14 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 6.14 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 6.41 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 6.41 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 6.71 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 6.71 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 6.81 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 6.82 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.04 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.04 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 7.60 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 7.60 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 7.94 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 7.94 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 8.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 8.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 8.49 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 8.49 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 8.78 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 8.78 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 8.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 8.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 9.15 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 9.15 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 9.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 9.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 9.55 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 9.55 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 9.68 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 9.68 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 10.20 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 10.25 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 11.25 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 11.28 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 11.56 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 11.60 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 11.71 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 11.71 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 11.90 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 11.91 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 12.06 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.06 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 12.57 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 12.57 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 12.82 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 12.83 ^ riscv/dp/_0663_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 12.93 v riscv/dp/_0663_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0285_ (net)\n", - " 0.11 0.00 12.93 v riscv/dp/_0666_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.16 1.10 0.84 13.76 ^ riscv/dp/_0666_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[15] (net)\n", - " 1.11 0.03 13.80 ^ riscv/dp/rf/_4536_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.25 14.04 ^ riscv/dp/rf/_4536_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0847_ (net)\n", - " 0.07 0.00 14.04 ^ riscv/dp/rf/_5581_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.04 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " 12.50 ^ riscv/dp/rf/_5581_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " -0.07 12.43 library setup time\n", - " 12.43 data required time\n", - "-----------------------------------------------------------------------------\n", - " 12.43 data required time\n", - " -14.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.61 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "detailed place setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 992\n", - "\n", - "==========================================================================\n", - "detailed place hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 14\n", - "\n", - "==========================================================================\n", - "detailed place critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0448\n", - "\n", - "==========================================================================\n", - "detailed place critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.6119\n", - "\n", - "==========================================================================\n", - "detailed place slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-11.476846\n", - "\n", - "==========================================================================\n", - "detailed place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.44e-03 0.00e+00 8.53e-09 3.44e-03 61.5%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 38.5%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.11e-03 1.48e-03 3.36e-08 5.59e-03 100.0%\n", - " 73.5% 26.5% 0.0%\n", - "\n", - "==========================================================================\n", - "detailed place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 95982 u^2 9% utilization.\n", - "\n", - "Elapsed time: 0:03.77[h:]min:sec. CPU time: user 3.64 sys 0.10 (99%). Peak memory: 158712KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/3_5_place_dp.odb ./results/130_180/riscv32i_3d/80MHz/3_place.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/2_floorplan.sdc ./results/130_180/riscv32i_3d/80MHz/3_place.sdc\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.tmp.log ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/cts.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/4_1_cts.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Finsh adding delay caused by TSV\n", - "[INFO CTS-0049] Characterization buffer is: sky130_fd_sc_hd__clkbuf_4.\n", - "[INFO CTS-0039] Number of created patterns = 12240.\n", - "[INFO CTS-0084] Compiling LUT.\n", - "Min. len Max. len Min. cap Max. cap Min. slew Max. slew\n", - "2 8 1 36 1 12 \n", - "[WARNING CTS-0043] 1632 wires are pure wire and no slew degradation.\n", - "TritonCTS forced slew degradation on these wires.\n", - "[INFO CTS-0046] Number of wire segments: 12240.\n", - "[INFO CTS-0047] Number of keys in characterization LUT: 1648.\n", - "[INFO CTS-0048] Actual min input cap: 1.\n", - "[INFO CTS-0007] Net \"clk\" found for clock \"clk\".\n", - "[INFO CTS-0010] Clock net \"clk\" has 1056 sinks.\n", - "[INFO CTS-0008] TritonCTS found 1 clock nets.\n", - "[INFO CTS-0097] Characterization used 1 buffer(s) types.\n", - "[INFO CTS-0200] 0 placement blockages have been identified.\n", - "[INFO CTS-0201] 0 placed hard macros will be treated like blockages.\n", - "[INFO CTS-0027] Generating H-Tree topology for net clk.\n", - "[INFO CTS-0028] Total number of sinks: 1056.\n", - "[INFO CTS-0029] Sinks will be clustered in groups of up to 30 and with maximum cluster diameter of 100.0 um.\n", - "[INFO CTS-0030] Number of static layers: 0.\n", - "[INFO CTS-0020] Wire segment unit: 13600 dbu (13 um).\n", - "[INFO CTS-0019] Total number of sinks after clustering: 79.\n", - "[INFO CTS-0024] Normalized sink region: [(22.3322, 7.46957), (74.8202, 47.2733)].\n", - "[INFO CTS-0025] Width: 52.4881.\n", - "[INFO CTS-0026] Height: 39.8037.\n", - " Level 1\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 40\n", - " Sub-region size: 26.2440 X 39.8037\n", - "[INFO CTS-0034] Segment length (rounded): 14.\n", - " Key: 252 inSlew: 1 inCap: 2 outSlew: 1 load: 1 length: 8 delay: 8\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Key: 156 inSlew: 1 inCap: 2 outSlew: 2 load: 1 length: 6 delay: 1\n", - " Level 2\n", - " Direction: Vertical\n", - " Sinks per sub-region: 20\n", - " Sub-region size: 26.2440 X 19.9019\n", - "[INFO CTS-0034] Segment length (rounded): 10.\n", - " Key: 253 inSlew: 2 inCap: 2 outSlew: 1 load: 1 length: 8 delay: 10\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Key: 2 inSlew: 3 inCap: 1 outSlew: 1 load: 1 length: 2 delay: 12\n", - " location: 1.0 buffer: sky130_fd_sc_hd__clkbuf_4\n", - " Level 3\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 10\n", - " Sub-region size: 13.1220 X 19.9019\n", - "[INFO CTS-0034] Segment length (rounded): 6.\n", - " Key: 156 inSlew: 1 inCap: 2 outSlew: 2 load: 1 length: 6 delay: 1\n", - "[INFO CTS-0032] Stop criterion found. Max number of sinks is 15.\n", - "[INFO CTS-0035] Number of sinks covered: 79.\n", - "[INFO CTS-0018] Created 98 clock buffers.\n", - "[INFO CTS-0012] Minimum number of buffers in the clock path: 6.\n", - "[INFO CTS-0013] Maximum number of buffers in the clock path: 6.\n", - "[INFO CTS-0015] Created 98 clock nets.\n", - "[INFO CTS-0016] Fanout distribution for the current clock = 4:2, 5:1, 6:1, 7:2, 8:3, 9:3, 10:10, 11:13, 12:9, 13:8, 14:7, 15:6, 16:4, 17:5, 18:5, 19:2, 20:1, 22:4, 23:1..\n", - "[INFO CTS-0017] Max level of the clock tree: 3.\n", - "[INFO CTS-0098] Clock net \"clk\"\n", - "[INFO CTS-0099] Sinks 1056\n", - "[INFO CTS-0100] Leaf buffers 79\n", - "[INFO CTS-0101] Average sink wire length 1774.83 um\n", - "[INFO CTS-0102] Path depth 6 - 6\n", - "\n", - "==========================================================================\n", - "cts pre-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1173.51\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.72\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.72\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.60\n", - "riscv/dp/rf/_5389_/CLK ^\n", - " 1.95 0.00 -0.36\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.77 ^ riscv/dp/_1158_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.77 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.42 2.34 library removal time\n", - " 2.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.34 data required time\n", - " -0.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.56 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[2] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1160_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[2] (in)\n", - " instr[2] (net)\n", - " 0.00 0.00 0.38 v input23/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.08 0.08 0.15 0.52 v input23/X (sky130_fd_sc_hd__buf_6)\n", - " net23 (net)\n", - " 0.08 0.02 0.54 v _067_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.11 0.13 0.67 ^ _067_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _016_ (net)\n", - " 0.11 0.00 0.67 ^ _068_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 8 0.04 0.11 0.13 0.79 v _068_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[2] (net)\n", - " 0.11 0.00 0.80 v riscv/_119_/A (sky130_fd_sc_hd__nand3_4)\n", - " 3 0.03 0.11 0.13 0.93 ^ riscv/_119_/Y (sky130_fd_sc_hd__nand3_4)\n", - " riscv/_000_ (net)\n", - " 0.11 0.00 0.93 ^ riscv/_138_/B1 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.06 0.14 0.19 1.11 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.14 0.00 1.12 v riscv/dp/_0556_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.10 0.17 1.29 ^ riscv/dp/_0556_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0216_ (net)\n", - " 0.10 0.00 1.29 ^ riscv/dp/_0558_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.08 1.37 v riscv/dp/_0558_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[30] (net)\n", - " 0.05 0.00 1.37 v riscv/dp/_1160_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.37 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1160_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.00 1.91 library hold time\n", - " 1.91 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.91 data required time\n", - " -1.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.54 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts pre-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 1000\n", - "\n", - "==========================================================================\n", - "cts pre-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 572\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.7749\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.7238\n", - "\n", - "==========================================================================\n", - "cts pre-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-10.927486\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.1%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 28.7%\n", - "Clock 3.59e-04 1.60e-03 4.51e-10 1.96e-03 26.2%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.08e-03 3.40e-08 7.48e-03 100.0%\n", - " 58.8% 41.2% 0.0%\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 96718 u^2 9% utilization.\n", - "\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "\n", - "==========================================================================\n", - "cts post-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts post-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -1173.51\n", - "\n", - "==========================================================================\n", - "cts post-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -1.72\n", - "\n", - "==========================================================================\n", - "cts post-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -1.72\n", - "\n", - "==========================================================================\n", - "cts post-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.60\n", - "riscv/dp/rf/_5389_/CLK ^\n", - " 1.95 0.00 -0.36\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.23 0.06 0.77 ^ riscv/dp/_1158_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.77 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.42 2.34 library removal time\n", - " 2.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.34 data required time\n", - " -0.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.56 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[2] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1160_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[2] (in)\n", - " instr[2] (net)\n", - " 0.00 0.00 0.38 v input23/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.08 0.08 0.15 0.52 v input23/X (sky130_fd_sc_hd__buf_6)\n", - " net23 (net)\n", - " 0.08 0.02 0.54 v _067_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.11 0.13 0.67 ^ _067_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _016_ (net)\n", - " 0.11 0.00 0.67 ^ _068_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 8 0.04 0.11 0.13 0.79 v _068_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[2] (net)\n", - " 0.11 0.00 0.80 v riscv/_119_/A (sky130_fd_sc_hd__nand3_4)\n", - " 3 0.03 0.11 0.13 0.93 ^ riscv/_119_/Y (sky130_fd_sc_hd__nand3_4)\n", - " riscv/_000_ (net)\n", - " 0.11 0.00 0.93 ^ riscv/_138_/B1 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.06 0.14 0.19 1.11 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.14 0.00 1.12 v riscv/dp/_0556_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.10 0.17 1.29 ^ riscv/dp/_0556_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0216_ (net)\n", - " 0.10 0.00 1.29 ^ riscv/dp/_0558_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.08 1.37 v riscv/dp/_0558_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[30] (net)\n", - " 0.05 0.00 1.37 v riscv/dp/_1160_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.37 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.92 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1160_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.92 clock reconvergence pessimism\n", - " 0.00 1.91 library hold time\n", - " 1.91 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.91 data required time\n", - " -1.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.54 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1141_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.17 0.54 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.08 0.00 0.55 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 32 0.30 0.19 0.16 0.71 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.20 0.01 0.72 ^ riscv/dp/_1141_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.72 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.02 0.08 0.26 14.14 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.08 0.00 14.14 ^ riscv/dp/_1141_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.14 clock reconvergence pessimism\n", - " 0.18 14.32 library recovery time\n", - " 14.32 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.32 data required time\n", - " -0.72 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 13.60 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1161_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5544_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.52 0.52 1.52 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.52 0.00 1.52 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.22 0.00 1.92 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 36 0.31 0.41 0.84 2.76 v riscv/dp/_1161_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net104 (net)\n", - " 0.42 0.03 2.78 v _049_/D (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.04 0.56 0.55 3.33 ^ _049_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _000_ (net)\n", - " 0.56 0.00 3.33 ^ _053_/A (sky130_fd_sc_hd__nand4_4)\n", - " 12 0.13 0.59 0.57 3.91 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.59 0.01 3.91 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.57 4.48 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.48 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.15 4.63 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.63 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.91 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.91 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 5.19 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 5.20 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 11 0.13 0.76 0.68 5.88 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.76 0.00 5.88 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.26 6.15 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.01 6.16 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 6.39 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 6.41 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 6.64 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 6.65 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.89 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 6.90 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 7.14 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 7.16 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.17 0.22 7.38 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 7.40 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.10 0.60 8.00 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.10 0.00 8.00 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 8.27 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 8.27 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.30 8.57 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 8.57 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 8.67 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 8.68 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.90 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.90 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 9.45 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 9.45 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.34 9.79 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 9.79 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.02 0.12 0.15 9.94 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.94 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.38 0.40 10.35 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.38 0.00 10.35 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 10.64 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 10.64 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 10.76 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 10.76 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.19 0.25 11.01 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.19 0.00 11.01 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.08 0.21 11.22 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.08 0.00 11.22 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.18 0.18 11.40 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.18 0.00 11.40 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.09 0.13 11.54 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.09 0.00 11.54 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.26 0.52 12.06 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 12.11 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.11 1.16 1.00 13.11 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 1.16 0.03 13.14 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.18 0.28 13.42 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.20 0.04 13.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.10 13.57 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 13.57 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.37 0.19 13.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.37 0.01 13.76 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.15 13.92 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 13.92 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 5 0.09 0.61 0.51 14.43 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.61 0.00 14.43 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.14 0.25 14.68 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 14.69 ^ riscv/dp/_0638_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.11 0.09 14.78 v riscv/dp/_0638_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0270_ (net)\n", - " 0.11 0.00 14.78 v riscv/dp/_0641_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.13 0.96 0.75 15.53 ^ riscv/dp/_0641_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[10] (net)\n", - " 0.96 0.00 15.53 ^ riscv/dp/rf/_4495_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.07 0.24 15.77 ^ riscv/dp/rf/_4495_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0810_ (net)\n", - " 0.07 0.00 15.77 ^ riscv/dp/rf/_5544_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.77 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.21 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 13.01 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.25 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.25 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.47 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.82 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.82 ^ clkbuf_leaf_34_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.04 0.12 0.28 14.10 ^ clkbuf_leaf_34_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_34_clk (net)\n", - " 0.12 0.00 14.10 ^ riscv/dp/rf/_5544_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.10 clock reconvergence pessimism\n", - " -0.05 14.05 library setup time\n", - " 14.05 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.05 data required time\n", - " -15.77 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -1.72 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.51 -0.01 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.50 -0.01 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.00 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.01274558249861002\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0085\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.0031633765902370214\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0141\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts post-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 1000\n", - "\n", - "==========================================================================\n", - "cts post-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 572\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.7749\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-1.7238\n", - "\n", - "==========================================================================\n", - "cts post-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-10.927486\n", - "\n", - "==========================================================================\n", - "cts post-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.1%\n", - "Combinational 6.68e-04 1.48e-03 2.50e-08 2.15e-03 28.7%\n", - "Clock 3.59e-04 1.60e-03 4.51e-10 1.96e-03 26.2%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.08e-03 3.40e-08 7.48e-03 100.0%\n", - " 58.8% 41.2% 0.0%\n", - "\n", - "==========================================================================\n", - "cts post-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 96718 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 126.8 u\n", - "average displacement 0.0 u\n", - "max displacement 5.2 u\n", - "original HPWL 302482.1 u\n", - "legalized HPWL 306401.0 u\n", - "delta HPWL 1 %\n", - "\n", - "Repair setup and hold violations...\n", - "TNS end percent 100\n", - "[INFO RSZ-0094] Found 1000 endpoints with setup violations.\n", - "[INFO RSZ-0045] Inserted 19 buffers, 1 to split loads.\n", - "[INFO RSZ-0041] Resized 4 instances.\n", - "[INFO RSZ-0043] Swapped pins on 1 instances.\n", - "[INFO RSZ-0049] Cloned 5 instances.\n", - "[INFO RSZ-0046] Found 603 endpoints with hold violations.\n", - "[INFO RSZ-0032] Inserted 52 hold buffers.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 312.4 u\n", - "average displacement 0.0 u\n", - "max displacement 11.1 u\n", - "original HPWL 310970.3 u\n", - "legalized HPWL 311226.4 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "cts final check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -0.00\n", - "\n", - "==========================================================================\n", - "cts final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "cts final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 0.01\n", - "\n", - "==========================================================================\n", - "cts final report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5003_/CLK ^\n", - " 1.95\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.61 0.00 0.34\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1159_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.81 ^ riscv/dp/_1159_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.81 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.20 0.29 0.52 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.75 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.11 0.00 0.75 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.17 0.25 1.00 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.17 0.00 1.00 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.18 0.51 0.51 1.51 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.51 0.00 1.52 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.40 1.91 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.22 0.00 1.91 ^ riscv/dp/_1159_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.91 clock reconvergence pessimism\n", - " 0.44 2.35 library removal time\n", - " 2.35 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.35 data required time\n", - " -2.81 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.45 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem1[6] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5700_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem1[6] (in)\n", - " inter_dmem1[6] (net)\n", - " 0.00 0.00 0.38 ^ input47/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.02 0.12 0.15 0.52 ^ input47/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net47 (net)\n", - " 0.12 0.00 0.52 ^ _138_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.06 0.10 0.62 v _138_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _044_ (net)\n", - " 0.06 0.00 0.62 v _140_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.01 0.13 0.25 0.87 ^ _140_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " dmem_communicate.mem_out[6] (net)\n", - " 0.13 0.00 0.87 ^ riscv/dp/_0611_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.21 1.07 ^ riscv/dp/_0611_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0251_ (net)\n", - " 0.13 0.00 1.08 ^ riscv/dp/_0612_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.08 0.12 1.19 v riscv/dp/_0612_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0252_ (net)\n", - " 0.08 0.00 1.19 v riscv/dp/_0613_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.18 0.56 0.41 1.60 ^ riscv/dp/_0613_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[6] (net)\n", - " 0.57 0.04 1.64 ^ riscv/dp/rf/_4670_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.04 0.21 1.85 ^ riscv/dp/rf/_4670_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0966_ (net)\n", - " 0.04 0.00 1.85 ^ riscv/dp/rf/_5700_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.18 0.26 1.01 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.18 0.00 1.01 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.15 0.44 0.47 1.48 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.44 0.00 1.48 ^ clkbuf_leaf_56_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.07 0.22 0.38 1.86 ^ clkbuf_leaf_56_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_56_clk (net)\n", - " 0.22 0.00 1.86 ^ riscv/dp/rf/_5700_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.86 clock reconvergence pessimism\n", - " -0.01 1.85 library hold time\n", - " 1.85 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.85 data required time\n", - " -1.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.00 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.84 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.84 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 14.21 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 14.21 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.21 clock reconvergence pessimism\n", - " 0.16 14.38 library recovery time\n", - " 14.38 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.38 data required time\n", - " -2.84 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.54 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5004_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 0.98 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 0.98 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 1.39 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 1.39 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 1.71 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 1.71 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.31 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.31 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.96 0.87 3.19 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.96 0.01 3.20 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.35 0.39 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.35 0.00 3.59 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.39 0.49 4.08 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.39 0.00 4.08 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.14 4.23 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.23 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.50 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.51 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 4.79 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 4.80 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.15 0.24 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.15 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.20 5.24 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.25 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.48 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 5.50 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 5.73 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 5.74 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.98 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.99 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.24 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 6.25 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.47 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.49 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.10 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.10 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.37 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.37 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.15 0.30 7.67 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.15 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 7.78 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.00 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 8.56 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 8.56 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 8.91 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 8.91 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.06 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.06 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 9.47 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 9.47 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.76 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.76 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 9.88 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 9.88 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.13 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.13 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.07 0.21 10.34 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 10.34 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.07 0.08 10.43 v riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.07 0.00 10.43 v riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.19 0.18 10.61 ^ riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.19 0.00 10.61 ^ riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.34 0.55 0.55 11.16 ^ riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.56 0.05 11.21 ^ _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.01 0.11 0.11 11.32 v _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.11 0.00 11.32 v rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.06 0.19 11.50 v rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.08 0.03 11.53 v wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.08 0.17 11.70 v wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.11 0.04 11.74 v _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.20 0.22 11.96 ^ _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.20 0.00 11.96 ^ _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.17 0.16 12.12 v _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.17 0.01 12.12 v riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.29 ^ riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.29 ^ riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.15 0.14 12.43 v riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.15 0.00 12.43 v load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.08 0.21 12.64 v load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.08 0.01 12.65 v riscv/dp/_0658_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 3 0.05 0.95 0.75 13.39 ^ riscv/dp/_0658_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0282_ (net)\n", - " 0.95 0.00 13.40 ^ clone21/A1 (sky130_fd_sc_hd__o22ai_2)\n", - " 7 0.03 0.23 0.32 13.72 v clone21/Y (sky130_fd_sc_hd__o22ai_2)\n", - " net474 (net)\n", - " 0.23 0.00 13.72 v riscv/dp/rf/_3849_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.35 14.07 v riscv/dp/rf/_3849_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0270_ (net)\n", - " 0.06 0.00 14.07 v riscv/dp/rf/_5004_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.83 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.83 ^ clkbuf_leaf_37_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 14 0.06 0.19 0.33 14.16 ^ clkbuf_leaf_37_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_37_clk (net)\n", - " 0.19 0.00 14.16 ^ riscv/dp/rf/_5004_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.16 clock reconvergence pessimism\n", - " -0.08 14.08 library setup time\n", - " 14.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.08 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.01 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.90 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.06 0.57 1.47 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.47 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.03 0.15 1.62 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.03 0.00 1.62 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.24 0.73 2.35 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.24 0.00 2.35 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.14 2.50 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.09 0.01 2.51 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.79 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.84 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.84 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 13.89 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 13.89 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 14.21 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 14.21 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.21 clock reconvergence pessimism\n", - " 0.16 14.38 library recovery time\n", - " 14.38 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.38 data required time\n", - " -2.84 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.54 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5004_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.23 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 0.52 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 0.52 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 0.76 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 0.76 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 0.98 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 0.98 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.13 0.38 0.41 1.39 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.38 0.00 1.39 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.15 0.32 1.71 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.15 0.00 1.71 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.31 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.31 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.07 0.96 0.87 3.19 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 0.96 0.01 3.20 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.35 0.39 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.35 0.00 3.59 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.39 0.49 4.08 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.39 0.00 4.08 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.12 0.14 4.23 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.12 0.00 4.23 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.08 0.30 0.28 4.50 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.00 4.51 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.37 0.26 0.28 4.79 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.26 0.01 4.80 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.15 0.24 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.15 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.20 5.24 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.25 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.48 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.19 0.02 5.50 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.23 5.73 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.17 0.02 5.74 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.98 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.00 5.99 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.24 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.01 6.25 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.47 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.49 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.10 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.10 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.37 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.37 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.15 0.30 7.67 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.15 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.05 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.00 7.78 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.00 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.55 8.56 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 8.56 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.28 0.35 8.91 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.28 0.00 8.91 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.06 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.06 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.39 0.41 9.47 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.39 0.00 9.47 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.76 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.76 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.12 0.12 9.88 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.12 0.00 9.88 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.13 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.13 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.07 0.21 10.34 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 10.34 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.07 0.08 10.43 v riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.07 0.00 10.43 v riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.19 0.18 10.61 ^ riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.19 0.00 10.61 ^ riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.34 0.55 0.55 11.16 ^ riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.56 0.05 11.21 ^ _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.01 0.11 0.11 11.32 v _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.11 0.00 11.32 v rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.06 0.19 11.50 v rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.08 0.03 11.53 v wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.14 0.08 0.17 11.70 v wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.11 0.04 11.74 v _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.20 0.22 11.96 ^ _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.20 0.00 11.96 ^ _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.17 0.16 12.12 v _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.17 0.01 12.12 v riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.29 ^ riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.29 ^ riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.15 0.14 12.43 v riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.15 0.00 12.43 v load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.12 0.08 0.21 12.64 v load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.08 0.01 12.65 v riscv/dp/_0658_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 3 0.05 0.95 0.75 13.39 ^ riscv/dp/_0658_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0282_ (net)\n", - " 0.95 0.00 13.40 ^ clone21/A1 (sky130_fd_sc_hd__o22ai_2)\n", - " 7 0.03 0.23 0.32 13.72 v clone21/Y (sky130_fd_sc_hd__o22ai_2)\n", - " net474 (net)\n", - " 0.23 0.00 13.72 v riscv/dp/rf/_3849_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.35 14.07 v riscv/dp/rf/_3849_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0270_ (net)\n", - " 0.06 0.00 14.07 v riscv/dp/rf/_5004_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.07 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.23 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.03 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.07 0.20 0.29 13.02 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.20 0.00 13.02 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.03 0.11 0.23 13.26 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.11 0.00 13.26 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.14 0.23 13.48 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.14 0.00 13.48 ^ clkbuf_3_6__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 7 0.10 0.29 0.35 13.83 ^ clkbuf_3_6__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_6__leaf_clk (net)\n", - " 0.29 0.00 13.83 ^ clkbuf_leaf_37_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 14 0.06 0.19 0.33 14.16 ^ clkbuf_leaf_37_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_37_clk (net)\n", - " 0.19 0.00 14.16 ^ riscv/dp/rf/_5004_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.16 clock reconvergence pessimism\n", - " -0.08 14.08 library setup time\n", - " 14.08 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.08 data required time\n", - " -14.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.01 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.53 -0.03 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.52 -0.03 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.23 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.03251943364739418\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0217\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.006477809976786375\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0289\n", - "\n", - "==========================================================================\n", - "cts final max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 32\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "cts final setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "cts final hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts final critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0654\n", - "\n", - "==========================================================================\n", - "cts final critical path slack\n", - "--------------------------------------------------------------------------\n", - "0.0111\n", - "\n", - "==========================================================================\n", - "cts final slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "0.078917\n", - "\n", - "==========================================================================\n", - "cts final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.37e-03 0.00e+00 8.53e-09 3.37e-03 45.4%\n", - "Combinational 6.68e-04 1.44e-03 2.56e-08 2.11e-03 28.4%\n", - "Clock 3.59e-04 1.59e-03 4.51e-10 1.95e-03 26.3%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.40e-03 3.03e-03 3.46e-08 7.43e-03 100.0%\n", - " 59.2% 40.8% 0.0%\n", - "\n", - "==========================================================================\n", - "cts final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 97589 u^2 9% utilization.\n", - "\n", - "Elapsed time: 0:35.97[h:]min:sec. CPU time: user 35.72 sys 0.13 (99%). Peak memory: 182460KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/4_1_cts.odb ./results/130_180/riscv32i_3d/80MHz/4_cts.odb\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_route.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_1_grt.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GRT-0020] Min routing layer: met1\n", - "[INFO GRT-0021] Max routing layer: Metal4\n", - "[INFO GRT-0022] Global adjustment: 0%\n", - "[INFO GRT-0023] Grid origin: (0, 0)\n", - "[INFO GRT-0043] No OR_DEFAULT vias defined.\n", - "[INFO GRT-0088] Layer li1 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3400\n", - "[INFO GRT-0088] Layer met1 Track-Pitch = 0.3400 line-2-Via Pitch: 0.3400\n", - "[INFO GRT-0088] Layer met2 Track-Pitch = 0.4600 line-2-Via Pitch: 0.3500\n", - "[INFO GRT-0088] Layer met3 Track-Pitch = 0.6800 line-2-Via Pitch: 0.6150\n", - "[INFO GRT-0088] Layer met4 Track-Pitch = 0.9200 line-2-Via Pitch: 1.0400\n", - "[INFO GRT-0088] Layer met5 Track-Pitch = 3.4000 line-2-Via Pitch: 3.1100\n", - "[INFO GRT-0088] Layer Metal4 Track-Pitch = 0.9000 line-2-Via Pitch: 1.4100\n", - "[INFO GRT-0019] Found 99 clock nets.\n", - "[WARNING GRT-0036] Pin instr[0] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[10] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[11] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[12] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[13] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[14] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[15] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[16] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[17] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[18] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[19] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[1] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[20] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[21] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[22] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[23] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[24] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[25] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[26] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[27] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[28] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[29] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[2] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[30] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[31] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[3] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[4] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[5] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[6] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[7] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[8] is outside die area.\n", - "[WARNING GRT-0036] Pin instr[9] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[24] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[25] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[26] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[27] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[28] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[29] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[30] is outside die area.\n", - "[WARNING GRT-0036] Pin pc[31] is outside die area.\n", - "[WARNING GRT-0036] Pin ready is outside die area.\n", - "[WARNING GRT-0036] Pin suspend is outside die area.\n", - "[WARNING GRT-0036] Pin valid is outside die area.\n", - "[WARNING GRT-0036] Pin valid_reg is outside die area.\n", - "[INFO GRT-0001] Minimum degree: 2\n", - "[INFO GRT-0002] Maximum degree: 94\n", - "[INFO GRT-0003] Macros: 0\n", - "[INFO GRT-0004] Blockages: 27881\n", - "\n", - "[INFO GRT-0053] Routing resources analysis:\n", - " Routing Original Derated Resource\n", - "Layer Direction Resources Resources Reduction (%)\n", - "---------------------------------------------------------------\n", - "li1 Vertical 0 0 0.00%\n", - "met1 Horizontal 502107 337932 32.70%\n", - "met2 Vertical 375117 298298 20.48%\n", - "met3 Horizontal 250967 199348 20.57%\n", - "met4 Vertical 150450 99957 33.56%\n", - "met5 Horizontal 50055 24888 50.28%\n", - "Metal4 Vertical 100972 53182 47.33%\n", - "---------------------------------------------------------------\n", - "\n", - "[INFO GRT-0197] Via related to pin nodes: 28655\n", - "[INFO GRT-0198] Via related Steiner nodes: 1716\n", - "[INFO GRT-0199] Via filling finished.\n", - "[INFO GRT-0111] Final number of vias: 33688\n", - "[INFO GRT-0112] Final usage 3D: 159953\n", - "\n", - "[INFO GRT-0096] Final congestion report:\n", - "Layer Resource Demand Usage (%) Max H / Max V / Total Overflow\n", - "---------------------------------------------------------------------------------------\n", - "li1 0 0 0.00% 0 / 0 / 0\n", - "met1 337932 27802 8.23% 0 / 0 / 0\n", - "met2 298298 27064 9.07% 0 / 0 / 0\n", - "met3 199348 3045 1.53% 0 / 0 / 0\n", - "met4 99957 950 0.95% 0 / 0 / 0\n", - "met5 24888 12 0.05% 0 / 0 / 0\n", - "Metal4 53182 16 0.03% 0 / 0 / 0\n", - "---------------------------------------------------------------------------------------\n", - "Total 1013605 58889 5.81% 0 / 0 / 0\n", - "\n", - "[INFO GRT-0018] Total wirelength: 532514 um\n", - "[INFO GRT-0014] Routed nets: 5868\n", - "\n", - "==========================================================================\n", - "global route pre repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -212.74\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.90\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.90\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.85 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.57 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem0[5] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5571_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem0[5] (in)\n", - " inter_dmem0[5] (net)\n", - " 0.00 0.00 0.38 ^ input38/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.01 0.07 0.09 0.46 ^ input38/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net38 (net)\n", - " 0.07 0.00 0.46 ^ _136_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.07 0.10 0.56 v _136_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _043_ (net)\n", - " 0.07 0.00 0.56 v _137_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 1 0.03 0.12 0.12 0.68 ^ _137_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[5] (net)\n", - " 0.12 0.00 0.68 ^ riscv/dp/_0606_/A_N (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.14 0.18 0.86 ^ riscv/dp/_0606_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0248_ (net)\n", - " 0.14 0.00 0.87 ^ riscv/dp/_0607_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.04 0.13 0.16 1.02 v riscv/dp/_0607_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0249_ (net)\n", - " 0.13 0.00 1.03 v riscv/dp/_0608_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.24 0.74 0.52 1.54 ^ riscv/dp/_0608_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[5] (net)\n", - " 0.77 0.11 1.65 ^ riscv/dp/rf/_4525_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.24 1.90 ^ riscv/dp/rf/_4525_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0837_ (net)\n", - " 0.05 0.00 1.90 ^ riscv/dp/rf/_5571_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.90 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 0.95 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 0.95 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 1.37 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 1.37 ^ clkbuf_leaf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 19 0.08 0.25 0.39 1.76 ^ clkbuf_leaf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_0_clk (net)\n", - " 0.25 0.00 1.77 ^ riscv/dp/rf/_5571_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.77 clock reconvergence pessimism\n", - " 0.00 1.76 library hold time\n", - " 1.76 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.76 data required time\n", - " -1.90 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.14 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.88 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.88 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.88 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.40 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.37 0.41 3.65 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.37 0.00 3.65 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.52 4.18 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.18 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.33 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.33 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.32 0.29 4.62 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.32 0.01 4.63 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.38 0.27 0.29 4.91 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.01 4.93 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.16 0.25 5.18 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.16 0.00 5.18 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.21 5.39 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.41 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.64 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.66 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.88 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.91 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.14 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.15 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.40 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.02 6.41 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.64 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.66 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.27 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.27 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.55 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.55 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.31 7.85 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.85 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.95 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.96 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.18 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.19 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.75 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.75 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.11 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.11 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.26 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.26 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.68 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.68 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.97 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.97 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.13 0.13 10.10 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.13 0.00 10.10 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.35 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.35 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.58 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.58 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.78 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.78 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.93 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.93 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.45 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.50 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.25 0.34 11.84 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.25 0.00 11.84 ^ rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.13 0.21 12.05 ^ rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.14 0.03 12.08 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.16 0.19 0.23 12.31 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.32 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.43 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.43 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.62 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.63 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.80 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.80 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.38 0.35 13.15 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.38 0.00 13.15 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.13 0.15 0.23 13.38 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 13.39 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.12 0.10 13.49 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.12 0.00 13.49 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.39 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.42 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.08 0.27 14.69 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.08 0.00 14.69 ^ hold49/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.07 0.56 15.24 ^ hold49/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net502 (net)\n", - " 0.07 0.00 15.24 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.24 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.24 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.90 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.54 0.92 v hold33/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net486 (net)\n", - " 0.06 0.00 0.92 v hold30/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.07 0.57 1.49 v hold30/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net483 (net)\n", - " 0.07 0.00 1.49 v input65/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.01 0.04 0.15 1.64 v input65/X (sky130_fd_sc_hd__buf_4)\n", - " net65 (net)\n", - " 0.04 0.00 1.64 v hold31/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.05 0.25 0.74 2.38 v hold31/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net484 (net)\n", - " 0.25 0.00 2.38 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.09 0.15 2.53 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.10 0.01 2.54 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.28 2.82 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.88 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.88 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.88 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.40 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.37 0.41 3.65 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.37 0.00 3.65 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.52 4.18 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.18 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.33 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.33 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.32 0.29 4.62 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.32 0.01 4.63 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.38 0.27 0.29 4.91 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.01 4.93 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_4)\n", - " 2 0.02 0.16 0.25 5.18 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_4)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.16 0.00 5.18 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.21 5.39 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.41 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.64 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.66 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.88 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.91 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.14 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.15 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.17 0.20 0.25 6.40 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.20 0.02 6.41 ^ load_slew230/A (sky130_fd_sc_hd__buf_12)\n", - " 13 0.14 0.16 0.22 6.64 ^ load_slew230/X (sky130_fd_sc_hd__buf_12)\n", - " net230 (net)\n", - " 0.17 0.02 6.66 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.11 0.61 7.27 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.11 0.00 7.27 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.24 0.27 7.55 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.24 0.00 7.55 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.31 7.85 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.85 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.95 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.96 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.18 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.19 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.75 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.75 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.11 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.11 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.26 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.26 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.68 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.68 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.02 0.14 0.29 9.97 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.14 0.00 9.97 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.13 0.13 10.10 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.13 0.00 10.10 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.25 10.35 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.35 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.58 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.58 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.78 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.78 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.93 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.93 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.45 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.50 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.25 0.34 11.84 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.25 0.00 11.84 ^ rebuffer1/A (sky130_fd_sc_hd__buf_12)\n", - " 1 0.11 0.13 0.21 12.05 ^ rebuffer1/X (sky130_fd_sc_hd__buf_12)\n", - " net454 (net)\n", - " 0.14 0.03 12.08 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.16 0.19 0.23 12.31 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.32 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.43 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.43 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.62 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.63 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.80 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.80 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.38 0.35 13.15 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.38 0.00 13.15 ^ load_slew129/A (sky130_fd_sc_hd__buf_16)\n", - " 11 0.13 0.15 0.23 13.38 ^ load_slew129/X (sky130_fd_sc_hd__buf_16)\n", - " net129 (net)\n", - " 0.15 0.01 13.39 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_1)\n", - " 1 0.01 0.12 0.10 13.49 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_1)\n", - " riscv/dp/_0279_ (net)\n", - " 0.12 0.00 13.49 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.39 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.42 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.08 0.27 14.69 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.08 0.00 14.69 ^ hold49/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.07 0.56 15.24 ^ hold49/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net502 (net)\n", - " 0.07 0.00 15.24 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.24 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.24 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.90 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/rf/_4669_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4705_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3489_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4633_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4597_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4453_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3839_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4561_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3621_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3553_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3728_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4054_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4235_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3956_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4525_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4309_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4199_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4018_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3913_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4381_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4273_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3765_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3665_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4090_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3876_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4345_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4417_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4126_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4489_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3802_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4162_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4630_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3483_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4666_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4702_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4232_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4306_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4594_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3836_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4450_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3618_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4558_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3550_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3725_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4522_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4196_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3950_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4087_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4051_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4015_/A1 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4414_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4270_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4378_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_4342_/A0 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/rf/_3910_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3659_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3762_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3873_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_3799_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4159_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4123_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/rf/_4486_/A1 1.50 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/_0608_/Y 1.49 1.56 -0.06 (VIOLATED)\n", - "riscv/dp/_0593_/Y 1.49 1.56 -0.06 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/dp/_0608_/Y 0.22 0.24 -0.01 (VIOLATED)\n", - "riscv/dp/_0593_/Y 0.22 0.24 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.07038803398609161\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0469\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.011564317159354687\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0516\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 64\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 2\n", - "\n", - "==========================================================================\n", - "global route pre repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 842\n", - "\n", - "==========================================================================\n", - "global route pre repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.2444\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.9028\n", - "\n", - "==========================================================================\n", - "global route pre repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-5.922175\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 44.0%\n", - "Combinational 6.95e-04 1.58e-03 2.54e-08 2.27e-03 29.6%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.4%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.43e-03 3.25e-03 3.44e-08 7.68e-03 100.0%\n", - " 57.7% 42.3% 0.0%\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 97589 u^2 9% utilization.\n", - "\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 2141um.\n", - "[INFO RSZ-0034] Found 2 slew violations.\n", - "[INFO RSZ-0036] Found 2 capacitance violations.\n", - "[INFO RSZ-0038] Inserted 2 buffers in 2 nets.\n", - "[INFO RSZ-0039] Resized 327 instances.\n", - "\n", - "==========================================================================\n", - "global route post repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -259.58\n", - "\n", - "==========================================================================\n", - "global route post repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.74\n", - "\n", - "==========================================================================\n", - "global route post repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.74\n", - "\n", - "==========================================================================\n", - "global route post repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 1.59 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.59 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -1.59 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.69 slack (VIOLATED)\n", - "\n", - "\n", - "Startpoint: instr[14] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1159_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[14] (in)\n", - " instr[14] (net)\n", - " 0.01 0.00 0.38 v input6/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.07 0.07 0.14 0.52 v input6/X (sky130_fd_sc_hd__buf_6)\n", - " net6 (net)\n", - " 0.08 0.01 0.53 v _087_/B (sky130_fd_sc_hd__and2_4)\n", - " 15 0.08 0.11 0.25 0.78 v _087_/X (sky130_fd_sc_hd__and2_4)\n", - " pcmux.y[14] (net)\n", - " 0.11 0.01 0.79 v riscv/_131_/A (sky130_fd_sc_hd__nor2_1)\n", - " 1 0.01 0.21 0.22 1.01 ^ riscv/_131_/Y (sky130_fd_sc_hd__nor2_1)\n", - " riscv/_003_ (net)\n", - " 0.21 0.00 1.01 ^ riscv/_138_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 4 0.04 0.10 0.17 1.18 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.10 0.00 1.18 v hold36/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.04 0.09 0.21 1.39 v hold36/X (sky130_fd_sc_hd__clkbuf_4)\n", - " net489 (net)\n", - " 0.09 0.00 1.40 v riscv/dp/_0553_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.12 0.16 1.56 ^ riscv/dp/_0553_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0214_ (net)\n", - " 0.12 0.00 1.56 ^ riscv/dp/_0555_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.09 1.65 v riscv/dp/_0555_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[29] (net)\n", - " 0.05 0.00 1.65 v riscv/dp/_1159_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.65 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.08 0.24 0.40 1.82 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.24 0.00 1.82 ^ riscv/dp/_1159_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.65 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.17 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 1.62 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -1.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.66 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.38 0.42 3.66 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.38 0.00 3.66 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.53 4.19 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.19 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.34 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.34 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.33 0.30 4.64 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.33 0.01 4.65 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.39 0.28 0.29 4.94 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.02 4.95 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.32 5.27 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.27 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.50 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.51 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.74 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.77 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.99 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 6.01 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.25 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.26 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.51 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.53 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.74 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.77 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.39 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.39 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.64 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.64 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.92 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.92 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 8.02 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 8.03 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.25 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.26 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.82 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.82 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.18 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.18 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.33 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.33 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.75 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.75 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 10.05 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 10.05 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 10.15 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 10.15 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.38 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.38 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.61 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.61 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.81 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.81 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.96 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.96 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.48 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.53 v _112_/B (sky130_fd_sc_hd__nor3b_2)\n", - " 2 0.02 0.39 0.43 11.97 ^ _112_/Y (sky130_fd_sc_hd__nor3b_2)\n", - " net68 (net)\n", - " 0.39 0.00 11.97 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.13 0.22 12.18 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 12.21 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.45 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.56 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.56 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.77 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.94 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.94 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 13.28 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 13.28 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.53 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.18 0.01 13.54 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_2)\n", - " 1 0.01 0.09 0.08 13.62 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0279_ (net)\n", - " 0.09 0.00 13.62 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.51 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.54 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.09 0.27 14.81 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.09 0.00 14.81 ^ hold49/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.06 0.27 15.08 ^ hold49/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net502 (net)\n", - " 0.06 0.00 15.08 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.74 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.05 0.23 0.61 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.05 0.00 0.61 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.26 0.87 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 0.87 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 1.01 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 1.01 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 1.19 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 1.20 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 1.28 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 1.29 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 1.56 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 1.62 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -1.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 12.66 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1147_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5387_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1147_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 4 0.06 0.13 0.60 2.22 v riscv/dp/_1147_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net88 (net)\n", - " 0.13 0.00 2.22 v _051_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.14 1.02 3.23 ^ _051_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _002_ (net)\n", - " 1.14 0.01 3.24 ^ _053_/C (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.06 0.38 0.42 3.66 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.38 0.00 3.66 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.43 0.53 4.19 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.43 0.00 4.19 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.34 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.34 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 8 0.09 0.33 0.30 4.64 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.33 0.01 4.65 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 48 0.39 0.28 0.29 4.94 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.28 0.02 4.95 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.32 5.27 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.27 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.50 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.51 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.74 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.77 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.99 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 6.01 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.25 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.26 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.51 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.53 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.74 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.77 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.39 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.39 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.64 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.64 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.92 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.92 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 8.02 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 8.03 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.25 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.26 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.82 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.82 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 9.18 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 9.18 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.33 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.33 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.75 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.75 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 10.05 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 10.05 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 10.15 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 10.15 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.38 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.38 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.61 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.61 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.20 0.21 10.81 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.20 0.00 10.81 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_2)\n", - " 1 0.01 0.10 0.14 10.96 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_2)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 10.96 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 22 0.33 0.27 0.52 11.48 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.28 0.05 11.53 v _112_/B (sky130_fd_sc_hd__nor3b_2)\n", - " 2 0.02 0.39 0.43 11.97 ^ _112_/Y (sky130_fd_sc_hd__nor3b_2)\n", - " net68 (net)\n", - " 0.39 0.00 11.97 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.13 0.22 12.18 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 12.21 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.45 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.46 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.15 0.11 12.56 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.15 0.00 12.56 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.39 0.20 12.76 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.39 0.01 12.77 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.12 0.17 12.94 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.12 0.00 12.94 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 13.28 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 13.28 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.53 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.18 0.01 13.54 ^ riscv/dp/_0653_/B1 (sky130_fd_sc_hd__a21oi_2)\n", - " 1 0.01 0.09 0.08 13.62 v riscv/dp/_0653_/Y (sky130_fd_sc_hd__a21oi_2)\n", - " riscv/dp/_0279_ (net)\n", - " 0.09 0.00 13.62 v riscv/dp/_0656_/A1 (sky130_fd_sc_hd__o22ai_4)\n", - " 31 0.17 1.19 0.89 14.51 ^ riscv/dp/_0656_/Y (sky130_fd_sc_hd__o22ai_4)\n", - " riscv/dp/storepcmux.y[13] (net)\n", - " 1.19 0.03 14.54 ^ riscv/dp/rf/_4318_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.09 0.27 14.81 ^ riscv/dp/rf/_4318_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0653_ (net)\n", - " 0.09 0.00 14.81 ^ hold49/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.06 0.27 15.08 ^ hold49/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net502 (net)\n", - " 0.06 0.00 15.08 ^ riscv/dp/rf/_5387_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 15.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 13.92 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 13.92 ^ clkbuf_leaf_28_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.30 0.44 14.36 ^ clkbuf_leaf_28_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_28_clk (net)\n", - " 0.30 0.00 14.36 ^ riscv/dp/rf/_5387_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.36 clock reconvergence pessimism\n", - " -0.02 14.34 library setup time\n", - " 14.34 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.34 data required time\n", - " -15.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.74 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.1321367472410202\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0881\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.019596710801124573\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.22431400418281555\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.0874\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 781\n", - "\n", - "==========================================================================\n", - "global route post repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 82\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "15.0806\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.7371\n", - "\n", - "==========================================================================\n", - "global route post repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-4.887737\n", - "\n", - "==========================================================================\n", - "global route post repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 43.9%\n", - "Combinational 7.11e-04 1.57e-03 2.52e-08 2.28e-03 29.7%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.4%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.24e-03 3.42e-08 7.69e-03 100.0%\n", - " 57.8% 42.2% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98039 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 256.2 u\n", - "average displacement 0.0 u\n", - "max displacement 9.1 u\n", - "original HPWL 311353.5 u\n", - "legalized HPWL 311594.3 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "[INFO RSZ-0094] Found 776 endpoints with setup violations.\n", - "[INFO RSZ-0040] Inserted 3 buffers.\n", - "[INFO RSZ-0041] Resized 12 instances.\n", - "[INFO RSZ-0043] Swapped pins on 1 instances.\n", - "[INFO RSZ-0049] Cloned 23 instances.\n", - "[INFO RSZ-0046] Found 86 endpoints with hold violations.\n", - "[INFO RSZ-0032] Inserted 17 hold buffers.\n", - "\n", - "==========================================================================\n", - "global route post repair timing check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_tns\n", - "--------------------------------------------------------------------------\n", - "tns 0.00\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 0.06\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.69 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.69 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.41 slack (MET)\n", - "\n", - "\n", - "Startpoint: instr[1] (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1158_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v instr[1] (in)\n", - " instr[1] (net)\n", - " 0.01 0.00 0.38 v input12/A (sky130_fd_sc_hd__buf_6)\n", - " 1 0.07 0.07 0.14 0.52 v input12/X (sky130_fd_sc_hd__buf_6)\n", - " net12 (net)\n", - " 0.08 0.01 0.53 v _065_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.00 0.06 0.08 0.61 ^ _065_/Y (sky130_fd_sc_hd__nand2_1)\n", - " _015_ (net)\n", - " 0.06 0.00 0.61 ^ _066_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 2 0.01 0.06 0.08 0.69 v _066_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " pcmux.y[1] (net)\n", - " 0.06 0.00 0.69 v riscv/_069_/C (sky130_fd_sc_hd__and4bb_2)\n", - " 4 0.02 0.09 0.28 0.98 v riscv/_069_/X (sky130_fd_sc_hd__and4bb_2)\n", - " riscv/_020_ (net)\n", - " 0.09 0.00 0.98 v riscv/_089_/A (sky130_fd_sc_hd__nand2_2)\n", - " 4 0.03 0.15 0.15 1.13 ^ riscv/_089_/Y (sky130_fd_sc_hd__nand2_2)\n", - " riscv/_039_ (net)\n", - " 0.15 0.00 1.13 ^ riscv/_138_/A1 (sky130_fd_sc_hd__o31ai_4)\n", - " 4 0.04 0.06 0.12 1.25 v riscv/_138_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " riscv/c.pcsrc (net)\n", - " 0.06 0.00 1.25 v hold36/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 3 0.03 0.07 0.18 1.43 v hold36/X (sky130_fd_sc_hd__clkbuf_4)\n", - " net489 (net)\n", - " 0.07 0.00 1.43 v load_slew137/A (sky130_fd_sc_hd__buf_8)\n", - " 11 0.11 0.08 0.18 1.61 v load_slew137/X (sky130_fd_sc_hd__buf_8)\n", - " net137 (net)\n", - " 0.08 0.00 1.62 v riscv/dp/_0550_/S (sky130_fd_sc_hd__mux2i_1)\n", - " 1 0.00 0.11 0.15 1.77 ^ riscv/dp/_0550_/Y (sky130_fd_sc_hd__mux2i_1)\n", - " riscv/dp/_0212_ (net)\n", - " 0.11 0.00 1.77 ^ riscv/dp/_0552_/A2 (sky130_fd_sc_hd__o21ai_0)\n", - " 1 0.00 0.05 0.09 1.85 v riscv/dp/_0552_/Y (sky130_fd_sc_hd__o21ai_0)\n", - " riscv/dp/ISRmux.y[28] (net)\n", - " 0.05 0.00 1.85 v riscv/dp/_1158_/D (sky130_fd_sc_hd__dfrtp_4)\n", - " 1.85 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_11_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 17 0.08 0.24 0.40 1.82 ^ clkbuf_leaf_11_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_11_clk (net)\n", - " 0.24 0.00 1.82 ^ riscv/dp/_1158_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.85 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.03 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.71 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.71 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.56 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5152_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.50 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.10 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.30 0.28 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.01 4.54 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.11 0.12 0.16 4.70 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.12 0.00 4.70 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.26 4.97 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 4.97 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.19 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.21 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.44 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.46 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.69 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.71 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.95 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.95 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.20 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.22 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.44 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.46 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.09 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.09 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.33 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.33 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.62 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.62 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.72 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.72 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.95 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.95 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.51 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.51 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.87 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.87 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.03 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.03 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.44 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.44 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.74 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.74 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.84 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.84 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.08 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.08 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.30 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.30 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.57 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.57 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.16 10.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.73 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.08 0.35 0.51 11.24 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.36 0.02 11.26 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.20 0.27 0.63 11.88 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.27 0.01 11.89 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.17 0.26 12.15 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.17 0.00 12.15 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.12 0.11 12.26 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.12 0.00 12.26 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.08 0.61 12.87 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.08 0.00 12.87 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.25 13.12 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.13 0.00 13.13 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.25 0.15 13.27 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.25 0.00 13.28 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.19 0.16 13.44 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.19 0.00 13.44 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.26 0.13 0.27 13.71 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.14 0.03 13.74 v riscv/dp/rf/_4051_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.33 14.07 v riscv/dp/rf/_4051_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0418_ (net)\n", - " 0.06 0.00 14.08 v riscv/dp/rf/_5152_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 13.45 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 13.45 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 13.87 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 13.87 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.06 0.19 0.34 14.22 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.19 0.00 14.22 ^ riscv/dp/rf/_5152_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.22 clock reconvergence pessimism\n", - " -0.08 14.13 library setup time\n", - " 14.13 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.13 data required time\n", - " -14.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.06 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.70 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.70 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.97 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.97 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.10 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.10 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.29 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.30 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.38 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.39 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.66 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.71 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.71 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.56 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5152_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.59 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.50 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.10 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.30 0.28 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.30 0.01 4.54 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.11 0.12 0.16 4.70 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.12 0.00 4.70 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.26 4.97 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 4.97 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.19 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.21 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.44 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.46 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.69 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.71 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 5.95 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 5.95 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.20 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.22 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.44 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.46 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.09 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.09 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.33 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.33 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.62 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.62 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.72 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.72 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 7.95 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 7.95 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.51 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.51 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.87 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.87 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.03 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.03 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.44 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.44 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.74 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.74 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.84 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.84 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.08 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.08 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.30 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.30 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.57 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.57 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.16 10.73 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.73 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.08 0.35 0.51 11.24 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.36 0.02 11.26 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.20 0.27 0.63 11.88 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.27 0.01 11.89 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.17 0.26 12.15 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.17 0.00 12.15 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.12 0.11 12.26 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.12 0.00 12.26 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.01 0.08 0.61 12.87 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.08 0.00 12.87 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.02 0.13 0.25 13.12 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.13 0.00 13.13 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.02 0.25 0.15 13.27 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.25 0.00 13.28 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.19 0.16 13.44 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.19 0.00 13.44 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.26 0.13 0.27 13.71 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.14 0.03 13.74 v riscv/dp/rf/_4051_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.06 0.33 14.07 v riscv/dp/rf/_4051_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0418_ (net)\n", - " 0.06 0.00 14.08 v riscv/dp/rf/_5152_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.08 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 13.45 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 13.45 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.13 0.38 0.42 13.87 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.38 0.00 13.87 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.06 0.19 0.34 14.22 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.19 0.00 14.22 ^ riscv/dp/rf/_5152_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.22 clock reconvergence pessimism\n", - " -0.08 14.13 library setup time\n", - " 14.13 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.13 data required time\n", - " -14.08 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.06 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 1.50 1.57 -0.08 (VIOLATED)\n", - "clone37/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0699_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0667_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0737_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0731_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0684_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0743_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0749_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0755_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0761_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0767_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "riscv/dp/_0773_/S 1.50 1.57 -0.07 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 0.15 0.17 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.07971657067537308\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.4951449632644653\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0533\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.011798640713095665\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.1538189947605133\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0767\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 13\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "global route post repair timing setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.0751\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path slack\n", - "--------------------------------------------------------------------------\n", - "0.0591\n", - "\n", - "==========================================================================\n", - "global route post repair timing slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "0.419890\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 44.2%\n", - "Combinational 7.12e-04 1.52e-03 2.54e-08 2.24e-03 29.3%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.6%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.19e-03 3.44e-08 7.64e-03 100.0%\n", - " 58.2% 41.8% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98565 u^2 9% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 164.1 u\n", - "average displacement 0.0 u\n", - "max displacement 6.9 u\n", - "original HPWL 325296.1 u\n", - "legalized HPWL 325400.1 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "check_antennas\n", - "--------------------------------------------------------------------------\n", - "[INFO GRT-0012] Found 61 antenna violations.\n", - "[INFO GRT-0015] Inserted 82 diodes.\n", - "[INFO GRT-0012] Found 8 antenna violations.\n", - "[INFO GRT-0015] Inserted 8 diodes.\n", - "[INFO GRT-0012] Found 1 antenna violations.\n", - "[INFO GRT-0015] Inserted 1 diodes.\n", - "[INFO GRT-0012] Found 1 antenna violations.\n", - "[INFO GRT-0015] Inserted 1 diodes.\n", - "[INFO GRT-0012] Found 0 antenna violations.\n", - "[WARNING ANT-0011] -report_violating_nets is deprecated.\n", - "[INFO ANT-0002] Found 0 net violations.\n", - "[INFO ANT-0001] Found 0 pin violations.\n", - "\n", - "==========================================================================\n", - "global route check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -50.57\n", - "\n", - "==========================================================================\n", - "global route report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -0.34\n", - "\n", - "==========================================================================\n", - "global route report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -0.34\n", - "\n", - "==========================================================================\n", - "global route report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/rf/_5117_/CLK ^\n", - " 1.87\n", - "riscv/dp/rf/_5256_/CLK ^\n", - " 1.52 0.00 0.35\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1161_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.31 0.02 2.70 ^ riscv/dp/_1161_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 0.71 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 0.94 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 0.94 ^ clkbuf_3_3__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.16 0.47 0.48 1.42 ^ clkbuf_3_3__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_3__leaf_clk (net)\n", - " 0.47 0.00 1.42 ^ clkbuf_leaf_12_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 18 0.08 0.25 0.40 1.82 ^ clkbuf_leaf_12_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_12_clk (net)\n", - " 0.25 0.00 1.83 ^ riscv/dp/_1161_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 1.83 clock reconvergence pessimism\n", - " 0.45 2.27 library removal time\n", - " 2.27 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.27 data required time\n", - " -2.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.43 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem3[3] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5313_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem3[3] (in)\n", - " inter_dmem3[3] (net)\n", - " 0.00 0.00 0.38 ^ input60/A (sky130_fd_sc_hd__clkbuf_1)\n", - " 1 0.01 0.08 0.09 0.46 ^ input60/X (sky130_fd_sc_hd__clkbuf_1)\n", - " net60 (net)\n", - " 0.08 0.00 0.46 ^ _129_/B1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.01 0.07 0.08 0.54 v _129_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _038_ (net)\n", - " 0.07 0.00 0.54 v _131_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 1 0.01 0.09 0.19 0.73 ^ _131_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " dmem_communicate.mem_out[3] (net)\n", - " 0.09 0.00 0.73 ^ riscv/dp/_0596_/A_N (sky130_fd_sc_hd__nand2b_4)\n", - " 1 0.04 0.13 0.20 0.93 ^ riscv/dp/_0596_/Y (sky130_fd_sc_hd__nand2b_4)\n", - " riscv/dp/_0242_ (net)\n", - " 0.13 0.00 0.94 ^ riscv/dp/_0597_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.04 0.13 0.15 1.09 v riscv/dp/_0597_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0243_ (net)\n", - " 0.13 0.00 1.09 v riscv/dp/_0598_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.20 0.65 0.47 1.56 ^ riscv/dp/_0598_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[3] (net)\n", - " 0.66 0.07 1.63 ^ riscv/dp/rf/_4233_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.04 0.23 1.86 ^ riscv/dp/rf/_4233_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0579_ (net)\n", - " 0.04 0.00 1.86 ^ riscv/dp/rf/_5313_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.86 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 0.50 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 0.50 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 0.71 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.24 0.95 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.16 0.00 0.95 ^ clkbuf_3_1__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.14 0.41 0.44 1.39 ^ clkbuf_3_1__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_1__leaf_clk (net)\n", - " 0.41 0.00 1.39 ^ clkbuf_leaf_69_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.10 0.29 0.42 1.82 ^ clkbuf_leaf_69_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_69_clk (net)\n", - " 0.29 0.00 1.82 ^ riscv/dp/rf/_5313_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 1.82 clock reconvergence pessimism\n", - " 0.00 1.82 library hold time\n", - " 1.82 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.82 data required time\n", - " -1.86 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.04 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.73 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.73 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.55 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4846_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.60 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.51 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.11 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.31 0.29 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.31 0.01 4.55 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.18 0.15 0.20 4.75 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.15 0.01 4.75 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.27 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.25 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.27 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.50 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.52 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.75 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.77 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.01 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.01 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.26 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.28 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.50 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.52 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.15 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.15 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.39 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.39 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.68 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.79 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.01 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.57 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.57 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.93 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.93 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.50 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.51 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.80 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.81 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.14 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.14 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.63 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.63 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.17 10.80 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.80 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 11 0.30 0.25 0.53 11.33 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.25 0.02 11.35 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.29 0.36 11.70 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.29 0.00 11.71 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.12 0.21 11.91 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 11.94 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.17 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.19 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.14 0.11 12.29 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.14 0.00 12.29 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.38 0.19 12.48 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.38 0.01 12.49 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.65 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.65 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 12.98 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 12.99 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.24 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.19 0.02 13.26 ^ load_slew128/A (sky130_fd_sc_hd__buf_16)\n", - " 10 0.14 0.16 0.21 13.47 ^ load_slew128/X (sky130_fd_sc_hd__buf_16)\n", - " net128 (net)\n", - " 0.16 0.02 13.49 ^ riscv/dp/_0682_/B2 (sky130_fd_sc_hd__o221ai_4)\n", - " 3 0.09 0.42 0.31 13.80 v riscv/dp/_0682_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/_0302_ (net)\n", - " 0.42 0.00 13.80 v riscv/dp/_0683_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 16 0.12 0.82 0.45 14.25 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 0.83 0.03 14.28 ^ riscv/dp/rf/_3633_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.08 0.26 14.54 ^ riscv/dp/rf/_3633_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0112_ (net)\n", - " 0.08 0.00 14.54 ^ riscv/dp/rf/_4846_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.54 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_2__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 12 0.15 0.45 0.46 13.90 ^ clkbuf_3_2__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_2__leaf_clk (net)\n", - " 0.45 0.00 13.90 ^ clkbuf_leaf_22_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.05 0.16 0.34 14.24 ^ clkbuf_leaf_22_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_22_clk (net)\n", - " 0.16 0.00 14.24 ^ riscv/dp/rf/_4846_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.24 clock reconvergence pessimism\n", - " -0.05 14.20 library setup time\n", - " 14.20 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.20 data required time\n", - " -14.54 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.34 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1143_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.01 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.91 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.91 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.15 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.04 0.00 1.15 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.06 0.56 1.71 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.06 0.00 1.71 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.01 0.06 0.27 1.98 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.06 0.00 1.98 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.01 0.06 0.14 2.12 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.06 0.00 2.12 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.05 0.08 0.19 2.30 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.08 0.00 2.31 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.08 0.06 0.08 2.39 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.07 0.01 2.40 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.29 0.30 0.27 2.67 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.32 0.05 2.73 ^ riscv/dp/_1143_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.73 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 13.00 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 13.00 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 13.21 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 13.21 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 13.42 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 13.42 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 13.79 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 13.80 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 14.11 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 14.11 ^ riscv/dp/_1143_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 14.11 clock reconvergence pessimism\n", - " 0.17 14.28 library recovery time\n", - " 14.28 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.28 data required time\n", - " -2.73 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.55 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1148_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_4846_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.20 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 0.23 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 0.23 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.27 0.50 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.16 0.00 0.50 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.09 0.21 0.71 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.09 0.00 0.71 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.04 0.13 0.21 0.92 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.13 0.00 0.92 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.11 0.34 0.38 1.29 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.34 0.00 1.30 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.05 0.16 0.31 1.61 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.16 0.00 1.61 ^ riscv/dp/_1148_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.08 0.14 0.62 2.23 v riscv/dp/_1148_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net89 (net)\n", - " 0.14 0.00 2.23 v _052_/A (sky130_fd_sc_hd__nor4_4)\n", - " 1 0.09 1.16 1.03 3.27 ^ _052_/Y (sky130_fd_sc_hd__nor4_4)\n", - " _003_ (net)\n", - " 1.16 0.01 3.27 ^ _053_/D (sky130_fd_sc_hd__nand4_4)\n", - " 5 0.05 0.32 0.32 3.60 v _053_/Y (sky130_fd_sc_hd__nand4_4)\n", - " _004_ (net)\n", - " 0.32 0.00 3.60 v _076_/A2 (sky130_fd_sc_hd__o31ai_4)\n", - " 7 0.03 0.42 0.51 4.10 ^ _076_/Y (sky130_fd_sc_hd__o31ai_4)\n", - " pcmux.y[6] (net)\n", - " 0.42 0.00 4.11 ^ riscv/_062_/B (sky130_fd_sc_hd__nor2_2)\n", - " 4 0.02 0.13 0.15 4.26 v riscv/_062_/Y (sky130_fd_sc_hd__nor2_2)\n", - " riscv/_014_ (net)\n", - " 0.13 0.00 4.26 v riscv/_063_/D (sky130_fd_sc_hd__nand4_4)\n", - " 7 0.08 0.31 0.29 4.54 ^ riscv/_063_/Y (sky130_fd_sc_hd__nand4_4)\n", - " riscv/_015_ (net)\n", - " 0.31 0.01 4.55 ^ riscv/_064_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 24 0.18 0.15 0.20 4.75 v riscv/_064_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/c.imm[2] (net)\n", - " 0.15 0.01 4.75 v riscv/dp/_0565_/A (sky130_fd_sc_hd__nor2b_2)\n", - " 2 0.02 0.25 0.27 5.03 ^ riscv/dp/_0565_/Y (sky130_fd_sc_hd__nor2b_2)\n", - " riscv/dp/rs1mux.y[0] (net)\n", - " 0.25 0.00 5.03 ^ load_slew243/A (sky130_fd_sc_hd__buf_16)\n", - " 12 0.14 0.16 0.22 5.25 ^ load_slew243/X (sky130_fd_sc_hd__buf_16)\n", - " net243 (net)\n", - " 0.16 0.02 5.27 ^ load_slew239/A (sky130_fd_sc_hd__buf_12)\n", - " 16 0.16 0.19 0.23 5.50 ^ load_slew239/X (sky130_fd_sc_hd__buf_12)\n", - " net239 (net)\n", - " 0.20 0.02 5.52 ^ load_slew235/A (sky130_fd_sc_hd__buf_12)\n", - " 14 0.14 0.17 0.22 5.75 ^ load_slew235/X (sky130_fd_sc_hd__buf_12)\n", - " net235 (net)\n", - " 0.18 0.02 5.77 ^ load_slew232/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.16 0.19 0.24 6.01 ^ load_slew232/X (sky130_fd_sc_hd__buf_12)\n", - " net232 (net)\n", - " 0.19 0.01 6.01 ^ load_slew231/A (sky130_fd_sc_hd__buf_12)\n", - " 17 0.18 0.21 0.25 6.26 ^ load_slew231/X (sky130_fd_sc_hd__buf_12)\n", - " net231 (net)\n", - " 0.21 0.02 6.28 ^ load_slew230/A (sky130_fd_sc_hd__buf_16)\n", - " 13 0.14 0.16 0.22 6.50 ^ load_slew230/X (sky130_fd_sc_hd__buf_16)\n", - " net230 (net)\n", - " 0.16 0.02 6.52 ^ riscv/dp/rf/_2412_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.01 0.12 0.63 7.15 v riscv/dp/rf/_2412_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/rf/_1100_ (net)\n", - " 0.12 0.00 7.15 v riscv/dp/rf/_2414_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.18 0.24 7.39 ^ riscv/dp/rf/_2414_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " riscv/dp/rf/_1102_ (net)\n", - " 0.18 0.00 7.39 ^ riscv/dp/rf/_2415_/B1 (sky130_fd_sc_hd__o211a_2)\n", - " 1 0.02 0.14 0.29 7.68 ^ riscv/dp/rf/_2415_/X (sky130_fd_sc_hd__o211a_2)\n", - " riscv/dp/rf/_1103_ (net)\n", - " 0.14 0.00 7.68 ^ riscv/dp/rf/_2416_/D1 (sky130_fd_sc_hd__a2111oi_4)\n", - " 4 0.04 0.18 0.10 7.78 v riscv/dp/rf/_2416_/Y (sky130_fd_sc_hd__a2111oi_4)\n", - " riscv/dp/pcsrcmux.d0[1] (net)\n", - " 0.18 0.01 7.79 v load_slew151/A (sky130_fd_sc_hd__buf_6)\n", - " 9 0.07 0.07 0.22 8.01 v load_slew151/X (sky130_fd_sc_hd__buf_6)\n", - " net151 (net)\n", - " 0.07 0.00 8.01 v riscv/dp/alu/_741_/A (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.12 0.56 8.57 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.12 0.00 8.57 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.02 0.29 0.36 8.93 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.29 0.00 8.93 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.03 0.12 0.15 9.09 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.12 0.00 9.09 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.03 0.40 0.41 9.50 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.40 0.00 9.51 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.03 0.15 0.30 9.80 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.15 0.00 9.81 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.10 0.10 9.90 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.10 0.00 9.90 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.18 0.24 10.14 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.18 0.00 10.14 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.01 0.09 0.23 10.36 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.09 0.00 10.36 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.27 0.26 10.63 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.27 0.00 10.63 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.12 0.17 10.80 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.12 0.00 10.80 v riscv/dp/_0773_/A0 (sky130_fd_sc_hd__mux2_8)\n", - " 11 0.30 0.25 0.53 11.33 v riscv/dp/_0773_/X (sky130_fd_sc_hd__mux2_8)\n", - " net70 (net)\n", - " 0.25 0.02 11.35 v _112_/B (sky130_fd_sc_hd__nor3b_4)\n", - " 2 0.02 0.29 0.36 11.70 ^ _112_/Y (sky130_fd_sc_hd__nor3b_4)\n", - " net68 (net)\n", - " 0.29 0.00 11.71 ^ rebuffer1/A (sky130_fd_sc_hd__buf_16)\n", - " 1 0.11 0.12 0.21 11.91 ^ rebuffer1/X (sky130_fd_sc_hd__buf_16)\n", - " net454 (net)\n", - " 0.14 0.03 11.94 ^ wire130/A (sky130_fd_sc_hd__buf_12)\n", - " 8 0.17 0.19 0.23 12.17 ^ wire130/X (sky130_fd_sc_hd__buf_12)\n", - " net130 (net)\n", - " 0.19 0.01 12.19 ^ _142_/B2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.01 0.14 0.11 12.29 v _142_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _047_ (net)\n", - " 0.14 0.00 12.29 v _143_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 2 0.05 0.38 0.19 12.48 ^ _143_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " dmem_communicate.mem_out[7] (net)\n", - " 0.38 0.01 12.49 ^ riscv/dp/_0623_/B (sky130_fd_sc_hd__nand2b_1)\n", - " 1 0.01 0.11 0.16 12.65 v riscv/dp/_0623_/Y (sky130_fd_sc_hd__nand2b_1)\n", - " riscv/dp/_0259_ (net)\n", - " 0.11 0.00 12.65 v riscv/dp/_0624_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 4 0.05 0.36 0.34 12.98 ^ riscv/dp/_0624_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/_0260_ (net)\n", - " 0.36 0.00 12.99 ^ load_slew129/A (sky130_fd_sc_hd__buf_12)\n", - " 11 0.15 0.18 0.26 13.24 ^ load_slew129/X (sky130_fd_sc_hd__buf_12)\n", - " net129 (net)\n", - " 0.19 0.02 13.26 ^ load_slew128/A (sky130_fd_sc_hd__buf_16)\n", - " 10 0.14 0.16 0.21 13.47 ^ load_slew128/X (sky130_fd_sc_hd__buf_16)\n", - " net128 (net)\n", - " 0.16 0.02 13.49 ^ riscv/dp/_0682_/B2 (sky130_fd_sc_hd__o221ai_4)\n", - " 3 0.09 0.42 0.31 13.80 v riscv/dp/_0682_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/_0302_ (net)\n", - " 0.42 0.00 13.80 v riscv/dp/_0683_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 16 0.12 0.82 0.45 14.25 ^ riscv/dp/_0683_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[16] (net)\n", - " 0.83 0.03 14.28 ^ riscv/dp/rf/_3633_/A0 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.08 0.26 14.54 ^ riscv/dp/rf/_3633_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0112_ (net)\n", - " 0.08 0.00 14.54 ^ riscv/dp/rf/_4846_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 14.54 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.20 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 12.51 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.16 0.22 12.73 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.16 0.00 12.73 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.06 0.17 0.27 13.00 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.17 0.00 13.00 ^ clkbuf_2_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.02 0.08 0.21 13.21 ^ clkbuf_2_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_0_clk (net)\n", - " 0.08 0.00 13.21 ^ clkbuf_2_1_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.05 0.15 0.23 13.44 ^ clkbuf_2_1_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_1_1_clk (net)\n", - " 0.15 0.00 13.44 ^ clkbuf_3_2__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 12 0.15 0.45 0.46 13.90 ^ clkbuf_3_2__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_2__leaf_clk (net)\n", - " 0.45 0.00 13.90 ^ clkbuf_leaf_22_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.05 0.16 0.34 14.24 ^ clkbuf_leaf_22_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_22_clk (net)\n", - " 0.16 0.00 14.24 ^ riscv/dp/rf/_4846_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 14.24 clock reconvergence pessimism\n", - " -0.05 14.20 library setup time\n", - " 14.20 data required time\n", - "-----------------------------------------------------------------------------\n", - " 14.20 data required time\n", - " -14.54 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -0.34 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "max slew\n", - "\n", - "Pin Limit Slew Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 1.50 1.58 -0.09 (VIOLATED)\n", - "clone37/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0699_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0737_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0667_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0731_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0743_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0749_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0755_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0684_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0761_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0767_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "riscv/dp/_0773_/S 1.50 1.58 -0.08 (VIOLATED)\n", - "\n", - "max capacitance\n", - "\n", - "Pin Limit Cap Slack\n", - "------------------------------------------------------------\n", - "riscv/_103_/Y 0.15 0.17 -0.01 (VIOLATED)\n", - "\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.08906442672014236\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.4951449632644653\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0596\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "-0.012804712168872356\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.1538189947605133\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "-0.0832\n", - "\n", - "==========================================================================\n", - "global route max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 13\n", - "\n", - "==========================================================================\n", - "global route max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 1\n", - "\n", - "==========================================================================\n", - "global route setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 533\n", - "\n", - "==========================================================================\n", - "global route hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route critical path delay\n", - "--------------------------------------------------------------------------\n", - "14.5376\n", - "\n", - "==========================================================================\n", - "global route critical path slack\n", - "--------------------------------------------------------------------------\n", - "-0.3386\n", - "\n", - "==========================================================================\n", - "global route slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-2.329133\n", - "\n", - "==========================================================================\n", - "global route report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.38e-03 0.00e+00 8.53e-09 3.38e-03 43.8%\n", - "Combinational 7.12e-04 1.59e-03 2.54e-08 2.30e-03 29.9%\n", - "Clock 3.60e-04 1.67e-03 4.51e-10 2.03e-03 26.3%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.45e-03 3.26e-03 3.44e-08 7.70e-03 100.0%\n", - " 57.7% 42.3% 0.0%\n", - "\n", - "==========================================================================\n", - "global route report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98795 u^2 9% utilization.\n", - "\n", - "[INFO FLW-0007] clock clk period 12.500000\n", - "[INFO FLW-0008] Clock clk period 12.197\n", - "[INFO FLW-0009] Clock clk slack -0.339\n", - "[INFO FLW-0011] Path endpoint count 1370\n", - "Elapsed time: 0:47.67[h:]min:sec. CPU time: user 46.12 sys 1.38 (99%). Peak memory: 459676KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/fillcell.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_2_fillcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO DPL-0001] Placed 126919 filler instances.\n", - "Elapsed time: 0:01.12[h:]min:sec. CPU time: user 0.91 sys 0.13 (94%). Peak memory: 212628KB.\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/5_3_route.tmp.log ./logs/130_180/riscv32i_3d/80MHz/5_3_route.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_route.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/5_3_route.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/5_3_route.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "detailed_route -output_drc ./reports/130_180/riscv32i_3d/80MHz/5_route_drc.rpt -output_maze ./results/130_180/riscv32i_3d/80MHz/maze.log -bottom_routing_layer met1 -top_routing_layer Metal4 -save_guide_updates -verbose 1 -drc_report_iter_step 5\n", - "[INFO DRT-0149] Reading tech and libs.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "\n", - "Units: 1000\n", - "Number of layers: 15\n", - "Number of macros: 441\n", - "Number of vias: 30\n", - "Number of viarulegen: 30\n", - "\n", - "[INFO DRT-0150] Reading design.\n", - "\n", - "Design: core_without_dmem\n", - "Die area: ( 0 0 ) ( 1200000 1000000 )\n", - "Number of track patterns: 14\n", - "Number of DEF vias: 0\n", - "Number of components: 147612\n", - "Number of terminals: 127\n", - "Number of snets: 2\n", - "Number of nets: 5971\n", - "\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term we_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[4]\n", - "[INFO DRT-0167] List of default vias:\n", - " Layer via\n", - " default via: M1M2_PR\n", - " Layer via2\n", - " default via: M2M3_PR\n", - " Layer via3\n", - " default via: M3M4_PR\n", - " Layer via4\n", - " default via: M4M5_PR\n", - " Layer F2F\n", - " default via: F2F_PR\n", - "[INFO DRT-0162] Library cell analysis.\n", - "[INFO DRT-0163] Instance analysis.\n", - " Complete 10000 instances.\n", - " Complete 20000 instances.\n", - " Complete 30000 instances.\n", - " Complete 40000 instances.\n", - " Complete 50000 instances.\n", - " Complete 60000 instances.\n", - " Complete 70000 instances.\n", - " Complete 80000 instances.\n", - " Complete 90000 instances.\n", - " Complete 100000 instances.\n", - "[INFO DRT-0164] Number of unique instances = 335.\n", - "[INFO DRT-0168] Init region query.\n", - "[INFO DRT-0018] Complete 10000 insts.\n", - "[INFO DRT-0018] Complete 20000 insts.\n", - "[INFO DRT-0018] Complete 30000 insts.\n", - "[INFO DRT-0018] Complete 40000 insts.\n", - "[INFO DRT-0018] Complete 50000 insts.\n", - "[INFO DRT-0018] Complete 60000 insts.\n", - "[INFO DRT-0018] Complete 70000 insts.\n", - "[INFO DRT-0018] Complete 80000 insts.\n", - "[INFO DRT-0018] Complete 90000 insts.\n", - "[INFO DRT-0019] Complete 100000 insts.\n", - "[INFO DRT-0024] Complete FR_MASTERSLICE.\n", - "[INFO DRT-0024] Complete Fr_VIA.\n", - "[INFO DRT-0024] Complete li1.\n", - "[INFO DRT-0024] Complete mcon.\n", - "[INFO DRT-0024] Complete met1.\n", - "[INFO DRT-0024] Complete via.\n", - "[INFO DRT-0024] Complete met2.\n", - "[INFO DRT-0024] Complete via2.\n", - "[INFO DRT-0024] Complete met3.\n", - "[INFO DRT-0024] Complete via3.\n", - "[INFO DRT-0024] Complete met4.\n", - "[INFO DRT-0024] Complete via4.\n", - "[INFO DRT-0024] Complete met5.\n", - "[INFO DRT-0024] Complete F2F.\n", - "[INFO DRT-0024] Complete Metal4.\n", - "[INFO DRT-0033] FR_MASTERSLICE shape region query size = 0.\n", - "[INFO DRT-0033] FR_VIA shape region query size = 0.\n", - "[INFO DRT-0033] li1 shape region query size = 543104.\n", - "[INFO DRT-0033] mcon shape region query size = 1786732.\n", - "[INFO DRT-0033] met1 shape region query size = 313248.\n", - "[INFO DRT-0033] via shape region query size = 0.\n", - "[INFO DRT-0033] met2 shape region query size = 0.\n", - "[INFO DRT-0033] via2 shape region query size = 0.\n", - "[INFO DRT-0033] met3 shape region query size = 0.\n", - "[INFO DRT-0033] via3 shape region query size = 0.\n", - "[INFO DRT-0033] met4 shape region query size = 0.\n", - "[INFO DRT-0033] via4 shape region query size = 0.\n", - "[INFO DRT-0033] met5 shape region query size = 1917.\n", - "[INFO DRT-0033] F2F shape region query size = 3640.\n", - "[INFO DRT-0033] Metal4 shape region query size = 1972.\n", - "[INFO DRT-0165] Start pin access.\n", - "[INFO DRT-0076] Complete 100 pins.\n", - "[INFO DRT-0076] Complete 200 pins.\n", - "[INFO DRT-0076] Complete 300 pins.\n", - "[INFO DRT-0076] Complete 400 pins.\n", - "[INFO DRT-0076] Complete 500 pins.\n", - "[INFO DRT-0076] Complete 600 pins.\n", - "[INFO DRT-0076] Complete 700 pins.\n", - "[INFO DRT-0076] Complete 800 pins.\n", - "[INFO DRT-0076] Complete 900 pins.\n", - "[INFO DRT-0077] Complete 1000 pins.\n", - "[INFO DRT-0078] Complete 1346 pins.\n", - "[INFO DRT-0079] Complete 100 unique inst patterns.\n", - "[INFO DRT-0079] Complete 200 unique inst patterns.\n", - "[INFO DRT-0079] Complete 300 unique inst patterns.\n", - "[INFO DRT-0081] Complete 325 unique inst patterns.\n", - "[INFO DRT-0082] Complete 1000 groups.\n", - "[INFO DRT-0082] Complete 2000 groups.\n", - "[INFO DRT-0082] Complete 3000 groups.\n", - "[INFO DRT-0082] Complete 4000 groups.\n", - "[INFO DRT-0084] Complete 4450 groups.\n", - "#scanned instances = 147612\n", - "#unique instances = 335\n", - "#stdCellGenAp = 12485\n", - "#stdCellValidPlanarAp = 225\n", - "#stdCellValidViaAp = 8060\n", - "#stdCellPinNoAp = 15\n", - "#stdCellPinCnt = 21821\n", - "#instTermValidViaApCnt = 0\n", - "#macroGenAp = 0\n", - "#macroValidPlanarAp = 0\n", - "#macroValidViaAp = 0\n", - "#macroNoAp = 0\n", - "[INFO DRT-0166] Complete pin access.\n", - "[INFO DRT-0267] cpu time = 00:02:44, elapsed time = 00:00:05, memory = 477.05 (MB), peak = 487.14 (MB)\n", - "\n", - "Number of guides: 55127\n", - "\n", - "[INFO DRT-0169] Post process guides.\n", - "[INFO DRT-0176] GCELLGRID X 0 DO 173 STEP 6900 ;\n", - "[INFO DRT-0177] GCELLGRID Y 0 DO 144 STEP 6900 ;\n", - "[INFO DRT-0026] Complete 10000 origin guides.\n", - "[INFO DRT-0026] Complete 20000 origin guides.\n", - "[INFO DRT-0026] Complete 30000 origin guides.\n", - "[INFO DRT-0026] Complete 40000 origin guides.\n", - "[INFO DRT-0026] Complete 50000 origin guides.\n", - "[INFO DRT-0028] Complete FR_MASTERSLICE.\n", - "[INFO DRT-0028] Complete Fr_VIA.\n", - "[INFO DRT-0028] Complete li1.\n", - "[INFO DRT-0028] Complete mcon.\n", - "[INFO DRT-0028] Complete met1.\n", - "[INFO DRT-0028] Complete via.\n", - "[INFO DRT-0028] Complete met2.\n", - "[INFO DRT-0028] Complete via2.\n", - "[INFO DRT-0028] Complete met3.\n", - "[INFO DRT-0028] Complete via3.\n", - "[INFO DRT-0028] Complete met4.\n", - "[INFO DRT-0028] Complete via4.\n", - "[INFO DRT-0028] Complete met5.\n", - "[INFO DRT-0028] Complete F2F.\n", - "[INFO DRT-0028] Complete Metal4.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2577_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_3057_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2665_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2627_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2909_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin riscv/dp/rf/_2969_/S0 not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-0178] Init guide query.\n", - "[INFO DRT-0035] Complete FR_MASTERSLICE (guide).\n", - "[INFO DRT-0035] Complete Fr_VIA (guide).\n", - "[INFO DRT-0035] Complete li1 (guide).\n", - "[INFO DRT-0035] Complete mcon (guide).\n", - "[INFO DRT-0035] Complete met1 (guide).\n", - "[INFO DRT-0035] Complete via (guide).\n", - "[INFO DRT-0035] Complete met2 (guide).\n", - "[INFO DRT-0035] Complete via2 (guide).\n", - "[INFO DRT-0035] Complete met3 (guide).\n", - "[INFO DRT-0035] Complete via3 (guide).\n", - "[INFO DRT-0035] Complete met4 (guide).\n", - "[INFO DRT-0035] Complete via4 (guide).\n", - "[INFO DRT-0035] Complete met5 (guide).\n", - "[INFO DRT-0035] Complete F2F (guide).\n", - "[INFO DRT-0035] Complete Metal4 (guide).\n", - "[INFO DRT-0036] FR_MASTERSLICE guide region query size = 0.\n", - "[INFO DRT-0036] FR_VIA guide region query size = 0.\n", - "[INFO DRT-0036] li1 guide region query size = 18177.\n", - "[INFO DRT-0036] mcon guide region query size = 0.\n", - "[INFO DRT-0036] met1 guide region query size = 15622.\n", - "[INFO DRT-0036] via guide region query size = 0.\n", - "[INFO DRT-0036] met2 guide region query size = 8607.\n", - "[INFO DRT-0036] via2 guide region query size = 0.\n", - "[INFO DRT-0036] met3 guide region query size = 439.\n", - "[INFO DRT-0036] via3 guide region query size = 0.\n", - "[INFO DRT-0036] met4 guide region query size = 226.\n", - "[INFO DRT-0036] via4 guide region query size = 0.\n", - "[INFO DRT-0036] met5 guide region query size = 129.\n", - "[INFO DRT-0036] F2F guide region query size = 0.\n", - "[INFO DRT-0036] Metal4 guide region query size = 99.\n", - "[INFO DRT-0179] Init gr pin query.\n", - "[INFO DRT-0185] Post process initialize RPin region query.\n", - "[INFO DRT-0181] Start track assignment.\n", - "[INFO DRT-0184] Done with 27109 vertical wires in 4 frboxes and 16190 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0186] Done with 1987 vertical wires in 4 frboxes and 4958 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0182] Complete track assignment.\n", - "[INFO DRT-0267] cpu time = 00:00:07, elapsed time = 00:00:02, memory = 736.68 (MB), peak = 740.00 (MB)\n", - "[INFO DRT-0187] Start routing data preparation.\n", - "[INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 736.68 (MB), peak = 740.00 (MB)\n", - "[INFO DRT-0194] Start detail routing.\n", - "[INFO DRT-0195] Start 0th optimization iteration.\n", - " Completing 10% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 741.84 (MB).\n", - " Completing 20% with 0 violations.\n", - " elapsed time = 00:00:01, memory = 1938.80 (MB).\n", - " Completing 30% with 818 violations.\n", - " elapsed time = 00:00:04, memory = 1980.80 (MB).\n", - " Completing 40% with 818 violations.\n", - " elapsed time = 00:00:04, memory = 2328.60 (MB).\n", - " Completing 50% with 818 violations.\n", - " elapsed time = 00:00:05, memory = 2564.64 (MB).\n", - " Completing 60% with 1585 violations.\n", - " elapsed time = 00:00:08, memory = 2570.26 (MB).\n", - " Completing 70% with 1585 violations.\n", - " elapsed time = 00:00:09, memory = 2873.12 (MB).\n", - " Completing 80% with 2577 violations.\n", - " elapsed time = 00:00:14, memory = 2899.55 (MB).\n", - " Completing 90% with 2577 violations.\n", - " elapsed time = 00:00:14, memory = 3091.92 (MB).\n", - " Completing 100% with 3439 violations.\n", - " elapsed time = 00:00:18, memory = 3122.63 (MB).\n", - "[INFO DRT-0199] Number of violations = 5375.\n", - "Viol/Layer li1 mcon met1 via met2 met3 met5 Metal4\n", - "Cut Spacing 0 10 0 0 0 0 0 0\n", - "Metal Spacing 118 0 676 0 77 0 0 27\n", - "Min Hole 0 0 5 0 1 0 0 0\n", - "Min Width 0 0 0 0 0 0 2 0\n", - "NS Metal 8 0 1 0 0 0 0 1\n", - "Recheck 1 0 1363 0 551 21 0 0\n", - "Short 0 2 2274 2 232 0 0 3\n", - "[INFO DRT-0267] cpu time = 00:03:28, elapsed time = 00:00:19, memory = 3486.71 (MB), peak = 3486.71 (MB)\n", - "Total wire length = 435464 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 207521 um.\n", - "Total wire length on LAYER met2 = 197398 um.\n", - "Total wire length on LAYER met3 = 23577 um.\n", - "Total wire length on LAYER met4 = 5342 um.\n", - "Total wire length on LAYER met5 = 619 um.\n", - "Total wire length on LAYER Metal4 = 1005 um.\n", - "Total number of vias = 49222.\n", - "Up-via summary (total 49222):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21589\n", - " met1 26436\n", - " met2 685\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49222\n", - "\n", - "\n", - "[INFO DRT-0195] Start 1st optimization iteration.\n", - " Completing 10% with 5375 violations.\n", - " elapsed time = 00:00:00, memory = 3486.72 (MB).\n", - " Completing 20% with 5375 violations.\n", - " elapsed time = 00:00:00, memory = 3650.62 (MB).\n", - " Completing 30% with 4249 violations.\n", - " elapsed time = 00:00:04, memory = 3665.05 (MB).\n", - " Completing 40% with 4249 violations.\n", - " elapsed time = 00:00:04, memory = 3789.53 (MB).\n", - " Completing 50% with 4249 violations.\n", - " elapsed time = 00:00:05, memory = 3791.88 (MB).\n", - " Completing 60% with 3185 violations.\n", - " elapsed time = 00:00:07, memory = 3796.57 (MB).\n", - " Completing 70% with 3185 violations.\n", - " elapsed time = 00:00:08, memory = 3884.22 (MB).\n", - " Completing 80% with 2297 violations.\n", - " elapsed time = 00:00:10, memory = 3903.04 (MB).\n", - " Completing 90% with 2297 violations.\n", - " elapsed time = 00:00:11, memory = 3990.38 (MB).\n", - " Completing 100% with 1585 violations.\n", - " elapsed time = 00:00:14, memory = 4010.57 (MB).\n", - "[INFO DRT-0199] Number of violations = 1601.\n", - "Viol/Layer met1 via met2 Metal4\n", - "Metal Spacing 313 0 27 5\n", - "NS Metal 0 0 0 1\n", - "Recheck 11 0 6 0\n", - "Short 1147 2 86 3\n", - "[INFO DRT-0267] cpu time = 00:03:17, elapsed time = 00:00:14, memory = 4013.75 (MB), peak = 4013.75 (MB)\n", - "Total wire length = 433501 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 206800 um.\n", - "Total wire length on LAYER met2 = 196060 um.\n", - "Total wire length on LAYER met3 = 23765 um.\n", - "Total wire length on LAYER met4 = 5274 um.\n", - "Total wire length on LAYER met5 = 612 um.\n", - "Total wire length on LAYER Metal4 = 986 um.\n", - "Total number of vias = 49180.\n", - "Up-via summary (total 49180):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21585\n", - " met1 26358\n", - " met2 724\n", - " met3 288\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49180\n", - "\n", - "\n", - "[INFO DRT-0195] Start 2nd optimization iteration.\n", - " Completing 10% with 1601 violations.\n", - " elapsed time = 00:00:00, memory = 4013.75 (MB).\n", - " Completing 20% with 1601 violations.\n", - " elapsed time = 00:00:00, memory = 4079.29 (MB).\n", - " Completing 30% with 1373 violations.\n", - " elapsed time = 00:00:02, memory = 4083.66 (MB).\n", - " Completing 40% with 1373 violations.\n", - " elapsed time = 00:00:02, memory = 4083.68 (MB).\n", - " Completing 50% with 1373 violations.\n", - " elapsed time = 00:00:04, memory = 4148.28 (MB).\n", - " Completing 60% with 1457 violations.\n", - " elapsed time = 00:00:05, memory = 4148.28 (MB).\n", - " Completing 70% with 1457 violations.\n", - " elapsed time = 00:00:05, memory = 4192.89 (MB).\n", - " Completing 80% with 1373 violations.\n", - " elapsed time = 00:00:08, memory = 4198.43 (MB).\n", - " Completing 90% with 1373 violations.\n", - " elapsed time = 00:00:08, memory = 4198.43 (MB).\n", - " Completing 100% with 1231 violations.\n", - " elapsed time = 00:00:11, memory = 4252.29 (MB).\n", - "[INFO DRT-0199] Number of violations = 1241.\n", - "Viol/Layer mcon met1 met2 Metal4\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 241 12 5\n", - "NS Metal 0 0 0 1\n", - "Recheck 0 7 3 0\n", - "Short 0 908 60 3\n", - "[INFO DRT-0267] cpu time = 00:02:20, elapsed time = 00:00:12, memory = 4252.61 (MB), peak = 4252.61 (MB)\n", - "Total wire length = 433007 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 206532 um.\n", - "Total wire length on LAYER met2 = 195793 um.\n", - "Total wire length on LAYER met3 = 23792 um.\n", - "Total wire length on LAYER met4 = 5285 um.\n", - "Total wire length on LAYER met5 = 620 um.\n", - "Total wire length on LAYER Metal4 = 981 um.\n", - "Total number of vias = 49210.\n", - "Up-via summary (total 49210):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21590\n", - " met1 26383\n", - " met2 727\n", - " met3 285\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49210\n", - "\n", - "\n", - "[INFO DRT-0195] Start 3rd optimization iteration.\n", - " Completing 10% with 1241 violations.\n", - " elapsed time = 00:00:00, memory = 4252.61 (MB).\n", - " Completing 20% with 1241 violations.\n", - " elapsed time = 00:00:00, memory = 4252.61 (MB).\n", - " Completing 30% with 986 violations.\n", - " elapsed time = 00:00:06, memory = 4288.35 (MB).\n", - " Completing 40% with 986 violations.\n", - " elapsed time = 00:00:06, memory = 4288.35 (MB).\n", - " Completing 50% with 986 violations.\n", - " elapsed time = 00:00:06, memory = 4344.07 (MB).\n", - " Completing 60% with 700 violations.\n", - " elapsed time = 00:00:08, memory = 4349.61 (MB).\n", - " Completing 70% with 700 violations.\n", - " elapsed time = 00:00:08, memory = 4349.61 (MB).\n", - " Completing 80% with 343 violations.\n", - " elapsed time = 00:00:11, memory = 4385.47 (MB).\n", - " Completing 90% with 343 violations.\n", - " elapsed time = 00:00:11, memory = 4385.47 (MB).\n", - " Completing 100% with 77 violations.\n", - " elapsed time = 00:00:13, memory = 4420.06 (MB).\n", - "[INFO DRT-0199] Number of violations = 83.\n", - "Viol/Layer met1 met2 Metal4\n", - "Metal Spacing 30 2 0\n", - "NS Metal 0 0 1\n", - "Recheck 4 2 0\n", - "Short 41 0 3\n", - "[INFO DRT-0267] cpu time = 00:01:43, elapsed time = 00:00:14, memory = 4420.69 (MB), peak = 4420.69 (MB)\n", - "Total wire length = 433226 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204195 um.\n", - "Total wire length on LAYER met2 = 196269 um.\n", - "Total wire length on LAYER met3 = 25893 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49949.\n", - "Up-via summary (total 49949):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26839\n", - " met2 1010\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49949\n", - "\n", - "\n", - "[INFO DRT-0195] Start 4th optimization iteration.\n", - " Completing 10% with 83 violations.\n", - " elapsed time = 00:00:00, memory = 4420.69 (MB).\n", - " Completing 20% with 83 violations.\n", - " elapsed time = 00:00:00, memory = 4420.69 (MB).\n", - " Completing 30% with 51 violations.\n", - " elapsed time = 00:00:00, memory = 4420.69 (MB).\n", - " Completing 40% with 51 violations.\n", - " elapsed time = 00:00:00, memory = 4420.69 (MB).\n", - " Completing 50% with 51 violations.\n", - " elapsed time = 00:00:00, memory = 4420.69 (MB).\n", - " Completing 60% with 42 violations.\n", - " elapsed time = 00:00:01, memory = 4420.69 (MB).\n", - " Completing 70% with 42 violations.\n", - " elapsed time = 00:00:01, memory = 4420.69 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:02, memory = 4420.69 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:02, memory = 4420.69 (MB).\n", - " Completing 100% with 6 violations.\n", - " elapsed time = 00:00:03, memory = 4425.98 (MB).\n", - "[INFO DRT-0199] Number of violations = 6.\n", - "Viol/Layer met1 Metal4\n", - "Metal Spacing 2 0\n", - "NS Metal 0 1\n", - "Short 0 3\n", - "[INFO DRT-0267] cpu time = 00:00:23, elapsed time = 00:00:03, memory = 4426.04 (MB), peak = 4426.04 (MB)\n", - "Total wire length = 433204 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204071 um.\n", - "Total wire length on LAYER met2 = 196249 um.\n", - "Total wire length on LAYER met3 = 26015 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49979.\n", - "Up-via summary (total 49979):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26853\n", - " met2 1026\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49979\n", - "\n", - "\n", - "[INFO DRT-0195] Start 5th optimization iteration.\n", - " Completing 10% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 20% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 30% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 40% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 50% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 60% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 70% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 80% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 90% with 6 violations.\n", - " elapsed time = 00:00:00, memory = 4426.04 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 6th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 7th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 8th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 9th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 10th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 11th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 12th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4426.91 (MB), peak = 4426.91 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 13th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 14th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 15th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 16th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433188 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196243 um.\n", - "Total wire length on LAYER met3 = 26004 um.\n", - "Total wire length on LAYER met4 = 5275 um.\n", - "Total wire length on LAYER met5 = 618 um.\n", - "Total wire length on LAYER Metal4 = 973 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 17th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 18th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 19th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 20th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 21st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 22nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 23rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 24th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 25th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 26th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 27th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 28th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 29th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 30th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 31st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 32nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 33rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 34th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 35th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 36th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 37th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 38th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 39th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 40th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 41st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 42nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 43rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 44th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 45th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 46th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 47th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 48th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:10, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 49th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 50th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 51st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204073 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 52nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 53rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 54th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 55th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 56th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 57th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 58th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 59th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 60th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 61st optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 62nd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 63rd optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0195] Start 64th optimization iteration.\n", - " Completing 10% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 20% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 30% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 40% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 50% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 60% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 70% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 80% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 90% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - " Completing 100% with 4 violations.\n", - " elapsed time = 00:00:00, memory = 4426.93 (MB).\n", - "[INFO DRT-0199] Number of violations = 4.\n", - "Viol/Layer Metal4\n", - "NS Metal 1\n", - "Short 3\n", - "[INFO DRT-0267] cpu time = 00:00:11, elapsed time = 00:00:00, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0198] Complete detail routing.\n", - "Total wire length = 433183 um.\n", - "Total wire length on LAYER li1 = 0 um.\n", - "Total wire length on LAYER met1 = 204072 um.\n", - "Total wire length on LAYER met2 = 196246 um.\n", - "Total wire length on LAYER met3 = 26001 um.\n", - "Total wire length on LAYER met4 = 5270 um.\n", - "Total wire length on LAYER met5 = 621 um.\n", - "Total wire length on LAYER Metal4 = 969 um.\n", - "Total number of vias = 49978.\n", - "Up-via summary (total 49978):.\n", - "\n", - "------------------------\n", - " FR_MASTERSLICE 0\n", - " li1 21588\n", - " met1 26856\n", - " met2 1022\n", - " met3 287\n", - " met4 126\n", - " met5 99\n", - "------------------------\n", - " 49978\n", - "\n", - "\n", - "[INFO DRT-0267] cpu time = 00:23:30, elapsed time = 00:01:33, memory = 4426.93 (MB), peak = 4426.93 (MB)\n", - "\n", - "[INFO DRT-0180] Post processing.\n", - "Elapsed time: 1:45.40[h:]min:sec. CPU time: user 1563.35 sys 22.65 (1504%). Peak memory: 4533420KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_3_route.odb ./results/130_180/riscv32i_3d/80MHz/5_route.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.odb ./results/130_180/riscv32i_3d/80MHz/6_1_fill.odb\n", - "cp ./results/130_180/riscv32i_3d/80MHz/4_cts.sdc ./results/130_180/riscv32i_3d/80MHz/5_route.sdc\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/6_1_fill.sdc\n", - "(trap 'mv ./logs/130_180/riscv32i_3d/80MHz/6_report.tmp.log ./logs/130_180/riscv32i_3d/80MHz/6_report.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/final_report.tcl -metrics ./logs/130_180/riscv32i_3d/80MHz/6_report.json) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/6_report.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO] Deleted 0 routing obstructions\n", - "[INFO RCX-0431] Defined process_corner X with ext_model_index 0\n", - "[INFO RCX-0029] Defined extraction corner X\n", - "[INFO RCX-0008] extracting parasitics of core_without_dmem ...\n", - "[INFO RCX-0435] Reading extraction model file /Flow/platforms/130_180/rcx_patterns.rules ...\n", - "[INFO RCX-0436] RC segment generation core_without_dmem (max_merge_res 50.0) ...\n", - "[INFO RCX-0040] Final 26178 rc segments\n", - "[INFO RCX-0439] Coupling Cap extraction core_without_dmem ...\n", - "[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.\n", - "[INFO RCX-0043] 54897 wires to be extracted\n", - "[INFO RCX-0442] 33% completion -- 18120 wires have been extracted\n", - "[INFO RCX-0442] 48% completion -- 26441 wires have been extracted\n", - "[INFO RCX-0442] 56% completion -- 31231 wires have been extracted\n", - "[INFO RCX-0442] 100% completion -- 54897 wires have been extracted\n", - "[INFO RCX-0045] Extract 5971 nets, 32079 rsegs, 32079 caps, 59534 ccs\n", - "[INFO RCX-0015] Finished extracting core_without_dmem.\n", - "[INFO RCX-0016] Writing SPEF ...\n", - "[INFO RCX-0443] 5971 nets finished\n", - "[INFO RCX-0017] Finished writing SPEF ...\n", - "[INFO PSM-0022] Using 1.800V for VDD\n", - "[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.\n", - "[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction\n", - "[INFO PSM-0076] Setting metal node density to be standard cell height times 5.\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (92.480um, 157.760um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (943.680um, 157.760um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 290.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (406.080um, 293.760um).\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (92.480um, 565.760um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (943.680um, 565.760um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 710.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (406.080um, 701.760um).\n", - "[WARNING PSM-0030] VSRC location at (670.070um, 850.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (674.880um, 837.760um).\n", - "[INFO PSM-0031] Number of PDN nodes on net VDD = 4567.\n", - "[WARNING PSM-0024] Instance _075_, current node at (630080, 48960) at layer 6 have been moved from (630200, 27200).\n", - "[WARNING PSM-0024] Instance _077_, current node at (641280, 48960) at layer 6 have been moved from (636180, 29920).\n", - "[WARNING PSM-0024] Instance _079_, current node at (618880, 48960) at layer 6 have been moved from (622840, 27200).\n", - "[WARNING PSM-0024] Instance _093_, current node at (663680, 48960) at layer 6 have been moved from (660100, 29920).\n", - "[WARNING PSM-0024] Instance _100_, current node at (529280, 48960) at layer 6 have been moved from (527620, 32640).\n", - "[WARNING PSM-0024] Instance _101_, current node at (618880, 48960) at layer 6 have been moved from (618700, 29920).\n", - "[WARNING PSM-0024] Instance _102_, current node at (618880, 48960) at layer 6 have been moved from (621920, 29920).\n", - "[WARNING PSM-0024] Instance _104_, current node at (630080, 48960) at layer 6 have been moved from (626980, 32640).\n", - "[WARNING PSM-0024] Instance _114_, current node at (45440, 511360) at layer 6 have been moved from (31280, 519520).\n", - "[WARNING PSM-0024] Instance _115_, current node at (45440, 511360) at layer 6 have been moved from (30820, 505920).\n", - "[WARNING PSM-0024] Instance _116_, current node at (45440, 484160) at layer 6 have been moved from (31280, 489600).\n", - "[WARNING PSM-0024] Instance _118_, current node at (45440, 538560) at layer 6 have been moved from (30820, 535840).\n", - "[WARNING PSM-0024] Instance _145_, current node at (641280, 48960) at layer 6 have been moved from (644460, 24480).\n", - "[WARNING PSM-0024] Instance input2, current node at (607680, 48960) at layer 6 have been moved from (607660, 24480).\n", - "[WARNING PSM-0024] Instance input3, current node at (607680, 48960) at layer 6 have been moved from (603520, 24480).\n", - "[WARNING PSM-0024] Instance input5, current node at (585280, 48960) at layer 6 have been moved from (590640, 21760).\n", - "[WARNING PSM-0024] Instance input10, current node at (663680, 48960) at layer 6 have been moved from (660100, 21760).\n", - "[WARNING PSM-0024] Instance input13, current node at (529280, 48960) at layer 6 have been moved from (523940, 24480).\n", - "[WARNING PSM-0024] Instance input14, current node at (518080, 48960) at layer 6 have been moved from (519800, 21760).\n", - "[WARNING PSM-0024] Instance input15, current node at (518080, 48960) at layer 6 have been moved from (521180, 21760).\n", - "[WARNING PSM-0024] Instance input16, current node at (518080, 48960) at layer 6 have been moved from (522100, 24480).\n", - "[WARNING PSM-0024] Instance input17, current node at (529280, 48960) at layer 6 have been moved from (525320, 24480).\n", - "[WARNING PSM-0024] Instance input18, current node at (618880, 48960) at layer 6 have been moved from (618240, 24480).\n", - "[WARNING PSM-0024] Instance input19, current node at (618880, 48960) at layer 6 have been moved from (621460, 27200).\n", - "[WARNING PSM-0024] Instance input20, current node at (618880, 48960) at layer 6 have been moved from (619620, 24480).\n", - "[WARNING PSM-0024] Instance input21, current node at (641280, 48960) at layer 6 have been moved from (637560, 27200).\n", - "[WARNING PSM-0024] Instance input22, current node at (618880, 48960) at layer 6 have been moved from (622840, 24480).\n", - "[WARNING PSM-0024] Instance input24, current node at (630080, 48960) at layer 6 have been moved from (627900, 24480).\n", - "[WARNING PSM-0024] Instance input29, current node at (630080, 48960) at layer 6 have been moved from (625600, 24480).\n", - "[WARNING PSM-0024] Instance input30, current node at (641280, 48960) at layer 6 have been moved from (638940, 21760).\n", - "[WARNING PSM-0024] Instance input31, current node at (630080, 48960) at layer 6 have been moved from (630660, 24480).\n", - "[WARNING PSM-0024] Instance input32, current node at (630080, 48960) at layer 6 have been moved from (632500, 29920).\n", - "[WARNING PSM-0024] Instance input66, current node at (641280, 48960) at layer 6 have been moved from (645380, 21760).\n", - "[WARNING PSM-0024] Instance output67, current node at (45440, 538560) at layer 6 have been moved from (30360, 527680).\n", - "[WARNING PSM-0024] Instance output68, current node at (45440, 484160) at layer 6 have been moved from (30360, 478720).\n", - "[WARNING PSM-0024] Instance output69, current node at (45440, 511360) at layer 6 have been moved from (30360, 497760).\n", - "[WARNING PSM-0024] Instance output70, current node at (45440, 538560) at layer 6 have been moved from (30820, 546720).\n", - "[WARNING PSM-0024] Instance output96, current node at (574080, 48960) at layer 6 have been moved from (569480, 21760).\n", - "[WARNING PSM-0024] Instance output97, current node at (574080, 48960) at layer 6 have been moved from (575000, 21760).\n", - "[WARNING PSM-0024] Instance output98, current node at (540480, 48960) at layer 6 have been moved from (540500, 21760).\n", - "[WARNING PSM-0024] Instance output99, current node at (551680, 48960) at layer 6 have been moved from (547860, 21760).\n", - "[WARNING PSM-0024] Instance output100, current node at (529280, 48960) at layer 6 have been moved from (528540, 21760).\n", - "[WARNING PSM-0024] Instance output101, current node at (529280, 48960) at layer 6 have been moved from (531300, 21760).\n", - "[WARNING PSM-0024] Instance output103, current node at (529280, 48960) at layer 6 have been moved from (532680, 21760).\n", - "[WARNING PSM-0024] Instance output104, current node at (529280, 48960) at layer 6 have been moved from (526700, 24480).\n", - "[WARNING PSM-0024] Instance output112, current node at (641280, 48960) at layer 6 have been moved from (646760, 21760).\n", - "[WARNING PSM-0024] Instance output114, current node at (45440, 511360) at layer 6 have been moved from (29900, 519520).\n", - "[WARNING PSM-0024] Instance output115, current node at (45440, 511360) at layer 6 have been moved from (30360, 508640).\n", - "[WARNING PSM-0024] Instance output116, current node at (45440, 484160) at layer 6 have been moved from (29900, 489600).\n", - "[WARNING PSM-0024] Instance output117, current node at (45440, 538560) at layer 6 have been moved from (30360, 538560).\n", - "[WARNING PSM-0024] Instance output118, current node at (428480, 48960) at layer 6 have been moved from (429640, 32640).\n", - "[WARNING PSM-0024] Instance output119, current node at (775680, 48960) at layer 6 have been moved from (779700, 32640).\n", - "[WARNING PSM-0024] Instance output120, current node at (338880, 48960) at layer 6 have been moved from (340400, 32640).\n", - "[WARNING PSM-0024] Instance output121, current node at (607680, 48960) at layer 6 have been moved from (609960, 29920).\n", - "[WARNING PSM-0024] Instance output122, current node at (473280, 48960) at layer 6 have been moved from (469660, 32640).\n", - "[WARNING PSM-0024] Instance output123, current node at (361280, 48960) at layer 6 have been moved from (363860, 27200).\n", - "[WARNING PSM-0024] Instance output124, current node at (809280, 48960) at layer 6 have been moved from (809600, 29920).\n", - "[WARNING PSM-0024] Instance output125, current node at (798080, 48960) at layer 6 have been moved from (797180, 21760).\n", - "[WARNING PSM-0024] Instance hold38, current node at (630080, 48960) at layer 6 have been moved from (627900, 21760).\n", - "[WARNING PSM-0024] Instance hold46, current node at (630080, 48960) at layer 6 have been moved from (635260, 21760).\n", - "[WARNING PSM-0024] Instance hold50, current node at (607680, 48960) at layer 6 have been moved from (603980, 21760).\n", - "[WARNING PSM-0024] Instance hold53, current node at (641280, 48960) at layer 6 have been moved from (641700, 21760).\n", - "[WARNING PSM-0024] Instance hold56, current node at (596480, 48960) at layer 6 have been moved from (600300, 21760).\n", - "[WARNING PSM-0024] Instance hold58, current node at (641280, 48960) at layer 6 have been moved from (637100, 24480).\n", - "[WARNING PSM-0024] Instance hold68, current node at (618880, 48960) at layer 6 have been moved from (620080, 21760).\n", - "[WARNING PSM-0024] Instance hold79, current node at (618880, 48960) at layer 6 have been moved from (616400, 21760).\n", - "[WARNING PSM-0024] Instance hold81, current node at (618880, 48960) at layer 6 have been moved from (623760, 21760).\n", - "[WARNING PSM-0024] Instance hold82, current node at (518080, 48960) at layer 6 have been moved from (523020, 21760).\n", - "[WARNING PSM-0024] Instance hold87, current node at (596480, 48960) at layer 6 have been moved from (596160, 21760).\n", - "[WARNING PSM-0024] Instance hold90, current node at (630080, 48960) at layer 6 have been moved from (631580, 21760).\n", - "[WARNING PSM-0024] Instance hold93, current node at (641280, 48960) at layer 6 have been moved from (640780, 24480).\n", - "[WARNING PSM-0024] Instance hold95, current node at (607680, 48960) at layer 6 have been moved from (607660, 21760).\n", - "[WARNING PSM-0024] Instance hold96, current node at (630080, 48960) at layer 6 have been moved from (633420, 24480).\n", - "[WARNING PSM-0024] Instance ANTENNA_49, current node at (809280, 48960) at layer 6 have been moved from (808680, 29920).\n", - "[WARNING PSM-0024] Instance ANTENNA_50, current node at (361280, 48960) at layer 6 have been moved from (362940, 27200).\n", - "[WARNING PSM-0024] Instance ANTENNA_52, current node at (338880, 48960) at layer 6 have been moved from (339480, 32640).\n", - "[WARNING PSM-0024] Instance ANTENNA_58, current node at (529280, 48960) at layer 6 have been moved from (527620, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_62, current node at (574080, 48960) at layer 6 have been moved from (574080, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_63, current node at (574080, 48960) at layer 6 have been moved from (568560, 21760).\n", - "[WARNING PSM-0024] Instance ANTENNA_72, current node at (45440, 511360) at layer 6 have been moved from (29900, 505920).\n", - "[WARNING PSM-0024] Instance ANTENNA_74, current node at (45440, 511360) at layer 6 have been moved from (28980, 505920).\n", - "[WARNING PSM-0024] Instance ANTENNA_76, current node at (45440, 511360) at layer 6 have been moved from (28060, 505920).\n", - "[INFO PSM-0064] Number of voltage sources = 8.\n", - "[INFO PSM-0040] All PDN stripes on net VDD are connected.\n", - "########## IR report #################\n", - "Corner: default\n", - "Worstcase voltage: 1.79e+00 V\n", - "Average IR drop : 2.63e-03 V\n", - "Worstcase IR drop: 5.84e-03 V\n", - "######################################\n", - "[INFO PSM-0022] Using 0.000V for VSS\n", - "[WARNING PSM-0016] Voltage pad location (VSRC) file not specified, defaulting pad location to checkerboard pattern on core area.\n", - "[WARNING PSM-0017] X direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0018] Y direction bump pitch is not specified, defaulting to 140um.\n", - "[WARNING PSM-0065] VSRC location not specified, using default checkerboard pattern with one VDD every size bumps in x-direction and one in two bumps in the y-direction\n", - "[INFO PSM-0076] Setting metal node density to be standard cell height times 5.\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (132.240um, 144.160um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 150.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (938.640um, 144.160um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 290.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (401.040um, 280.160um).\n", - "[WARNING PSM-0030] VSRC location at (670.070um, 430.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (669.840um, 443.360um).\n", - "[WARNING PSM-0030] VSRC location at (110.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (132.240um, 579.360um).\n", - "[WARNING PSM-0030] VSRC location at (950.070um, 570.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (938.640um, 579.360um).\n", - "[WARNING PSM-0030] VSRC location at (390.070um, 710.480um) and size 10.000um, is not located on an existing power stripe node. Moving to closest node at (401.040um, 715.360um).\n", - "[INFO PSM-0031] Number of PDN nodes on net VSS = 4567.\n", - "[WARNING PSM-0024] Instance input1, current node at (625040, 960160) at layer 6 have been moved from (627900, 976480).\n", - "[WARNING PSM-0024] Instance input4, current node at (647440, 960160) at layer 6 have been moved from (650900, 976480).\n", - "[WARNING PSM-0024] Instance input6, current node at (658640, 960160) at layer 6 have been moved from (655500, 976480).\n", - "[WARNING PSM-0024] Instance input8, current node at (647440, 960160) at layer 6 have been moved from (645840, 976480).\n", - "[WARNING PSM-0024] Instance input11, current node at (658640, 960160) at layer 6 have been moved from (661480, 976480).\n", - "[WARNING PSM-0024] Instance input12, current node at (625040, 960160) at layer 6 have been moved from (623300, 976480).\n", - "[WARNING PSM-0024] Instance input25, current node at (636240, 960160) at layer 6 have been moved from (641700, 976480).\n", - "[WARNING PSM-0024] Instance input26, current node at (613840, 960160) at layer 6 have been moved from (614100, 976480).\n", - "[WARNING PSM-0024] Instance input27, current node at (636240, 960160) at layer 6 have been moved from (632040, 976480).\n", - "[WARNING PSM-0024] Instance output113, current node at (625040, 960160) at layer 6 have been moved from (621920, 976480).\n", - "[WARNING PSM-0024] Instance hold52, current node at (636240, 960160) at layer 6 have been moved from (636180, 976480).\n", - "[INFO PSM-0064] Number of voltage sources = 8.\n", - "[INFO PSM-0040] All PDN stripes on net VSS are connected.\n", - "########## IR report #################\n", - "Corner: default\n", - "Worstcase voltage: 7.15e-03 V\n", - "Average IR drop : 2.71e-03 V\n", - "Worstcase IR drop: 7.15e-03 V\n", - "######################################\n", - "\n", - "==========================================================================\n", - "finish check_setup\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish report_tns\n", - "--------------------------------------------------------------------------\n", - "tns 0.00\n", - "\n", - "==========================================================================\n", - "finish report_wns\n", - "--------------------------------------------------------------------------\n", - "wns 0.00\n", - "\n", - "==========================================================================\n", - "finish report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack 3.60\n", - "\n", - "==========================================================================\n", - "finish report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "Latency CRPR Skew\n", - "riscv/dp/_1151_/CLK ^\n", - " 0.71\n", - "riscv/dp/rf/_5652_/CLK ^\n", - " 0.81 0.00 -0.10\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1152_ (removal check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ riscv/dp/_1152_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.22 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_46_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.13 0.71 ^ clkbuf_leaf_46_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_46_clk (net)\n", - " 0.04 0.00 0.71 ^ riscv/dp/_1152_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 0.71 clock reconvergence pessimism\n", - " 0.32 1.03 library removal time\n", - " 1.03 data required time\n", - "-----------------------------------------------------------------------------\n", - " 1.03 data required time\n", - " -2.22 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 1.19 slack (MET)\n", - "\n", - "\n", - "Startpoint: inter_dmem0[3] (input port clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5281_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 ^ input external delay\n", - " 1 0.00 0.00 0.00 0.38 ^ inter_dmem0[3] (in)\n", - " inter_dmem0[3] (net)\n", - " 0.00 0.00 0.38 ^ input36/A (sky130_fd_sc_hd__dlymetal6s2s_1)\n", - " 1 0.00 0.07 0.09 0.47 ^ input36/X (sky130_fd_sc_hd__dlymetal6s2s_1)\n", - " net36 (net)\n", - " 0.07 0.00 0.47 ^ _130_/A2 (sky130_fd_sc_hd__a22oi_2)\n", - " 1 0.00 0.04 0.08 0.55 v _130_/Y (sky130_fd_sc_hd__a22oi_2)\n", - " _039_ (net)\n", - " 0.04 0.00 0.55 v _131_/B1 (sky130_fd_sc_hd__o21ai_2)\n", - " 1 0.00 0.04 0.05 0.59 ^ _131_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " dmem_communicate.mem_out[3] (net)\n", - " 0.04 0.00 0.59 ^ riscv/dp/_0596_/A_N (sky130_fd_sc_hd__nand2b_4)\n", - " 1 0.01 0.05 0.12 0.71 ^ riscv/dp/_0596_/Y (sky130_fd_sc_hd__nand2b_4)\n", - " riscv/dp/_0242_ (net)\n", - " 0.05 0.00 0.71 ^ riscv/dp/_0597_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.01 0.05 0.08 0.78 v riscv/dp/_0597_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0243_ (net)\n", - " 0.05 0.00 0.78 v riscv/dp/_0598_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 31 0.06 0.20 0.16 0.95 ^ riscv/dp/_0598_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/storepcmux.y[3] (net)\n", - " 0.20 0.00 0.95 ^ riscv/dp/rf/_4197_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.03 0.15 1.10 ^ riscv/dp/rf/_4197_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0547_ (net)\n", - " 0.03 0.00 1.10 ^ riscv/dp/rf/_5281_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 1.10 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_1__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 11 0.02 0.09 0.16 0.59 ^ clkbuf_3_1__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_1__leaf_clk (net)\n", - " 0.09 0.00 0.59 ^ clkbuf_leaf_69_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 22 0.04 0.13 0.21 0.81 ^ clkbuf_leaf_69_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_69_clk (net)\n", - " 0.13 0.00 0.81 ^ riscv/dp/rf/_5281_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 0.81 clock reconvergence pessimism\n", - " -0.02 0.79 library hold time\n", - " 0.79 data required time\n", - "-----------------------------------------------------------------------------\n", - " 0.79 data required time\n", - " -1.10 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 0.31 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1131_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.10 0.12 0.15 2.37 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.12 0.00 2.37 ^ riscv/dp/_1131_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.37 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_48_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.14 13.23 ^ clkbuf_leaf_48_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_48_clk (net)\n", - " 0.04 0.00 13.23 ^ riscv/dp/_1131_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 13.23 clock reconvergence pessimism\n", - " 0.19 13.42 library recovery time\n", - " 13.42 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.42 data required time\n", - " -2.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.05 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1140_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5120_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.02 0.06 0.16 0.74 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.06 0.00 0.74 ^ riscv/dp/_1140_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.02 0.07 0.50 1.23 v riscv/dp/_1140_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net81 (net)\n", - " 0.07 0.00 1.23 v _056_/A (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.27 0.32 1.55 ^ _056_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _007_ (net)\n", - " 0.27 0.00 1.55 ^ _059_/B (sky130_fd_sc_hd__nand4_2)\n", - " 1 0.01 0.15 0.19 1.74 v _059_/Y (sky130_fd_sc_hd__nand4_2)\n", - " _010_ (net)\n", - " 0.15 0.00 1.74 v rebuffer15/A (sky130_fd_sc_hd__buf_16)\n", - " 8 0.03 0.04 0.18 1.93 v rebuffer15/X (sky130_fd_sc_hd__buf_16)\n", - " net468 (net)\n", - " 0.04 0.00 1.93 v _073_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 11 0.06 0.46 0.38 2.30 ^ _073_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[5] (net)\n", - " 0.46 0.00 2.31 ^ riscv/_088_/C (sky130_fd_sc_hd__and3b_2)\n", - " 5 0.02 0.13 0.33 2.63 ^ riscv/_088_/X (sky130_fd_sc_hd__and3b_2)\n", - " riscv/_038_ (net)\n", - " 0.13 0.00 2.63 ^ riscv/_110_/B (sky130_fd_sc_hd__and3_4)\n", - " 56 0.35 0.99 0.87 3.50 ^ riscv/_110_/X (sky130_fd_sc_hd__and3_4)\n", - " riscv/c.imm[1] (net)\n", - " 0.99 0.02 3.53 ^ riscv/dp/_0783_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.00 0.09 0.66 4.19 v riscv/dp/_0783_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/_0372_ (net)\n", - " 0.09 0.00 4.19 v riscv/dp/_0784_/B (sky130_fd_sc_hd__nand2b_2)\n", - " 2 0.02 0.11 0.13 4.32 ^ riscv/dp/_0784_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0373_ (net)\n", - " 0.11 0.00 4.32 ^ riscv/dp/_0785_/B (sky130_fd_sc_hd__nor2_4)\n", - " 2 0.01 0.12 0.04 4.36 v riscv/dp/_0785_/Y (sky130_fd_sc_hd__nor2_4)\n", - " riscv/dp/memsrcmux.d1[0] (net)\n", - " 0.12 0.00 4.36 v riscv/dp/_0938_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.10 0.13 4.50 ^ riscv/dp/_0938_/Y (sky130_fd_sc_hd__nand2_1)\n", - " riscv/dp/_0012_ (net)\n", - " 0.10 0.00 4.50 ^ riscv/dp/_0939_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 6 0.05 0.12 0.13 4.63 v riscv/dp/_0939_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/memsrcmux.y[0] (net)\n", - " 0.12 0.00 4.63 v load_slew140/A (sky130_fd_sc_hd__buf_12)\n", - " 21 0.10 0.06 0.19 4.82 v load_slew140/X (sky130_fd_sc_hd__buf_12)\n", - " net140 (net)\n", - " 0.06 0.00 4.83 v riscv/dp/alu/_736_/S (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.07 0.34 5.16 v riscv/dp/alu/_736_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/alu/_163_ (net)\n", - " 0.07 0.00 5.16 v riscv/dp/alu/_741_/B (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.52 5.68 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 5.68 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.01 0.22 0.29 5.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.22 0.00 5.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.01 0.08 0.11 6.08 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.08 0.00 6.08 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.01 0.19 0.23 6.31 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.19 0.00 6.31 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.01 0.09 0.21 6.52 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.09 0.00 6.52 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.06 0.06 6.59 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.06 0.00 6.59 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.15 0.20 6.79 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.15 0.00 6.79 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.00 0.07 0.20 6.99 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 6.99 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.23 0.22 7.21 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.23 0.00 7.21 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.10 0.14 7.35 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 7.35 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.00 0.03 0.24 7.60 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.03 0.00 7.60 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.05 0.11 0.35 7.94 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.11 0.00 7.95 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.13 0.17 8.12 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.13 0.00 8.12 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.00 0.05 0.07 8.19 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.05 0.00 8.19 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 8.73 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.05 0.00 8.73 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.01 0.06 0.19 8.91 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.06 0.00 8.92 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.00 0.13 0.07 8.99 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.13 0.00 8.99 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.13 0.12 9.11 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.13 0.00 9.11 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.05 0.04 0.18 9.29 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.04 0.00 9.29 v riscv/dp/rf/_4015_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.28 9.56 v riscv/dp/rf/_4015_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0386_ (net)\n", - " 0.05 0.00 9.56 v riscv/dp/rf/_5120_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 9.56 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.02 0.09 0.18 13.26 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.09 0.00 13.27 ^ riscv/dp/rf/_5120_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 13.27 clock reconvergence pessimism\n", - " -0.10 13.16 library setup time\n", - " 13.16 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.16 data required time\n", - " -9.56 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 3.60 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: reset (input port clocked by clk)\n", - "Endpoint: riscv/dp/_1131_ (recovery check against rising-edge clock clk)\n", - "Path Group: asynchronous\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 0.38 0.38 v input external delay\n", - " 1 0.00 0.00 0.00 0.38 v reset (in)\n", - " reset (net)\n", - " 0.00 0.00 0.38 v hold65/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.53 0.90 v hold65/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net558 (net)\n", - " 0.05 0.00 0.90 v hold33/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.03 0.23 1.13 v hold33/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net486 (net)\n", - " 0.03 0.00 1.13 v hold66/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 1.67 v hold66/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net559 (net)\n", - " 0.05 0.00 1.67 v hold30/A (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " 1 0.00 0.04 0.24 1.91 v hold30/X (sky130_fd_sc_hd__clkdlybuf4s25_1)\n", - " net483 (net)\n", - " 0.04 0.00 1.91 v input65/A (sky130_fd_sc_hd__clkbuf_2)\n", - " 1 0.00 0.02 0.09 2.00 v input65/X (sky130_fd_sc_hd__clkbuf_2)\n", - " net65 (net)\n", - " 0.02 0.00 2.00 v hold31/A (sky130_fd_sc_hd__buf_4)\n", - " 1 0.04 0.06 0.16 2.16 v hold31/X (sky130_fd_sc_hd__buf_4)\n", - " net484 (net)\n", - " 0.06 0.00 2.16 v riscv/dp/_1129_/A (sky130_fd_sc_hd__clkinv_16)\n", - " 5 0.03 0.03 0.06 2.22 ^ riscv/dp/_1129_/Y (sky130_fd_sc_hd__clkinv_16)\n", - " riscv/dp/_0000_ (net)\n", - " 0.03 0.00 2.22 ^ hold32/A (sky130_fd_sc_hd__buf_16)\n", - " 28 0.10 0.12 0.15 2.37 ^ hold32/X (sky130_fd_sc_hd__buf_16)\n", - " net485 (net)\n", - " 0.12 0.00 2.37 ^ riscv/dp/_1131_/RESET_B (sky130_fd_sc_hd__dfrtp_4)\n", - " 2.37 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_2_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_2_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_2_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_2_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_2_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_5__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_5__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_5__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_48_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 4 0.01 0.04 0.14 13.23 ^ clkbuf_leaf_48_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_48_clk (net)\n", - " 0.04 0.00 13.23 ^ riscv/dp/_1131_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 0.00 13.23 clock reconvergence pessimism\n", - " 0.19 13.42 library recovery time\n", - " 13.42 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.42 data required time\n", - " -2.37 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 11.05 slack (MET)\n", - "\n", - "\n", - "Startpoint: riscv/dp/_1140_ (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: riscv/dp/rf/_5120_ (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.00 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 0.10 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 0.10 ^ clkbuf_1_1_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.21 ^ clkbuf_1_1_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_1_0_clk (net)\n", - " 0.03 0.00 0.21 ^ clkbuf_2_3_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 0.32 ^ clkbuf_2_3_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_0_clk (net)\n", - " 0.03 0.00 0.32 ^ clkbuf_2_3_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 0.43 ^ clkbuf_2_3_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_3_1_clk (net)\n", - " 0.03 0.00 0.43 ^ clkbuf_3_7__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 8 0.02 0.07 0.15 0.58 ^ clkbuf_3_7__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_7__leaf_clk (net)\n", - " 0.07 0.00 0.58 ^ clkbuf_leaf_45_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 9 0.02 0.06 0.16 0.74 ^ clkbuf_leaf_45_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_45_clk (net)\n", - " 0.06 0.00 0.74 ^ riscv/dp/_1140_/CLK (sky130_fd_sc_hd__dfrtp_4)\n", - " 5 0.02 0.07 0.50 1.23 v riscv/dp/_1140_/Q (sky130_fd_sc_hd__dfrtp_4)\n", - " net81 (net)\n", - " 0.07 0.00 1.23 v _056_/A (sky130_fd_sc_hd__nor4_1)\n", - " 1 0.00 0.27 0.32 1.55 ^ _056_/Y (sky130_fd_sc_hd__nor4_1)\n", - " _007_ (net)\n", - " 0.27 0.00 1.55 ^ _059_/B (sky130_fd_sc_hd__nand4_2)\n", - " 1 0.01 0.15 0.19 1.74 v _059_/Y (sky130_fd_sc_hd__nand4_2)\n", - " _010_ (net)\n", - " 0.15 0.00 1.74 v rebuffer15/A (sky130_fd_sc_hd__buf_16)\n", - " 8 0.03 0.04 0.18 1.93 v rebuffer15/X (sky130_fd_sc_hd__buf_16)\n", - " net468 (net)\n", - " 0.04 0.00 1.93 v _073_/A2 (sky130_fd_sc_hd__o21ai_4)\n", - " 11 0.06 0.46 0.38 2.30 ^ _073_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " pcmux.y[5] (net)\n", - " 0.46 0.00 2.31 ^ riscv/_088_/C (sky130_fd_sc_hd__and3b_2)\n", - " 5 0.02 0.13 0.33 2.63 ^ riscv/_088_/X (sky130_fd_sc_hd__and3b_2)\n", - " riscv/_038_ (net)\n", - " 0.13 0.00 2.63 ^ riscv/_110_/B (sky130_fd_sc_hd__and3_4)\n", - " 56 0.35 0.99 0.87 3.50 ^ riscv/_110_/X (sky130_fd_sc_hd__and3_4)\n", - " riscv/c.imm[1] (net)\n", - " 0.99 0.02 3.53 ^ riscv/dp/_0783_/S0 (sky130_fd_sc_hd__mux4_1)\n", - " 1 0.00 0.09 0.66 4.19 v riscv/dp/_0783_/X (sky130_fd_sc_hd__mux4_1)\n", - " riscv/dp/_0372_ (net)\n", - " 0.09 0.00 4.19 v riscv/dp/_0784_/B (sky130_fd_sc_hd__nand2b_2)\n", - " 2 0.02 0.11 0.13 4.32 ^ riscv/dp/_0784_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0373_ (net)\n", - " 0.11 0.00 4.32 ^ riscv/dp/_0785_/B (sky130_fd_sc_hd__nor2_4)\n", - " 2 0.01 0.12 0.04 4.36 v riscv/dp/_0785_/Y (sky130_fd_sc_hd__nor2_4)\n", - " riscv/dp/memsrcmux.d1[0] (net)\n", - " 0.12 0.00 4.36 v riscv/dp/_0938_/B (sky130_fd_sc_hd__nand2_1)\n", - " 1 0.01 0.10 0.13 4.50 ^ riscv/dp/_0938_/Y (sky130_fd_sc_hd__nand2_1)\n", - " riscv/dp/_0012_ (net)\n", - " 0.10 0.00 4.50 ^ riscv/dp/_0939_/B1 (sky130_fd_sc_hd__o21ai_4)\n", - " 6 0.05 0.12 0.13 4.63 v riscv/dp/_0939_/Y (sky130_fd_sc_hd__o21ai_4)\n", - " riscv/dp/memsrcmux.y[0] (net)\n", - " 0.12 0.00 4.63 v load_slew140/A (sky130_fd_sc_hd__buf_12)\n", - " 21 0.10 0.06 0.19 4.82 v load_slew140/X (sky130_fd_sc_hd__buf_12)\n", - " net140 (net)\n", - " 0.06 0.00 4.83 v riscv/dp/alu/_736_/S (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.01 0.07 0.34 5.16 v riscv/dp/alu/_736_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/alu/_163_ (net)\n", - " 0.07 0.00 5.16 v riscv/dp/alu/_741_/B (sky130_fd_sc_hd__fa_4)\n", - " 3 0.02 0.11 0.52 5.68 v riscv/dp/alu/_741_/COUT (sky130_fd_sc_hd__fa_4)\n", - " riscv/dp/alu/_165_ (net)\n", - " 0.11 0.00 5.68 v riscv/dp/alu/_528_/A2 (sky130_fd_sc_hd__a211oi_4)\n", - " 2 0.01 0.22 0.29 5.98 ^ riscv/dp/alu/_528_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_028_ (net)\n", - " 0.22 0.00 5.98 ^ riscv/dp/alu/_531_/A2 (sky130_fd_sc_hd__o211ai_4)\n", - " 2 0.01 0.08 0.11 6.08 v riscv/dp/alu/_531_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/alu/_031_ (net)\n", - " 0.08 0.00 6.08 v riscv/dp/alu/_543_/A1 (sky130_fd_sc_hd__a211oi_4)\n", - " 3 0.01 0.19 0.23 6.31 ^ riscv/dp/alu/_543_/Y (sky130_fd_sc_hd__a211oi_4)\n", - " riscv/dp/alu/_043_ (net)\n", - " 0.19 0.00 6.31 ^ riscv/dp/alu/_674_/A1 (sky130_fd_sc_hd__o31a_2)\n", - " 3 0.01 0.09 0.21 6.52 ^ riscv/dp/alu/_674_/X (sky130_fd_sc_hd__o31a_2)\n", - " riscv/dp/alu/_225_ (net)\n", - " 0.09 0.00 6.52 ^ riscv/dp/alu/_690_/A2 (sky130_fd_sc_hd__o21ai_2)\n", - " 2 0.01 0.06 0.06 6.59 v riscv/dp/alu/_690_/Y (sky130_fd_sc_hd__o21ai_2)\n", - " riscv/dp/alu/_152_ (net)\n", - " 0.06 0.00 6.59 v riscv/dp/alu/_698_/A3 (sky130_fd_sc_hd__a31oi_2)\n", - " 1 0.01 0.15 0.20 6.79 ^ riscv/dp/alu/_698_/Y (sky130_fd_sc_hd__a31oi_2)\n", - " riscv/dp/alu/_240_ (net)\n", - " 0.15 0.00 6.79 ^ riscv/dp/alu/_756_/B (sky130_fd_sc_hd__fa_1)\n", - " 1 0.00 0.07 0.20 6.99 ^ riscv/dp/alu/_756_/COUT (sky130_fd_sc_hd__fa_1)\n", - " riscv/dp/alu/_242_ (net)\n", - " 0.07 0.00 6.99 ^ riscv/dp/alu/_702_/A (sky130_fd_sc_hd__xor2_1)\n", - " 1 0.01 0.23 0.22 7.21 ^ riscv/dp/alu/_702_/X (sky130_fd_sc_hd__xor2_1)\n", - " riscv/dp/alu/_159_ (net)\n", - " 0.23 0.00 7.21 ^ riscv/dp/alu/_704_/B1 (sky130_fd_sc_hd__o221ai_4)\n", - " 2 0.01 0.10 0.14 7.35 v riscv/dp/alu/_704_/Y (sky130_fd_sc_hd__o221ai_4)\n", - " riscv/dp/srccmux.d0[31] (net)\n", - " 0.10 0.00 7.35 v rebuffer39/A (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " 1 0.00 0.03 0.24 7.60 v rebuffer39/X (sky130_fd_sc_hd__dlygate4sd1_1)\n", - " net557 (net)\n", - " 0.03 0.00 7.60 v clone37/A0 (sky130_fd_sc_hd__mux2_4)\n", - " 11 0.05 0.11 0.35 7.94 v clone37/X (sky130_fd_sc_hd__mux2_4)\n", - " net555 (net)\n", - " 0.11 0.00 7.95 v _127_/A1 (sky130_fd_sc_hd__a22oi_1)\n", - " 1 0.00 0.13 0.17 8.12 ^ _127_/Y (sky130_fd_sc_hd__a22oi_1)\n", - " _037_ (net)\n", - " 0.13 0.00 8.12 ^ _128_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.00 0.05 0.07 8.19 v _128_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " dmem_communicate.mem_out[2] (net)\n", - " 0.05 0.00 8.19 v hold98/A (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " 1 0.00 0.05 0.54 8.73 v hold98/X (sky130_fd_sc_hd__dlygate4sd3_1)\n", - " net574 (net)\n", - " 0.05 0.00 8.73 v riscv/dp/_0591_/A_N (sky130_fd_sc_hd__nand2b_2)\n", - " 1 0.01 0.06 0.19 8.91 v riscv/dp/_0591_/Y (sky130_fd_sc_hd__nand2b_2)\n", - " riscv/dp/_0239_ (net)\n", - " 0.06 0.00 8.92 v riscv/dp/_0592_/B1 (sky130_fd_sc_hd__o211ai_4)\n", - " 1 0.00 0.13 0.07 8.99 ^ riscv/dp/_0592_/Y (sky130_fd_sc_hd__o211ai_4)\n", - " riscv/dp/_0240_ (net)\n", - " 0.13 0.00 8.99 ^ riscv/dp/_0593_/B1 (sky130_fd_sc_hd__o21ai_1)\n", - " 1 0.01 0.13 0.12 9.11 v riscv/dp/_0593_/Y (sky130_fd_sc_hd__o21ai_1)\n", - " riscv/dp/storepcmux.y[2] (net)\n", - " 0.13 0.00 9.11 v wire2/A (sky130_fd_sc_hd__buf_12)\n", - " 31 0.05 0.04 0.18 9.29 v wire2/X (sky130_fd_sc_hd__buf_12)\n", - " net478 (net)\n", - " 0.04 0.00 9.29 v riscv/dp/rf/_4015_/A1 (sky130_fd_sc_hd__mux2_1)\n", - " 1 0.00 0.05 0.28 9.56 v riscv/dp/rf/_4015_/X (sky130_fd_sc_hd__mux2_1)\n", - " riscv/dp/rf/_0386_ (net)\n", - " 0.05 0.00 9.56 v riscv/dp/rf/_5120_/D (sky130_fd_sc_hd__dfxtp_1)\n", - " 9.56 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock source latency\n", - " 1 0.00 0.00 0.00 12.50 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 12.50 ^ clkbuf_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.10 12.60 ^ clkbuf_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_0_clk (net)\n", - " 0.03 0.00 12.60 ^ clkbuf_1_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.71 ^ clkbuf_1_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_1_0_0_clk (net)\n", - " 0.03 0.00 12.71 ^ clkbuf_2_0_0_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 1 0.00 0.03 0.11 12.82 ^ clkbuf_2_0_0_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_0_clk (net)\n", - " 0.03 0.00 12.82 ^ clkbuf_2_0_1_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 2 0.00 0.03 0.11 12.93 ^ clkbuf_2_0_1_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_2_0_1_clk (net)\n", - " 0.03 0.00 12.93 ^ clkbuf_3_0__f_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 10 0.02 0.08 0.16 13.09 ^ clkbuf_3_0__f_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_3_0__leaf_clk (net)\n", - " 0.08 0.00 13.09 ^ clkbuf_leaf_2_clk/A (sky130_fd_sc_hd__clkbuf_4)\n", - " 13 0.02 0.09 0.18 13.26 ^ clkbuf_leaf_2_clk/X (sky130_fd_sc_hd__clkbuf_4)\n", - " clknet_leaf_2_clk (net)\n", - " 0.09 0.00 13.27 ^ riscv/dp/rf/_5120_/CLK (sky130_fd_sc_hd__dfxtp_1)\n", - " 0.00 13.27 clock reconvergence pessimism\n", - " -0.10 13.16 library setup time\n", - " 13.16 data required time\n", - "-----------------------------------------------------------------------------\n", - " 13.16 data required time\n", - " -9.56 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 3.60 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.5127852559089661\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.5\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.3419\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.02627899870276451\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.031137999147176743\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8440\n", - "\n", - "==========================================================================\n", - "finish max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "finish setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 0\n", - "\n", - "==========================================================================\n", - "finish hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "finish critical path delay\n", - "--------------------------------------------------------------------------\n", - "9.5638\n", - "\n", - "==========================================================================\n", - "finish critical path slack\n", - "--------------------------------------------------------------------------\n", - "3.5983\n", - "\n", - "==========================================================================\n", - "finish slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "37.624166\n", - "\n", - "==========================================================================\n", - "finish report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 3.36e-03 0.00e+00 8.53e-09 3.36e-03 59.4%\n", - "Combinational 7.10e-04 6.60e-04 2.54e-08 1.37e-03 24.2%\n", - "Clock 3.63e-04 5.70e-04 4.51e-10 9.33e-04 16.5%\n", - "Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 4.44e-03 1.23e-03 3.43e-08 5.67e-03 100.0%\n", - " 78.3% 21.7% 0.0%\n", - "\n", - "==========================================================================\n", - "finish report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 98795 u^2 9% utilization.\n", - "\n", - "[WARNING GUI-0076] QStandardPaths: XDG_RUNTIME_DIR not set, defaulting to '/tmp/runtime-root'\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_routing.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_placement.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_ir_drop.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_clocks.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/final_resizer.webp.png\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/130_180/riscv32i_3d/80MHz/cts_clk.webp.png\n", - "Elapsed time: 0:25.45[h:]min:sec. CPU time: user 24.82 sys 0.46 (99%). Peak memory: 816928KB.\n", - "cp ./results/130_180/riscv32i_3d/80MHz/5_route.sdc ./results/130_180/riscv32i_3d/80MHz/6_final.sdc\n", - "cp /Flow/platforms/130_180/lef/sky130_fd_sc_hd.tlef ./objects/130_180/riscv32i_3d/80MHz/klayout_tech.lef\n", - "sed 's,.*,../../../../objects/130_180/riscv32i_3d/80MHz/klayout_tech.lef ../../../../platforms/130_180/lef/sky130_fd_sc_hd_merged.lef,g' /Flow/platforms/130_180/130_180.lyt > ./objects/130_180/riscv32i_3d/80MHz/klayout.lyt\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' stdbuf -o L /usr/bin/klayout -zz -rd design_name=core_without_dmem \\\n", - " -rd in_def=./results/130_180/riscv32i_3d/80MHz/6_final.def \\\n", - " -rd in_files=\"/Flow/platforms/130_180/gds/sky130_fd_sc_hd.gds \" \\\n", - " -rd config_file=/Flow/platforms/130_180/fill.json \\\n", - " -rd seal_file=\"\" \\\n", - " -rd out_file=./results/130_180/riscv32i_3d/80MHz/6_1_merged.gds \\\n", - " -rd tech_file=./objects/130_180/riscv32i_3d/80MHz/klayout.lyt \\\n", - " -rd layer_map= \\\n", - " -r /Flow/util/def2stream.py) 2>&1 | tee ./logs/130_180/riscv32i_3d/80MHz/6_1_merge.log\n", - "[INFO] Reporting cells prior to loading DEF ...\n", - "[INFO] Reading DEF ...\n", - "[INFO] Clearing cells...\n", - "[INFO] Merging GDS/OAS files...\n", - "\t/Flow/platforms/130_180/gds/sky130_fd_sc_hd.gds\n", - "[INFO] Copying toplevel cell 'core_without_dmem'\n", - "INFO: Reading config file: /Flow/platforms/130_180/fill.json\n", - "[INFO] Checking for missing cell from GDS/OAS...\n", - "[INFO] All LEF cells have matching GDS/OAS cells\n", - "[INFO] Checking for orphan cell in the final layout...\n", - "[INFO] No orphan cells\n", - "[INFO] Writing out GDS/OAS './results/130_180/riscv32i_3d/80MHz/6_1_merged.gds'\n", - "Elapsed time: 0:03.68[h:]min:sec. CPU time: user 3.26 sys 0.37 (98%). Peak memory: 646528KB.\n", - "cp results/130_180/riscv32i_3d/80MHz/6_1_merged.gds results/130_180/riscv32i_3d/80MHz/6_final.gds\n", - "./logs/130_180/riscv32i_3d/80MHz\n", - "Log Elapsed seconds\n", - "1_1_yosys 14\n", - "1_1_yosys_hier_report 18\n", - "2_1_floorplan 1\n", - "3_1_place_gp_skip_io 2\n", - "3_3_place_gp 55\n", - "3_4_place_resized 4\n", - "3_5_place_dp 3\n", - "4_1_cts 35\n", - "5_1_grt 47\n", - "5_2_fillcell 1\n", - "5_3_route 105\n", - "6_1_merge 3\n", - "6_report 25\n", - "[INFO][FLOW] Invoked hierarchical flow.\n", - "Block gf180mcu_fd_ip_sram__sram256x8m8wm1 needs to be hardened.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "rm -f ./results/gf180/fakeram4/80MHz/1_*.v ./results/gf180/fakeram4/80MHz/1_synth.sdc\n", - "rm -f ./reports/gf180/fakeram4/80MHz/synth_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/1_*\n", - "rm -f ./objects/gf180/fakeram4/80MHz/mark_hier_stop_modules.tcl\n", - "rm -rf _tmp_yosys-abc-*\n", - "rm -f ./results/gf180/fakeram4/80MHz/2_*floorplan*.odb ./results/gf180/fakeram4/80MHz/2_floorplan.sdc ./results/gf180/fakeram4/80MHz/2_*.v ./results/gf180/fakeram4/80MHz/2_*.def\n", - "rm -f ./reports/gf180/fakeram4/80MHz/2_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/2_*\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_*place*.odb\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_place.sdc\n", - "rm -f ./results/gf180/fakeram4/80MHz/3_*.def ./results/gf180/fakeram4/80MHz/3_*.v\n", - "rm -f ./reports/gf180/fakeram4/80MHz/3_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/3_*\n", - "rm -rf ./results/gf180/fakeram4/80MHz/4_*cts*.odb ./results/gf180/fakeram4/80MHz/4_cts.sdc ./results/gf180/fakeram4/80MHz/4_*.v ./results/gf180/fakeram4/80MHz/4_*.def\n", - "rm -f ./reports/gf180/fakeram4/80MHz/4_*\n", - "rm -rf ./logs/gf180/fakeram4/80MHz/4_*\n", - "rm -rf output*/ results*.out.dmp layer_*.mps\n", - "rm -rf *.gdid *.log *.met *.sav *.res.dmp\n", - "rm -rf ./results/gf180/fakeram4/80MHz/route.guide ./results/gf180/fakeram4/80MHz/output_guide.mod ./results/gf180/fakeram4/80MHz/updated_clks.sdc\n", - "rm -rf ./results/gf180/fakeram4/80MHz/5_*.odb ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/5_*.def ./results/gf180/fakeram4/80MHz/5_*.v\n", - "rm -f ./reports/gf180/fakeram4/80MHz/5_*\n", - "rm -f ./logs/gf180/fakeram4/80MHz/5_*\n", - "rm -rf ./results/gf180/fakeram4/80MHz/6_*.gds ./results/gf180/fakeram4/80MHz/6_*.oas ./results/gf180/fakeram4/80MHz/6_*.odb ./results/gf180/fakeram4/80MHz/6_*.v ./results/gf180/fakeram4/80MHz/6_*.def ./results/gf180/fakeram4/80MHz/6_*.sdc ./results/gf180/fakeram4/80MHz/6_*.spef\n", - "rm -rf ./reports/gf180/fakeram4/80MHz/6_*.rpt\n", - "rm -f ./logs/gf180/fakeram4/80MHz/6_*\n", - "rm -f ./reports/gf180/fakeram4/80MHz/metadata-80MHz-check.log\n", - "rm -f ./reports/gf180/fakeram4/80MHz/metadata-80MHz.json\n", - "rm -f ./results/gf180/fakeram4/80MHz/dmem.lib ./results/gf180/fakeram4/80MHz/dmem.lef\n", - "rm -rf ./objects/gf180/fakeram4/80MHz\n", - "[INFO][FLOW] Invoked hierarchical flow.\n", - "Block gf180mcu_fd_ip_sram__sram256x8m8wm1 needs to be hardened.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "/Flow/util/markDontUse.py -p \"*_1\" -i /Flow/platforms/gf180/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib.gz -o objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "Opening file for replace: /Flow/platforms/gf180/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib.gz\n", - "Marked 62 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 12\n", - "Writing replaced file: objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "/Flow/util/markDontUse.py -p \"*_1\" -i designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib -o objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "Opening file for replace: designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "Marked 0 cells as dont_use\n", - "Commented 0 lines containing \"original_pin\"\n", - "Replaced malformed functions 0\n", - "Writing replaced file: objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "mkdir -p ./results/gf180/fakeram4/80MHz ./logs/gf180/fakeram4/80MHz ./reports/gf180/fakeram4/80MHz\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /home/dependency/oss-cad-suite/bin/yosys -v 3 -c /Flow/scripts/synth.tcl) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/1_1_yosys.log\n", - "1. Executing Verilog-2005 frontend: ./designs/src/riscv32i_3d/dmem_real\n", - "2. Executing Liberty frontend: ./objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_sc_mcu9t5v0__ff_n40C_5v50.lib\n", - "3. Executing Liberty frontend: ./objects/gf180/fakeram4/80MHz/lib/gf180mcu_fd_ip_sram__sram256x8m8wm1.lib\n", - "finish synth_preamble\n", - "4. Executing SYNTH pass.\n", - "4.1. Executing HIERARCHY pass (managing design hierarchy).\n", - "4.2. Executing AST frontend in derive mode using pre-parsed AST for module `\\dmem'.\n", - "./designs/src/riscv32i_3d/dmem_real:32: Warning: Range select [15:8] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "./designs/src/riscv32i_3d/dmem_real:34: Warning: Range select [23:16] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "./designs/src/riscv32i_3d/dmem_real:36: Warning: Range select [31:24] out of bounds on signal `\\dataadr': Setting all 8 result bits to undef.\n", - "4.2.1. Analyzing design hierarchy..\n", - "4.2.2. Analyzing design hierarchy..\n", - "4.3. Executing PROC pass (convert processes to netlists).\n", - "4.3.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "4.3.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n", - "4.3.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).\n", - "4.3.4. Executing PROC_INIT pass (extract init attributes).\n", - "4.3.5. Executing PROC_ARST pass (detect async resets in processes).\n", - "4.3.6. Executing PROC_ROM pass (convert switches to ROMs).\n", - "4.3.7. Executing PROC_MUX pass (convert decision trees to multiplexers).\n", - "4.3.8. Executing PROC_DLATCH pass (convert process syncs to latches).\n", - "4.3.9. Executing PROC_DFF pass (convert process syncs to FFs).\n", - "4.3.10. Executing PROC_MEMWR pass (convert process memory writes to cells).\n", - "4.3.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).\n", - "4.3.12. Executing OPT_EXPR pass (perform const folding).\n", - "4.4. Executing FLATTEN pass (flatten design).\n", - "4.5. Executing OPT_EXPR pass (perform const folding).\n", - "4.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.7. Executing CHECK pass (checking for obvious problems).\n", - "4.8. Executing OPT pass (performing simple optimizations).\n", - "4.8.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.8.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.8.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.8.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.8.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.8.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.8.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.8.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.8.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.9. Executing FSM pass (extract and optimize FSM).\n", - "4.9.1. Executing FSM_DETECT pass (finding FSMs in design).\n", - "4.9.2. Executing FSM_EXTRACT pass (extracting FSM from design).\n", - "4.9.3. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "4.9.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.9.5. Executing FSM_OPT pass (simple optimizations of FSMs).\n", - "4.9.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).\n", - "4.9.7. Executing FSM_INFO pass (dumping all available information on FSM cells).\n", - "4.9.8. Executing FSM_MAP pass (mapping FSMs to basic logic).\n", - "4.10. Executing OPT pass (performing simple optimizations).\n", - "4.10.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.10.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.10.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.10.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.10.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.10.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.10.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.10.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.10.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.11. Executing WREDUCE pass (reducing word size of cells).\n", - "4.12. Executing PEEPOPT pass (run peephole optimizers).\n", - "4.13. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.14. Executing ALUMACC pass (create $alu and $macc cells).\n", - "4.15. Executing SHARE pass (SAT-based resource sharing).\n", - "4.16. Executing OPT pass (performing simple optimizations).\n", - "4.16.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.16.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.16.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.16.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.16.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.16.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.16.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.16.8. Executing OPT_EXPR pass (perform const folding).\n", - "4.16.9. Finished OPT passes. (There is nothing left to do.)\n", - "4.17. Executing MEMORY pass.\n", - "4.17.1. Executing OPT_MEM pass (optimize memories).\n", - "4.17.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).\n", - "4.17.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).\n", - "4.17.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).\n", - "4.17.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).\n", - "4.17.6. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.17.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n", - "4.17.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).\n", - "4.17.9. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.17.10. Executing MEMORY_COLLECT pass (generating $mem cells).\n", - "4.18. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.19. Executing OPT pass (performing simple optimizations).\n", - "4.19.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.19.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.19.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.19.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.19.5. Finished fast OPT passes.\n", - "4.20. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).\n", - "4.21. Executing OPT pass (performing simple optimizations).\n", - "4.21.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.21.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.21.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "4.21.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "4.21.5. Executing OPT_MERGE pass (detect identical cells).\n", - "4.21.6. Executing OPT_SHARE pass.\n", - "4.21.7. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.21.8. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.21.9. Executing OPT_EXPR pass (perform const folding).\n", - "4.21.10. Finished OPT passes. (There is nothing left to do.)\n", - "4.22. Executing TECHMAP pass (map to technology primitives).\n", - "4.22.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "4.22.2. Continuing TECHMAP pass.\n", - "4.23. Executing OPT pass (performing simple optimizations).\n", - "4.23.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.23.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.23.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.23.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.23.5. Finished fast OPT passes.\n", - "4.24. Executing ABC pass (technology mapping using ABC).\n", - "4.24.1. Extracting gate netlist of module `\\dmem' to `/input.blif'..\n", - "4.25. Executing OPT pass (performing simple optimizations).\n", - "4.25.1. Executing OPT_EXPR pass (perform const folding).\n", - "4.25.2. Executing OPT_MERGE pass (detect identical cells).\n", - "4.25.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "4.25.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "4.25.5. Finished fast OPT passes.\n", - "4.26. Executing HIERARCHY pass (managing design hierarchy).\n", - "4.26.1. Analyzing design hierarchy..\n", - "4.26.2. Analyzing design hierarchy..\n", - "4.27. Printing statistics.\n", - "4.28. Executing CHECK pass (checking for obvious problems).\n", - "5. Executing OPT pass (performing simple optimizations).\n", - "5.1. Executing OPT_EXPR pass (perform const folding).\n", - "5.2. Executing OPT_MERGE pass (detect identical cells).\n", - "5.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "5.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "5.5. Executing OPT_MERGE pass (detect identical cells).\n", - "5.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "5.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "5.8. Executing OPT_EXPR pass (perform const folding).\n", - "5.9. Rerunning OPT passes. (Maybe there is more to do..)\n", - "5.10. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "5.11. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "5.12. Executing OPT_MERGE pass (detect identical cells).\n", - "5.13. Executing OPT_DFF pass (perform DFF optimizations).\n", - "5.14. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "5.15. Executing OPT_EXPR pass (perform const folding).\n", - "5.16. Finished OPT passes. (There is nothing left to do.)\n", - "6. Executing EXTRACT_FA pass (find and extract full/half adders).\n", - "7. Executing TECHMAP pass (map to technology primitives).\n", - "7.1. Executing Verilog-2005 frontend: /Flow/platforms/gf180/cells_adders.v\n", - "7.2. Continuing TECHMAP pass.\n", - "8. Executing TECHMAP pass (map to technology primitives).\n", - "8.1. Executing Verilog-2005 frontend: /home/dependency/oss-cad-suite/lib/../share/yosys/techmap.v\n", - "8.2. Continuing TECHMAP pass.\n", - "9. Executing OPT pass (performing simple optimizations).\n", - "9.1. Executing OPT_EXPR pass (perform const folding).\n", - "9.2. Executing OPT_MERGE pass (detect identical cells).\n", - "9.3. Executing OPT_DFF pass (perform DFF optimizations).\n", - "9.4. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "9.5. Finished fast OPT passes.\n", - "10. Executing TECHMAP pass (map to technology primitives).\n", - "10.1. Executing Verilog-2005 frontend: /Flow/platforms/gf180/cells_latch.v\n", - "10.2. Continuing TECHMAP pass.\n", - "11. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2' - skipping.\n", - "Warning: Found unsupported expression 'D&!SE|SE&SI' in pin attribute of cell 'gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4' - skipping.\n", - "11.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).\n", - "12. Executing OPT pass (performing simple optimizations).\n", - "12.1. Executing OPT_EXPR pass (perform const folding).\n", - "12.2. Executing OPT_MERGE pass (detect identical cells).\n", - "12.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n", - "12.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).\n", - "12.5. Executing OPT_MERGE pass (detect identical cells).\n", - "12.6. Executing OPT_DFF pass (perform DFF optimizations).\n", - "12.7. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "12.8. Executing OPT_EXPR pass (perform const folding).\n", - "12.9. Finished OPT passes. (There is nothing left to do.)\n", - "Using ABC speed script.\n", - "[FLOW] Set ABC_CLOCK_PERIOD_IN_PS to: 12.5\n", - "13. Executing ABC pass (technology mapping using ABC).\n", - "13.1. Extracting gate netlist of module `\\dmem' to `/input.blif'..\n", - "14. Executing SETUNDEF pass (replace undef values with defined constants).\n", - "15. Executing SPLITNETS pass (splitting up multi-bit signals).\n", - "16. Executing OPT_CLEAN pass (remove unused cells and wires).\n", - "17. Executing HILOMAP pass (mapping to constant drivers).\n", - "18. Executing INSBUF pass (insert buffer cells for connected wires).\n", - "19. Executing CHECK pass (checking for obvious problems).\n", - "20. Printing statistics.\n", - "21. Executing Verilog backend.\n", - "Warnings: 11 unique messages, 75 total\n", - "End of script. Logfile hash: 6fc339a1fb, CPU: user 0.88s system 0.04s, MEM: 53.98 MB peak\n", - "Yosys 0.27+33 (git sha1 a2655a4b7, clang 10.0.0-4ubuntu1 -fPIC -Os)\n", - "Time spent: 35% 3x read_liberty (0 sec), 27% 2x stat (0 sec), ...\n", - "Elapsed time: 0:00.94[h:]min:sec. CPU time: user 0.88 sys 0.05 (98%). Peak memory: 55668KB.\n", - "cp ./designs/130_180/fakeram4/constraint.sdc ./results/gf180/fakeram4/80MHz/1_synth.sdc\n", - "mkdir -p ./results/gf180/fakeram4/80MHz ./logs/gf180/fakeram4/80MHz ./reports/gf180/fakeram4/80MHz\n", - "cp results/gf180/fakeram4/80MHz/1_1_yosys.v results/gf180/fakeram4/80MHz/1_synth.v\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_1_floorplan.tmp.log ./logs/gf180/fakeram4/80MHz/2_1_floorplan.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/floorplan.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_1_floorplan.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_1_floorplan.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via1 :\"\n", - " \tEOLENCLOSURE 0.34 0.06 ;\"\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via2 :\" EOLENCLOSURE 0.34 0.06 ; \"\n", - "[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via3 :\" EOLENCLOSURE 0.34 0.06 ; \"\n", - "[INFO ODB-0223] Created 11 technology layers\n", - "[INFO ODB-0224] Created 46 technology vias\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef\n", - "[INFO ODB-0222] Reading LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef\n", - "[INFO ODB-0225] Created 229 library cells\n", - "[INFO ODB-0226] Finished LEF file: /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef\n", - "[INFO ODB-0222] Reading LEF file: ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef\n", - "[INFO ODB-0225] Created 1 library cells\n", - "[INFO ODB-0226] Finished LEF file: ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef\n", - "\n", - "==========================================================================\n", - "Floorplan check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "number instances in verilog is 5\n", - "[WARNING IFP-0028] Core area lower left (20.000, 20.000) snapped to (20.160, 20.160).\n", - "[INFO IFP-0001] Added 190 rows of 2071 site GF018hv5v_green_sc9 with height 1.\n", - "[INFO RSZ-0026] Removed 0 buffers.\n", - "Default units for flow\n", - " time 1ns\n", - " capacitance 1pF\n", - " resistance 1ohm\n", - " voltage 1v\n", - " current 1mA\n", - " power 1uW\n", - " distance 1um\n", - "\n", - "==========================================================================\n", - "floorplan final check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "floorplan final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16230.26\n", - "\n", - "==========================================================================\n", - "floorplan final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.07\n", - "\n", - "==========================================================================\n", - "floorplan final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.07\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[0] (in)\n", - " we_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ dmem00/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.00 0.48 17.07 17.07 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.48 0.00 17.07 v inter_dmem0[0] (out)\n", - " 17.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.00 0.48 17.07 17.07 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.48 0.00 17.07 v inter_dmem0[0] (out)\n", - " 17.07 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.07 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.07 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "floorplan final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "floorplan final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 588861 u^2 53% utilization.\n", - "\n", - "Elapsed time: 0:00.76[h:]min:sec. CPU time: user 0.69 sys 0.04 (96%). Peak memory: 95036KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_1_floorplan.odb ./results/gf180/fakeram4/80MHz/2_2_floorplan_io.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_2_floorplan_io.odb ./results/gf180/fakeram4/80MHz/2_3_floorplan_tdms.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.tmp.log ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/macro_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_4_floorplan_macro.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "row=0,col=0\n", - "x=300000\n", - "y=300000\n", - "row=0,col=1\n", - "x=1220000\n", - "y=300000\n", - "row=1,col=0\n", - "x=300000\n", - "y=1020000\n", - "row=1,col=1\n", - "x=1220000\n", - "y=1020000\n", - "[INFO][FLOW-xxxx] Using manual macro placement file ./designs/130_180/fakeram4/macro.tcl\n", - "Elapsed time: 0:00.81[h:]min:sec. CPU time: user 0.71 sys 0.10 (99%). Peak memory: 98624KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.tmp.log ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/tapcell.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_5_floorplan_tapcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[WARNING TAP-0014] endcap_cpp option is deprecated.\n", - "[INFO ODB-0303] The initial 190 rows (393490 sites) were cut with 4 shapes for a total of 468 rows (176789 sites).\n", - "[INFO TAP-0004] Inserted 380 endcaps.\n", - "[INFO TAP-0005] Inserted 451 tapcells.\n", - "Elapsed time: 0:00.73[h:]min:sec. CPU time: user 0.68 sys 0.03 (98%). Peak memory: 95188KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.tmp.log ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/pdn.tcl -metrics ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/2_6_floorplan_pdn.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting PDN generation\n", - "[INFO PDN-0001] Inserting grid: block\n", - "Starting PDN generation\n", - "Elapsed time: 0:01.96[h:]min:sec. CPU time: user 1.80 sys 0.08 (96%). Peak memory: 112204KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_6_floorplan_pdn.odb ./results/gf180/fakeram4/80MHz/2_floorplan.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.tmp.log ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place_skip_io.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_1_place_gp_skip_io.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Starting global placement without IO\n", - "miemie\n", - "haha\n", - "[INFO GPL-0002] DBU: 2000\n", - "[INFO GPL-0003] SiteSize: 1120 10080\n", - "[INFO GPL-0004] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0005] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0006] NumInstances: 1008\n", - "[INFO GPL-0007] NumPlaceInstances: 1\n", - "[INFO GPL-0008] NumFixedInstances: 455\n", - "[INFO GPL-0009] NumDummyInstances: 552\n", - "[INFO GPL-0010] NumNets: 58\n", - "[INFO GPL-0011] NumPins: 137\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 2400000 2000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0015] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0016] CoreArea: 4442344704000\n", - "[INFO GPL-0017] NonPlaceInstsArea: 2456650828800\n", - "[INFO GPL-0018] PlaceInstsArea: 90316800\n", - "[INFO GPL-0019] Util(%): 0.00\n", - "[INFO GPL-0020] StdInstsArea: 90316800\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[INFO GPL-0031] FillerInit: NumGCells: 15390\n", - "[INFO GPL-0032] FillerInit: NumGNets: 58\n", - "[INFO GPL-0033] FillerInit: NumGPins: 137\n", - "[INFO GPL-0023] TargetDensity: 0.70\n", - "[INFO GPL-0024] AveragePlaceInstArea: 90316800\n", - "[INFO GPL-0025] IdealBinArea: 129024000\n", - "[INFO GPL-0026] IdealBinCnt: 34430\n", - "[INFO GPL-0027] TotalBinArea: 4442344704000\n", - "[INFO GPL-0028] BinCnt: 128 128\n", - "[INFO GPL-0029] BinSize: 18122 14963\n", - "[INFO GPL-0030] NumBins: 16384\n", - "[NesterovSolve] Iter: 1 overflow: 0.999976 HPWL: 17100910\n", - "[NesterovSolve] Iter: 10 overflow: 0.408481 HPWL: 17100910\n", - "[NesterovSolve] Iter: 20 overflow: 0.193491 HPWL: 17100910\n", - "[NesterovSolve] Iter: 30 overflow: 0.12677 HPWL: 17100910\n", - "[NesterovSolve] Finished with Overflow: 0.099360\n", - "Elapsed time: 0:01.32[h:]min:sec. CPU time: user 1.20 sys 0.07 (97%). Peak memory: 112340KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_2_place_iop.tmp.log ./logs/gf180/fakeram4/80MHz/3_2_place_iop.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/io_placement.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_2_place_iop.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_2_place_iop.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "adding pads according to the mother die\n", - "[INFO PPL-0070] Pin clk placed at (0.00um, 770.00um).\n", - "[INFO PPL-0070] Pin writedata[0] placed at (430.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[1] placed at (780.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[2] placed at (340.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[3] placed at (610.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[4] placed at (470.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[5] placed at (360.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[6] placed at (810.00um, 30.00um).\n", - "[INFO PPL-0070] Pin writedata[7] placed at (810.00um, 20.00um).\n", - "[INFO PPL-0070] Pin dataadr[0] placed at (810.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[1] placed at (880.00um, 970.00um).\n", - "[INFO PPL-0070] Pin dataadr[2] placed at (880.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[3] placed at (890.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[4] placed at (860.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[5] placed at (870.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[6] placed at (830.00um, 960.00um).\n", - "[INFO PPL-0070] Pin dataadr[7] placed at (840.00um, 960.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[0] placed at (1100.00um, 670.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[1] placed at (1100.00um, 360.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[2] placed at (1100.00um, 420.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[3] placed at (1100.00um, 640.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[4] placed at (1100.00um, 470.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[5] placed at (1100.00um, 580.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[6] placed at (1100.00um, 380.00um).\n", - "[INFO PPL-0070] Pin inter_dmem0[7] placed at (1100.00um, 530.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[0] placed at (1100.00um, 600.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[1] placed at (1100.00um, 400.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[2] placed at (1100.00um, 460.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[3] placed at (1100.00um, 560.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[4] placed at (1100.00um, 430.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[5] placed at (1100.00um, 620.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[6] placed at (1100.00um, 510.00um).\n", - "[INFO PPL-0070] Pin inter_dmem1[7] placed at (1100.00um, 590.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[0] placed at (1100.00um, 630.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[1] placed at (1100.00um, 440.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[2] placed at (1100.00um, 500.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[3] placed at (1100.00um, 570.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[4] placed at (1100.00um, 490.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[5] placed at (1100.00um, 660.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[6] placed at (1100.00um, 390.00um).\n", - "[INFO PPL-0070] Pin inter_dmem2[7] placed at (1100.00um, 550.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[0] placed at (1100.00um, 650.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[1] placed at (1100.00um, 410.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[2] placed at (1100.00um, 480.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[3] placed at (1100.00um, 540.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[4] placed at (1100.00um, 450.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[5] placed at (1100.00um, 610.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[6] placed at (1100.00um, 370.00um).\n", - "[INFO PPL-0070] Pin inter_dmem3[7] placed at (1100.00um, 520.00um).\n", - "[INFO PPL-0070] Pin ce_mem[0] placed at (30.00um, 530.00um).\n", - "[INFO PPL-0070] Pin ce_mem[1] placed at (30.00um, 480.00um).\n", - "[INFO PPL-0070] Pin ce_mem[2] placed at (30.00um, 500.00um).\n", - "[INFO PPL-0070] Pin ce_mem[3] placed at (30.00um, 550.00um).\n", - "[INFO PPL-0070] Pin we_mem[0] placed at (30.00um, 520.00um).\n", - "[INFO PPL-0070] Pin we_mem[1] placed at (30.00um, 510.00um).\n", - "[INFO PPL-0070] Pin we_mem[2] placed at (30.00um, 490.00um).\n", - "[INFO PPL-0070] Pin we_mem[3] placed at (30.00um, 540.00um).\n", - "Elapsed time: 0:00.88[h:]min:sec. CPU time: user 0.78 sys 0.05 (95%). Peak memory: 107356KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_3_place_gp.tmp.log ./logs/gf180/fakeram4/80MHz/3_3_place_gp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_3_place_gp.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_3_place_gp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GPL-0002] DBU: 2000\n", - "[INFO GPL-0003] SiteSize: 1120 10080\n", - "[INFO GPL-0004] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0005] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0006] NumInstances: 1008\n", - "[INFO GPL-0007] NumPlaceInstances: 1\n", - "[INFO GPL-0008] NumFixedInstances: 455\n", - "[INFO GPL-0009] NumDummyInstances: 552\n", - "[INFO GPL-0010] NumNets: 58\n", - "[INFO GPL-0011] NumPins: 194\n", - "[INFO GPL-0012] DieAreaLxLy: 0 0\n", - "[INFO GPL-0013] DieAreaUxUy: 2400000 2000000\n", - "[INFO GPL-0014] CoreAreaLxLy: 40320 40320\n", - "[INFO GPL-0015] CoreAreaUxUy: 2359840 1955520\n", - "[INFO GPL-0016] CoreArea: 4442344704000\n", - "[INFO GPL-0017] NonPlaceInstsArea: 2456650828800\n", - "[INFO GPL-0018] PlaceInstsArea: 90316800\n", - "[INFO GPL-0019] Util(%): 0.00\n", - "[INFO GPL-0020] StdInstsArea: 90316800\n", - "[INFO GPL-0021] MacroInstsArea: 0\n", - "[InitialPlace] Iter: 1 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 2 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 3 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 4 CG residual: 0.00000008 HPWL: 147424040\n", - "[InitialPlace] Iter: 5 CG residual: 0.00000008 HPWL: 147424040\n", - "[INFO GPL-0031] FillerInit: NumGCells: 15390\n", - "[INFO GPL-0032] FillerInit: NumGNets: 58\n", - "[INFO GPL-0033] FillerInit: NumGPins: 194\n", - "[INFO GPL-0023] TargetDensity: 0.70\n", - "[INFO GPL-0024] AveragePlaceInstArea: 90316800\n", - "[INFO GPL-0025] IdealBinArea: 129024000\n", - "[INFO GPL-0026] IdealBinCnt: 34430\n", - "[INFO GPL-0027] TotalBinArea: 4442344704000\n", - "[INFO GPL-0028] BinCnt: 128 128\n", - "[INFO GPL-0029] BinSize: 18122 14963\n", - "[INFO GPL-0030] NumBins: 16384\n", - "[NesterovSolve] Iter: 1 overflow: 0.999976 HPWL: 98317860\n", - "[NesterovSolve] Snapshot saved at iter = 7\n", - "[NesterovSolve] Iter: 10 overflow: 0.408481 HPWL: 98317860\n", - "[NesterovSolve] Iter: 20 overflow: 0.193491 HPWL: 98317860\n", - "[INFO GPL-0075] Routability numCall: 1 inflationIterCnt: 1 bloatIterCnt: 0\n", - "[INFO GPL-0036] TileLxLy: 0 0\n", - "[INFO GPL-0037] TileSize: 16800 16800\n", - "[INFO GPL-0038] TileCnt: 142 119\n", - "[INFO GPL-0039] numRoutingLayers: 4\n", - "[INFO GPL-0040] NumTiles: 16898\n", - "[INFO GPL-0063] TotalRouteOverflowH2: 0.0\n", - "[INFO GPL-0064] TotalRouteOverflowV2: 0.0\n", - "[INFO GPL-0065] OverflowTileCnt2: 0\n", - "[INFO GPL-0066] 0.5%RC: 1.0\n", - "[INFO GPL-0067] 1.0%RC: 0.9873015880584717\n", - "[INFO GPL-0068] 2.0%RC: 0.9577825046297329\n", - "[INFO GPL-0069] 5.0%RC: 0.8804454292264281\n", - "[INFO GPL-0070] 0.5rcK: 1.0\n", - "[INFO GPL-0071] 1.0rcK: 1.0\n", - "[INFO GPL-0072] 2.0rcK: 0.0\n", - "[INFO GPL-0073] 5.0rcK: 0.0\n", - "[INFO GPL-0074] FinalRC: 0.9936508\n", - "[NesterovSolve] Iter: 30 overflow: 0.12677 HPWL: 98317860\n", - "[NesterovSolve] Finished with Overflow: 0.099360\n", - "\n", - "==========================================================================\n", - "global place check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16231.75\n", - "\n", - "==========================================================================\n", - "global place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.13\n", - "\n", - "==========================================================================\n", - "global place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.13\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[2] (in)\n", - " we_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ dmem10/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.61e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "global place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 596690 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:01.58[h:]min:sec. CPU time: user 1.44 sys 0.08 (96%). Peak memory: 153060KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_4_place_resized.tmp.log ./logs/gf180/fakeram4/80MHz/3_4_place_resized.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/resize.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_4_place_resized.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_4_place_resized.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "\n", - "==========================================================================\n", - "resizer pre check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "resizer pre report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16231.75\n", - "\n", - "==========================================================================\n", - "resizer pre report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.13\n", - "\n", - "==========================================================================\n", - "resizer pre report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.13\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: we_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ we_mem[2] (in)\n", - " we_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ dmem10/WEN[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.50 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.66 2.66 library hold time\n", - " 2.66 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.66 data required time\n", - " -207.50 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.84 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.12 17.12 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " inter_dmem0[0] (net)\n", - " 0.53 0.00 17.13 v inter_dmem0[0] (out)\n", - " 17.13 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.13 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.13 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer pre report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 6.05e-11 6.05e-11 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.61e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer pre report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 596690 u^2 54% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "1392\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "141\n", - "\n", - "Perform port buffering...\n", - "[INFO RSZ-0027] Inserted 24 input buffers.\n", - "[INFO RSZ-0028] Inserted 32 output buffers.\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "[INFO RSZ-0039] Resized 20 instances.\n", - "Repair tie lo fanout...\n", - "[INFO RSZ-0042] Inserted 52 tie gf180mcu_fd_sc_mcu9t5v0__tiel instances.\n", - "Repair tie hi fanout...\n", - "\n", - "==========================================================================\n", - "report_floating_nets\n", - "--------------------------------------------------------------------------\n", - "[WARNING RSZ-0095] found 4 floating pins.\n", - "\n", - "==========================================================================\n", - "resizer check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "resizer report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16272.87\n", - "\n", - "==========================================================================\n", - "resizer report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.98\n", - "\n", - "==========================================================================\n", - "resizer report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.98\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.61 2.61 library hold time\n", - " 2.61 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.61 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 205.09 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "resizer report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2634098529815674\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "resizer max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8084\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.3360211253166199\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.3765000104904175\n", - "\n", - "==========================================================================\n", - "resizer max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8925\n", - "\n", - "==========================================================================\n", - "resizer max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "resizer max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "resizer setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "resizer hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "resizer critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9811\n", - "\n", - "==========================================================================\n", - "resizer critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9811\n", - "\n", - "==========================================================================\n", - "resizer slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.472029\n", - "\n", - "==========================================================================\n", - "resizer report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 0.00e+00 0.00e+00 1.49e-08 1.49e-08 0.0%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 100.0%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.13e-02 0.00e+00 2.76e-07 3.13e-02 100.0%\n", - " 100.0% 0.0% 0.0%\n", - "\n", - "==========================================================================\n", - "resizer report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599377 u^2 54% utilization.\n", - "\n", - "\n", - "==========================================================================\n", - "instance_count\n", - "--------------------------------------------------------------------------\n", - "1499\n", - "\n", - "==========================================================================\n", - "pin_count\n", - "--------------------------------------------------------------------------\n", - "304\n", - "\n", - "Elapsed time: 0:01.03[h:]min:sec. CPU time: user 0.91 sys 0.08 (96%). Peak memory: 124564KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/3_5_place_dp.tmp.log ./logs/gf180/fakeram4/80MHz/3_5_place_dp.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_place.tcl -metrics ./logs/gf180/fakeram4/80MHz/3_5_place_dp.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/3_5_place_dp.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 642.9 u\n", - "average displacement 0.4 u\n", - "max displacement 15.4 u\n", - "original HPWL 48577.6 u\n", - "legalized HPWL 48811.0 u\n", - "delta HPWL 0 %\n", - "\n", - "Detailed placement improvement.\n", - "Importing netlist into detailed improver.\n", - "[INFO DPO-0100] Creating network with 1499 cells, 57 terminals, 165 edges and 357 pins.\n", - "[INFO DPO-0109] Network stats: inst 1556, edges 165, pins 357\n", - "[INFO DPO-0110] Number of regions is 1\n", - "[INFO DPO-0401] Setting random seed to 1.\n", - "[INFO DPO-0402] Setting maximum displacement 5 1 to 50400 10080 units.\n", - "[INFO DPO-0320] Collected 1726 fixed cells (excluded terminal_NI).\n", - "[INFO DPO-0318] Collected 108 single height cells.\n", - "[INFO DPO-0321] Collected 0 wide cells.\n", - "[INFO DPO-0322] Image (40320, 40320) - (2359840, 1955520)\n", - "[INFO DPO-0310] Assigned 108 cells into segments. Movement in X-direction is 29120.000000, movement in Y-direction is 0.000000.\n", - "[WARNING DPO-0200] Unexpected displacement during legalization.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "[INFO DPO-0303] Running algorithm for independent set matching.\n", - "[INFO DPO-0300] Set matching objective is wirelength.\n", - "[INFO DPO-0301] Pass 1 of matching; objective is 9.805612e+07.\n", - "[INFO DPO-0302] End of matching; objective is 9.805612e+07, improvement is 0.00 percent.\n", - "[INFO DPO-0303] Running algorithm for global swaps.\n", - "[INFO DPO-0306] Pass 1 of global swaps; hpwl is 9.663018e+07.\n", - "[INFO DPO-0306] Pass 2 of global swaps; hpwl is 9.663018e+07.\n", - "[INFO DPO-0307] End of global swaps; objective is 9.663018e+07, improvement is 1.45 percent.\n", - "[INFO DPO-0303] Running algorithm for vertical swaps.\n", - "[INFO DPO-0308] Pass 1 of vertical swaps; hpwl is 9.662422e+07.\n", - "[INFO DPO-0309] End of vertical swaps; objective is 9.662422e+07, improvement is 0.01 percent.\n", - "[INFO DPO-0303] Running algorithm for reordering.\n", - "[INFO DPO-0304] Pass 1 of reordering; objective is 9.662422e+07.\n", - "[INFO DPO-0305] End of reordering; objective is 9.662422e+07, improvement is 0.00 percent.\n", - "[INFO DPO-0303] Running algorithm for random improvement.\n", - "[INFO DPO-0324] Random improver is using displacement generator.\n", - "[INFO DPO-0325] Random improver is using hpwl objective.\n", - "[INFO DPO-0326] Random improver cost string is (a).\n", - "[INFO DPO-0332] End of pass, Generator displacement called 2160 times.\n", - "[INFO DPO-0335] Generator displacement, Cumulative attempts 2160, swaps 14, moves 871 since last reset.\n", - "[INFO DPO-0333] End of pass, Objective hpwl, Initial cost 9.662422e+07, Scratch cost 9.662086e+07, Incremental cost 9.662086e+07, Mismatch? N\n", - "[INFO DPO-0338] End of pass, Total cost is 9.662086e+07.\n", - "[INFO DPO-0327] Pass 1 of random improver; improvement in cost is 0.00 percent.\n", - "[INFO DPO-0328] End of random improver; improvement is 0.003477 percent.\n", - "[INFO DPO-0380] Cell flipping.\n", - "[INFO DPO-0382] Changed 47 cell orientations for row compatibility.\n", - "[INFO DPO-0383] Performed 53 cell flips.\n", - "[INFO DPO-0384] End of flipping; objective is 9.636752e+07, improvement is 0.26 percent.\n", - "[INFO DPO-0313] Found 0 cells in wrong regions.\n", - "[INFO DPO-0315] Found 0 row alignment problems.\n", - "[INFO DPO-0314] Found 0 site alignment problems.\n", - "[INFO DPO-0311] Found 0 overlaps between adjacent cells.\n", - "[INFO DPO-0312] Found 0 edge spacing violations and 0 padding violations.\n", - "Detailed Improvement Results\n", - "------------------------------------------\n", - "Original HPWL 48811.0 u\n", - "Final HPWL 48200.1 u\n", - "Delta HPWL -1.3 %\n", - "\n", - "[INFO FLW-0012] Placement violations .\n", - "\n", - "==========================================================================\n", - "detailed place check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "detailed place report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16272.82\n", - "\n", - "==========================================================================\n", - "detailed place report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.98\n", - "\n", - "==========================================================================\n", - "detailed place report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.98\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 clock reconvergence pessimism\n", - " 0.00 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 2.61 2.61 library hold time\n", - " 2.61 data required time\n", - "-----------------------------------------------------------------------------\n", - " 2.61 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 205.09 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (ideal)\n", - " 0.00 0.00 0.00 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.13 17.13 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.14 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 17.98 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 17.98 v inter_dmem0[0] (out)\n", - " 17.98 data arrival time\n", - "\n", - " 0.00 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (ideal)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.98 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.98 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "detailed place report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.264432430267334\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8087\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "detailed place max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "detailed place max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "detailed place hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "detailed place critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9801\n", - "\n", - "==========================================================================\n", - "detailed place critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9801\n", - "\n", - "==========================================================================\n", - "detailed place slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.532344\n", - "\n", - "==========================================================================\n", - "detailed place report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 0.00e+00 0.00e+00 8.39e-08 8.39e-08 0.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 99.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.14e-02 1.61e-04 2.76e-07 3.15e-02 100.0%\n", - " 99.5% 0.5% 0.0%\n", - "\n", - "==========================================================================\n", - "detailed place report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599377 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:00.95[h:]min:sec. CPU time: user 0.84 sys 0.07 (95%). Peak memory: 128560KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/3_5_place_dp.odb ./results/gf180/fakeram4/80MHz/3_place.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/2_floorplan.sdc ./results/gf180/fakeram4/80MHz/3_place.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/4_1_cts.tmp.log ./logs/gf180/fakeram4/80MHz/4_1_cts.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/cts.tcl -metrics ./logs/gf180/fakeram4/80MHz/4_1_cts.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/4_1_cts.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO CTS-0049] Characterization buffer is: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.\n", - "[INFO CTS-0039] Number of created patterns = 12240.\n", - "[INFO CTS-0084] Compiling LUT.\n", - "Min. len Max. len Min. cap Max. cap Min. slew Max. slew\n", - "2 8 1 34 1 12 \n", - "[WARNING CTS-0043] 1632 wires are pure wire and no slew degradation.\n", - "TritonCTS forced slew degradation on these wires.\n", - "[INFO CTS-0046] Number of wire segments: 12240.\n", - "[INFO CTS-0047] Number of keys in characterization LUT: 1552.\n", - "[INFO CTS-0048] Actual min input cap: 1.\n", - "[INFO CTS-0007] Net \"clk\" found for clock \"clk\".\n", - "[INFO CTS-0010] Clock net \"clk\" has 4 sinks.\n", - "[INFO CTS-0008] TritonCTS found 1 clock nets.\n", - "[INFO CTS-0097] Characterization used 1 buffer(s) types.\n", - "[INFO CTS-0200] 4 placement blockages have been identified.\n", - "[INFO CTS-0027] Generating H-Tree topology for net clk.\n", - "[INFO CTS-0028] Total number of sinks: 4.\n", - "[INFO CTS-0029] Sinks will be clustered in groups of up to 30 and with maximum cluster diameter of 100.0 um.\n", - "[INFO CTS-0030] Number of static layers: 0.\n", - "[INFO CTS-0020] Wire segment unit: 50400 dbu (25 um).\n", - "[INFO CTS-0021] Distance between buffers: 1 units (100 um).\n", - "[INFO CTS-0023] Original sink region: [(580480, 301000), (1500480, 1021000)].\n", - "[INFO CTS-0024] Normalized sink region: [(11.5175, 5.97222), (29.7714, 20.2579)].\n", - "[INFO CTS-0025] Width: 18.2540.\n", - "[INFO CTS-0026] Height: 14.2857.\n", - " Level 1\n", - " Direction: Horizontal\n", - " Sinks per sub-region: 2\n", - " Sub-region size: 9.1270 X 14.2857\n", - "[INFO CTS-0034] Segment length (rounded): 4.\n", - " Key: 24 inSlew: 1 inCap: 1 outSlew: 1 load: 1 length: 4 delay: 5\n", - " location: 0.5 buffer: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8\n", - "[INFO CTS-0032] Stop criterion found. Max number of sinks is 15.\n", - "[INFO CTS-0035] Number of sinks covered: 4.\n", - "[INFO CTS-0018] Created 3 clock buffers.\n", - "[INFO CTS-0012] Minimum number of buffers in the clock path: 2.\n", - "[INFO CTS-0013] Maximum number of buffers in the clock path: 2.\n", - "[INFO CTS-0015] Created 3 clock nets.\n", - "[INFO CTS-0016] Fanout distribution for the current clock = 2:2..\n", - "[INFO CTS-0017] Max level of the clock tree: 1.\n", - "[INFO CTS-0098] Clock net \"clk\"\n", - "[INFO CTS-0099] Sinks 4\n", - "[INFO CTS-0100] Leaf buffers 0\n", - "[INFO CTS-0101] Average sink wire length 1369.38 um\n", - "[INFO CTS-0102] Path depth 2 - 2\n", - "\n", - "==========================================================================\n", - "cts pre-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16270.06\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.62\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.62\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2605576515197754\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8073\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts pre-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6173\n", - "\n", - "==========================================================================\n", - "cts pre-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6173\n", - "\n", - "==========================================================================\n", - "cts pre-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1147.412890\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.77e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts pre-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599597 u^2 54% utilization.\n", - "\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "\n", - "==========================================================================\n", - "cts post-repair check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts post-repair report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16270.06\n", - "\n", - "==========================================================================\n", - "cts post-repair report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.62\n", - "\n", - "==========================================================================\n", - "cts post-repair report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.62\n", - "\n", - "==========================================================================\n", - "cts post-repair report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.01 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.51 0.36 0.49 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.53 0.05 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.53 17.23 17.77 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.53 0.00 17.77 v output25/I (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " 1 0.00 0.13 0.84 18.62 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__dlyb_2)\n", - " inter_dmem0[0] (net)\n", - " 0.13 0.00 18.62 v inter_dmem0[0] (out)\n", - " 18.62 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.62 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.62 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts post-repair report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2605576515197754\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8073\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts post-repair max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts post-repair max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts post-repair hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6173\n", - "\n", - "==========================================================================\n", - "cts post-repair critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6173\n", - "\n", - "==========================================================================\n", - "cts post-repair slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1147.412890\n", - "\n", - "==========================================================================\n", - "cts post-repair report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.49e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.77e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts post-repair report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 599597 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 210.5 u\n", - "average displacement 0.1 u\n", - "max displacement 123.7 u\n", - "original HPWL 48970.1 u\n", - "legalized HPWL 49114.9 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "TNS end percent 5\n", - "[INFO RSZ-0094] Found 80 endpoints with setup violations.\n", - "[INFO RSZ-0041] Resized 46 instances.\n", - "[WARNING RSZ-0062] Unable to repair all setup violations.\n", - "[INFO RSZ-0033] No hold violations found.\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "cts final check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "cts final report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.64\n", - "\n", - "==========================================================================\n", - "cts final report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -212.99\n", - "\n", - "==========================================================================\n", - "cts final report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -212.99\n", - "\n", - "==========================================================================\n", - "cts final report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.19 0.20 207.70 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.19 0.00 207.70 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.70 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.54 clock reconvergence pessimism\n", - " 2.52 3.06 library hold time\n", - " 3.06 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.06 data required time\n", - " -207.70 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.64 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.25 17.79 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.79 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.05 0.20 17.99 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.05 0.00 17.99 v inter_dmem0[0] (out)\n", - " 17.99 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.99 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.99 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.03 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.02 0.01 0.01 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.57 0.50 0.34 0.47 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.54 0.07 0.54 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.25 17.79 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.79 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.05 0.20 17.99 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.05 0.00 17.99 v inter_dmem0[0] (out)\n", - " 17.99 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -17.99 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -212.99 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "cts final report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2473864555358887\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "cts final max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8026\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6960316300392151\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.7524999976158142\n", - "\n", - "==========================================================================\n", - "cts final max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9250\n", - "\n", - "==========================================================================\n", - "cts final max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "cts final max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "cts final setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "cts final hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "cts final critical path delay\n", - "--------------------------------------------------------------------------\n", - "17.9879\n", - "\n", - "==========================================================================\n", - "cts final critical path slack\n", - "--------------------------------------------------------------------------\n", - "-212.9879\n", - "\n", - "==========================================================================\n", - "cts final slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1184.062064\n", - "\n", - "==========================================================================\n", - "cts final report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.61e-04 1.29e-08 2.64e-04 0.8%\n", - "Clock 6.38e-04 2.87e-03 8.52e-08 3.51e-03 10.0%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.04e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "cts final report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Elapsed time: 0:03.61[h:]min:sec. CPU time: user 3.49 sys 0.08 (98%). Peak memory: 145968KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/4_1_cts.odb ./results/gf180/fakeram4/80MHz/4_cts.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_1_grt.tmp.log ./logs/gf180/fakeram4/80MHz/5_1_grt.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/global_route.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_1_grt.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_1_grt.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO GRT-0020] Min routing layer: Metal1\n", - "[INFO GRT-0021] Max routing layer: Metal3\n", - "[INFO GRT-0022] Global adjustment: 0%\n", - "[INFO GRT-0023] Grid origin: (0, 0)\n", - "[INFO GRT-0043] No OR_DEFAULT vias defined.\n", - "[INFO GRT-0088] Layer Metal1 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5450\n", - "[INFO GRT-0088] Layer Metal2 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5800\n", - "[INFO GRT-0088] Layer Metal3 Track-Pitch = 0.5600 line-2-Via Pitch: 0.5800\n", - "[INFO GRT-0019] Found 4 clock nets.\n", - "[WARNING GRT-0036] Pin clk is outside die area.\n", - "[INFO GRT-0001] Minimum degree: 2\n", - "[INFO GRT-0002] Maximum degree: 5\n", - "[INFO GRT-0003] Macros: 4\n", - "[INFO GRT-0004] Blockages: 2706\n", - "\n", - "[INFO GRT-0053] Routing resources analysis:\n", - " Routing Original Derated Resource\n", - "Layer Direction Resources Resources Reduction (%)\n", - "---------------------------------------------------------------\n", - "Metal1 Horizontal 253815 39311 84.51%\n", - "Metal2 Vertical 237797 56503 76.24%\n", - "Metal3 Horizontal 237036 57965 75.55%\n", - "---------------------------------------------------------------\n", - "\n", - "[INFO GRT-0101] Running extra iterations to remove overflow.\n", - "[INFO GRT-0197] Via related to pin nodes: 194\n", - "[INFO GRT-0198] Via related Steiner nodes: 8\n", - "[INFO GRT-0199] Via filling finished.\n", - "[INFO GRT-0111] Final number of vias: 435\n", - "[INFO GRT-0112] Final usage 3D: 8051\n", - "\n", - "[INFO GRT-0096] Final congestion report:\n", - "Layer Resource Demand Usage (%) Max H / Max V / Total Overflow\n", - "---------------------------------------------------------------------------------------\n", - "Metal1 39311 1705 4.34% 0 / 0 / 0\n", - "Metal2 56503 2921 5.17% 0 / 0 / 0\n", - "Metal3 57965 2120 3.66% 0 / 0 / 0\n", - "---------------------------------------------------------------------------------------\n", - "Total 153779 6746 4.39% 0 / 0 / 0\n", - "\n", - "[INFO GRT-0018] Total wirelength: 62554 um\n", - "[INFO GRT-0014] Routed nets: 168\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "\n", - "==========================================================================\n", - "global route pre repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.73\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route pre repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route pre repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route pre repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.03e-04 1.65e-04 1.29e-08 2.68e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route pre repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Perform buffer insertion...\n", - "[INFO RSZ-0058] Using max wire length 15009um.\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[INFO RSZ-0039] Resized 3 instances.\n", - "\n", - "==========================================================================\n", - "global route post repair design check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route post repair design report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route post repair design report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair design report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair design report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair design report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route post repair design max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route post repair design max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route post repair design hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route post repair design critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route post repair design slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route post repair design report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair design report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "Repair setup and hold violations...\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "[INFO RSZ-0094] Found 80 endpoints with setup violations.\n", - "[WARNING RSZ-0062] Unable to repair all setup violations.\n", - "[INFO RSZ-0033] No hold violations found.\n", - "\n", - "==========================================================================\n", - "global route post repair timing check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route post repair timing hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route post repair timing critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route post repair timing slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route post repair timing report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "Placement Analysis\n", - "---------------------------------\n", - "total displacement 0.0 u\n", - "average displacement 0.0 u\n", - "max displacement 0.0 u\n", - "original HPWL 49255.8 u\n", - "legalized HPWL 49255.8 u\n", - "delta HPWL 0 %\n", - "\n", - "\n", - "==========================================================================\n", - "check_antennas\n", - "--------------------------------------------------------------------------\n", - "[INFO GRT-0012] Found 0 antenna violations.\n", - "[WARNING ANT-0011] -report_violating_nets is deprecated.\n", - "[INFO ANT-0002] Found 0 net violations.\n", - "[INFO ANT-0001] Found 0 pin violations.\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[0].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin ce_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin clk.\n", - "[WARNING GRT-0026] Missing route to pin dataadr[0].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[1].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[2].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[3].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[4].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[5].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[6].\n", - "[WARNING GRT-0026] Missing route to pin dataadr[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem0[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem1[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[1].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[6].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem2[7].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[0].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[2].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[3].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[4].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[5].\n", - "[WARNING GRT-0026] Missing route to pin inter_dmem3[7].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[1].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[2].\n", - "[WARNING GRT-0026] Missing route to pin we_mem[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[1].\n", - "[WARNING GRT-0026] Missing route to pin writedata[2].\n", - "[WARNING GRT-0026] Missing route to pin writedata[3].\n", - "[WARNING GRT-0026] Missing route to pin writedata[5].\n", - "[WARNING GRT-0026] Missing route to pin writedata[6].\n", - "\n", - "==========================================================================\n", - "global route check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "global route report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16250.69\n", - "\n", - "==========================================================================\n", - "global route report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.04\n", - "\n", - "==========================================================================\n", - "global route report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.04\n", - "\n", - "==========================================================================\n", - "global route report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[0] (input port clocked by clk)\n", - "Endpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[0] (in)\n", - " ce_mem[0] (net)\n", - " 0.00 0.00 207.50 ^ input1/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.05 0.20 0.20 207.70 ^ input1/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net1 (net)\n", - " 0.20 0.01 207.71 ^ dmem00/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.71 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.57 clock reconvergence pessimism\n", - " 2.53 3.09 library hold time\n", - " 3.09 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.09 data required time\n", - " -207.71 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.62 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[0] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.02 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.00 0.00 0.00 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.04 0.07 0.12 0.12 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.12 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.58 0.48 0.30 0.42 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.62 0.15 0.57 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.02 0.54 17.27 17.84 v dmem00/Q[0] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net25 (net)\n", - " 0.54 0.01 17.84 v output25/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.04 0.20 18.04 v output25/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[0] (net)\n", - " 0.04 0.00 18.04 v inter_dmem0[0] (out)\n", - " 18.04 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.04 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.04 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "global route report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "2.2452540397644043\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "global route max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.8019\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.6922756433486938\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "global route max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.9208\n", - "\n", - "==========================================================================\n", - "global route max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "global route max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "global route setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "global route hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "global route critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.0374\n", - "\n", - "==========================================================================\n", - "global route critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.0374\n", - "\n", - "==========================================================================\n", - "global route slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1181.087075\n", - "\n", - "==========================================================================\n", - "global route report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 1.02e-04 1.65e-04 1.29e-08 2.67e-04 0.8%\n", - "Clock 6.37e-04 2.89e-03 8.52e-08 3.53e-03 10.1%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 89.2%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 3.06e-03 2.75e-07 3.51e-02 100.0%\n", - " 91.3% 8.7% 0.0%\n", - "\n", - "==========================================================================\n", - "global route report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "[INFO FLW-0007] clock clk period 12.500000\n", - "[INFO FLW-0008] Clock clk period 214.261\n", - "[INFO FLW-0009] Clock clk slack -213.037\n", - "[INFO FLW-0011] Path endpoint count 80\n", - "Elapsed time: 0:01.25[h:]min:sec. CPU time: user 1.13 sys 0.07 (96%). Peak memory: 181560KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_2_fillcell.tmp.log ./logs/gf180/fakeram4/80MHz/5_2_fillcell.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/fillcell.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_2_fillcell.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_2_fillcell.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO DPL-0001] Placed 4837 filler instances.\n", - "Elapsed time: 0:00.92[h:]min:sec. CPU time: user 0.81 sys 0.06 (95%). Peak memory: 126312KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/5_3_route.tmp.log ./logs/gf180/fakeram4/80MHz/5_3_route.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/detail_route.tcl -metrics ./logs/gf180/fakeram4/80MHz/5_3_route.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/5_3_route.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO ORD-0030] Using 104 thread(s).\n", - "detailed_route -output_drc ./reports/gf180/fakeram4/80MHz/5_route_drc.rpt -output_maze ./results/gf180/fakeram4/80MHz/maze.log -bottom_routing_layer Metal1 -top_routing_layer Metal3 -via_in_pin_bottom_layer Metal1 -via_in_pin_top_layer Metal1 -disable_via_gen -save_guide_updates -verbose 1 -drc_report_iter_step 5\n", - "[INFO DRT-0149] Reading tech and libs.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "[WARNING DRT-0140] SpacingRange unsupported.\n", - "\n", - "Units: 2000\n", - "Number of layers: 9\n", - "Number of macros: 230\n", - "Number of vias: 46\n", - "Number of viarulegen: 14\n", - "\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[WARNING DRT-0204] Cut layer CON has no default via defined.\n", - "[INFO DRT-0150] Reading design.\n", - "\n", - "Design: dmem\n", - "Die area: ( 0 0 ) ( 2400000 2000000 )\n", - "Number of track patterns: 8\n", - "Number of DEF vias: 0\n", - "Number of components: 6339\n", - "Number of terminals: 57\n", - "Number of snets: 2\n", - "Number of nets: 168\n", - "\n", - "[WARNING DRT-0421] Term ce_mem[0] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term ce_mem[3]\n", - "[WARNING DRT-0421] Term dataadr[0] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[1]\n", - "[WARNING DRT-0421] Term dataadr[2] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[4]\n", - "[WARNING DRT-0421] Term dataadr[5] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term dataadr[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem0[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem1[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem2[7]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[5]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[6]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term inter_dmem3[7]\n", - "[WARNING DRT-0421] Term we_mem[0] has no pins on routing grid\n", - "[WARNING DRT-0421] Term we_mem[1] has no pins on routing grid\n", - "[WARNING DRT-0421] Term we_mem[3] has no pins on routing grid\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[0]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[1]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[2]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[3]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[4]\n", - "[WARNING DRT-0422] No routing tracks pass through the center of Term writedata[5]\n", - "[WARNING DRT-0421] Term writedata[6] has no pins on routing grid\n", - "[WARNING DRT-0421] Term writedata[7] has no pins on routing grid\n", - "[INFO DRT-0167] List of default vias:\n", - " Layer Via1\n", - " default via: Via1_HV\n", - " Layer Via2\n", - " default via: Via2_VH\n", - " Layer Via3\n", - " default via: Via3_1_HV\n", - "[INFO DRT-0162] Library cell analysis.\n", - "[INFO DRT-0163] Instance analysis.\n", - "[INFO DRT-0164] Number of unique instances = 35.\n", - "[INFO DRT-0168] Init region query.\n", - "[INFO DRT-0024] Complete Poly2.\n", - "[INFO DRT-0024] Complete CON.\n", - "[INFO DRT-0024] Complete Metal1.\n", - "[INFO DRT-0024] Complete Via1.\n", - "[INFO DRT-0024] Complete Metal2.\n", - "[INFO DRT-0024] Complete Via2.\n", - "[INFO DRT-0024] Complete Metal3.\n", - "[INFO DRT-0024] Complete Via3.\n", - "[INFO DRT-0024] Complete Metal4.\n", - "[INFO DRT-0033] Poly2 shape region query size = 0.\n", - "[INFO DRT-0033] CON shape region query size = 0.\n", - "[INFO DRT-0033] Metal1 shape region query size = 21867.\n", - "[INFO DRT-0033] Via1 shape region query size = 17868.\n", - "[INFO DRT-0033] Metal2 shape region query size = 165010.\n", - "[INFO DRT-0033] Via2 shape region query size = 155794.\n", - "[INFO DRT-0033] Metal3 shape region query size = 315397.\n", - "[INFO DRT-0033] Via3 shape region query size = 155790.\n", - "[INFO DRT-0033] Metal4 shape region query size = 155842.\n", - "[INFO DRT-0165] Start pin access.\n", - "[INFO DRT-0076] Complete 100 pins.\n", - "[INFO DRT-0078] Complete 156 pins.\n", - "[INFO DRT-0081] Complete 11 unique inst patterns.\n", - "[INFO DRT-0084] Complete 111 groups.\n", - "#scanned instances = 6339\n", - "#unique instances = 35\n", - "#stdCellGenAp = 337\n", - "#stdCellValidPlanarAp = 0\n", - "#stdCellValidViaAp = 97\n", - "#stdCellPinNoAp = 0\n", - "#stdCellPinCnt = 118\n", - "#instTermValidViaApCnt = 0\n", - "#macroGenAp = 674\n", - "#macroValidPlanarAp = 544\n", - "#macroValidViaAp = 0\n", - "#macroNoAp = 0\n", - "[INFO DRT-0166] Complete pin access.\n", - "[INFO DRT-0267] cpu time = 00:00:08, elapsed time = 00:00:00, memory = 217.05 (MB), peak = 217.44 (MB)\n", - "\n", - "Number of guides: 993\n", - "\n", - "[INFO DRT-0169] Post process guides.\n", - "[INFO DRT-0176] GCELLGRID X 0 DO 142 STEP 16800 ;\n", - "[INFO DRT-0177] GCELLGRID Y 0 DO 119 STEP 16800 ;\n", - "[INFO DRT-0028] Complete Poly2.\n", - "[INFO DRT-0028] Complete CON.\n", - "[INFO DRT-0028] Complete Metal1.\n", - "[INFO DRT-0028] Complete Via1.\n", - "[INFO DRT-0028] Complete Metal2.\n", - "[INFO DRT-0028] Complete Via2.\n", - "[INFO DRT-0028] Complete Metal3.\n", - "[INFO DRT-0028] Complete Via3.\n", - "[INFO DRT-0028] Complete Metal4.\n", - "[INFO DRT-1000] Pin clk not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[5] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin dataadr[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[5] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem0[7] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem1[4] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem1[7] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[0] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[4] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem2[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin inter_dmem3[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[1] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[2] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[3] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-1000] Pin writedata[6] not in any guide. Attempting to patch guides to cover (at least part of) the pin.\n", - "[INFO DRT-0178] Init guide query.\n", - "[INFO DRT-0035] Complete Poly2 (guide).\n", - "[INFO DRT-0035] Complete CON (guide).\n", - "[INFO DRT-0035] Complete Metal1 (guide).\n", - "[INFO DRT-0035] Complete Via1 (guide).\n", - "[INFO DRT-0035] Complete Metal2 (guide).\n", - "[INFO DRT-0035] Complete Via2 (guide).\n", - "[INFO DRT-0035] Complete Metal3 (guide).\n", - "[INFO DRT-0035] Complete Via3 (guide).\n", - "[INFO DRT-0035] Complete Metal4 (guide).\n", - "[INFO DRT-0036] Poly2 guide region query size = 0.\n", - "[INFO DRT-0036] CON guide region query size = 0.\n", - "[INFO DRT-0036] Metal1 guide region query size = 240.\n", - "[INFO DRT-0036] Via1 guide region query size = 0.\n", - "[INFO DRT-0036] Metal2 guide region query size = 296.\n", - "[INFO DRT-0036] Via2 guide region query size = 0.\n", - "[INFO DRT-0036] Metal3 guide region query size = 102.\n", - "[INFO DRT-0036] Via3 guide region query size = 0.\n", - "[INFO DRT-0036] Metal4 guide region query size = 0.\n", - "[INFO DRT-0179] Init gr pin query.\n", - "[INFO DRT-0185] Post process initialize RPin region query.\n", - "[INFO DRT-0181] Start track assignment.\n", - "[INFO DRT-0184] Done with 296 vertical wires in 3 frboxes and 342 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0186] Done with 19 vertical wires in 3 frboxes and 111 horizontal wires in 3 frboxes.\n", - "[INFO DRT-0182] Complete track assignment.\n", - "[INFO DRT-0267] cpu time = 00:00:04, elapsed time = 00:00:01, memory = 293.28 (MB), peak = 348.95 (MB)\n", - "[INFO DRT-0187] Start routing data preparation.\n", - "[INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 293.28 (MB), peak = 348.95 (MB)\n", - "[INFO DRT-0194] Start detail routing.\n", - "[INFO DRT-0195] Start 0th optimization iteration.\n", - " Completing 10% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 309.78 (MB).\n", - " Completing 20% with 0 violations.\n", - " elapsed time = 00:00:00, memory = 433.20 (MB).\n", - " Completing 30% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 447.64 (MB).\n", - " Completing 40% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 447.64 (MB).\n", - " Completing 50% with 97 violations.\n", - " elapsed time = 00:00:00, memory = 551.70 (MB).\n", - " Completing 60% with 111 violations.\n", - " elapsed time = 00:00:00, memory = 552.73 (MB).\n", - " Completing 70% with 111 violations.\n", - " elapsed time = 00:00:00, memory = 583.28 (MB).\n", - " Completing 80% with 170 violations.\n", - " elapsed time = 00:00:00, memory = 595.40 (MB).\n", - " Completing 90% with 170 violations.\n", - " elapsed time = 00:00:00, memory = 595.40 (MB).\n", - " Completing 100% with 175 violations.\n", - " elapsed time = 00:00:01, memory = 615.89 (MB).\n", - "[INFO DRT-0199] Number of violations = 269.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3 Metal4\n", - "Cut Spacing 0 3 0 10 0 0\n", - "Metal Spacing 6 0 15 0 21 0\n", - "Min Width 0 0 0 0 0 1\n", - "Recheck 31 0 55 0 7 1\n", - "Short 50 2 18 5 44 0\n", - "[INFO DRT-0267] cpu time = 00:00:26, elapsed time = 00:00:01, memory = 851.91 (MB), peak = 851.91 (MB)\n", - "Total wire length = 57041 um.\n", - "Total wire length on LAYER Metal1 = 13620 um.\n", - "Total wire length on LAYER Metal2 = 25394 um.\n", - "Total wire length on LAYER Metal3 = 18026 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 571.\n", - "Up-via summary (total 571):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 403\n", - " Metal2 168\n", - " Metal3 0\n", - "--------------\n", - " 571\n", - "\n", - "\n", - "[INFO DRT-0195] Start 1st optimization iteration.\n", - " Completing 10% with 269 violations.\n", - " elapsed time = 00:00:00, memory = 851.91 (MB).\n", - " Completing 20% with 269 violations.\n", - " elapsed time = 00:00:00, memory = 901.42 (MB).\n", - " Completing 30% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 909.15 (MB).\n", - " Completing 40% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 909.15 (MB).\n", - " Completing 50% with 197 violations.\n", - " elapsed time = 00:00:00, memory = 923.78 (MB).\n", - " Completing 60% with 154 violations.\n", - " elapsed time = 00:00:00, memory = 927.13 (MB).\n", - " Completing 70% with 154 violations.\n", - " elapsed time = 00:00:00, memory = 947.11 (MB).\n", - " Completing 80% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 953.04 (MB).\n", - " Completing 90% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 953.04 (MB).\n", - " Completing 100% with 110 violations.\n", - " elapsed time = 00:00:01, memory = 961.75 (MB).\n", - "[INFO DRT-0199] Number of violations = 110.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 0 2 0 10 0\n", - "Metal Spacing 0 0 14 0 2\n", - "Short 44 1 9 5 23\n", - "[INFO DRT-0267] cpu time = 00:00:27, elapsed time = 00:00:01, memory = 961.75 (MB), peak = 961.75 (MB)\n", - "Total wire length = 57066 um.\n", - "Total wire length on LAYER Metal1 = 13664 um.\n", - "Total wire length on LAYER Metal2 = 25413 um.\n", - "Total wire length on LAYER Metal3 = 17988 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 599.\n", - "Up-via summary (total 599):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 411\n", - " Metal2 188\n", - " Metal3 0\n", - "--------------\n", - " 599\n", - "\n", - "\n", - "[INFO DRT-0195] Start 2nd optimization iteration.\n", - " Completing 10% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 961.75 (MB).\n", - " Completing 20% with 110 violations.\n", - " elapsed time = 00:00:00, memory = 961.75 (MB).\n", - " Completing 30% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 966.64 (MB).\n", - " Completing 40% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 966.64 (MB).\n", - " Completing 50% with 105 violations.\n", - " elapsed time = 00:00:00, memory = 977.09 (MB).\n", - " Completing 60% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 978.08 (MB).\n", - " Completing 70% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 978.08 (MB).\n", - " Completing 80% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 980.93 (MB).\n", - " Completing 90% with 103 violations.\n", - " elapsed time = 00:00:00, memory = 980.93 (MB).\n", - " Completing 100% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 985.75 (MB).\n", - "[INFO DRT-0199] Number of violations = 92.\n", - "Viol/Layer Metal1 Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 0 2 0 6 0\n", - "Metal Spacing 2 0 14 0 5\n", - "Short 40 1 8 0 14\n", - "[INFO DRT-0267] cpu time = 00:00:18, elapsed time = 00:00:01, memory = 985.99 (MB), peak = 985.99 (MB)\n", - "Total wire length = 57096 um.\n", - "Total wire length on LAYER Metal1 = 13676 um.\n", - "Total wire length on LAYER Metal2 = 25446 um.\n", - "Total wire length on LAYER Metal3 = 17974 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 619.\n", - "Up-via summary (total 619):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 430\n", - " Metal2 189\n", - " Metal3 0\n", - "--------------\n", - " 619\n", - "\n", - "\n", - "[INFO DRT-0195] Start 3rd optimization iteration.\n", - " Completing 10% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 985.99 (MB).\n", - " Completing 20% with 92 violations.\n", - " elapsed time = 00:00:00, memory = 985.99 (MB).\n", - " Completing 30% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 996.85 (MB).\n", - " Completing 40% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 996.85 (MB).\n", - " Completing 50% with 60 violations.\n", - " elapsed time = 00:00:00, memory = 996.85 (MB).\n", - " Completing 60% with 55 violations.\n", - " elapsed time = 00:00:00, memory = 1002.62 (MB).\n", - " Completing 70% with 55 violations.\n", - " elapsed time = 00:00:00, memory = 1002.62 (MB).\n", - " Completing 80% with 29 violations.\n", - " elapsed time = 00:00:00, memory = 1005.94 (MB).\n", - " Completing 90% with 29 violations.\n", - " elapsed time = 00:00:00, memory = 1005.94 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1008.82 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:00, memory = 1011.46 (MB), peak = 1011.46 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13016 um.\n", - "Total wire length on LAYER Metal2 = 25505 um.\n", - "Total wire length on LAYER Metal3 = 18599 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 4th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1011.46 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1011.46 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.44 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.44 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.44 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.44 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1012.44 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1014.35 (MB), peak = 1014.35 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25505 um.\n", - "Total wire length on LAYER Metal3 = 18597 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 5th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1014.35 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1018.29 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1018.29 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1019.96 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1020.58 (MB), peak = 1020.58 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18599 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 6th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1020.60 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1021.03 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1023.68 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1023.68 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1023.68 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1023.93 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1023.93 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1027.50 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1027.50 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1029.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1029.25 (MB), peak = 1029.25 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13018 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18600 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 509\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 7th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1029.56 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1029.56 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1029.92 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1029.92 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1029.92 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1031.78 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1031.78 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.05 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.05 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1033.26 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1033.26 (MB), peak = 1033.26 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13020 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18597 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 8th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.26 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.26 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.46 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.46 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.48 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.86 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.86 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.86 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.87 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2 Via2 Metal3\n", - "Cut Spacing 1 0 0 0\n", - "Metal Spacing 0 14 0 1\n", - "Short 1 4 1 3\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 1033.91 (MB), peak = 1033.91 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13051 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18567 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 267\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 9th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.91 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1033.91 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.00 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.00 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.00 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.00 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.23 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.23 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.41 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.41 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1034.48 (MB), peak = 1034.48 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25502 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 10th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.83 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1034.83 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1036.04 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1036.04 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1036.04 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1036.68 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1036.68 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.07 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.07 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.07 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1039.07 (MB), peak = 1039.07 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 11th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.07 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.07 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.38 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.38 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1039.38 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.32 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1040.32 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.60 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.60 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.60 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1042.74 (MB), peak = 1042.74 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25501 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 12th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.74 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1042.74 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1044.59 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1044.59 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1044.59 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1044.77 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1044.77 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1048.91 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1048.91 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1048.95 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1048.95 (MB), peak = 1048.95 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 13th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1048.95 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1048.95 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1055.80 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1055.80 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1056.01 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1057.74 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1057.74 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1061.18 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1061.18 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1066.46 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1066.46 (MB), peak = 1066.46 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 14th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.46 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.46 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.77 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1066.77 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1067.88 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1068.44 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1068.44 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1071.43 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1071.43 (MB), peak = 1071.43 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13053 um.\n", - "Total wire length on LAYER Metal2 = 25501 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 15th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.43 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.54 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.54 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.72 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1071.72 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1072.73 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1073.08 (MB), peak = 1073.08 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 16th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.08 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.08 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.39 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.51 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1073.88 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 15\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1074.10 (MB), peak = 1074.10 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13052 um.\n", - "Total wire length on LAYER Metal2 = 25503 um.\n", - "Total wire length on LAYER Metal3 = 18564 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 778.\n", - "Up-via summary (total 778):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 265\n", - " Metal3 0\n", - "--------------\n", - " 778\n", - "\n", - "\n", - "[INFO DRT-0195] Start 17th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1074.10 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1077.75 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1077.80 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1077.91 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1079.05 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1079.05 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1082.64 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1082.64 (MB).\n", - " Completing 100% with 28 violations.\n", - " elapsed time = 00:00:01, memory = 1082.86 (MB).\n", - "[INFO DRT-0199] Number of violations = 28.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 2 0\n", - "Metal Spacing 0 0 17\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:01, memory = 1085.33 (MB), peak = 1085.33 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25496 um.\n", - "Total wire length on LAYER Metal3 = 18473 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 18th optimization iteration.\n", - " Completing 10% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1085.33 (MB).\n", - " Completing 20% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1085.33 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1086.18 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1086.18 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1086.18 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1086.52 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1086.52 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.15 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.15 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.15 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 16\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1087.34 (MB), peak = 1087.34 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18476 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 19th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.52 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1087.52 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.52 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.52 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.52 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.52 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.52 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 16\n", - "Short 3 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1088.77 (MB), peak = 1088.77 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13146 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 20th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.77 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.98 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.98 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1088.98 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1089.03 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.77 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1090.77 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1091.82 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1091.82 (MB), peak = 1091.82 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 21st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.82 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.82 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.92 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.92 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.92 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.92 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1091.92 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1094.58 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1094.58 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1094.65 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1094.65 (MB), peak = 1094.65 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13145 um.\n", - "Total wire length on LAYER Metal2 = 25494 um.\n", - "Total wire length on LAYER Metal3 = 18478 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 774.\n", - "Up-via summary (total 774):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 511\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 774\n", - "\n", - "\n", - "[INFO DRT-0195] Start 22nd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.88 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.88 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.93 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.93 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.93 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.93 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1094.93 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1096.21 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1096.21 (MB), peak = 1096.21 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18479 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 23rd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.21 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.35 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.35 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.35 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.35 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.79 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1096.79 (MB), peak = 1096.79 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13149 um.\n", - "Total wire length on LAYER Metal2 = 25494 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 24th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.79 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.79 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.79 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1096.79 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1097.50 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1097.50 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1097.50 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1097.50 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1097.50 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.12 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:12, elapsed time = 00:00:00, memory = 1098.12 (MB), peak = 1098.12 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13148 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18477 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 776.\n", - "Up-via summary (total 776):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 513\n", - " Metal2 263\n", - " Metal3 0\n", - "--------------\n", - " 776\n", - "\n", - "\n", - "[INFO DRT-0195] Start 25th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.12 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.34 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.43 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.43 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.43 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.43 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.43 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.45 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.45 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1098.45 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1099.14 (MB), peak = 1099.14 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25485 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 26th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1099.14 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.34 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.34 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.34 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1100.42 (MB), peak = 1100.42 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 27th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1100.42 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1102.69 (MB), peak = 1102.69 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25484 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 28th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1102.69 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1106.27 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1106.27 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1106.27 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1106.27 (MB), peak = 1106.27 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13113 um.\n", - "Total wire length on LAYER Metal2 = 25485 um.\n", - "Total wire length on LAYER Metal3 = 18514 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 29th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1106.27 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1106.27 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1107.11 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1107.11 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1107.11 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1107.78 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1107.78 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1113.15 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1113.16 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1114.54 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1114.54 (MB), peak = 1114.54 (MB)\n", - "Total wire length = 57115 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18515 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 30th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1114.54 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1114.56 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.05 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1118.06 (MB), peak = 1118.06 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13114 um.\n", - "Total wire length on LAYER Metal2 = 25488 um.\n", - "Total wire length on LAYER Metal3 = 18515 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 31st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.06 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.34 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.34 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.34 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1118.34 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.21 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:13, elapsed time = 00:00:00, memory = 1119.21 (MB), peak = 1119.21 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13112 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 32nd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.21 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.21 (MB).\n", - " Completing 30% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.21 (MB).\n", - " Completing 40% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.21 (MB).\n", - " Completing 50% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1119.25 (MB), peak = 1119.25 (MB)\n", - "Total wire length = 57113 um.\n", - "Total wire length on LAYER Metal1 = 13112 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18513 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 518\n", - " Metal2 269\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 33rd optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.25 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1119.30 (MB).\n", - " Completing 30% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 40% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 50% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 60% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 70% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 80% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 90% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - " Completing 100% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1119.42 (MB).\n", - "[INFO DRT-0199] Number of violations = 28.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 19\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1120.10 (MB), peak = 1120.10 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13109 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 34th optimization iteration.\n", - " Completing 10% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.10 (MB).\n", - " Completing 20% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 30% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 40% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 50% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 60% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 70% with 28 violations.\n", - " elapsed time = 00:00:00, memory = 1120.27 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1121.86 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1121.86 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1121.86 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1121.86 (MB), peak = 1121.86 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 35th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1121.86 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1121.86 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1122.07 (MB), peak = 1122.07 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 36th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.07 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.11 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.11 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.11 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.11 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.11 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.16 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.16 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.18 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1122.18 (MB), peak = 1122.18 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25488 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 37th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.25 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.25 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.29 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.29 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.29 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.44 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.44 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.44 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1122.44 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.34 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1125.34 (MB), peak = 1125.34 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13106 um.\n", - "Total wire length on LAYER Metal2 = 25495 um.\n", - "Total wire length on LAYER Metal3 = 18524 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 38th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.34 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.34 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.56 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.56 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.56 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.61 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1125.61 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1126.70 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1126.70 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.91 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1126.91 (MB), peak = 1126.91 (MB)\n", - "Total wire length = 57127 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18525 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 39th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.91 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.91 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1126.92 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1127.94 (MB), peak = 1127.94 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 40th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1127.94 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:00, memory = 1129.40 (MB), peak = 1129.40 (MB)\n", - "Total wire length = 57126 um.\n", - "Total wire length on LAYER Metal1 = 13110 um.\n", - "Total wire length on LAYER Metal2 = 25493 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 789.\n", - "Up-via summary (total 789):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 789\n", - "\n", - "\n", - "[INFO DRT-0195] Start 41st optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1129.40 (MB), peak = 1129.40 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 42nd optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.40 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.42 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.42 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.42 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:01, memory = 1129.42 (MB), peak = 1129.42 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 43rd optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.42 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.64 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.88 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.88 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.98 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.98 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1129.98 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1129.98 (MB), peak = 1129.98 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 44th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.98 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1129.98 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1130.24 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1130.24 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1130.24 (MB).\n", - " Completing 60% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1130.24 (MB).\n", - " Completing 70% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1130.24 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1130.30 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1130.30 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1130.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:01, memory = 1130.30 (MB), peak = 1130.30 (MB)\n", - "Total wire length = 57123 um.\n", - "Total wire length on LAYER Metal1 = 13097 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 45th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1130.52 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1130.52 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1130.52 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1130.52 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1130.52 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.10 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.10 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.21 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.21 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:02, memory = 1131.37 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:02, memory = 1131.37 (MB), peak = 1131.37 (MB)\n", - "Total wire length = 57125 um.\n", - "Total wire length on LAYER Metal1 = 13093 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18540 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 273\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 46th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.37 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.40 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.40 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.40 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.40 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.48 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1131.48 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.51 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1131.51 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1132.52 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:17, elapsed time = 00:00:02, memory = 1132.52 (MB), peak = 1132.52 (MB)\n", - "Total wire length = 57123 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25489 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 47th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.52 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.66 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.66 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1132.88 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:01, memory = 1132.88 (MB), peak = 1132.88 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 48th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.88 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1132.88 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1133.07 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1133.07 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.11 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.11 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.11 (MB).\n", - " Completing 80% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.29 (MB).\n", - " Completing 90% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.29 (MB).\n", - " Completing 100% with 25 violations.\n", - " elapsed time = 00:00:01, memory = 1134.29 (MB).\n", - "[INFO DRT-0199] Number of violations = 25.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:14, elapsed time = 00:00:01, memory = 1134.49 (MB), peak = 1134.49 (MB)\n", - "Total wire length = 57122 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 49th optimization iteration.\n", - " Completing 10% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 20% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 30% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 40% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 50% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 60% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 70% with 25 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 80% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 90% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - " Completing 100% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.49 (MB).\n", - "[INFO DRT-0199] Number of violations = 27.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 18\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:16, elapsed time = 00:00:00, memory = 1134.65 (MB), peak = 1134.65 (MB)\n", - "Total wire length = 57118 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18534 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 50th optimization iteration.\n", - " Completing 10% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.65 (MB).\n", - " Completing 20% with 27 violations.\n", - " elapsed time = 00:00:00, memory = 1134.75 (MB).\n", - " Completing 30% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 40% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 50% with 27 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1134.77 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1134.77 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:04, memory = 1134.77 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 4 0\n", - "Metal Spacing 0 16\n", - "Short 0 6\n", - "[INFO DRT-0267] cpu time = 00:00:21, elapsed time = 00:00:04, memory = 1134.77 (MB), peak = 1134.77 (MB)\n", - "Total wire length = 57119 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 51st optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1134.77 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1134.77 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1134.77 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1134.77 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1134.77 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:20, elapsed time = 00:00:03, memory = 1134.77 (MB), peak = 1134.77 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13096 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18534 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 52nd optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1134.77 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1134.77 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:01, memory = 1134.77 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1135.00 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1135.00 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1135.00 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 3 0\n", - "Metal Spacing 0 15\n", - "Short 0 6\n", - "[INFO DRT-0267] cpu time = 00:00:20, elapsed time = 00:00:04, memory = 1135.00 (MB), peak = 1135.00 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 53rd optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1135.00 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1135.00 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1137.14 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1137.14 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1137.14 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1137.14 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1137.14 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1137.14 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1137.14 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:06, memory = 1137.18 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:22, elapsed time = 00:00:06, memory = 1137.18 (MB), peak = 1137.18 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 54th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1137.18 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1137.18 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1137.40 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1137.40 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1137.40 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1137.60 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1137.60 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:03, memory = 1139.70 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:03, memory = 1139.70 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:04, memory = 1140.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:21, elapsed time = 00:00:05, memory = 1140.25 (MB), peak = 1140.25 (MB)\n", - "Total wire length = 57121 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18538 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 55th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.25 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.25 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.25 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.25 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.26 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1140.82 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1140.82 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1140.96 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1140.96 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:02, memory = 1140.96 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:19, elapsed time = 00:00:03, memory = 1140.96 (MB), peak = 1140.96 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 56th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.96 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1140.96 (MB).\n", - " Completing 30% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1141.12 (MB).\n", - " Completing 40% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1141.12 (MB).\n", - " Completing 50% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1141.12 (MB).\n", - " Completing 60% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1141.12 (MB).\n", - " Completing 70% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1141.12 (MB).\n", - " Completing 80% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1141.12 (MB).\n", - " Completing 90% with 22 violations.\n", - " elapsed time = 00:00:01, memory = 1141.12 (MB).\n", - " Completing 100% with 22 violations.\n", - " elapsed time = 00:00:02, memory = 1141.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 22.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 0 5\n", - "[INFO DRT-0267] cpu time = 00:00:18, elapsed time = 00:00:02, memory = 1141.30 (MB), peak = 1141.30 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13095 um.\n", - "Total wire length on LAYER Metal2 = 25487 um.\n", - "Total wire length on LAYER Metal3 = 18536 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 787.\n", - "Up-via summary (total 787):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 516\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 787\n", - "\n", - "\n", - "[INFO DRT-0195] Start 57th optimization iteration.\n", - " Completing 10% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 20% with 22 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 60% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 70% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 80% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 90% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 100% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 26.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 2 0\n", - "Metal Spacing 0 17\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:15, elapsed time = 00:00:00, memory = 1141.30 (MB), peak = 1141.30 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13092 um.\n", - "Total wire length on LAYER Metal2 = 25486 um.\n", - "Total wire length on LAYER Metal3 = 18537 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 58th optimization iteration.\n", - " Completing 10% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 20% with 26 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1141.30 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1141.30 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1141.30 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1141.30 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:03, memory = 1141.30 (MB).\n", - " Completing 80% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1141.30 (MB).\n", - " Completing 90% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1141.30 (MB).\n", - " Completing 100% with 24 violations.\n", - " elapsed time = 00:00:13, memory = 1141.30 (MB).\n", - "[INFO DRT-0199] Number of violations = 24.\n", - "Viol/Layer Via1 Metal2\n", - "Cut Spacing 1 0\n", - "Metal Spacing 0 16\n", - "Short 1 6\n", - "[INFO DRT-0267] cpu time = 00:00:38, elapsed time = 00:00:13, memory = 1141.30 (MB), peak = 1141.30 (MB)\n", - "Total wire length = 57120 um.\n", - "Total wire length on LAYER Metal1 = 13093 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18535 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 785.\n", - "Up-via summary (total 785):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 514\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 785\n", - "\n", - "\n", - "[INFO DRT-0195] Start 59th optimization iteration.\n", - " Completing 10% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 20% with 24 violations.\n", - " elapsed time = 00:00:00, memory = 1141.30 (MB).\n", - " Completing 30% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1141.52 (MB).\n", - " Completing 40% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1141.52 (MB).\n", - " Completing 50% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1141.52 (MB).\n", - " Completing 60% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1141.52 (MB).\n", - " Completing 70% with 24 violations.\n", - " elapsed time = 00:00:02, memory = 1141.52 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1141.52 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1141.52 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:09, memory = 1141.52 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:33, elapsed time = 00:00:09, memory = 1141.52 (MB), peak = 1141.52 (MB)\n", - "Total wire length = 57114 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 60th optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1141.52 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1141.52 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1142.96 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1142.96 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1142.96 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1142.96 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1142.96 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.25 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.25 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.25 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:41, elapsed time = 00:00:10, memory = 1144.25 (MB), peak = 1144.25 (MB)\n", - "Total wire length = 57114 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25490 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 61st optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1144.25 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1144.25 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:07, memory = 1144.25 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:07, memory = 1144.25 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:07, memory = 1144.25 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.96 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.96 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.96 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:10, memory = 1144.96 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:13, memory = 1145.38 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:33, elapsed time = 00:00:14, memory = 1145.38 (MB), peak = 1145.38 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18521 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 62nd optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1145.38 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1145.38 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1145.38 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1145.38 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1145.38 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1145.57 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1145.57 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:12, memory = 1147.86 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:12, memory = 1147.97 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:14, memory = 1147.97 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:35, elapsed time = 00:00:14, memory = 1147.97 (MB), peak = 1147.97 (MB)\n", - "Total wire length = 57117 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25491 um.\n", - "Total wire length on LAYER Metal3 = 18522 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 63rd optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1147.97 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1147.97 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1147.97 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:06, memory = 1147.97 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:08, memory = 1147.97 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:34, elapsed time = 00:00:09, memory = 1147.97 (MB), peak = 1147.97 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0195] Start 64th optimization iteration.\n", - " Completing 10% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 20% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 30% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 40% with 20 violations.\n", - " elapsed time = 00:00:00, memory = 1147.97 (MB).\n", - " Completing 50% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1148.14 (MB).\n", - " Completing 60% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1148.14 (MB).\n", - " Completing 70% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1148.14 (MB).\n", - " Completing 80% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1148.14 (MB).\n", - " Completing 90% with 20 violations.\n", - " elapsed time = 00:00:05, memory = 1148.14 (MB).\n", - " Completing 100% with 20 violations.\n", - " elapsed time = 00:00:08, memory = 1148.14 (MB).\n", - "[INFO DRT-0199] Number of violations = 20.\n", - "Viol/Layer Metal1 Via1 Metal2\n", - "Cut Spacing 0 1 0\n", - "Metal Spacing 0 0 12\n", - "Short 1 1 5\n", - "[INFO DRT-0267] cpu time = 00:00:30, elapsed time = 00:00:08, memory = 1148.14 (MB), peak = 1148.14 (MB)\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0198] Complete detail routing.\n", - "Total wire length = 57116 um.\n", - "Total wire length on LAYER Metal1 = 13103 um.\n", - "Total wire length on LAYER Metal2 = 25492 um.\n", - "Total wire length on LAYER Metal3 = 18520 um.\n", - "Total wire length on LAYER Metal4 = 0 um.\n", - "Total number of vias = 783.\n", - "Up-via summary (total 783):.\n", - "\n", - "--------------\n", - " Poly2 0\n", - " Metal1 512\n", - " Metal2 271\n", - " Metal3 0\n", - "--------------\n", - " 783\n", - "\n", - "\n", - "[INFO DRT-0267] cpu time = 00:19:55, elapsed time = 00:02:49, memory = 1148.14 (MB), peak = 1148.14 (MB)\n", - "\n", - "[INFO DRT-0180] Post processing.\n", - "Elapsed time: 2:52.37[h:]min:sec. CPU time: user 1204.33 sys 5.92 (702%). Peak memory: 1175896KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_3_route.odb ./results/gf180/fakeram4/80MHz/5_route.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.odb ./results/gf180/fakeram4/80MHz/6_1_fill.odb\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/4_cts.sdc ./results/gf180/fakeram4/80MHz/5_route.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/6_1_fill.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(trap 'mv ./logs/gf180/fakeram4/80MHz/6_report.tmp.log ./logs/gf180/fakeram4/80MHz/6_report.log' EXIT; /usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' /usr/bin/openroad -exit -no_init /Flow/scripts/final_report.tcl -metrics ./logs/gf180/fakeram4/80MHz/6_report.json) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/6_report.tmp.log\n", - "OpenROAD 4759105234654bd6e30af9179e9523c38ede62a5 \n", - "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n", - "Components of this program may be licensed under more restrictive licenses which must be honored.\n", - "[INFO] Deleted 0 routing obstructions\n", - "[INFO RCX-0431] Defined process_corner X with ext_model_index 0\n", - "[INFO RCX-0029] Defined extraction corner X\n", - "[INFO RCX-0008] extracting parasitics of dmem ...\n", - "[INFO RCX-0435] Reading extraction model file /Flow/platforms/gf180/openROAD/rcx/gf180mcu_1p5m_1tm_9k_sp_smim_OPTB_bst.rules ...\n", - "[INFO RCX-0436] RC segment generation dmem (max_merge_res 50.0) ...\n", - "[INFO RCX-0040] Final 508 rc segments\n", - "[INFO RCX-0439] Coupling Cap extraction dmem ...\n", - "[INFO RCX-0440] Coupling threshhold is 0.1000 fF, coupling capacitance less than 0.1000 fF will be grounded.\n", - "[INFO RCX-0043] 6655 wires to be extracted\n", - "[INFO RCX-0442] 88% completion -- 5875 wires have been extracted\n", - "[INFO RCX-0442] 100% completion -- 6655 wires have been extracted\n", - "[INFO RCX-0045] Extract 168 nets, 676 rsegs, 676 caps, 739 ccs\n", - "[INFO RCX-0015] Finished extracting dmem.\n", - "[INFO RCX-0016] Writing SPEF ...\n", - "[INFO RCX-0443] 168 nets finished\n", - "[INFO RCX-0017] Finished writing SPEF ...\n", - "IR drop analysis for power nets is skipped because PWR_NETS_VOLTAGES is undefined\n", - "IR drop analysis for ground nets is skipped because GND_NETS_VOLTAGES is undefined\n", - "\n", - "==========================================================================\n", - "finish check_setup\n", - "--------------------------------------------------------------------------\n", - "Warning: There are 56 unconstrained endpoints.\n", - "\n", - "==========================================================================\n", - "finish report_tns\n", - "--------------------------------------------------------------------------\n", - "tns -16279.10\n", - "\n", - "==========================================================================\n", - "finish report_wns\n", - "--------------------------------------------------------------------------\n", - "wns -213.69\n", - "\n", - "==========================================================================\n", - "finish report_worst_slack\n", - "--------------------------------------------------------------------------\n", - "worst slack -213.69\n", - "\n", - "==========================================================================\n", - "finish report_clock_skew\n", - "--------------------------------------------------------------------------\n", - "Clock clk\n", - "No launch/capture paths found.\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay min\n", - "--------------------------------------------------------------------------\n", - "Startpoint: ce_mem[2] (input port clocked by clk)\n", - "Endpoint: dmem10 (rising edge-triggered flip-flop clocked by clk)\n", - "Path Group: clk\n", - "Path Type: min\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock network delay (propagated)\n", - " 207.50 207.50 ^ input external delay\n", - " 1 0.01 0.00 0.00 207.50 ^ ce_mem[2] (in)\n", - " ce_mem[2] (net)\n", - " 0.00 0.00 207.50 ^ input3/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.10 0.36 0.29 207.79 ^ input3/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " net3 (net)\n", - " 0.36 0.01 207.81 ^ dmem10/GWEN (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 207.81 data arrival time\n", - "\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.66 0.08 0.61 ^ dmem10/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 0.00 0.61 clock reconvergence pessimism\n", - " 2.49 3.10 library hold time\n", - " 3.10 data required time\n", - "-----------------------------------------------------------------------------\n", - " 3.10 data required time\n", - " -207.81 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " 204.70 slack (MET)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -path_delay max\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[3] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.73 0.15 0.68 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.20 1.02 17.70 18.37 v dmem00/Q[3] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net28 (net)\n", - " 1.03 0.05 18.42 v output28/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.07 0.27 18.69 v output28/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[3] (net)\n", - " 0.07 0.00 18.69 v inter_dmem0[3] (out)\n", - " 18.69 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.69 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_checks -unconstrained\n", - "--------------------------------------------------------------------------\n", - "Startpoint: dmem00 (rising edge-triggered flip-flop clocked by clk)\n", - "Endpoint: inter_dmem0[3] (output port clocked by clk)\n", - "Path Group: clk\n", - "Path Type: max\n", - "\n", - "Fanout Cap Slew Delay Time Description\n", - "-----------------------------------------------------------------------------\n", - " 0.00 0.00 clock clk (rise edge)\n", - " 0.00 0.00 clock source latency\n", - " 1 0.15 0.00 0.00 0.00 ^ clk (in)\n", - " clk (net)\n", - " 0.05 0.02 0.02 ^ clkbuf_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.05 0.07 0.12 0.14 ^ clkbuf_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_0_clk (net)\n", - " 0.07 0.00 0.14 ^ clkbuf_1_0_0_clk/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " 2 0.73 0.62 0.39 0.53 ^ clkbuf_1_0_0_clk/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_8)\n", - " clknet_1_0_0_clk (net)\n", - " 0.73 0.15 0.68 ^ dmem00/CLK (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " 1 0.20 1.02 17.70 18.37 v dmem00/Q[3] (gf180mcu_fd_ip_sram__sram256x8m8wm1)\n", - " net28 (net)\n", - " 1.03 0.05 18.42 v output28/I (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " 1 0.00 0.07 0.27 18.69 v output28/Z (gf180mcu_fd_sc_mcu9t5v0__clkbuf_2)\n", - " inter_dmem0[3] (net)\n", - " 0.07 0.00 18.69 v inter_dmem0[3] (out)\n", - " 18.69 data arrival time\n", - "\n", - " 12.50 12.50 clock clk (rise edge)\n", - " 0.00 12.50 clock network delay (propagated)\n", - " 0.00 12.50 clock reconvergence pessimism\n", - " -207.50 -195.00 output external delay\n", - " -195.00 data required time\n", - "-----------------------------------------------------------------------------\n", - " -195.00 data required time\n", - " -18.69 data arrival time\n", - "-----------------------------------------------------------------------------\n", - " -213.69 slack (VIOLATED)\n", - "\n", - "\n", - "\n", - "==========================================================================\n", - "finish report_check_types -max_slew -max_cap -max_fanout -violators\n", - "--------------------------------------------------------------------------\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.3209850788116455\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_limit\n", - "--------------------------------------------------------------------------\n", - "2.799999952316284\n", - "\n", - "==========================================================================\n", - "finish max_slew_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.4718\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_slack\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_fanout_check_limit\n", - "--------------------------------------------------------------------------\n", - "1.0000000150474662e+30\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack\n", - "--------------------------------------------------------------------------\n", - "0.496570885181427\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_limit\n", - "--------------------------------------------------------------------------\n", - "0.751800000667572\n", - "\n", - "==========================================================================\n", - "finish max_capacitance_check_slack_limit\n", - "--------------------------------------------------------------------------\n", - "0.6605\n", - "\n", - "==========================================================================\n", - "finish max_slew_violation_count\n", - "--------------------------------------------------------------------------\n", - "max slew violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_fanout_violation_count\n", - "--------------------------------------------------------------------------\n", - "max fanout violation count 0\n", - "\n", - "==========================================================================\n", - "finish max_cap_violation_count\n", - "--------------------------------------------------------------------------\n", - "max cap violation count 0\n", - "\n", - "==========================================================================\n", - "finish setup_violation_count\n", - "--------------------------------------------------------------------------\n", - "setup violation count 80\n", - "\n", - "==========================================================================\n", - "finish hold_violation_count\n", - "--------------------------------------------------------------------------\n", - "hold violation count 0\n", - "\n", - "==========================================================================\n", - "finish critical path delay\n", - "--------------------------------------------------------------------------\n", - "18.6868\n", - "\n", - "==========================================================================\n", - "finish critical path slack\n", - "--------------------------------------------------------------------------\n", - "-213.6868\n", - "\n", - "==========================================================================\n", - "finish slack div critical path delay\n", - "--------------------------------------------------------------------------\n", - "-1143.517349\n", - "\n", - "==========================================================================\n", - "finish report_power\n", - "--------------------------------------------------------------------------\n", - "Group Internal Switching Leakage Total\n", - " Power Power Power Power (Watts)\n", - "----------------------------------------------------------------\n", - "Sequential 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "Combinational 9.59e-05 6.12e-04 1.29e-08 7.08e-04 2.0%\n", - "Clock 6.39e-04 3.51e-03 3.78e-07 4.15e-03 11.5%\n", - "Macro 3.13e-02 0.00e+00 1.77e-07 3.13e-02 86.6%\n", - "Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0%\n", - "----------------------------------------------------------------\n", - "Total 3.20e-02 4.13e-03 5.68e-07 3.61e-02 100.0%\n", - " 88.6% 11.4% 0.0%\n", - "\n", - "==========================================================================\n", - "finish report_design_area\n", - "--------------------------------------------------------------------------\n", - "Design area 598965 u^2 54% utilization.\n", - "\n", - "[WARNING GUI-0076] QStandardPaths: XDG_RUNTIME_DIR not set, defaulting to '/tmp/runtime-root'\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_routing.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_placement.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_clocks.webp.png\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/final_resizer.webp.png\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0076] This plugin does not support propagateSizeHints()\n", - "[WARNING GUI-0010] File path does not end with a valid extension, new path is: ./reports/gf180/fakeram4/80MHz/cts_clk.webp.png\n", - "Elapsed time: 0:02.57[h:]min:sec. CPU time: user 2.33 sys 0.17 (97%). Peak memory: 200036KB.\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp ./results/gf180/fakeram4/80MHz/5_route.sdc ./results/gf180/fakeram4/80MHz/6_final.sdc\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "cp /Flow/platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_tech.lef ./objects/gf180/fakeram4/80MHz/klayout_tech.lef\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "sed 's,.*,../../../../objects/gf180/fakeram4/80MHz/klayout_tech.lef ../../../../platforms/gf180/lef/gf180mcu_4LM_1TM_9K_9t_sc.lef ../../../../designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.lef,g' /Flow/platforms/gf180/KLayout/gf180mcu_5LM_1TM_9K_9t.lyt > ./objects/gf180/fakeram4/80MHz/klayout.lyt\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "(/usr/bin/time -f 'Elapsed time: %E[h:]min:sec. CPU time: user %U sys %S (%P). Peak memory: %MKB.' stdbuf -o L /usr/bin/klayout -zz -rd design_name=dmem \\\n", - " -rd in_def=./results/gf180/fakeram4/80MHz/6_final.def \\\n", - " -rd in_files=\"/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tieh.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.gds 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/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_64.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tiel.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__filltie.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addf_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or4_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_20.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_32.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_12.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__antenna.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_20.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__hold.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_2.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.gds /Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.gds ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds ./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds \" \\\n", - " -rd config_file= \\\n", - " -rd seal_file=\"\" \\\n", - " -rd out_file=./results/gf180/fakeram4/80MHz/6_1_merged.gds \\\n", - " -rd tech_file=./objects/gf180/fakeram4/80MHz/klayout.lyt \\\n", - " -rd layer_map=/Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap \\\n", - " -r /Flow/util/def2stream.py) 2>&1 | tee ./logs/gf180/fakeram4/80MHz/6_1_merge.log\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 12: purpose VIAFILL ignored for layer Metal1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 13: purpose VIAFILLOPC ignored for layer Metal1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 16: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 24: purpose VIAFILL ignored for layer Via1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 25: purpose VIAFILLOPC ignored for layer Via1\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 37: purpose VIAFILL ignored for layer Metal2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 38: purpose VIAFILLOPC ignored for layer Metal2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 41: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 49: purpose VIAFILL ignored for layer Via2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 50: purpose VIAFILLOPC ignored for layer Via2\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 62: purpose VIAFILL ignored for layer Metal3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 63: purpose VIAFILLOPC ignored for layer Metal3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 66: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 74: purpose VIAFILL ignored for layer Via3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 75: purpose VIAFILLOPC ignored for layer Via3\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 87: purpose VIAFILL ignored for layer Metal4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 88: purpose VIAFILLOPC ignored for layer Metal4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 91: NAME record ignored for purpose: SPNET\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 99: purpose VIAFILL ignored for layer Via4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 100: purpose VIAFILLOPC ignored for layer Via4\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 112: purpose VIAFILL ignored for layer Metal5\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 113: purpose VIAFILLOPC ignored for layer Metal5\n", - "Warning: Reading layer map file /Flow/platforms/gf180/gds/9t/gf180mcu_5LM_1TM_9K_9t_edi2gds.layermap, line 116: NAME record ignored for purpose: SPNET\n", - "Warning: No mapping for purpose 'OUTLINE' - layer is ignored\n", - "Warning: No mapping for purpose 'BLOCKAGE' - layer is ignored\n", - "[INFO] Reporting cells prior to loading DEF ...\n", - "[INFO] Reading DEF ...\n", - "[INFO] Clearing cells...\n", - "[INFO] Merging GDS/OAS files...\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__invz_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__tieh.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand4_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.gds\n", - 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"\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai21_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai222_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__latq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__or2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand3_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__addh_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__bufz_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlya_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fill_32.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_12.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__antenna.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and3_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nand2_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai31_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai32_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai221_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__inv_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__buf_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai33_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai22_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__and2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__hold.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__oai211_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor2_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__mux4_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__nor3_2.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.gds\n", - "\t/Flow/platforms/gf180/gds/9t/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.gds\n", - "\t./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds\n", - "\t./designs/gf180sram/gf180mcu_fd_ip_sram__sram256x8m8wm1.gds\n", - "[INFO] Copying toplevel cell 'dmem'\n", - "WARNING: no fill config file specified\n", - "[INFO] Checking for missing cell from GDS/OAS...\n", - "[INFO] All LEF cells have matching GDS/OAS cells\n", - "[INFO] Checking for orphan cell in the final layout...\n", - "[INFO] No orphan cells\n", - "[INFO] Writing out GDS/OAS './results/gf180/fakeram4/80MHz/6_1_merged.gds'\n", - "Elapsed time: 0:13.89[h:]min:sec. CPU time: user 13.21 sys 0.40 (98%). Peak memory: 406256KB.\n", - "cp results/gf180/fakeram4/80MHz/6_1_merged.gds results/gf180/fakeram4/80MHz/6_final.gds\n", - "Makefile:371: warning: overriding recipe for target '&'\n", - "Makefile:253: warning: ignoring old recipe for target '&'\n", - "./logs/gf180/fakeram4_gf180mcu_fd_ip_sram__sram256x8m8wm1/80MHz/\n", - "./logs/gf180/fakeram4/80MHz\n", - "Log Elapsed seconds\n", - "2_6_floorplan_pdn 1\n", - "3_1_place_gp_skip_io 1\n", - "3_3_place_gp 1\n", - "3_4_place_resized 1\n", - "4_1_cts 3\n", - "5_1_grt 1\n", - "5_3_route 172\n", - "6_1_merge 13\n", - "6_report 2\n", - "succeed!\n" + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Waiting for the script to complete. Checking again after 20 seconds...\n", + "Script execution in the container has completed!\n" + ] + } + ], + "source": [ + "import os \n", + "import time \n", + " \n", + "# Define the waiting interval and the maximum waiting time.\n", + "wait_interval = 20 \n", + "max_wait_time = 3600 \n", + " \n", + "container_name = \"Open3DFlow_s\" \n", + "marker_file = \"./Results/script_completed.txt\" \n", + "marker_file_exists = False \n", + "start_time = time.time() \n", + " \n", + "# Poll to check if the marker file exists. \n", + "while not marker_file_exists and (time.time() - start_time) < max_wait_time: \n", + " if os.path.exists(marker_file): \n", + " marker_file_exists = True \n", + " else: \n", + " print(f\"Waiting for the script to complete. Checking again after {wait_interval} seconds...\") \n", + " time.sleep(wait_interval) \n", + " \n", + "if marker_file_exists: \n", + " print(\"Script execution in the container has completed!\") \n", + "else: \n", + " print(f\"Script did not complete within {max_wait_time} seconds.\") " + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Looking in indexes: https://mirrors.aliyun.com/pypi/simple/\n", + "Requirement already satisfied: gdstk in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (0.9.50)\n", + "Requirement already satisfied: matplotlib in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (3.2.2)\n", + "Requirement already satisfied: typing-extensions; python_version < \"3.11\" in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from gdstk) (4.4.0)\n", + "Requirement already satisfied: numpy in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from gdstk) (1.18.5)\n", + "Requirement already satisfied: cycler>=0.10 in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from matplotlib) (0.10.0)\n", + "Requirement already satisfied: kiwisolver>=1.0.1 in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from matplotlib) (1.2.0)\n", + "Requirement already satisfied: pyparsing!=2.0.4,!=2.1.2,!=2.1.6,>=2.0.1 in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from matplotlib) (2.4.7)\n", + "Requirement already satisfied: python-dateutil>=2.1 in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from matplotlib) (2.8.1)\n", + "Requirement already satisfied: six in /work/stu/yzhu/anaconda3/lib/python3.8/site-packages (from cycler>=0.10->matplotlib) (1.15.0)\n" + ] + } + ], + "source": [ + "# insall the dependencies\n", + "!pip install gdstk matplotlib" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "This is the die image of the sub die (Core Die):" + ] + }, + { + "cell_type": "code", + "execution_count": 54, + "metadata": {}, + "outputs": [ + { + "data": { + "image/png": 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QxzGBcR9HSlEFxW+aFUJYyt01TjhmVYXa78cQIASOjeTv2FNufU+1fYsYUmKt8c5RuRlNXfMkFPyCWfNCdizrhqYf1zZJEow2BOC76Rnftgl/3NVUwzXOuZHXaBqkGJ3599qcZ07xPOyohj1xHOO9x1lL5Wao7ZZf9aes7Ri+fxV/O+krQRxSjmGKUgolPMpZVLAUdk9QEqkkehjIsdC15JEiCjMSayi6PZHtiaaHAyDqe9KsQvqI2PXMdUfbtUQmQjDeYBVFJKFCOUE8NJTDHgHkOFRXkwZDcJ44VERBkQ8dJfU0ho4AFFhsN6CUQTnIuwYrJP308GTBIIeBIkRE8gjvLHm3p5wcRykcqhtDlSwolE9IhKPqG0LfkgeH0gPeeyoVyAaBZEFke0q/RyiFYAovgkFqTeoUSjpSM1B0e6QUxMaSJCnGaLwPJKJA+ZjUdcy1R3U1sR3Dj9haSjyxK5BOEHc1pd6PsBg3hTUxMZLIVURCkOuG0jkSp5F6QCCIbYcfGkQ4QXpBpG+Y6YZYX5ENhqACzrckQ4LyDuU0ebND4oiGgXksEd0eJRVpyFF+TuYds6HBhUBse2JjxgdFBTKdIkNJYnsKvSfHYrQeHZ7XyGEgCRmCjEBP1jliG9PrHsIeaWKcEbg0RXqHHRpc2CFMjN51+MRjwi0xjwCL8hFps6Po9sQmRimFtQYhJQURys1QUlDoGicsufC4bk/qMwSCwkiUcMTOUnQ1sXB0fYd3jkIG6BoyAYoF0bQ2DD0IQR7GsCaEQBwqlCvJnaHSNdZaCuGg65BCkvqU1CpUcKS6p2RP6lOctRhryaXHdzWxXCBFPFEGX5NQ5S7lNHo78FLSLI757PwMq+QBbifJCMGOekH31rJPS16cP0NFakQRUgICYwxvW8VwpdlWCz55mKO1PoQq3nuklNxcOx5vDJdnJ7zMnwKjh9Z6RCf4wO7Csu48Fyc/z8sckmRk82GEwHLQ1JcBOThePzjibTnG3sAUHhiWJtBeeKxzvHz6kGscTHG61hohJJGP6F921LHg+aMHNM6SJMkBbqdJitr09FeefTrjxfkzphz2uDZxgrGGZxtHvw1s1wUvzjLEBKGVikbOJgRubzzDznGzmPHDsxI9DKho5Iecc6Rxwu7VwLp1vHlwwovUEQIkcYw24zomHupXhsTBm+Nf5E2uiKL4QOCZtSHtWuxnAkRMc/r3+aT4gO3xKUNZEJKADpqbPKdrclpZ8eLxI3oxhl7XWUY/DEgpOLIx/Wcdm1Lx/OQMD0TqHTmapikn1wP9jWNTzfhs/eG49m5c57tx3d44+n2gPv4OLx4tiSKFNpruqGWXl0gE9fXA0Aiujpe8efQRu3mFTTQu8dSzPZ+qBzRvWnIh+OzJKS8xKKUOiFlKwdxC+8oggVenv8wmGsOLoe+J4ggQ9J2lu3A0suKzB2eEdLzX3nvSdOSY5l043O9PHz1jmNKjd/sqBPh4iOjf9Fwv1zxfPsT7Mdum9RiqRFHEty81/c5zvVzwcvExUTQhjruwpuvYXQX6DlwfAeZLf8a/UnJUSomQAukC5faKJ/tXeCVRSjIMA0Ve0HYtZ2pJ7k6Y1Xue7t6O6VijiaIYGFO3J8kD0qFi2W74qO9p2/aASEZIGbH2J6Q65fTNa56asdgqzwuaZiSmggvMwwNyn3L+8g1NqKcUazcdm+PagUo+JbOCB598zqxQB7iepRmDHpiFiIKnaGt48smfUpoOGHmLphnh+ON0QdauqaTlgx9esOu7ieAbmfaqqjitIQvnzJqap/u3CKkQYkQcaZqNaUw3J+OExf6KZ7s9Qo6h2R2Z6H1gxSmpq1g3l3zceuq6PhCe1oxhz7w/InUJ55+/5NbeTkRc8Q5xBEllzylEwvkPPyWJ3egIBw1CMDxt8W1DpL9BOqSUb/9XPrz4JdrwB8xvFoQi0PqW9eYBefs9Cj/w9AeXDMGhtT6Qo1IqHmbHZN2MpbU823yGD4EoHkMv5xxVVXHcJmRuzbLd8OTtFXmeo82EOJIUPQyswjEZC6rrf8fTJiGOYgbdsX22Yfl8jURQxcekQ8XJZ284D69YvTqiLzpsYbk+uuTDF9+l9EuyNuXRi08w/YYoilFKYq1FCMGMmMI+QAnBox88Zy7GNW3qZiRHhWBtJHl4hPaaJ/VnRMW4r5xzlEVJ27WcUpHxgFnb8qy7ptcDIMjzd4jjNDsn60qO/MCzt6+xzo5EedchpCRLU1Z9RebnHPU3PH1zS5qlWGtHdFKUY7pWPCQTFcq7rwfiCIER4glxILucEFghaWVEUBIlFYP0BBnRyYhBKpyXWCHpZEQkI4wMRCqGEOikRUuFFwKNolMx7XQcAbz0xCrGIHHAICStiEaYNh3rZATBY73EC0kvFW2I8FIxyGiU7cgYJx1OjOfpRUSnIjo5xp9eRgzSEXmFR+AQdFLRyYhAQKiETmqkkPQiwguBE5JOxeM5RISRHo9HqZhBBDwCE8Z5yzsyWAa8jNDSo6drmWn9hBQ4CU7FGAcejwnT2ghJp8bxGDGey0qQKsYKiUfQC0U7rZtQMZ2MMSIimcbqhKCXEZ2UWDGOQUiBVRlOGDwKLyRGZPQywZAzyJQgAlo4tIjxQuIQtCJCC8kgPbFKaGWEkop+GouVko54EmZFOAk2CJSK0WKctxaSVipQMdqNKNZKhZYR2k/nETGdjLAyopcxWma0MkIy7jsvBINQDCKllRGDjHFSokVOr2JcmPbEtDaxjFBKYfwooopQOARM+7MVgIjGfaWi8X47cH663zIiVjGtNPggEXI8dgjjnGwQdDKikw6BABXTyzG1PjAdIxUdMTZAkBG9jJBSElSMEQonBFooWhHhZYyVAiOB6ZkyYeQ33OSMv2ya4ytBHFEUHxCHjGOsKjCpYHtUYdWo47DWTAKjnr2OMDeCPo7YnKxRUYyxZkQsjG/gZkixN46+yHh7+g5iCwTeO4SQtFuJC47maMEmWSMYc+TD0JMkKXhPfy3QPexXj9mkYyqzH3oI0CYxYjAMNzGJcuxOPuCqiA+hSnoX1jgYriNsbNk8XLLxlkCgnd7QUgq2IsN8rukjuD6b0VhDmo1ZleA9XZqxyDRmo9BJxu3xGoQEMYUXUwan3YGpFV11wu3pw2nt7CELEUKg2ypsA235kLcnGcOyn9DYiE66JKa/DNgu0JzO2ESnEAJNnExEqyIJguEioJ2gXn7Aba5Ips8BzHogyTvCmwxLhFn+AlfiQ/qVQsQFJIGBgU7N0NscI1K2D1b0BIw16CxnWPYIKdmHEU21heRmWRCmPTNmiRx9mtIkFrsT9HnKdnFMGyejjgOmcQ30W4lpJf3qEbfrxYg4zEC7rrFuhgT0PmBRNMsn7E6OcFGFSTU+9bSzHW/1Q4Zri3GS3fkHbHxHpBSIMVsnpCQ4gbkAJ2C3/oitgiHL6bqWaEJ2Ue8x1wotPJuTb0CaYIwddRwTqq17idkohiRlc34yZVWgiWOMHTUqjc0xTrOvKm5mFd77KVvXI6QgUhHttcO2knaWsSlPieLoEKoMeU7XtOhNhK9HnlCpwJcNOr4SxHGXxgohEKwlMTV5rznbvCRM6dhhGA66h6N4RRrOqeot57sLojhGaz3B7UDX9SzzRyR6RtXe8qQflapfCFWiiDlnxDpjdbnnvH8DjJmQMYeegR91ClnIOPr8c87DjjwvDqFIURTYtqeIPiK1cPz8JXmhaNtRznyXb5+FiDz6CG00Z59ekNyRo2VJ04xw/DRbkfbHlMLwsH/Nrhu1JHehymw2Y11DKh9R1HvOt2+QagxV7lLVWmsWfkkanTHbXfBgvztkke6UlsF7Zuohia+Y79/wpPPs9/t3oYo1lEVJpU9JXMr61RXn+uagO2maMVRJkBThEZlIOXr+pxC59zgbweA6fNugzLeIh5T86v/g0ZuOjfp/mN0sCYWn8y3zzUOy7pfJXM9Z9xqNZxh6Fosl+/0epSTH+SlJt2TmDA9vn0/p2Hehymw2Y9mlJOGYWX3D2eUFeVGM8w3hkEKfcUoqV+Sb73N+k5DECf3QsXNbFp+skECenZHoGav2FcfiFctXa/qiwxUWefyWxy+/Sy7WpF3Gycu31N2YVVFKYcyInGciJvOPkVJysv0BGXZU3e73ZFmGEIKVkaTyGZkbONs9Jy7zSenqJq1Qy1rMSNVjirbmvL2iG3qE4LAHQwisi0ckfcXK9zx8+xnmLsPWtUipyNKU+TAnYcmiveI8XI3KX+swxozaqP2eQj1FqhnOObz3Xw/EoZSaMisCJSV4iS4XbOYxbiJHrTWjd2w79i7F7BL6XHK7qiaOwyDEqKQ02lC7ErsV9FnE27Vg0ANRFB1CIiEkbZPhamhWJbeyRAgxIo5lTzohjm6borVkP3vIbXxKP8nIQwg0STIijroi1p798hnX+biBCJBmGcPQE5xE73JMlLA9K7h1Yw6+TROGKR27UgXmAjqVcnP0jNpohvccR59lzHKHqTN0FLNZlu/Ssc6NhJoeaJsI02V02Qm3RydjKtv8COJoMkyn6BbnvF3H9Iv+sDbGGLokobtJsAPUx4+5ZQ0E2jiZ1jEmDTDcJBgv2a+esclGsdGdxkWvBuKiw79d4EKMXn6XK/8B/dIjZQlZYAgDnVyi9zmahO1JQRc8xmh0UdDPe6SS7GSFvfC0WcZ19RFBTAShGUvyuzTj8S5gm4QuOWFTzmmSBHeHOKZxdU2K6WP07DGbYk4cjVmVerXD6wUSwdBHWJFQV4/YHc8IYo7ONC61tItTrrqn6J3AuJj96VM2Zo2K3idHFd4L9E2CRLA9/pCdCgwTP9TGMSGA0gGzG+e9WX40IY6RHNVTGn+vo+l+R2xOFnR6XNs6jjHGAoGaOfbKs68ybvIENyGWruuQUhJFEe1GYvuYJj/lNl++S8c6hy4K2rpmaEqsiRAi+fogjjtSyTmHdY6ABz0g91uIRjWp1wPSDMi+Q1IhvUK4AbnfI+MIacyBHLX9uOGES6DviDuPaRtkNL5VVRgRh9SAU4hOI/0WISDJc0zTICbHIc0K6WNk1yD7DmEG5CTwirMc3/UIkyJsQNQ7EmLchEikSVFaI/04FmENom6Qdvx+4gtM0yClQsYO4QoUnqjdv7uW0eA9SagQrUW4CFyH3E/pWAHBGKROkVojdIHwEcJ2yP0wprmdJU4SmDamMEuES6FriLsI3dTIKVSR1hLnOdKU4BQ0LSrUY+ovL6Z1jBBIhF0iiBDNHmkCIk7GMQhBvNTQ1uBzRgLohrirob9BtBoCBN9CJ5DuCLxG7PcoPE5rEuHRdT2FryBcinKeqNnhQkBECukcwTkSXyF7AVYiQovwO+K8gIkclcmY/RJ6hnQSoRtk65FRjNID8aJG1qAAGWYIJxFdjeo2yL1H2gGcR6S3xN0R0uUIBzQNUu9R0chxWGMRUiCCQtglUkhkvUXK8RyiaVDpiDjkEMY9EQxyvyXyBb7vwDmk08iuQ7ps3MN+QOyacS8w7lE/vbzEtM8j61DNjmAt0g7j96UkTjPkkIAVyL5F2oYoTcfyA2MRViObGoxChBxvLVZ9+W0OvhLEcSfMiqKIKALpBKnVrNxm1HFMhVpF0LRty0xB5Asy17NuxgId/Z6Oo+97qjQncpLSdayblqxriSfH4b0fa2RCTORSZrpjrTejjsMPpE1DakfHkYWCyAvm3Z41NUXQI0wkkLse1w2kaknsYdntUEjyO2mwexeqJGIJ1rDudmBaCNO1uhYlFcsUIheTeMuq2RL1LbkfDoijxDDvJTEzsjCwbjeIKRtljBmvpQdKF4hEQWFajtr6EKrEZqxl8d5TiJTYKSrTsm4c6RR+wMgPFX4gsxGxS1gMLWuzGbMqfiBr24OOI7UFsQgs+h3OjKHKMOk4+q4lDC0yrIh8IDMXrJoHlPo1s2FBkAEZWkotidxTUmdYt9tDVmWmPEkzOo5FHhM5RaY16+EWRyCeOA7nHCWGakiJfUbhetZ6Q+6Hg8Q+tWMqtCAmIiU1W9bNMBamDR2yu2HZWCSCJImJXMSsr5n1b1m1niF0WCymvGTVHBMHQewyVn3NutuMLyGpcG50HDNiElcihWSpd0TCUARN2takNkUIwcJIYl9wd/EAACAASURBVBakftznEQPDVIRYYsZSBipiMScLA0fdjm6421f9QXI+y3MiL8mHnrW7xTo3PiddO+o4bEqhZ8Qhphxa1vqW1KaT5NxQCkPd7MlFRSQiIikOz9GXaV8p4rDWYgP0eUWdKl6enU46jndx+jAMrHpJd+XYJQXPz54g4wh30HEw6TgihmvNbTXnB+fZpOOIEIL3dByex1vDxekJL7LHMDmxYRiI4wThPdtLz7r3vDn+Ns9zQTrF8YRAnCTIXlO/FQht+fxsxVX1vo4jwRjNykJzEbDe8fzJA274IoSWUiJDTP9i1HF8+uicxplJx2Gn3H6K3Ax014FdWvH87PEXQpU4HnUATzaOfgubVc4nZylSSpy1qCg6hCq3N4F+77meV/zgbKyHiVQEk4YiSxK2rwyrzvH6wTHP41FxGk8ko1IRaYD6tSGxgtePv8ubIiKKokOcP5z05PWA/UwiRMT++O/xSfohtyfHdEVBSD3GG66zgm5f0MiK548f0IuAtWNFaz+MauD1nY6jivj0+BTPGN7exeNpmnJ0PdDfem7Lihfrp8RxPOpW4DCu25tAXwfq1Xd4frJCqQhjNe1Rwy4rkUFQ3xqGWnB5vODNo2fsqgqTGHziqGd7PhEPaC46ciF5+fiE5+gv6DiEECwctK8sAsFnp99jO+k4+r4/OOius3QXgUZWvDw/IWTvaonu9nnVQXcd2CcVnzx6ymDf0weZMXP30RDTX/RcL1Z8ujw/6Fru9lUURXzzUtPvPVfLOS9mH32BHM3SjL7r2F2D27Z44w/r9mXaV8RxjDxGFEUoDFnfUGrLo/Y1fkIcRmvyiRw9lXMye8ys2fOkvSFKxrL694vcjuIzkr5g2e/5YOjouo4ojhHcCaIUK39M2iecXL3lsb58V+TWtmRpSvCBuT0l9Smnry7YM5Y6t10HYZRY+26g5AmZhQcv31AWkqHvCUA+iZjmQVH4x2hrePzyk1E5yqgD6aYit0fZkqyfUw6WJ8+vqIeOPC/Qk3K0KMtRx+FPmXcNj5vrEabCqACciNgjOydjzby55ul0bmMNycTEB+9ZhhNSW7Durvig9zQTirjLSBVZzrxfk9qE84vX3JjbQ3Hc3TomSMrhhEwknL18QRz7SaA3qhs3wzVFI4jss5Ecvfnfefa6pVF/yPxmjps5zGBY70/J+79F4TVPnl8xBMegNbPZjKZpUFLyIDsm60vm3vBk/xo/1Z9Ya7CT7uG4TUjdkmW/4/HtFVmWY+xYEZtM4qulPyL1c8rt93myy4kncnRrblm+PEICpVqTDBXHry84k29Yvl7TFz02N2yrDU/ffJPCL8i6jEevPmPob4mjCCHlVOQmqYIi12dIIXj4/CUzMY6xrvckaYpAsDaCzD+k8JpHn75C5Xe1KiM52rQtp6Ek82dUXcszuz0gjnQqQgwhcJqek/UZ6zDw5PZibJtQFId9lSQJq64i8zOOLm95/HaU4x8QR1nR7PfMwgNUKMaXmPzy+3V9hVkVP5JDE8cRJBgf8HhEAOM9SQDjPHZSmboQMN5DAO09CgECtA+4MJ2bwOA8xgeC92N60nscYxv/wKSN8AFEQDiPcR4VxhO4SbtvvEfjSRjHEkKYYmxPUIzHBI+2Ae3HvxMSM47XIPHhbszjvEIYy9Lvxu0C+MBhTtp7YsZzee+JrMMGOepDpvW4a8pivR+v5T0ueDzg/DgeFcR47DQvgp/mBDYE9PR7ocK0dh7l3Lh+I9uE9p7gx7XR3oMPyOkz/954JePcIGA0WD/egxDABYF2Dh/EqDUIctQxTPMOIWCn7xvn0c5hnMdN+hdPwPmAxh9a4GjvcX481gZ/uN/GB6R3mOnNqcLd2oxzcn48RoRxfbX1GOeQCLycxjIdo73H+oANo+5Cu3F9Qwhj+wDnCdIjQsC78V7a6XMPmOAxjHtWe4+Y9qvxalqXcb7ubr7ek07jtSEc7oGd9jiAcOO+CSHghcAHsNM9cNNzcnc/cOP4x2MCRgRwDu881o37UTuPl+AFODfuty/bviLEER04DqmAoGiLGZdHFS56l1XZpqNi7qGO0LeCNk64OD5GTqm5O8ShtWY7pJhbx77IuDj7Ytn9Hcex20j0znKzXHCRLAEmSNkdQpX2RqIHuF0+4zL1bNPskDlIkgTRa9rbGKUc18cfcVW+0zLcqTUHGxhuxjf+mwcrbrw5FMkNQ48QklKM1a19JLg4W1FbfaiODd6T5TnVZkBvFHWccnG8hqkfh7XucK3tHnStaGZnvDmJD6FMFEUjIeYD+51CN7ArH/HmdGTg7+Ja5yxZktJcBnTnuVzPuIhO3oPQ/SFU6S4h95KbxcdcZGqsjp0qOLujFtta3GWCIaJf/goXfJP9MseqHJ8HrLZs4wK9KehExuvzFcP0AqmL8pAZeBsy9KBpC8Xlco4jHObjnCfPc57caPRWsM9TLhbHpOkY5oXAVLWr2W8lupP08w95s1gQqWiUnJ+2aFkigX4fMEKxWT7j5vSUPioxqcGnji5ruFDnDFeGwUsuTuZcHp0QRXd9T0bEMXfQXwqkgKvVN9ko2GYZ3fJdawc6x3CjGETG5XGFyLMDutxNOozjQTJsFG2c8er8mN6YqRAzQesxrLmyGUYb9vMZF7MV3rvDHhVTkVt9ZdGtZFdlXFTnhzDOOcc2yxgWLc02RmsJIkHKr0GoMlbHOu5qSLz3iOAo9zc83L34IjlajvLYk3hNGs6o6i2PdpcHclRNpeFD37POHpHoikW74WnX0E5w/E4wFamIpTgn1RknVzWPuvEPCGV5TtPUZFkGLjDjIVnIOWk+Zxf2hxz7XS8E1w2U8UdkFs5evKTI5aEHR57ndH3HPMTk6kOU0Tx6cUn+5/TjeFSsybojSmF43L9i37/fj8NTliXHrSSVD5k1NY/3bxByFIBZY8mnNPEqLMnkqON4Uu+ndKwhThLsVOS2lA9IfcVqf8HT1tI09Rf6cRR5MYZoLuX84obr4XoMVabQ6k7HUfpHZCLmdPNDoh/px7Htb8l6iPzHJENKcf17PPm8Zx//AbPrBX7u0Z1mVZ+Rdb9E4QaeDG/Gfhx6YD5bUNd7lFKcl2ek/ZyZ1Ty6fYEP7/pxWGepyop1n5GGYxbtLY+uLg6S8zEtPrYDWIgzUrGk2Hyfx7fpgRzduluWn66RQlBkpyTDjOPuFaeTjmMoe2xh2Za3PHnzLXJ5RNZlPHx1RddcT/04JNZZlFRUROT+EVJIzrc/oPzRfhwC1kaRyWfkbuDh7jlROYq+vJv6cTQ1J2JOJh9RtQ1Phiu6P6cfx2n5iLQvWbmOx28/H/uTlBXt1I8jTVMWw5yUJav2ikcX16RTqGKMoZrNqLdbZtFTUjFDeI1XXxPEIcRdIx+BUAorM0yU0iw+wN1xHMZg0oxh0dPaFLfPsLmgXhZjP45JqxACaDPQ2RluJ9GpYnd8PPXjeEeOKqXo60nHMU+pVyPbbdKUruswSQLOo/cF1ki68gF1fIy5E1KFgEkz6AdMXeJMoJ0/YVfFY/wJDMnYB0I5gdnnuChmf/KE2usxVMjGB01KyU7mWKewKmV/9IxaD5g0PfASLs9ZbS2uydBKsV9mo+OYemjoO3TTxNg+xeTH7FZHSCmw1hFPtR0hBIYmx/URw/yU3XFM13WoaKwcttbi0ozhJsYNgnp1yl6MfwfHTI4hiiKSIDC3GTZIuuUT6kzQTyQkQtCdHENr8bczfEhw82+ztx8wzAYiKnzhsJlliBbYXYYlZnf0lIERcVC+Qxx7SpwR6DyjLj/EE6aivZE49nlOvw24OkEna5qywGTZ1D0N+gkJDU2GGxLs7CF1NieKIgYz0B0dE+n5KDnvYxwJXfWQ9rggYsGQDrjM0ud79uEpdiexLmJ/9IBmuZh0SPI9IaPE3mRIIWiPntGogMsyunmHnhBH1odxDxPTLD5E5unhJeGml0Cn48P93h0VB3LUpCnDRNA3foa10FcZdTb22TDpqB+SUjLEMcNG4rqYvjihzuZjZ7pJ+uCyjL46QjcVoQtIviYcx2hj1CqEeK8X7agk9WEMgu96BNxV0IZDNW04nOMuNhv/FOkYa4cQ8IfvB0KYzuunAHziRe7O46fYMYQwtnYN4Qv/ja0Hx8B9REfvjYsxzvV+av56+L6Yrs1hTHdj+MIcwsgZ+Pfn698dO86ad9c79DH54hjufh6PF3/mWoFx/O//njB+8/1r3TVYOszt/XNM94Bw9x0OxxLCj9Q7vPv+4Xa/p0wMAe46Vb6/Nt4HhAgIyaT7mMbw5xwb3j/1F+b77ti7sX5hDiHgvZvmOA3rR4/7M/fs3T69y9DdXe9uD9+d6+5+jseGP3P9cWwe596/P+/uZXhvofy0J50bOaexgOjdZz74H3lO3hvvtNBfWJv3xsWPfO/Ltq+wA9g4aBE8ke5JrGXeTq0D1V3D3bGJThWtiPwpiduxGMZQZdB6TCky6jiK7CFKz8iGDSvfHOL4u5hfKUXOGUpnlLuaxSQ5z6dGsVmWEZwn5SGxzyj1BYuwP7SpCwTyLMf3A4n6kMgKqqtXhEzQ9/3hXH3fMwsRsfoAjGH+9hJnWkKYWg9OOo55tiIyaxJjWL59gxpaivy9UKUqKRtJJB6S+j2L/uILOo48zxmGgdwviOQp6XDDwrwLVe6gfQieTDxA+Yq8v2Ll7UFGPoY9hiIrSM3JqHHZ3LKYQpW7VolxHJMISWIfEomEsvmcRTzWy4zdzwSoMVSR/mOUSYn332d5NSeb/38UmwXeOnRvyOozYr0m8QOLywuyYBkGzWw+J5naRM7yMyIzIwuaZfMSz8Rb3PXjKEuKPkP5I7Jhw3x/MWZV7tKbWcbQ92ScErEgad4w39ySRAm97gjpLYuLMauSpKcoM6O8fUOVv2JxMWVVCosvb1leSRKxJjI585srFu3NpON4L6siImL7CCUE8/YzxCQ5j+q71oGCyihi8YTYa+b9S1SRHXQc1dSIpxQzIvGQJDQs/TVJ34OYqq6nUKUqHhHpgoKe5e5zrHWH9pZjViUlH+ZEYUmur1lsr0mSu6zKGEJFux2JeoIU1fg0fl2qY+883F29iheSulzy4mj2hVDlbgMcmYj+VrKLUp4fn6AmclQqBQS01lzpnOHWcZtnfHqW0g/9wbHchSo3W8njneNyveB5coRAkKQpfTe2DsR7djeKowEulh/yPPXvbhpjjwzRD+w3KUI7Xh19k+sfIUf1pONob2Ns7Hj5cMW1NwTCmEMfeqSQRCKlf21pInhxumJvh6lUfiRH8zxHbQb6rWIXp7w4OoaJ43DvkaNP99A3EdvqIZ+eREghsM4eBFMhBDa7iKEJXJdP+OQ0p3+PHLXOkicpu8vAug+8Op3zXJ1D4JDWHEMVqN8KUid4ffot3uTqQEIiBP1RS9la7NsUQkSz+k2ei29wu57RxTkUYUzHZgXdvqIROc/PVvQijDUU75GjRyGjd4ZtMeP5Yj7244gi7NSFPstzTm4M/U5wm2W8WJyMHcCm+d4V393uJEOnqBff5MVi/gVydCeKsR/HHoZGcrn8iDfnD9gl5bsit6wljc9ori15kHx2PueFf/jFUEVKFh7aS4FE8Nnq59iqd31PRwct6DtHdxvR4Hh5/B14jxzNJ3J0Nkj6bcQ+zvj07JR+0geN5OjI33zD5fTecDOf87xaTT023u2rOI759rWjbwTXs8c8Lx8Qxwl+ClXyPKNvWnbbmF4r7KAI4WvQj2O0O1g8mgievN3yYHjz/1P3Jj2SJGma3iOLim62+xLuEZEZkZldXT0zzR6SJ3JOnBt/AP8of8AQBA8DHohBgwTRXLonMyIzItzDF3PbdJONB1Ez96ieywBVINKBQhYszNRURdVU5fvkfZ93NLmp9DQdNfhnKuk4Ju2O1/0Danz6ZJlONW3XsTSvMH3NbNjwNg40zWhyixBiQOuMuTvD9BnLdcNrdweI0eS2G3kcgUm4Ig855/e3vI4HirKg63og8Sl801GJt+QWLm9uqGqddB5wYkPOoqaMbxms5ermAWM7IJ5mUFJJXpk5eb+gtp7XN3fsuoZiBO6GEJhOJpztInm8pG73XPeP443yyOPIscPAwk/JOWfa3PNmOIw8Dk9+7MSHwCxeYHzFor/nu8DI40hj47yjLmsm7QLjDOd3T7z2m1Mz92gWNEgqe0khDBe3H5FZOK2qCAR7tmQHj3LfY2xOuf0PvL0VbIr/nenTjNB7hnZgsb+g6P+Wwvdcfb5nICRm7HzBbpdgy+f5GXk/YYbnTfM52eqVTjW6d0wmU5aHjNwtmPUbrncP35jcEiekZxbOMHFGtf/A9SYn04Z+6NjpLbNPyatS6TPMULO6/8pFfsP8ZklXdvjKsameeHv315R+Rt4bLr+uOfRPZDpD6RcmN7Kk45CCV19+pRKOqqzYHw4URZ4YswPko47j6vNnsjoZ07wPJ5PaWZyQ84q6a7j2a7pRlVtWJW17zH+5JO8rlnvLm+1N0vSUzyzboiiYNxUmTFk8rnn99DTyWB3O2dSg3x+YcE1OjfoLper9BUE+qSEjpEQEiSSgST0OGdP/14AmosYSTJL8BXqsBdU4c9FEUtsw/VfFMH4WEEk3oGJAkmpGJdJn+E+8N20nfY8Sz/sAERXD6TuO2znu63GwAqDG7xHja8d/lzGgiGnbqRsBMY6vxfHzkUAc35u2IYVAk8o6IQSRSCbSe9XL4yaSJGJpbPRxW8ftnI43no43no4rbec4NsfX9fhdOqbtEBk/n14/1uQi+pEUcTxXIR2DSK9DQImIFPG0L5kYa3VABo8GJBEtxm5LDOmzMb3G8fy9OJfydI2E037/8+N+Po+OiIz+m2tGjON/vAZP53s8BjH2GrRI51MRkSFdN2LcbtqOeL5uxXG/IoKAihIRn98v4/HzaRzt8ZqIIMXxuknHnL5rPLaXYxPD6XhVTGObxub5Gj6OzbFJc9r/cRu/G3RgWo4NCDEKpBB0Rc3eCD5eLkd37LeS81Uv6R4i26zg4+UVckQHvtRx3HeG/tHyVNf8fFW80HEIYhwl52voNpavZ0s+5JcnKvRRGixCZHMfWXVws/qBj8WoZRg72sbkyK5n/yCRg+fz5R+4n+Qj6xKMSTOhpYPmXmAzz8e35zxG90IXkaTBKma0nwb2GXy4OvtWxxGTalOvO7q1YGtKPly8glE5mnQcqRR5twl0O8HTzPDh0rzQcTznqqyfoNtHHiYlP7+qXhDg01J1YXK2N5ZVG7i5XPAhewM8S+SVUklyfhMwQfBl8dd8OZYq43S6W7VMGoe7TZfrfvFv+EX+xNNySpeVhDLgBs9ZXtBuag6i5OPri1OpUlXVuLQrOQuGznZsas2H1RLPMzow8SeKhA58ijxVJR8XV9+UKsf9Wq+hO8B+9ld8WIw6DjfQnbdsRIUE9htPj+Trqubm6jXbvMaaVKq0eYMxr2i+dmOpsuQjSYIvpCSMqypzD81NQArBb2d/w5MWFH8iOe9aT3sPB1Hx6+UCyvzkSzrhGFqez/f1VdJxCEE2rtYB/DQYOt/zOJ/zYXb2jeT8qOP4452l28P9rOLD9M3JHeu8S6V327J5lPhdR/TH5umf93f+F59xKCJFu2faW97tfv1Gx3HkV1yrJWW4ZLbf8n53h8mfL2gE9F3PZfGaop+wbJ/4sTl8m6viPUpKzriiGHKu7w+8774gSJLzpjmkBLkQmIdrylhw/ekzzSlX5bk56tueqf6BwsLbD78xK5PkHL5tjlbyHdZa3n+4Z2YbYgyJq9A0SCV5V6wo2yWT1vJDe/MnuSpJx3HVSEqumTd7fjjmqozwneN3XYQFhbxgub3jx5c6jpFTGUJkJa4owoTz/S0/No7m0JzGZhgGqrJkPlxSesPb2yc2Rx3HizrdIJn6ayoMrzc/U2SevCjSFBnBU/NIOeo48j5n8vg/8+Nve1qV0IF+6rGd5Xx/Sdn8ayah54dfvtIFxzD0TKezE6vku+oVRTthbgfeP/5prkqKR7joSsp4xqpZ8/7+K8ULHcdxv8+4pGTBZP0P/PBUYExO2zU8DY8sP54hEUzNBcUw5dXnL7x+qeMYJec/3PyBmjOqtuDd50dcc0+ms2+bo2hq9xopBN9tf2YpHPVkym63TbgGYOUUlfgO6we+339Ej5Lzl83RazGh4DXzpuGn/pFmRFa+1HG8rt5QtCUr3/H+7vOpWfwyV2XVzyhZcNHd8/7rY0rG8x7rUqrbbrtlIb9DifokOf9d2OqPMw5IS4xRgDUFu+IMLyVSppUDV9UcVEFDjWszBl2yrc/IjKHP+xQ9KGDIBxoxwbmMPqt5mub05lsehxSSbqjwQdIUU7YmqfK6PKfVJX1eQAgMbYlzmkM+Z6sKXFnR6BKA3uREPTDYHBMD+3LJplT0ZmRSlCWd6SAkHoJDsJsu2boUaznkBV1WIYVkb6a4PsNKyWa6Yp/32CqtlMQQGMqSORE3ZAyiZFudEU+BTI6hLOlNT9sXOJfRFTWbmXm+cbxojnZDhR8y2nzK00TQqnL0qqRxHvKcYV/grGJfzdjkqYHd5Tl91p1uHMM+x0bNvliyMeMMajz2faWJCsKhwCuDzV/zNFnRF29oqkmacUhH6xc4bbBRsJ2djTeOAV9PaFSBkiqNTavpjWRjzk48jqNFYShLWqFwvaYzNZv8/DkFD+jzgi7r6IbEnBjyJdtZlbwqpuJQatQsgXyGUOF8RpPP2VcOOZszlAO+dDRlwWaywnY5TmXsJnO2mtN1dVqajQq7TzyOXbViKwOurtmLBA8CMFbgOoOVgl15hihzhjzFI/h6wkEVHHyRzrcs2UxXtCatWHXGMORp1ttkE1wvaXPBVp+l1ZKqptHlKR6hEznOZjRmyjaTzzMO5/B1zYGM3pY4n+Ht82LFn/PvLwbyeU5yS6J5rzPcdDmuqgicdfR5jtcGZw1x0ERd4qYZQWt84YgyTbfdMOBtSezA5xV+pnBdTxyn4zFGlJL4TUYcItZkuGyZZj8mx2clQ5ZBCASfE6PE1zNc5uhzg89yYgSV52B6wiYjxICbzHF1hh+BK31mcFmJ8xBcRhSSodK4WKT9zIvEDpGCnoKoSXGWU4WzA0NucCb92H1Z4IMleI3XOXaWeKJHAVifGZyx+L0iNpqYVdjJs3tWZMcbR8DvcmKQhHKCmxp8VoA6Ss49Ps/xgyQGGHKF1yn1zpkcZ8ZxjBC6jBgVYTLHF4JeaZxxqVcyzQjKQZsTZQb5WTqfZoWvJvjc44TDD1OiSrzVoZLYcUnY1XUaZykZYkXUgWAMfjZ6jJQafRUeV6TUveg0oSjxE40bSxWI9DrDmRK/y4hRg5li9YyoND4vCRONm86QQGwU0WaEeoqvI242w+UJ5OMLjZsuCC4StGLIa7xJ8Z3PAjCwQRLatHripwu8ivR5gZcZLsvSOesDwWqiELjZElHkuOE5AtJrg+810WuChr7OcHl6YEmT3guR3hVEFRIlvRL44OnzHKfzBMfKMoKDGBShqHGVSa+FkK6bvMCLjLDLiYNGRPX7EIDFCNa+sNV7BzGQH7bMth/GCMhUqkwmE/b7HZNsheaKbL9hvrtNS6hdd0oj67qOunqLHqYUzZpFt6dtn6fjzqVSpVKvUUPB9GnPvPnEkSB9jICMPpLzGk1J/eU35nF3iteDlMQW2p7c/BXawbT5+I2O4xTIhCbTPxKtZfn5ljAcRl3EM+JtWa3Q3RkZA/P2C7JrqOt6jAVMpUrdKjL5hiLsWOy+nCIg7Ugm77qWKi7R6hVmc8tivz0FMqV+S7pxlPI1Kk4pd19YtknHYUy6oK0dqIqKwr9C+5zFw5pZe/eNjsMYg0FiwhsyYaif/pGZHpcBR7k9w5qyA8EfUEOOWv89y98UN8X/QfUwI84CQzdQ7V+huwlZ6FkOo+S875jNZmRjBOSivkZ3U3I3MFt/IMIJU3jScfQlmguK5pHZ/U0KFbfDSS/Ttg2luEKLJXrzC4u1wWQ5TdcQ4iPzD6lUMeUVephSNp+YqM/MPy/pqw5XO0L9xOJLh1EXZF3B8u6eh/3dmOQmT/qgCRoT3iKFYLr9JyAFQW+3W4oiPXQmPml7Mt8x2/1ycsceUYj7/Z5aTtHyLXk8cDbcn0qV/IWOYz79Dt3XFL5hfvcb7lTqJJaJyQyFXaDFkrK9Yx7vX+g4LNPpjO1mQ67foeWE6Aec/J2AfI5TPa01MlMMqqbJ4OtqgtfqNN3ejL2M6yFjeFK0k5zbs4tnk5tOT8JhGFgPJcOTZ1+W3Lwy3zQA04wjmdzszvOwmnF7dQYky3J3XG8PgcNaM/SC9eInbs1z4wnScitdT/OUowbP/eqPYwTkswkumdygXxuscdxcL3iMSQqdfmgJKluTM9wEOg23l0v2diAfAbbHfki17uk3mkNWcHN2hhiP52X8wWYvGA4ZzfQNN+ffv+B1PM84dtsMe4Dt6h03r1L9r17MOMp8NLl1ka/nU2711bPuZBxHE6G9l5Re8vjqb7gt5MgBtYCgO28YDg5/X2DR9Gf/LTfqj+xWNc7UY3PUsikmDLsJnSj58mpBP8Y9HMZekpSS61gwBE9TSb7OZyfmaGqOesqy4s2jZdhKdkXO7eyS/J81Rwe2G83QKrrlH7hZzE7N0fayYVDJ5NbuBcNBsVn8xOPrK7p8hBUXgSbfc5u/oXuw9ChuXk25DdcvBGDpATjzku5eIhHcLf7lGAGZxtkY88LkpulEydez6XMEZAhsx+vivFcMW81Bl3x6dUFvbaLUmWfbw70rGYJjN5txWy/xwbPJc/p+ODX7dw+e4TCa3OrXGJNCp51zyeR23nLYZMSDQ6FQ6ndQqsQXJrc03fRkvqPwnuXtDUEKxHjjODZHZ3KGtivyds/KrlMEZN8nXqmAoR+YZpfovqSyO5ahG8NwspMgSgpJHc/RQ8ZiP7AaboF0N2/bm1YjFwAAIABJREFUhqIoEwFsOEcHw/T+jpVoqCep8cRonordQMFbMguL+1vYJb4pQFXVtG3DLGqMfw3Ocna/AZtMbkWeqO1KSlblgqyfYAbH8uaBbOio64quS6HTVVkxawRZuKC0DSv7CJLTTK2qKrq2o3YTsriiaB448+2LCMh04yBGqnCOdiX18MAyBIq2SbX3CD4u85yiPyNzGavtntUIK87zNKMwxmCiJO/PyGLG7O43hiy+mHHAJq6pe4Hy36GtwWz/geVtxn39D0zWU4IN2N4x2Z2RDSV5HDi/X9P5ZHKbTCYUhwapFKvygqzPyYNl2dymGUf+HAFZlhV1a9BuQWW3rA6PIyE+PTmL8WFQhxXaTzH7T5ztHp+bo3LN8ksyuRm5RA8Vk4c7ZsVX5jdpxuErj6w2LG8GTJiT9TlnTzseD49k2XOPQynFJGpMd44UgsXX31AiGdd22y0mN8QIMyfJ/DUmDCxvbpDl8wzqOOOYxposXFAMHZd3u1MEZD4KwGKEZXlFNhjK7Zbl7mtqro6zYiFTP6Nqa7Iwpd48sdpuyEw22uqTBma32VByjQj5KPX/Hbhjn3scI8hHggwBFQIlloBAohi8pXADwVsMHhUjGYHCWzInkN6iSAxOGSxZ8EkLETxVcMhg0eN4ZCGliuvokVGjvaX06UlZBAfekjsFIZDFxObIo6MIltwOBJ9q5yIkXJwSARUh944ypH0ByG0P3lKMWhQVA7kfKFIHiiJo8BaFJHcWOWotquDw3pK7AeFH3F90mCBRMaKipwwWgUgBzz7tF8FigkcSyWKg9BYZPcpbMilwIa2qZKT3mOCpo4fx3wF0sJRRj2OjyJylHJdxi+AQ3pE5MIz7QkzHLQPGCcR47H20mJD0HDIGdGypgkOHBuMzfBi/10/S2IRA7gYIHuktVfDEYJEEMj8gMWREyjFaInOgvEtu0ODIg0LFQBY9JZYiKGxIM7vcSYS3ZKO2REdL4TXGCaK3lHE4jaeW6boxwZOHPr3uB5x3GN9SRY8a9TfGDVTjdXVKq4+egjDqJ9L15IQjdz3WW3Kf+gdFkGk7MVAGiwoS5S3eB3I7pPOPG68JT+56wji2RUgc2Rgj2llk1BgCpU8oxdwN+GCRUWKUIIsBGdMxlcJiQuqFOO8o3IALDi38KaLkODP/c/79hXoc9rnH4SxeCvazFR+vLnEjj8M7Ny67Dqw6aL96tnnNh6vvkSOb4Rkd6Lg7SLr7gafpjJ+vq5SrMq66hBCTjuPe8fYpoQM/VG+BEY/X96dSZXPrWXaBm/M5H0vxjdw3GyG4u9uA6D2fr1fcTfKRSZG25axl4SLNjcf5wId3r3k8RkCOUmghBTJkdB+bhA58e/2MDrSjbDrPUesuIROLCR9effcsOX+BDvx+nSIgn8qKn6+SQ9N7/w068PHB0+88D/Mp//SqPi1lJwOVJzeG7acUAfn59QUfcj9O+c2JtGYi7D8NGA9fzl+iAx0CaJdN0nF8BoTmcP5v+Tn/iafzc7qyJBQRbx2ruqDdlRxk4MN3r8cISDuiA1ME5MpmdK5hM9F8uLh64Y59Rgde3He0j571ZMaHs3dkmRkReM8RkI8PnnYfOCz/JR8un9GBpwjICPvHgW4Pd+cLvrx9z2Zaj+jAQJsfyOpLDl8aSgS/vr3kg7Angt0zOjBy+JQiID+9+tenCMik4xj9VI2jvQ0cZOTj9SWxSKtAIYZTD2PSRLp7zzaf8vPbd6M7VnyLDuw03U3L42LFh+UxAjLl9RxzVf74tT+hAz/Mf0TrIzowjd3QtmzuI10XGQ5ibCr/ef/+YoFMxzud1hEVIpPtA9/vfvsGHVhVNYfmwNUYATnbb3m/vX/mcYwCr77vuMyvKbqaZbvlx8PhGR14/CFJxSpekg85V7c3vOtvQSTcX0IHpuXYebiiDAVXv36hiftkcmubNGMY0YFT+Y7SCV7//IlpKZ9NbiM3czZGQFpnef/z/8tsGGHHJ3Sg4vtiQdEsmQjL+3+8TejAqmLon9GBVwdByRXzw4H3m68nAdhRZtx3Hed+TiEuWGzv+GG3fza5vUAHrnhF7mvO9nf8tPMcxlhHcWyOliXz/oLCG15/+pUnm0qV8oWOI0MytVdUIuP1f/xAkfmTlwUh2FyvKbqIdj+kCMj7f8cPnzY0/D2zxwVhmkxuZ/tLyubvqEPP+3+6ow/uGR24P6R4zPKSohl1HOtPCR1o0k35iA68aHPKsGLZPPHu7i41RwcLxNOPdhUvKOKc+vH/5P2mOPE4nr57ZPnr2SkCsuinXP76hevwmeWXs9HkZtnUa364+WvquKRsC77/9QOuGUuVP9Vx2GukELz9x1+Y46knKb8kmdwSj6PkLUMY+H7/G+poq/c+NeCbA1dMKLlm1jT82D1+gw7s+x5i5Kp8TdGWnPmO93dfTuPx0uS26qYUccZ5+8i7L2tMbk7N0UmdSqi5fEPBBEP8/cCKT9ZuRnyeVFgZOZgJQUukUgyyx5mCLghaUeB7hRWGfVEnk5s0z5RzoelUjpeKXhmaSnGI6jmQKQYynTH0Gd5KGpW2I4QglCWHIE88DmsNQWg6XbEX4ExBP8blhbLCxwzrNE5CYyqaMqMdh8kagxUKFRTeKVwI7E3FXqbPx7LmENKN8ZAVeKnwStCUE/ZC4UyBFWnpjHJCYz3OKnql2ReTxBwd3bE2S6StfijwQWGznH2ebN5e+bQvx9wOZwhR0ak8jU14Jls7ZYhlxeAzfJActOGgJqfjbcZxNFFgg8ajafKKvYkp34ZU7/cl4C3BG7zMsHpJU07p9ZLOzPDaY7Wl03U632h2WckgIoPsUeWUgwcpFQdt8ErhspyDmiavitZ4lShWoprQeYkfFL0w7LMJvqywKjUQ+yxjQNNbQwgKp2v2RYFWWYp6LCP7fJL6X6TrpjMVbT4nKyb0ucYbT5dFmnKamB5SsdM5h7Ies2PVqTEs0DivkEJyyGr20uNNRVMkpokQgkKCtwovNAdTk1UVjWgIPuBNSRugDSXepbHZmopepAejL0s6kRFjpFFZGj9TcGCS/Dvj70RKSZEXDD7HO0Wvc/aqHgOZXLoeTElTBgaXET0nmNaf++8vpBx9oY+XEq8MLjPs5jJJzsfgZFckk1vjTBJ3qYrdIh9hxSkCEgG2tLSuwg/Ql5L1RNKbOq3ekOq7lNea412gn5TsVPq3zhj6rE5Q2RDonzLsIDlMFuzMBFeWdG1HJNKbHJEN2F2BJ3CYn7GuNDYfexzjk0F6sBuDF5L9PGcX0gU9mJzeJIz+QVX4JtCryGZ6xr4ccMVzIJMtClbB4fcGpyW7RZ4EYGNT+QiwbQ8K32o6NWG3mCFVmnForfEulRzdIcdFSV/OWU8Mna7QWTp+6yzW5AyDwkfoZmdsRQUx0htDn9enQCb7oLFBcqjP2B0DmcbG8KEomYhAHEqCynDFW54mZ9jqHa2riFXAZo4+TnDa4ITisMpPgUy+rOh0gue2coI/OLoMttPzZ1u9swSfxqb1ARc0Qz5lP8kZTH6acpvc0Hc9/cHg2iQA22WzJI7qOw5FSVwmkM/QKLzTNPWCw0QjFlNsMeALT1tMeOpXDB58pmgX52xtOaIDnwOZZBA4l5zJ+9kFexnxVUVjDvRZRgTyPuI2hgHFbnEBRY7NU4SjryrapqUdNG6XYTPJYVXTjqt1nTHYIpXLPVN852iMYVtdpNWSkTwnhaTVmtaDbzPaasauKun0UXLuCVVFk+2x+5LYBkT4HXlVjvEIIQSCtWT2QN5bzrcfxrR6dYqAPBwOLMwKwzWVfeJ8f0M2ruk/u2NbZuVbMjujah+5Hhr2++fskBCSd2MirsiGgunDlvP2C0Ikd+wxqi/6QKW+I48li+ZXzsPu5FyMEeq6wh06CvMTmRMsP33A1JqmOQBQFCV93zGNGUX2I/0wcPbpFjGiA5MuJZUTq3JF1p9TCsfl588U30RAeqbTGfM9GPWWwm853928cMcO43f1TOOSTL+i7m+5aDYjr/U5AjKEwES9xsQp9f4L10Ngt9uOY5NmL5O6prKXZD5nfnvPxTcRkPtTqVLE78ilYbH5J8IYAXn0SJRxQ3YISP6AHnLM03/g6ovivvx7po8zwjQwtD2T/RWmr8ldy1n3JVHO+57FYsF2m3Qoi+qSrF8wCZaLzQd8CKflZe8d0+mMWZuTxXOq5pGzh1uqP4mA7LqOWr7CyBXF7gPnDxkmy2j7jlxtmH1YIIWgLK/Ihimz9hPL7DPzT0v6OrljVb3m6mtLIc+TjuPLLeeHFAGZ+jsDQkimIsPEtyghWW3+kWzkcez3O4qi5BgBadQ7Cj9wvv/5hTs2lSpNc2AuZhj9lqLdc97djaWKOOmDYozMqjdk3YRZ7Ll4+HV0vD4vZRdFwbSfk4kF0/aO87v7b2Yck8mE/XZHkX2PkNMTi/R34VVRSiPli45uVPTTKY9ns6QcFQLrHM3Ir9gMmmEt6SaGx4vLZx7Hi1yVXV9g14GuKrm9zBj6I5P0mdp02CjcNrA7n7POLkHAPjN0fXficbQPiqEXbBd/xToPNMWo44hwMBmiH+jXOWYIbM7/BQ+VPhm9jDHYweI99A8Z1ngeX694HHkHh9HuLaRkQY794ul05P5yzsFbGpOnp2pI8Yf108Cw0XRZyeP5xTeh00cdx2EnsHtNO3vDw/m7lFbvPOpFBORhq7EHaM7fc3s+skqOsGKXnl7tV7AdbC5nPKq3RCL7UwSkxgTo7ySDF+xe/Q2PpULrF7b61Y5JFwhfcxwZ9vy/4av6I915gSiSjsMPjsN2gj3UDLLk8eqMjqQv6EfvjZSSdSiwN45DKXhYTp95HGPmTJMXvF073FbSliXr+RWHF6HT2Zgt3GwUtpEMi594XCzQOvE4Dhc7vJohI3Q7sI1iP/+JzZsrfDnF5gM+9xzyPV+LMXQ6KtbXM9ah+yZXJbFHYfgqkcDm7b9io6B9yeMARBcYHjW9CKzP/wvIU1M9hEA7Hvu2lwxP6Xw/XL068Th22bN9YOtK3F3ScTxMFvjgT7+TY67K4SFgD5L9tGBdv/kmV6UtCrqmpd9k2F4ihvz3EQF5/HsG+qT/ZV3D5OEhzThG5WhRFOiuo2KCdnOMPTC936KyI3M07V7fdZTyDGVzzP7APPOpOaoURyybVoq8n6Osotj1TOITkFSG+nAgN4YYAqZfob2h2j4ykR15npP1icdxVI5m9hJlI9XjI77PaI/r7cYwWEsdJNpeEp1lst4xuFHnMeaJSimpswna1pgQmK03iKH9BuRT1zXVNqDtksy2TO63SCVh7HHk442jGCq0n2PslonoTs3gEwEsBHK7QNmCfPvEXEv0yNgQJB5HVVSYboKyinJzYDJGQB6buUprDIKsX6LJKNdfmRyehVYgEGZHfnBIf4VyOfrwC/OnBdn0Z8rNDO9Srkq+W6FcjQ4D9cMmRUIMA7PpjP2ofqz1Am1zChWZPtwTYjitEh2Vo8VeouwEEw5M7OYbAtgRMJQPc5Svydp7Jk1DpjJ620GxZXK/SNb+OEXZknK7ptrcM31Y0BcdrvT4asP8SZPZAm0N9XrPxO7GhHd1mjnXUaGHJUoI6sdbvBhBTM0BY1KPo+5B23OyaKkf7tFVulmEMRdFty1lKNB2ReZ6Jvd79LhaV45MmBgjhVqhrKFsPdPhEe8ceVGQjfT8PM/JDznKVRT7HZNuR25y3EgAq8brPbPn6Fik+Ab+/xaASUX93/8P+KdH3C//D/7hNj0llT55IxDqnxHAiBFlB3K7Jo6liuh7Sl8RmwNGR2SsUa4j90/oTKOsRWcZY61CVpRIp9Cuody3hMNhDGR6TqvPokH6AtM15P1jmmL7Hrffp0AmH9CiTuvhzY487CjLCtGlaWLpelzTofQixVYeNtioie1zWr3se/KoUGqJtwPFfktxFID5AT/+OIoCpMtRwVHsnxi6Jl1sR6t1dGQtSDFB+ZbCrxE6LaEqa8nzAjn06BCRqkYPB4q4TU9A5zAmR41PtEzkyKjJ+j3lPuD3+9PYWGsp3YC2Gulz8vZAMQYylb5P4ziCfFSoUQLMsEmrKsYgx1LFzjdkjUeEFcILZH9HcVij+zuydkBqD+1A1kmUsyg/UOw3yOgRfU8hA3a3RUlFXmqkV6jBUrRrfHwuVZz3lNGStTkyFmjbkHdrStejTiCfHNl3aDKkyJHDjmLXp0jQoWNon8i3yQav8gzpM7J2h2keyLeR6DpUdHSsKfZnKFZIJ8mbHfmLtPrjjaMQGWqMgDTdEzmO0tf4/Z58TKs3g0SKOSoM5MMaE3pi0yQCWBgIzQHDFCln6NBR7J9g7B8VroLxGszLAukl2dBTuHVySrsK2rFUsQVZP0XGjMwdyOP6m1Kl8BP8foeSE6TUEP78ZQr8Z984JPl/9W/Qr98RtmuGf/h75C//F+V3PyEOe6SQrGw3vnkE1EpFb6bsc8nH8/MUASlFupOOysXloGgfIpus4JfLNPWy9tgcFdjBctdl9I+WdT3hH1/l30RA+pCCmf7rp5HHcXHGh/w1kMqLru+TNNiHkccR+bL6Ax8KTvhC4BQBuXtQKQLy8l9xVz+zEo59hYWDw73AGc/H715xH92J5zEMKRhaC0P7W8dWC/7j9TkHZ8cZx0CIkWKMgOzWgp2Z8MvFm0R4GU1ux+/6fhtpd4L1/Dt+uTSnG4cam6MQeXxK+SEP0x/5x8uklzhGQHrnyDPD061j2QZurlb8ou2JpHVku+YRdjeezAs+v/5XCR34ghPRLhumrcfeqqTjOPu3/JP+kafzM7qyIBYp1mG1LWj2NQdZ8/HNKzriyFBN3psjOrD91LKuFD+vzlKpMsZ++hAo8pyzx4HuCdZVzYfF2zE+Mx3vcb9OPI7l3/DL2Ryts0TEP2tY6/rE4+j2ktvVX/PlzTueqhqX2xOPQ5cX7O96CiSf3pzxIXSJEH8sVcSIDvziEcBv53/HkxIUZUHbHEuVyFXnae8FexH4eLmCMQLSj5jIruuYttCuBVtT88vrt3SDBUFaWh8J7j+5nO6242624Of5xTgexZjXI9A64w/3Rx7HhA/Td2idEYIfVbdpFrkdeRz8+UWjwH/ujSMEuv/1f8Kv73G//kf80z1mvqD9D/8+NdmEYvHuj4jv/u2JPKSip+j2TAfHu/0nwtj7sHYYm3MN12pBGS6YH7b8cLh/ASt+oeMw1+R90nH81DW0bYPWL3QcKuk4iiHn6v4r70cdR1EUNIcmNUdHHUcRCq4/f6HhT3QcI6x4Kt9TOnjz6ydmxQsdxwseRy2+Z3CWdx/vmdr2eeo/mty+KxaU7ZKpsPzw4fYUAdmPHMq6qrlqBEW8Yt4ceL//OsKKjxGQqRF74eeU4oLl7o4fDs86jsxko5gs6TgKX3PW3PFT6xOs2HwbAbkYRh3HzSfWL3QczUsex6jjePNr0nHkRx0Hgs3rNUULmf9h5HH8L/z4+UCXvYiAHHkcVfd39KHn/S939CdY8bOO4015SdFOWLiBHzafCIxiNGfxI5z3os0pwopV+8T7x7vnUoV4guis4gUFcyZP/zc/bIpTBOSTfeZxTEzScbz68oVr+WXUcbT4yvFUrfnx9g/UrCjbnO8+r7HNIzobvSruWcdRuaTj+O7DLyzwp+ZoioB81nHYMPDucIQV/3MeR8k1s7bhx+GRpu8QvDC5Meo4upLz0PHD439Kx2FYdTPKOOOif+T93eM/gxUfdRyKelxR+f97VSV4mn/3P/7JixHiMRvwGFHwn/io0tisfL5xSI3NK6yLOGkIvcQrjc1LMAYnNOG4HIvEaUO0iqAy+izHBoiZPqlQvZR4r4lW4rMcS5lQgVmOLSIqLyDEZG2OEqdzrAzYokoxhzHZm2NI/IUYIt4U9EZix4HXRYWNAhcVwUmiVNi8xI4xg9IU2JBARs4UhFbihWIwBRaBLiqcUITgGUyBs4LoFEFk6bjHm61TLn0XEm8NIUi8Tu9RSiU9g9Z4mZqj3ic7vFeG3ozRkJlJNw5p6U2exiZIvCmwMvFDZJbjQrJqSwQhKEJMehNnAiovsHFsUOuOzAhip4lSEfSEISsIeoLLJoTME7wjZBVBSqLQuKLCBocViiErsHkgKIU3yV7vpWJQJVGAMCnQ22tPn+V4Z9K5FAarK6TJsSNm4bhf3hmilwSVY/MKkRksAqs7bJ5gxUFkRJnOt8sqbF7ijMAZhzeWPisIThGlwucF1pfE44xDJa+Ki4oQxhUvU2KFT8dmPcKMwVdCEp3Co7CmTNdglCkXpahS1GnICU4SpE6vkZbfhTFYISFGQmYIUuKUZtDlmKtSYn1SR0et8S4jeIVTBqsqOPI4lEvvzS0hZISoIIo/e2MU/mLZse40E/DeEwQ0puRmcf0N5bwsCtqi49oZhqA5KMGXVZ2ERzZJf0Ew9D1PrmawgW0x5+bs7BQkJEililKK3S5jcIHHquRGJX5CPgYyGZMiIA9PhmEQPEzP+WJ8UoMW3WmZT3Q97a5ER8/X+Sse6uxEOc/znKHs6byg3xRY6bidF9yH5FXJRxeklJJalgyHQKcNt6uC3dBTFGOpEtLspFYD/c6w15KbZZEiIAHn/alUedpLhtawLxZ8WY0sE+dOJrcYI7u9YYiCTbnkZlV8EwHpnKPMCw4PggG4mxTciDJpD14EMuURWq8pg+R+csnNGAE5DANCQDtf0rcObysGldGUf+Bm+YZd5bCuIlYRqy1PoabXOa3QfFkUdASGIRka2zKVKq9FxbD3NGXBzTQ7raocS5WyLPlu7Rj2ml0uuZmUqcxzSTlqspx+6NnuM4ZW05ZXfMmnp+ZoO1/StRUKQdtKBq9Zzy54nNW0tsYVKQKyKQ7crq7pnwK9U9xOCm7K6hvKuZSSeRD0TiMFfJ1dsVEJodCYaYoWRRB7T/+U0wnF7fI1onx2x1ZVRZu3nA2KYWc4aMXn+YSuGq+rscSNwEOsGRrPriq5KXN88KffiRxNbrvHyNAqNvWCL+UEMwYyee8S2iGbst8VDFbhvPj9pNW/tNUrDdJHJs2W75tv0YFHHccrvaSMl8zclnft15OOQ+u0atJ3Hef5a4phyrJ74gfXjHkgCQd7zFJdxssUAbne831/k5qjZcl+v38uVWKKgLy6/8Qh7r/RcRwjICfqPYUTvLlN6MDuhHg76jg0pXyPtpbvbu6o7T+PgHxbLCmGFRNrefflhl3XfJNWX9cTXh0EhXjNrN3xrvmKUOnp7pw96TjOw5xCXrLY3/GuOzZH7cnLEkJM0Zdhwll7yw/OczjsxzIu+XzqsmI2lipX92ve2YfT8TajPD1DUrvXlMJwvf+FPPtWx7GJa/I2JnSgzZls/zfe38Kh+num63minHeW1f6Ssv8vqUPP959vTzqO+XzGbpd4HNflBUU/YxYSTjKMKyVHHUddTzhvc/JwxqJ74vvNV8oXPI7jDW/JJQULJrufefeUj6VKx0avWXxapVIlvyAfplzef+Eq/8Ti84tSpV7z/rahYkXRF7y5u6dvHp8jIEdJwERoKvcmSc4PPzM/6Tj26WEz6jhKvmMIA981H8nqgrbtCMGfmC9XYprOd9fw3t2fdBwJHdgRI1yW1xR9zYqO9+vPaVXshY4jz3OW3ZSCBWf9Pe94HCMgHda6UcexZaa+oxATdAy/D5MbMCZ2jXJXBDYv6TQ8LH78NldlrKE3PmfYGrpScb+YoDKNs9/yOHauxm4Eh0Lz9ULSdf0I+knfp5RkvzPYHWzmJfe6Rgi+mXHgA822wA6SzfQN99mxCdmfLki6nm5Xo4fIevE96zo7qSePOg7rBcO2wirH/auSx5BUf/vTjEMwFSX2q6DTBXdnxcjjeDY+HcqSemOxu4JWK+6Xk2RyI83YzFjz7w4a2+Y05Tn3q/OTjkO/4HE0+wLXSvbFK75emHGpOjVHnfMc8jzpVzrBepVzLxfEF54PrZLkvF8bhiB5Wn3PfS7GmV/iQBzO91SNxz9OcFlGP/tb7twPHOaeKMYIyN6x11OGTUmP4e68pBcRawe6ekI7Sxf/IzXWRtqq4n6S/YnJzXMoS948Bew+ozGKh8k0gZ5HjECWZUmvsc8Zuox+8h335fRZx7Ha44ZpCp1udYqjnL7m6WyCY8aQJ+Xoodhxx1v6J7Be83D2hoflctQhPUdA9kHQPxqkEDxO37NVkcNJx5FKQvqQjlsYHhY/jhGQadXrMOaiXA4auy9pVcbX8ym9ezGT7QcikSc/wfrIflJxVxb44E89ECkFWWY4rMG2mn11yX25PPE4vHMcypJu2tDuS0IzJiH+HtCBwOguFGnKJzwqBHSMVEOLP/Y4nKWUETm05AFUUOhoqWyLJnXNpU+lihoGTDTIqDDeUvZhXKpUz5JzKTFeoqKgCIFqaBGAISD6Nv03BLTXyKDIbU8Ve0oV6fouTd3xMAyoUKBipLAdZW9Rx1JFRPqhpwwSFfLE1bA9nR8VjSLtl5SCSitk0Cif9iXYgULGUf0YKCTkNqCiIQuesm9HAtjoaBWRoe8xLkeGjCwOVINHKpluqsGeKOeZV8iYkbuBsveIPhkAYZy94NG+REVF6S2la9MqED6No84wUaC8REZFYTsqARmeYegBge135C4iKZBRkvkt5dBgfHo9uIDyjtxrVAgoPLXrUKPkvNQS0adSpdQZMiqUC1R9QxCQ6WTaC95TyMTwVEGReUs1tBjhyZxLQVJ49NCP51uifEs1aLKQoYYOO2ypBp2iFXxxOt+5PVD1GUr2eOVwek/Zt6iQoaKg8pZyeE4IDCOuoQoSFVKpUg4dTgZKJRB9SxZHRsggUDFP2IehRUiPGmy6RrRA9i25M8hgyISjdgOq79OqSvQom8qwQhTIINAubccHTylBDUlyroMjcxkyyIQBGDqy6BJy0aXvEn1D5jME8mSt/3P//QXRgWPgsbUIOqRzmMNvJwHqfaiUAAAgAElEQVSYGHqKqsYfDphsheQKZbfk3S2ZMYixVAGg7ciqt8hhiurWlP5AHEuVo7dDaY0WV4ihINvuMe1nhICyrAgvShUt3iJjSbb+igk7iromNIfT1N21PTorEA6y7gtlKeFYqpQVtC0ZGqlzhLXk97eYIa3KVFVFbBqUlOTVCmnP0NZS3H9h6A4UVY3oEzqwmkzJDgIpM6TfkTc3o8kN7GApqgq6Dh0XSKWR/RP5sEEqhbQDxqTYhhAjWl4j4hTVPFAFR9jvycamnRyXQrW7RPoc8/RI3t+fUIexOZBlZtRxvEEJg959wWRpuVyMMYV5tkG3AWKBsA52v1A+nKMWP5M9zQg+ENsBtX+FtK+QviO/u4HgoO+p5nP8LqXV5/Ur5DAniwP5/tkdK63FO0c1mZB1JZJzVPdEtr0Zy7zhRC6LXYcSr5ByiWzuMI8bTGYIfYsp1+S3BwQCVb5CWtBPXzH1Z8zXPbHq8LVD12vKB4OS58ihIH+8w4xp9epYqqhEDpHhLUoIsv0nMhzFZILdbZPrWoCxCqlypO/Jmt/I6hLRtimeYjrF7/dkcoZSBtkfKPw9YcQylmUa5xgjpo5IO8E0LfnmN5xzFHWNP0rO8xzdz5FigR4eMeGBIs8TzMo6yskEt92itAQ5Oa22/Ln//iI9jiNBSWuN1hGippnO+XyxwimJPPotxnT3y17RPcJ+VvLp8g1KJ8OTlBKBYLADj52hf3Rsqwkfr/KT5Pw441BS8bSGYeu4vzjjs7lOJ9QkQ1RmUq7K7h66LnK3+iOf80j+QnJujEH0A4cHhRw8Xy/+lvs6xT4Cpx/rwkXae4Xzjk9vL1OuCqOOo+8RUlCQ0//Wc8jgt+sL9s4+56qE9L3mqadbS/am5tPF9Sg5H3UcJmewAz9uI/1Ospvn/Hb502j3dqfkM2Jg8yQZ9pGnacWHy5K+60c5ftLLFMawu/X0beDrqxWf9Ltxf81pHPMAh9tI7uHuzd+eIiCHIa0ptauGSevwt5pBaNqL/46P5q/YXqwYypJYRtzgeNqWdIcpraz59HrUcTjL0wsdx6tQ0H/q2NaK31ZnhNH67Z1PuoUi59WjpX+KbKuazycdx7Pk3A4DmydBfxA0y3/Bp5c6jvOGg0k6jsM20O8lj6sJX9+8Y1+POg4TaIoDv1avaO4GKiH4/PqMz7FLpYp4nsnOPbQ3KeTo9uxf86T/JAISsK2nu5c0subLxRLKHDum9qW0wI5lJ9L5zib8+vot3fG6GsvSGCN3tqD/2rOeLfhtdpn4JEVO36XrKtMZ/+Le0u9hPZvwefL+G8l5WSQdx34t6XsJQ55+g3/mv7+Qyc2fBDQ+BIieavfI9f7TKQJyGCMgm7blXC0owgWTw5bX+3t0phnG7BBipO06VnnScUzbDe+GjkNzQOujyS2Qac0iXGB6w+rrgdf2K8AYAZmaWPjAlNcUoeDi82c2cX/SZkQiVVnhmo5KvUsRkL9+ThGQzagcHcObZlFRincMduD64z2FbYmQUIj7fYqAzBfk3Yp6cLz5eMuubVI2yKgcnU6nKQKSK+rDnjf7O8QI3xmspRhXVZZhTi4umO3ueNPsvwmzsuO2ZuIVxtfMm6+86yK7/f50QbsR0TjtzlIE5M0jr+0TxEhZVTSjAtcgqN01pTBcfPwFOTZHhzGmcGe3mINH+R8wfU75+O/5/svATo/N0UmKgJzvLym6v6P0Pdc/3zIQ6E8RkDuUlFwW5+Td/0fdmzVLkpznmY977BG558nMs1dVb+huotEA2SIpAwmRNIqSRiPO3ZhmLufv6XbGRqaxoQlcjOKKtZsAeqnt7EvuGbu7z4VH5jkFYO7Iiz5mZVZVGZkZi58I/15/v/fp0NU1x8uzpq3eQzXO0Xa7xWDj4+sBnXTO4f3trslNmwcEZNeMCESXZPE5h/MA3/XIy5yVXtB50UMiSPwRQdFicHnFSF7Su+iTxw0CMplzcvMesekRZAGT83vSfI7nujiu+wgB6RLVBzhSMnn5wiIgY3utt87RQSkIOCbWJQcbO+PImhnHlt0zpEUgDmilG46KKVlZIIDoUZPbMNwnyBP6puR4erFj7Gy5u0EY0s1aBKZDv5hyeDN9cI5uG+LWaxJxRCBaoEqU8zVZVXnAIzT1lXFAGqQXol1pjU4IRBAitUYID0qJcFxEEFhfgXR24b3SAK4LlYOUHnga6SukawVAlN69jpRIz1qR7fTHRwYB0g9sOEhldRPh+EgRIoLQovuMAT9AKkA79uHvB+A5yMBmqIogQCIQxgElEdJB+gFCGvt+z7fHJCXC863YKSXCC5BaI/0AKYTdD89HegahJFK6CD/Y3TiklPZzhERUnl2Ldz2EH1jAjlMhmmVAYQxCuQgjkdIHzyCD0J4bbP4Frg/SQUiJ9HykDDHG2M8I7HkUSNAOIO1++tqexybOEDdHehqhJQiJdANwfYQbIN0A4yqkZz8fIRGOgwxCBNb6jefbc+U4u3NjpEQ4AcIYpOuiHQepVPO5HqKSCNdFuiE0PSHSGLt/CETtgpbgeMggQLi+Nd86GdIP7b5LOyaE6yG8wJ5X36A9B+EF4PlQ2TEp/QCp7fhD2pmxkFb3EdoBKZBuiKS22wa1vW5g9YRKgnSQzedKpTHb664UUvsI9TDO5dZg4fnIhrYmXK9p43DsuXHc5vfE2N8bz0dUrh1/joeUzblxHBsBEITIqm7GBDgNkOmf++dfvK2+NlAGMVkguRz33ixVmpTzceFQ3GnWfsDlZLxLOZfSQWAoq4pZ5lHqmmUr4vV+aC3nu+hAjSMdFlNDaSruB30uwj3gUanieQitWd9BkRvuBqdchDQIyGbVxLOlSnoncQvF7eStN0sVz9qIe7Uhv7UIyMvDIVOj2NLui9IuX4bGdp6mHpwfDH4lOjAIA8JZQTGFdRBxMR694ePYNrG9tTAUS1iFPhdj366qKIXrbKMDNcuZoFhr5u2Q15PYlioNBU/VitD3WV/VFKnidq/LRcN22ZUqDQIyvVKESnA7eIuryAb81JXlqmT9DUmqqK8cBC5Z9xPOxDusegGV+6hU8SOKWUwmIy4OhzblvK6YP+qOnSifsshZJS4Xwx4Kszue7dR8/75sSpWIy/4Ez/dt/gjGCqlVxXJmKDaQdZ5x0es9pJzvbUhFC2kgndeUSKaDJ9yNJqReEx0YKNJgw7m7T3adU2jJ1bjPBfs7H4dFQEo6CrIrhURwvfeOLVWadgm3iS+os5r8FjJpuJx0bB5HaVfQtpbxfibs9fZDLg4n5LW1gG2zSDCG+9KOt3nb5bzbb6IDH0pgz/VY3JZNqRJz0T54o1QJw5AizVhPBWqZf73a6r3G0ek4Dp7QBPmapKg4Xp6hHdEkdRfWRJOmTNw+oR7TXi84Wd0+MoDZGUdRWB9HULToZnOepunO5PTYct5nQlAEjG6uOCmuEcJ6LzabzS6Po2MOCU3I5PyC9a5UyX7Vx1HB/stzWpEky95E9XUaBGRZVRy/uCVpLOePfRxHYY8oG5DkNU/yK1aF9XFYfob1cYw2gpAD2ps1p8ubHVelriuCIKIsCwaqSyhHdJa3nK5Wb/g4tt2iPSaEusVgfcOztH4jq2TbMdlpogP3L2c7y3kYRjvrvo+kpQ6JhMf+i+f4nn7k44DF4dz6ONRb+EVAfP99np6nrOUP6Ex7jeW8ZLCaEGbfJlY5p8XNzsfR6XRYN1yVg3BEkHXo1iUns7PGcm6RlnVtLdp7aUBoBvQ2c47vbndZJjRaUlEU9MyIkB7J7Geczi2tPi8zFuWMXsNVSYI9gqLN6OKSCRc7y7mNDpzz5Po9YjMgzEKOzu4ps1/j48AlbhCQh6sXtH/JxwGN5VycUKqC49Vr3DhsGDoPPo6xaNvrnaac5vdkTf/Jg4/DMA4PCbKEgc45vbt4MHU1pYrv+/SLDqHpMszuObl+08eRJAmb1YpOg4Dcxnd+Ldrq7fq33j1BLLYv4j4av+HjiOOYNNiwMLFlh7gJd225M4BtmZdFWbKiQ6VcUq/DbTchDwprABNi11OQFi1qJVgnPe5iG/rmBz653yJoMkezTURVucyjPndO8oYBLAgC8EuKIsTFME/2mEYOZdh0MTYGsFpJiiygEg7T7oh7VezwCLlvn6o9v0VZeuTS4bY7Yl0WRHFEuV3bjyISoalyn9xJuEvGtslNNIJmYwBb5wFV5ZO6be66Mc4uAezBObopWlSFzyrsctORZF57Z46rKotHyJYxVSlZtgfcaW8XmFwEdjbmG0G+Com0wyza4y7YGq3skuE6iWg5oFYJteORh8+47YxI47egbGESTe3WbEyXauZTuIL73oTcKMqyJE8SMi9BSoeF16UqJBvf4S4co9kya0qU0qRRyJGQVLnPxm1zH0oLna5sGn3Q8GA2eUJVeWTBHne9ZBfks05i6n4XiSCvIyrlswwHLNoSlXUoowIdKtZRh9v2iCLzKSuPeXePu9CG+Fhx1M5kSyMplrY8moYjllKTxQlrL9khIEUJVeZTOIL7ZIwIA8qoRCtNliSkfsqo9ilzn9yBad8lfYPXY81tK7dHVcE6cLjzxiitrG4RpDvn6HrlUZU+q6DLnW8DjJSyJLc8abF2E7IioVI+dbXFlfzz/vyL3Di20GnHcRBSQxMJ4DgOorlxbA/GkQ5S23AfRzZLtdjazHVdDODIGmHETjfxXI/KqdmBrR07rRYl0LTyO9KiFey2JVIIjLBYSiEFjnSaGY3d1gCe66IdBcJKJ5bVaa3QD8fmILf7go0OcIRs+KcuVdXUlKZ5TTq4jovj1A/6hbDfJWW16z9ypINwrf6CNs1xbfUg+z5HGqD5TNe1OafGdnCKBvZt8zLLR+dG7poBEU1PjbTH7bketVM1x9Ic0/bcNGXx1pNjyzgLEKKJh3RdG4gspaCxGoG9BPZ6bffbkXiuSykbHKGx2aluc91UkxkhpTX82bBre6xbncx1XNAGbcwb+7V93dbxdjbruZ4dV801FEIgm3HnNKUystkHz0XmdhujNa50cKVj09jq5po1PSWyuZ6yQU/Ya+vYc6bMbuw7joPjefYByvb6buHPD01nu7HQbIuxrGWBsxvT2+5W64kSzbiRu/G5HQugdhEWrmPHvhCiGRtfA42DR9DpbaKTMIagyOjkZw0C0tnR6tfrNYk3wDETvHpJt7CW8x2tHmzMYGhwyhZhMaet17iPaPUWpeAQygPcKqSdrumkF7tpoJNuiBogU2AOcUxEnF/TMWuSVot0YxGOYRSisxLf83FraM2u0Rn4TYfotjW8bVw8J8BUFb3ZLarYIiAj3CxDOpJuNMAtBzhUdKpLRJE9AjI1CMhU4kqPUK/pFFcPTW51TRxHZFlObHq40sUvZnSrlc0cLasdpNkYQygPcHSLKLunYyob5OJZwtiWVh/UFgHZXc/o5re7UsV71B3r60Nc4ZOsLik8tVtyFAK0MyMqBFL7OFWAu/6Szm2PsPsl8aJjc1S3CMhyjKcKerOrHZCpk3WQTanSTfZxyjaeLmgvX6F5iCxQqibeJERFhGv2CIsFndU1URRSlg2HpNmvUEyst2JzRXcWEPgNAjKc0rkZ2l+0YIxTtomKG5L4gs5NQ6uPa1Qyo33r4oo93DKkv7rnfn1nx5UUaGUNYG3h4SlbqrQ2Fxgq2m2LgNyWKknt4EofVxW0szPcKCQo8gbI1GG9XpGIDq70CfSGvrl/g1YfNAjITnKMW8UE64x2fb6z4D+m1YdlF4ceUTmlY+4JmpTzqqppty2QKXCf4AhA11+PsGLEmzMOXEnh2jyOi/HQhhU34qjlRTyIoxs/5nx8bMVRVVvxs8lzmGYe5X3NMmlzdhBSbMVRsE9d6TCfGopFxe1owEV0iMBmbGzFUbRmtRNH3+cifHOauPNx3AmcQnMz6b0hjlr+RW19HLeCSinOjydMqa3ztKm9pRQExiM/K8k8wfnBhPVWHK3rnY8jaMTRld/ifHL4pjja4A/eWmjypWTdDzkb25uB0ltx1JYqi504mjTiaP4GAjL0fVZXNYNUcbnf59x/Yq3bj8RR38DmShEowe3xR1YcdaxIbcXRhqty5SCESz76A86Cd1iOhtbHEWrqSjFbRuTrFplscXY4sZbzumbRiKNCSsa1T3lRsEp6XAzHKCzCUyv9a8TRFpe9E7zAR9X2PG9F20UjjqbDDzkfvSmOZtEjcXQjmQ463B4/YdNuvSmOJlYczYXN47jkaTNT3oqjgo4Sj8TRj1m4cN+0S7gNhuJBHG1xNRliHomjQSNu9nbiaMKrw2OK2npkvEc+juvCp7gpmHf7nHf3rTjq2zG4nW0/iKNtLjrP8FwLxNJKMQ1CiixjNRXoZY4wXxPn6OMZh9YKaoVfb4grxXhz/gCd3iIg12sGTg+/HhJvVkzSKV6z2rJdNSmLgp6/j5fHtIol+0Vqeyy2CMhG4+gY6+MYTu+ZFFfAQ3dsGNq2+qQe4euA/sU1E7F5AzodBCEmL4nlKX5lGL6+wg3Fjh27g04bh8AcI+uayfkUr8ysjTyMdian/bBPkHUI84pJeUdcZiRxQl7kaGU7JvupxDdjkjxlkt7+0owjJsszOnUHnyHx+o79NN0hID3P3WkcbTPGr2M66R0HmWpA0lbtL6uSOAhJyj382md8u2JS3O9WdvI8x2+a3KJyTIDH4NUrjKffREDuz4gLgVM9wSsDgunfMDkvWLif0prZsOIqr+iu9vCz3yDUBQevp+S6oigsYDxNN0jHYRyN8fKYpC4ZLy4xYhuCZJGJcRzTywJ83aeVLRjP7h66Yw3WUJVldPQevukQzr9gfxnuoNOLckr/zIqjkTfEKxJ6l9cM5DXdqz5lXFBHNctkzuTqLULTJ8gD9q8XrDf3u9Juh4DEISwmSCHYe/mKQDSoxdUS3w8wGIa1Q2COCFXJKD1Hhg/Hs0VADkjwzYQkzzhSiwcE5JYdi2EUHeLnAW2dM5le7/I81o+g0+3c+ji6xZTJ3RzP83eW83a7zXKxIBGHSGPjE742Mw4Quz8CEMaWKxINWiDB9jNobf0NUjdvNfbf29eaWlk25Y4wv7qNEALZYBLFtsY2dhuEsOg+bbGFGI3A2PrQaPtHW8wfxv6fMcp+124bYV/HoiylUVbjeGN/7TKh/Txta2vTHJPBvqfZTjaGOGl0czz2/Eit7aoKovmO5hwYbfULY5r/336ebNb+DaIRkcT2mIxCasce//YzjD0/2+M2zedvr4HTnDcebbM9HsT2Ggp7jo1BmBrHaIRRj/7UdrvH57g5Z07zd0eIX9ofu1S4PWbTXJPdmGmupWP0Tmjf7vN2f8XuexpU4/bfQjT7yu67HP1wzbc4y+0223ElG9wjWiHFVuNoNIxfOje7saPtNtuxtx1bZnvtjWKrBO220fqNsWj3o9F7sGhQ+/5mv6E5N8338IAiZTe+7B/xSCP6WuARgDdEKyEEGsmm3eVi0pQqu9zMbakiKW416yDmfHL8QKt/lHI+zVyKu4plq8Xrg+gR6Q1rspEO86mmXFTc7g05j/YfSpUGASmUZnWrbakyfI/zaNvxWmKwf5d5yfoWZKm4nnzAXSvYxed5TfmwqQzZjQ0CPj+dNJZzG2ZclFaIDYxH8Ton9QTnRxPW9aNSpcn+CGc5+T2sguSNUuUxAvLZQlMsYNUPOZsEu+XnbX6FLVWgXGnmnZYtVR7pQ0opQs9ndVlSpJrLyYBz/+ShVGnOY6Ahvayt5Xz4IZeR+yatvp+SpzX1pQThku19jzP/bRZ7fYowfihVopB8mZBKzeujh1IlflSqjGqbm7FKXC72Rmis+Ke0RjdMmYP7gmKmWSQtLvrHjY+j3onYVVUxnxnKNWT99zlrSpWqKsn2UtLQWs7TWWUt58M2t0enbJLEBt34ijRIOY8mZNcZOYLzwyEXnP6aUsVGB0rgavwRC+dRlkmT7aoyRX5jSKXmcr8pVRpgVthA1PsZFM31fnl4TFlbzcZrPDsYw3XhUdQF816f894+qilVdFUTIBni074paC9L1sMW572nVtRvfBxB2JQqd1AUoHIXIb4GvSr2x97ttk8IaTSt5T3Hi9eYXalSksQJ6yaPI9Rj2qsFJ4vbHQhoW6cXec5eeERQtOilc542CMhtk1u9RUCKCUEZMr654iS/RGCFp02aEoUhRhs65oBQh4w3F6xYkcR2Cm2abXVW0HbfIqzh4PkZSSh2maSPxdFYPqWsK06e35I0XJXH1uCTqE+YDkhExWlm8zjiJKHI8504Ok6lzWfYrDhdXNsbhxDU24zOImfY5HF0Fjc8WayQjkNVlo/qYk1PHBCoFoPVNU9XNWkTHWiXY0viMKZTjQmUz+HFnFnT5Lb1cXi+31jObR7HZPEVnqt2wUQCmB/OiHJsHkcREN/+GU/OFmzEj2lPuzsE5GA1Jko/JtYFT/IbclNbH0e7zXrTRAfGE8KsTbcqOZm+fliO3ZYqScJeHto8js2c45sbojCk3HaQBiFZnlnfDl3i6aeczgN8r6HVZ1P6r/aQQCsYE5Rt9l5fMNEX9C6HFHFGHdcskhmnV+8RiwFhGnF89oJic4/nursbh3QkLbwHH8cXz2nTRPStlgR+4+OoXSJxQqFLjpavcKOAvEFAttptNuu19XGIQ9ppyrPsnrRoxNFtdKAx7CfHhFnEQOWcXJ/bG38v5sQ/Jbm/5RkJ75qExHgMri84ub4naIJ8qrqm3UQHbvM4HF1/fdrq7RSJxr1oUK5P6Ths4pFFQEprAKuCkMJPSE2Mynwqr8W6xY6rYpccrQEso4XWHoXbYtNPSIPMBv0YK466rkeeJRZzGCasw5F9OkcRm2BD5fsYpanyGFW7ZGGftYyogpAySGxyWRShg5yyCPAxbOIBm5a/q/MLz6cKK0v2yi3JbdUesFb2/brxpUgpWToJqvRRjmvpX0VGFQRUoc3QMEmLTFaowqMQEevWuAnysQawsnkK5XmIqj0qt8OqHTZNcKqZvdgnWlEkqNIjjzps+i4bf7MLcq7r2iIgFxGqlKyiFqtIAgYVRaRpiuNYPEK1Di0CMhqyDiB3XarQLteW3RicGr2JLJkvOmLdn5CHR7hJGx0qKlGR131qz6c2gkV7QNnkcch2h41v6/SV00blPlXksfEnqCZsRimN1gqTtMgXoHKfwm2xDuy+bleRctejCkuKPEHVPiocsurGeK5LEbUpuzHrXgcJVCpBaZ887JO2DW7WpQgLVFSTRRGb3hiV+ijPZRl1WHsOnmfxCNsub2Mc6rWPIySb1h5roVFRSOqEDwjI3FBnPgrJJh7hJtEuyKcOIwovJqsDVOFTCsOiPSAP7fJ23fiDjDGsRYwqPMrYZeNMqFXN3f6K5e09cSxIXeiuFF0dUEYd1r6kCgLq2nbBqigkdyLKIsZUdsb+tSlVjNFoLexAMAYtJdoRZF7QrKoIak9AEJEqQ6F9G/gjHTIvxPU8Sh5KkVJDZTyUkFSOy1pC4ek3nKOyyWnUAmovICMEQEmPzA1QXohwNFUpUQgK6ZF5QBCRaztH0o7tg1G1HcSFF7BxXArX1qZhEFIgCZRACYmSksILyaT1jhjpkXu2V6V0Q5QQVAhSxyfzDAQRJXY5FulSuAJdSpTjkXlB4zMR1EiMH1FQUFYeqpaU0iHzw515rnJcFJZZW9UuWkgqx2MtXXI3eMAjiBojPWrpoIWg9iMy02SVSo/CC5sbtLCsWy0oXJ+0IbIXNAhISnA9jHDRwqGWLVLpUTttSjfBeNrmi3oxWjRZq2GAW91SeAF5ramNBC1Qje+jVoZSg8aWP7WpUEayQVA6DloKKscl90K041M3jF+7X5Kq8tBKUEmf3AtRnkduBCkl0guQYPNChcR3apI8pZ0b6o5L6sZUrmLjuNRC2rEVRGSiptrmcXjWd+Jrm49qEORuQCY1wo/IKo1yrQEscQ1KSmojydwAIT1Kzy4QiCAiU4YCH1UKlONQBDE5FuitHI/StXqNkgFKGAos51dLhyyq+TgQdNKA48Klj53llNIl80Jqx0MLTS0cZBCTloq6djEVXyNxFGuS2mocjlB4VUGoKkb52a9EB6bphoHbx9cTknrJuLzd0ep30Ok8pxMc4lctWuWcAx5SzsE64xzHpWUmeFVAd7lm/Cg6cLNZ75yjiTnENxH9xS1js3oDv7e1nEeOj1/DcHqJnz2knG8t523jEEqbHzGa3uKUKWB2FnrHkewFffxqQCRqJtMr4oarssM2thL6a4knXOJixbjcppxbt+f2u7q6hy8dWuWciVo+LGU/gk63xT6+btHO7zmgSTnftntXFUkUE5cjfOXTm8+YbFPOmxmH57kWAVkfEgifQXqF8GoC16Ns4u0WrrWcC57gFS7D9d/yr14tQP+M0W2HvF2j8oq3N/t089/DJ+V79/+dHxz8mE4W8p2fuih/TJS3OR48Ya/9DUR+z3+8+YE1mDUxAve9W9J+i4/qD+h4J4yqW34rPScRlh076/t4skNdV4ydQ2J3yGB1xvvXIDyPO6FZRAt6N0OQDpE/wq/ahMU9Hn/OfHTJZObQkgcoWvzW82f0+2/TqiLe/+zntOs5m27MIhzYqAXPJ9b23Egh2MvOCZvu2F+ODgzwCXXBuDxrgEwZSummO3ZDnza+OCQuU8Z3dzt27K5D2xg6kcKvEjpZwf7qnFop0sGUtP0Om9sZ0o05yWBMi856xnh911jOlUVAZi3WqxWJPEaK1iNz3D/vz79oWLExVuzSQpC2+1zu9d4QR4MgsAiAwiGfCtZeyMVo/wEB6TyIo7Pcp5wqlnHC64n/gE8QDwjIxUxQLhX3e30ugglC2AufFw9Nbqt7QZHDXf9tLkKzW2PfiaNFyebexSkVN6P3uXvEVfEbkts2j6PyFRfHQ6amSaYKHvs4Aorz0ja57Q/Y1BV+YJvcto1P3rygmEnb5LY3sd20TWCI0NkAACAASURBVGOa5/vUVcWzJRRryarjczZ+apeft+Lo1scxlxRrw6L1hNfjyCIgG32obnwc62tFkRluJz3O3eOGA/NwHn0D6bUh1IJs8IR1viLWCqkcWktNpcbEvodbD1Cx4f7Zh/woh+XwE2LZoYwNpjYUq4T6ukUmIi76f8Ts6bdYM2X69IC6Uuzd9njPbTNIQy6GHf7q3Qk0LtR71+Fy/4aTu1ukTji4jimdDrdehjttI5RheZTx9DJAA4lpkrsY0RJr1rEg7QuECEj3Y4rokGrhoXBYtN/i8rDH+fgl/VmFqDWDlUt52aXyAirH4W4Y8tl4wt2wRzgdo0RAREyrNmTXxvo4hhYBGTRL1Z7r2ST+TJHfOWQy5nLUhTCg3IqjTS9KLxcUM8nGizk72KfYiqOevdYGw30ZUt6WzDtdzjtDalFixpc46THHR20Gm5KWrtCVYD485rLTICCVRmll2x6yjPXMoSgEVSa+HpZzq224DysrjoPUhjBdM7q+Re96VcpGnMvoizZ+2SMuNoz1YpeFsENAFgUduYdXBrTqDfuyeiPJe7feXvbwSpfuYs5YTwGaGcfGOvy0Ji6G+MqnP71nLLPGq/Awo9BZQaT28SoY3N7hbpzd61t3Y0c7BPUEUVWMbpa4Ta/KY3F06LXxyxahUoxvZ6yLnDAMd9GBcZzQWxn8ekBcpYzU4o0ZR9CwRztlgq96JMWcsc52zVc7BKQxtOq+hW3PZ+wL8caMo65r4jAiTtt4lUt/umGsl29wYFzXwzOCKBvgOpJO+TO+6PwdUTXmqnXFH71ocXSfERERHP8+aWy47vwPgpFHVESExTsIT6PLEidtks90QTu/Rp78gOngnm//8AO+3CvpXY3pxRMcZ0wrz5ncfIlpgnxGxhDk5/zO5xH+kcs6johvrnn3/jmtso0WhlenVyhd8cWTGZ+8+mOC4l1aq9eMnl/x2QfXXB/d8smPIvwq5PAi4L3o9xl6Y/79Zz+k8/Ir/uKTFalrGM9KskBy8HKA+ujf0Np0yFv/wCd/vea//K8lT5//KWxChJC0cQly60Qd3lzhC7XLMvF9f5fH4ZcjQlOxd337qMlN78ZFT0f49ZCoyhlfr8lL20AYPBJHu54d5+1NzTi7Iw023O1dky1uSe8nXDsxaxWyr0PaiymjdLlLOd/6f9L1hkiN8E2IJ5pohX/mn3+hGYdii3/UjdeAukYouyogHYkoCrvenKYWfWjaUBeIzcrmQFQl0rWULPIcEbRAuVDnOFmG2GxsdgEgtEZ6LkLHoASizBHFsslvUIjNGqFKUBpBB2EcRJ4izAqpa2SD33NMjUlzcPZsj0C2xhEuokFASlUhigKBC3IIqkZkG0SV2l4ctP0u6eCEDkKHCFMj0zUiT5G6QpQlRmscASIHIbqgS4S250YIEFVlv6ssmhwIBWWOx9L2XtQKL/CheaI5IkJoD1mm+KmmSjecSkG9eoVTFDhA2PsOYT2gk17R31zb8iCJkFWKbg9tzolqI4TLfV2x6QacpxJ//Q7/cJSg92rcZc2JaxvxNCXnByGteQhzg/YNlatoZYLCdVgrySvX53XbZxnG/PTjEH3pc93rMo7a6MqhjhyqtxOMBJpuX7fX5vVkwsjJca4dFicdLp++i+t7aKXI3q45/+YcaUpmrkFdV4T7EjfocNT36B1MKQtLD7weD5mlHaI85MX+mOtnKfJEsJcFrI9yHOlwPv2A02lE7cbM+y1ujxNS5+d0Z1+x5BBH+0g8UF3b51SuEZZ4Y+mFtQ3yEZVE0AddIeoVUtSINENo1Wy7QQiDEH0wJTJd2esLOLq2EY3GIEM7zmVVIOoVQm0wdcGz6pDJKueZY+hpK25T5ohyiVQhpq7tuEEjNiuE0wFhw5G0p78ebfVb0dIG2ngUTps0kJyPhg/iaAPTLfKcUSHJ7w0rL+JscvRrafX3mUVALpIWL/bD3XKt4KFUmc+gXFTcj4achQc268D3KfIHWv3q1pDlhpvhu5wFloVSNhStbR7H5s7BKRXX4w9tqVJVO59GWZb0a8jubMlwcTzmvokOfLCc23o3P8tZu4LXhyPWdUnQ0Oqt5TzEm+XkM2GjA8eHmMYA9hgq/WyhKVaCWd/l5XiPVh7sWLmqbmj1K5c6hTQ+5XrPWuyXjqToHCHK5yRVzTvLiL2ZR2flMQoGICUvT0rORwGxGjG+jhGbGCMEpvWUwJlQJ5qolIjIoXYMQQyiHCAMxPp/IvdcKj8kb7ehJVl7mnu/T7Zpk4qEq8mQtNejjlJu6gl4gmrYZ6wDssuUe7/HT+IJWtjGttqtmftTrp093q9vyI3HjT/kB0mM5/koVaPuv0U2uiK8NryKE07jDp923qZOBWmhWd9+wI96Dl7WY+J2+Kbn0qkcvop+g0/9E16xhJYiqDTGCMb+Uz5OBFNCXp7+Ma8PYdH7Jn//7bdxNyGhCukqQXapkEJwOfyIxa+JDiwzRX4HqdBcTAaN5bzhBEcRRZ7Ty7EluR/z+vCYotr6OLzGxwG3VUBxnTPt9jjrjCj8ks1gxV/7LmP/hBfKp31bMNho5sMTznoneK73Rh5HnqasZhK9KnCM+/Wg1duw4mp3c9BlTcCKJK84mr2ylnPHRgcmifVxjL0+odmntVpwvLjembYei6PD6IigbNPdzDldrxt04aOwYsehJw7wy4C9m0uOMuvjiKKI9WbT+Dg0bY4ITcTo1RlH5k0fRxRFqDSn5b9NUMHk+WviSJI3eRxbH0cHl8h5RllVHD2/IWzCirfTV8dxOIwGBNmAhIrj9PJXfBytVovhRhDKI9rrFSezJqwYG3wThTFFkTM0PUJnQrJ5RSBeM5gfUlXlgzhqDFHT5BaurxhklqvieT7p+J7S+YyjdQ88H42LyG7x06ntlP3gJZf7n/Fv/vYdPvrZ2+z1fpMgCnn2+f9N8jolyQ2D2ZL3zjWvjws6RUz8wZ/iVw6t6X8hQnFy0eX0JyFm7FK87TH2n9I1v4er1/znl3/Df9+74MxNGV+OaJdtTuf7vKv7DNIJLKf84fSHFLHgMI1Ja8XlwYKDu4jivTah+ICj7I4/fHlB75VCa4P2DP/4yS1cSMKT9wnzd5Hp3+K+rKFd0ItzCj/j/a983v+sx+GTj+ixx3e+/Amr2U9Int5yO0rRjmEROfzOX/4m/aPfJozbHLz4r3jLW7S8ZnJ9wPDzY+i8T6sKiNQRjpQczL8k4QG1GIR29W5YOYTOE2JVcLh4uStVrGW8zWazZiTaBM4xrc2G0/TONrk1mTFFI46OW8cEWUK/zji+PicNN1y2fsYfv/5Dwotr3nZ7HFcx0vh0r885um7E0bp+w8fRdk+RooVS9dcnrNh13abt2sV1DEILdBBRRyOUtDQyVVdUUYwKEmqToDMP48bUrTH4HnVZYrbux7JE0cZoH+21KHshKioQrs2c0FrZ5dEyxhgHFXdQkRWEyiBABQlVYKMDVRqhaw8V9lFOTBVF1GFit/UDCEt0afsPVDykjBzqyKrfVRhSFwW1lpjcRuRV3SGqbmEwzXe10FJSeS1MZZfTqs4eqirs+8sSX5Xkexnlc1B+ymSe8ruLa5zGyp76hk2vz8aJGGI9FgM3xGmNqMWeTVhzH3pVVJlgCh8ddil7AhXECNej6PjchJJ6OOT9aUzlJ7z8xjf5tF5jjOH8pI060sy/NeJmtI86j6ikQ7Qe0SuXdMoBWf+GHw8KPnt7zXd/2mEYhAjjkiUHOD1D4o1Jgj63B1NEF77xwiMOa8pVytFfnLE+zfnZsYZ4w+QXHoOzGX4rxE0kWezwfO+aL08N/+4vnvCy+w2WyZK9a8WizimVw117w3SVUU+eggGlS+KixTpcg0iAgNwfELdqgqQicDaUUcLr4xG6GjMKB7SqmIuTDvdJgJYDoMXNXkDtCJ4/e5+3vDaRgb1FxOsnIMUetR8RugHrzoSykui1b1e0kj2U1FRxjPIi6iaPo64EOvPRrqCORugooG4MbVWSUAcxSoWYwsPImKo3oi7y3birY4vYqN02pnSoQ0HljajDhGn/hvl9gk5KjK4YKcXQCEzYRgWS6lEeRxknKDdClwlG+UjhfT3Cimk0Dq1FQ+ayCMjC9Zm3B28E+WSBNausa5+6dCncmFk72AGZZHPjqMqSTRVT54YsTJi3XXK/eLSqYnCkJFt61IVmFQTMPPv09oOA3Mts4IrWFLVPjWAVd5n5ijQIKN14h0QkLygWAb7WLFs95om1xQO2m9evMArK2qdGMk98Zg2tPgi3QT6ChQipl4bK9Zi3vR2QSVGT9r5gMJ9y4HfQUrJODD/eU7z7wsevBP/jY4i1YHLrIWsfEFSJRxBphnOFqEEqjV2eF7QVBAY6ouTp2R233YJkYdDLmkHPkLAhoUNY1OzfXyCqFQZQh5JfnB6zvIlZv8xhbRCBpHAOyWSfuDas2x63/YKD5x7znsGIhDQG5b/LbaVxli2ymw51dYAyFT+atvnmLGYVePy/f/TH/P2HX3HXKXi95zNpddDvDRH5kFOdsI4LPn3nXZ4fFbj3hxzMYxbK8P2P2nyYSbSIWbhP+LT1Dp1Jn7pSOCJH7aUsphtWSZdi2WITHfGjd/uUYUneWqP0goO6x4snQ76zCslznx+dHPP5/pjkNuI+OmcZ3aOE5stnH/CvbyGUHnn3TxhdP+dyklIM3uL5W218t0VVKqrCRQPL9oCFNORhRCbDnUPXzzV15VEJyaI9gCjcLb0XYUjuRqwKh7r2yF3BNAkp/LJJ4reiO8aw0gm1o8jCgHnskPsJpX/KLyZXfHJ5yInbJpEOWks2YYtZK7RBPlqhakUeReQyIF8G1JWDUnw9EJA8Cit2HAfpGKSCOF2yn77erao89nEM3T6BnpCkC/bTX+/j6AeH+GWLdj7nsPplH4ddVemYCX4ZMJiv2c8f+zgeVlVa5pDARAxvLjhgtYtl23JGVJYTO8/waxhdnhFG/38+jqdUVcX+1a3lqmAapKX1cUzCPn4xICprDi62CMiIXKW88D+lO/XJVxv69R5z55LW9G9onQd0Ny7P/+M53/msTeu8zensY9qTb9LKfk5X/CPf/sdD7pOS/VVFGoC39jgcfEQ0OCKp/xJH/ARHaMJSovMaLzEcTQe02r9PVBzz8c9/QH37nNyrmB5mtN+aM148pXP3ISqsEUoyyl7x6egKUXZYSyireyY/l4ixxI9OyUNFa/ZXzMY5SXFIbzamVJqSimC6j19MCNMc1OfI1d8hkyWzKMCd/h6Z0yaPNWWucDcw+uI1rwZf8O7zb/D+Vxe82L9mpDXe3gAn+C0G86/4X/7iCl/YOv7syYz7+Q3dykc8/Zg4/4Sw+kd+72+XKK8kcgv+229/yfs/DKjMPkPv39E2xxy8OOdFfEX3ps9d/Bm6/wIjNaPLfcJiDydM8IoLpuaacv45rVlJ72qApzxaeESNj2N0/pxI2IyM1Wr1Sz6OU+vjSF/h/Rofx7DxcSR5ymF93yAgIYpC8tyuqgyjQ/wiprssOJies4k23Dz5AR9dfUKez7hgw1M1wDExvdk1+7MHH0ddVyTJg4/DbxCQXxsfx7Yxqq5rKq0p/JCNF3LWefbGjGMrMO2pgHwVsAwEZ70Wju9SlVXDBoGyKLlXLYolzIMhr/bGO1gyNOKo4zBf+xRrw10n4qwX2/oxCEmz1PYUaM1yGTIoJTetA157ozeWY4MwgKxgs06Qleayc8K05VHkRfO6FVJ7SpCtYipZc74Xcaft08K2e9vowMCJKWrYOIaz4RMLnQ4C/PyCtfcxn781oS1iZquIiyjhR4OE2w8173+5Zjm555+ky3qYcDA9pVt0yNrvstoPeP1ezPc/vmR0WTMfGY6vXbqbDr00oux+xGfvDlhFFS8nmuOf+PiBizqSvH15wqrd5qff/JhLdcgPPpzzDx/XuFnEi3FM+3xIJkJcPL5ov4MOnvH5ezaZapkI1t/tojuK9zY9tFOS+d9DBZKrgxGF2oPYUJka0UuYv+xzj+JvD7/HbLhHFS5ZuR4/e/pbePhEosW3bg2rKOb1wb8ljd/mp7/xm/x84iP1homSHCUr5LLPXdfjz/7DRyRly3YCtxTL1i8Yr302iU8WtKmj93j53hLluOhxTvb2N/h+pBmf9/lkdUA377CO3mPZGlKPPSIt6PvvYnzB/P13yb40BMLntveEW9kmbQ24NU9YFwmOduhqSdogIC9aT1jIxuyX2OVYhM14yVchKR7nnWfI2D5klNbEUWQjEkqPYhOyclxe77XJqmZcBQ8C/a3pUNSaWRLzOvTJg4K8FfKTk2/wVhoTmgB3VqBKw7S1x1nc+dXl2HjDKo1Rmbasmq/DjEM0Cvl2xuFJgadqQqEZbmY7BGRdV8QmYbPZ0KWFpySRytlLV3i1v1ud2KZYtaXEUz6tMmO4Lnfi6dZyLoQgqfp4yqFb1uypGQBBFRDv8jg0UdXDUx7dbMVemRGbpOGmGPwqgKIkVAGeMgyyJcKIHa0+0tbh19ESX3kIVTPMNoi6od3XAarIcZViHHYJqoRIKQbrFUGVk2QeN94F3ZUkimom6zG+9gjqijqq+MX4CooPeecXL3l6ljGeHVAPLkH3UOUCU15w003orW4YLypuDjY8/SpgNeliqg6dlzcE4ee8febSeWp4fVjz0d/1SGrJ6eYEp5ezOf6CF+LnvDxOeUt0CWIfR1UcT48J+xMCIdmrVoSv77lZ15ROTdLSHH+RkL9t8MxvkPqKPPw5UnkEVUo3V2hXU5mKdjnAUwNCUzEophj3xwixwDEdRuunBCZgGICnfIKsoJOe49Vfcjg7IZx7KK3xAo+yM0UR4pp7gs6S0xdvoeoauTB89e6S+FXB8PAJhhJ3s+G+VSOlpjaG+POUTXuBE/m07gxRVXBY39NNf0iSp+iWJHi1ZDqpSc5OCRjgK8O4nHOhnrMsXtFd1uzNx/iEtIwkVEOEkAzTBZ5QJJSsN2v8ysMY6FcST3kEumK4mSGUFa+VUrSwmS9dHeEpl8gUjLKUtGkg9MqmOxZDz3PxlENcVAzVjEyl3NYvuBRXnK6/xdrtUGgfaVxaRcqeWeGVdqm6VoqWqFhvlsS1ROLZGEPna2I5101OBjQt76ZCmpqgmu8QkGUjEtabDZ4LUie4KifQc1zfg7LcgZPJc9wgQiiJU6dEbgppuktfsghIB9dESBXg5huCfAZCENURerMmqGx3rGsiHCPxsxWBWROoCpWlzYwhQmcF0hkga/A2CyIt7Ro7ENQ5pijwjYsj+6i6ItgsCJru2Jia/cuf0Z/fc/+OYDD/U2Ss+e6Ln5GVGUILPvvwmrR4hY499q8/YCi/x4m64f3sH/jiA8XBVw5x7FI7LaYqo226lFKTqQXZ+pJs3cPg8tNxh8u44K/feoIIHd4pff4p6vFPh20udR9ZOty2vuAi8fD7B9yeDxg7kluGvGyFnPev4Frz+njB4DTmPxTHBFmG58J+9guuy18gXYFbOnzeMXxwsc8q1LgHb4FQBOo1d2KDLlOcNMT1wOgcLxN4qiAp5jjr75PcfIXey+ikkv/t/6kIS4de75j+27/N3H3Nhy/+jJujKe+9uOUP/jK2yRee4Af/8wRfddif3/Cdy1/wOz+8sbhLrflz74rjLxMOvRZR1WOyuKT36iVCCDaJZhEXrDF89xpOg0MGao/fLX/GZ63PqDoG3c5pz0JOTMl//uq/st/9A1Tc4qn+cz771uechiXfunnFN34+xElH+F6I8+y3wLTxizkBNYGpKFcrwsByVYLaQYoeUpUE6zmuiciz3EKjTUWdbvCokaKNUxcEqzlqW6qEIXljAHOjGKli/LogzOcotaFXL/ne6yM6acGJ2dDRDsI4uEVKUMzwm1LFqSp8U+GvVjhOCyFctDZfn+7YN8JDBGghWXeGvBoNqR9ZzsMm02BQOOT3moUX8WJy3IijFgGJEFRlyW3uUdxXzJIWX225Ko2Wsm1ym84gX9TcjPd4GRwAAs/3KIrCejS0ZnGrGeSGy+F7vAy3rj17Ab1tHse9RBaKi/FvcJvYaEGwQusWAZk20YEvTybcmxotFdXePfHTZ/RnNX1nzbk3RuUV10fvWbanFlwfvcUX73ybt75q8ff/KuZbZ0POg4BXBxF5y+H8/SHLtkFLg1869JSkvItZ9z9kdnRMnUU4hYfuVPjxCjXuQ2EwXpv1wSn5wR5zJ7I30u6H3L8T4cYJq7RFv1RcnnzM7fAErzNj40U47Q2VcPiH7x7x7l2brnb4yeA/8WlnSRl7uNWczURQt/dwPcW7044NXu7/77RCjdOP0Qd76FCgohJHCNTKZ9Pt8+p7v0PL/CZ5UIIj+P6f7BEWkqcy4bfrhLOB5MfP/i2BktwNB/yf/7piEfuYro/8Rsk3v5qgyoRf7H3E8z8YorQC6bA43PBFXPN7icfJbcK0/bt8+sHHNjTYq6m9Ck3Az+Mhx0WM2Hj81Tu/w+fjp7Q2Hu2F4Xm/Yt2t+L++O+I/nffxBfz90e9y7X5MuZD8Za/L9//EoV0c0zbwf8wKgiLgfO9bzB1IGr+E67qE3gzl1GTPA9Y65PXk27s8DpsMZ8vhTi7Ip7DyE148QkBaNIRdIXunCsivc+47PV52J5RBxmWnzX97d8Db4hmrWnJwlTLMBdO9U152T3Ef5XFEkUVALqaCLBfowgWqf/bf8X8RjeONGUeTapQs7jhenO0QkEWR7zgkE7dPaCZ01gtOlzcNV6W0sBsDWZ7ZPI6yRW8z461si4B80Dg816NvRgRlyN7VBSfFNQiaZqSVbXJTio44IjIR+2fnrLXlqmRN2/wWAfn/UfdezZpd953es3aOb35PDt2nczcyCAIgSIKiRIkjiTMKLo3LNReu8Y3v/FX8IewLuzxykEYukWKmCAICkdEAOvfJ581p573X8sV70ASq5kZlShq9t6dOqtp71fqv9fs9j29cwC4Fa48OCL+ogPyiV0W/QJYXbD3s4ecxqZ8y8u6x9YnGxkGTddfHWLFxx4qg9xGLeIEhdOrOI373bkLq1umGF7GzgAunZ+yWf8v+Rk7z4AZpzcCVFU5k0ajVMfPrMLuHbXxAd9xGRQKrnSPKiO79Dlq7hZ7fJDJ/yebijI3jJkFgcN+7w8aRT9PvsDf6KqEWcH3wNnPjmM+6x3RkDaPqEVQOz569SCt/BldzWZncw4pzlGUx10Z8uHObYNGlYbex5S2Uygi1v+HGoUct1fjq+4LIiDjcLGhVLbrRv8PPY3736Id8GiT0SFifBjwbXcaqDFb0VTyxy+rwAdvi/+LSvs/vvL3CmJgHW4qwcvjgepPAfJ3N0W3+p//tl0jbIpyWCE3n0SXB3WZI/amrhPObrGhvYR7d52SrwEoUizWf1kGHzcebmNsX8dKAzvxt1Po/cOmjNlsHLve/uc9pfUrz3st4i5cxDQuj/xNa8x5Xbm+jawFzEXHpcBXbNAlXL1GbO7x6733GekSzJqkfgWqXvH3hI9L1Jl78p4SzjP/wD79m1m5xek7R/7xasW02qfuX2SjnfP3gEen5bd1vhExws3GBuupwcTLhG9EDTteO6V/4lFdOf5/NuzO2RJ1GFaDh0uwteRxfVED65897TdvG0QJEWaD+NVzHiiew4nN0oNBQQkfpUJnBOY9jWSUvHIcKjUq4qFxHmRalE4BhUJr2UuuIotIMpG6jSh1pOBSuTqnE+deX4xCGgSwsVKlTWQ6lHixDaK5LJaE8T47KwkJVOpXhUYplNqPSlqqBwnWRGKjKREmFtHwKx6BieUhbWhaVblJKHVkaYChKx6c0dCrXYFqr4Wx2UWYXzfbIS5u46fDJ+gsssgRHaTza9TBpEcomiZqQTescNw1uX36OwcoA2WphPzrgSilYJScwQyq9ottQPBeU7Mwm6BY8aimSXNFcPaPmtQnOcrYNhyjTWM1SlNDxjTrK0xglM6xRie4V+A8jLt9b8KuVgrycc+ZIVic6g0IgM5PEVjyo2owLDROTie5yj0Nce4WebPGKEBRScJoY7HwScJArmlqbJJAcG3NSmmR5jSxzKD+7xsmVR5w5Blpc56TymIoaV7IWmyLAN2+S1UZ8dFVRuDtktmRan9PU6+TGAYtCMvQtxmsBd69WfPVNEzcR5EIRRBmFBZoyULZHfaQRd3XGjYpPtnNeOl5w5eiYWruL0DwUS0yCVWjYBeSOj9QV/XpOmRY4mJilojXX+J2PShJrwlkrQ/oJpWfhFLv4WYreeMi1/QWp8lifutxdS9BwiE2NxKmY2Q5vBs+gd9oMomgZ0DvvBGnSI61cpgju+xdIiwwQXxpVVo0Ou5HN2O1wv63IPQ9/0ScvN4nMmIGqyJbbeKTpUBoBxfmoUhXn2SgJsrKWmE7tXxE68It+DaVplKZLZmmMOsH5rYo4p5wvI9qzTKcYCVLTYNRt/RfbsfPEopQViefQX11mK/TzM5DPI+fRWFDKikWjxthuLO/ITYs0S5/kOJKBIM9g1tpgbJ/r9c7v0KNzynk2NLB0ybS7w9A3z8lTv1FAylKRD3RKw2K8WmekSnI7JwkCJitNKquOJwyqXkSsOZyt1YjKAkfozNs6OjXKysfJxhSWS2TZTJo3mYdjZuNdxGaD26OAw4XB01rAqtDZ99q82fwmHxgWdpEzXsnQF7BuhASxwUIPODI3OI00WiOd1Id37CbbTYFwGuwvNlirNB5uPMtwuo6jYo7XSvRSw6ma3LvQZnZYxzbAcqGVzBFFSm/FwdCfpgrb+FMBWghagLRe4/7Vq6j+Kb/c2EZ6ipk7JY8tBgctRprkjSuv0etssggWDEXAGzeaiCrEXzRI+yWRblJZt1g0csZRGwCtlIxDDb2yUTQ4WrnAg9c3yJsGs5rJLCywHMGIiBcDj9QNmNSu8PBrLfJActJJSMKKaWeTH//OKl+3bKzY5rOd5zhcNYkKHwAAIABJREFUM/ngVpfbe3tErU+pzDl3LrxIv6yRliX3Lr7OgV2SaRcICxgFM8b+nFBInr1fozA1/vYrVzFGEiFbbB+vcnQ9Yq4l1CtI3VXKwmJ/dWupgKznT9qxaZYxTwXFWCM1bYbr7SftWMs0KYplbWGe25RFwcLXGdYCcn2T/orFx/qM7vEVGqWJHulLHGejy7jW+bIC0nZIk5h0bCDnGb/9vcby8086qizLbQVmscBJcrqTfZS+1CZkWXaee4homi0s1nDnU1Ymp+c5jgLTXBLA0jSh4W5h5iH+YsxGHJ83QH+THDUMkxqrmLlD42xONz1BCIHneczn8ycKyEDbwlYuzYNDunL+JZOb5y1HFdfcwywFrcU+tq+fjyqC0DKQyZxGXhE6T1MUBVd695jlMUmYUPjHdB9usH60wo7lYLldrLnBzeN7ROkcvxTIFz6mMQ5opC30piKYfpvVdMRm7YeUVZ8bv7zC2faE1rBL7ZGJX19HbbXRJ5/RHb7Doq4YywA11aifCLpHgrB7AyszqNRbtI4/4NL7Flmo86tnJnjTkpPAwk7+A7V8nY2Dn/LUu2dU1ZS//u4EK1esHbW4dXoVP38dT9V4KvoFD9oHdM5i9p/L6KiC6w/X8YVE938PMpDFX3Hro22G8Zxbww5pU3HQmbJRdVgZfI+wjPm94Y/4wQv7dIc533m3yVzLyfQmr+3fwO9cY3c05Ln4PxO5CX/00y4PNnNKqTApOX15AyPX0cqPePH996lcjRd/bfPmCwkHOz71mc1T+iVMC3Yf/4qVRx/yaC/Hn5gcP+fwnduXMbQ6a2vXCao2K+IdurWf4eg21z++xLF3j3Gw4Kl7GuHsBo6mMGc/wGDE1v0Otx6XFOaCx+sJvvKo2d9jbeQh8++zeheunLbZuWPznkwZWylZ0EIr61gLk87oGMtfjuFfVEA2tBqWvoW7WLAW989zHOILTBhJ09vETEPqVcpq75BYjyhvfp8ob5MNNVKriyxCNOVROzuie9r/zahSFEsi+myOZ+yg6SHq85Lpb/nzTzSq6E+2R0tzl0bu1RmHe5TnzNGyWKLb4iRmVjkUc5vEEYwaPsZ5AEw7t9rnRc68CimmgsTR6bUgy/IvX8dqgih2KRewaHmMhAfA3LLIaimWbSOkIp7a5IXO1N9gZJYk3nL+RMHCthBpThaFmIVkWtth6BrkRU5DU0hm9MuY/c2SP/rIRdku/eAqcz2jCvdJnATbkFwYDzFXamhsIqoKTyiGVw3WTuvI8DqPuibdyQobtkm6COh3fPrN5ymsM+bNNeJ6wpQGZSqI9TpoPrl7gX7NRQYCY5FRVBnCrBHXLXJ/hTgNyK1rnGw0eOt5Cw+La8cRZhQzSA2U2iJ2Ax6v3+JseI2jzojSmlKaknHDYj5vUEobXbOJnrrGZGOV+rHNXidHCxfMb3h4lgmHTdyFYmXxKpNul1mScLtVx7Vh7kX0tCbTgwZDw+LT7k2m3TUyc8G71wWnbZft44B7cpOu9JmHJW+8dIUgKfl4YPF/fjenO9Bp90vWrW30tEFSv8jjV1wKE3TDZ/9iTGpLBA6J2EVVHbLgeR4+tcOdF2K6uUVnLjns1tCFxppZoyhtRv4G0vo6xZoONzTsWoemjLhxL6NWlyjHZnN6gagecucZg/efV7zy1i5n7ZKwssnKJpFpkPgv8NmLdYpTi8hyOXaWt3tpU0cmIYVjMW474FhLr4qslvrLOGZemBSRQ6YbjLq1JwGw+RdgxQvRoBxWzH2bgWOSGxm52+e7kxco19ZJhYeclKhUEgUdRm4N83zHUVYVmecThXPSOKAoTMB8YhH4bX7+idCBn48qYlnnVQqtyLDjOaahPSm5WTJHpikWEk0amDLHjufouYF2zhwFEGmKqZlLi1ie4uUKkugJrEYqhWkYGIWOVmnoSY7NfFlyUy7EEVaZgZQYVRNdCqwswS4SLJmjzkE+Li4ySdEqF1EpzGSBr1toSYJqDomqh9x5/hjNNuHTS9gzjQuTI442RhyoQwwx5/a1ionTpUXBy4+htEyOOzl9/5j9K8eMwpjUFbx0t8TwXIxynZVJj6vTBxy4E27FCX/Zjgiyq9ScDlZloBcVSs+ptBjSgsjNMQwLNY4pXJvUSEidHL0omHs6Bzdc6n2fec2katdI6hMSxyZHY+YL+mtdev6Q1OnTnBoMO4L5x5DnOVkZo/7+ALc+pfkwJAtjfvjfnbKobLTHIZq5judYPOc7hLsZrfsZ1o0xfhxhrmS0koT6e5soL+Xy1hGaXTFdrXD24Pp8zu5bh6zuJxgrIYaIudobo+cFvW2dy2cKq2rSMDwMR1HkJdvDnJlxRtQS1GnTXCsokRjzgsBMMPMCqzbF1o/YjBSZ0Fhd2NRjiak0LLONjk3a6BNkQ6498pBCsWmbbFoV0ddKjEOwFLirGe0oYWIWlIbOyqjN2U6KUepQVuSWoNJHCK1Pe9KlNfPpLWJm7YpaKrCzbYpS4SQRthkwTxbIqsJSJTJNMSsHTdpoMsNcxMjzWxVX/YYApmsGmrSwK4mbLkBPaMYpSRoh4zGFUVKUBigdI8+w1RzbcZ6U3ExV4sQRemGiSQ3Uv5IdB4Cp6SyJjyA0gZBglTm1aIzUztuxeY4vl6OKbygM6WGVCXU5WV6hfn7dCthZhmc7GJXAqRLCWYSZJMsch1hKmjVdx8FAr2yCIqWejkAInDJBP7fVIxW2dNEV+MmMulr8JgCmFE7hINMcS69jlBDGM5ACM0sZ14Zk3Rmt0YRA6Agtx1Bw4ewhpZActnJKO6HUCo5vmdR7dcSxQaHBvG0yd23sZIaoRghTYpjrSKNEEwqnMjhu36Eoh5z6Lqk/Icjv8Mp7PrfEC4ibN2nbB1yIfsnCj3m8AU6qsXcvYCWraF/8JnYeoqkDLh/eoTsU7B4J5kcFk7rBp5dK1sdXcYIW7eljunf2OV17yGfy4dKM3vc5a64SFwJXaBzrBsc1HavdYJHDelIiPZ/TRko2mrGILT49fI+vPG4zjIZc/7TGvWsjPvDOuNVbw+k/RZGPkG/8koObimqskBcNrELneXeXTtPCsCowYi4/GOOdZjiFydnTY1r9Q5pzk+rqJQqnS5Gecly7z6gwGU9Czh4OkDWN7Y8N2FiQ2xH+g2NW5w8YXZ4jDIXb89l8ZxVp+lg3V5G2TS99xMHsY/ZmXaSAh+MUlVd4pcu3+pexRY28d8CtuzFvPT2nOaphqwxNjtDwgYzSkBTOfcxcMW4lXM5XeHZf4532Hdb7LpX2LEYZszrtEedN6kVBJSsClu1YnxCdAJuMZjwlPt9xOEWClWfojLmYZ/iyQ2c+5NbiAblb8vDlhwycdW5GNiuqJJQ1NOXgZhH1bIyV/yY5GqjzKLzmYwhj6cv5r9kd27R9nmpt8sdbz/Ci2AQh+LFcUCrI3JCFrXOwtrrMcQiNqjr3quQ5rUSQ9Etmts/+2gU0Q/8Cj2NJ/e5HOtkgZxLUebTxRa+KeHI4OhpWbE0Kzla77LtbgMA6z3Es0YGK6VlJK1GcdRvsu18oGKEwzSU6cNFTaFnFyXqLvr+8j4+ac+bNKamVsCYgPlwn8TT+5neuMNMVw3Yf0YyxZIGFial8cGsUjk5y+SVyb4JMKibGhNQU3L6yy2q6IFo0OKy1GK78R1Iz4idtkziY0m9Z/N3rNlHU4VllI/SXeXDxItNWQepWFIXO3WdDjpTg5SpE9muUziscb93idBU+uyrRhWToKNKaYFDfZEVYZOGLnFyOOb66iSleI2oIjm24MmxiGi0MaeAFFxCNhLTZQMhdcu8avm/h1hT6vE5lKZT/R9zbaDKoYqyFz9HGBPQIN3OYBm2iIORw479HdiukUdLTK+IAPmiHiCrg1azB0LC5U/8OWgtqM42DnZJxVyPITNY9D7Fo0Vt1ebiyjlNoPHjO52SnxEt1Zns+sekiNY+x8wLv7exyZ0+SWTaHKwFDvY6uaXzbcBCVSRy8TmU8Sz+oMwkls1ZFFpTcqVwOerusJAYn3d8lSwRnGzGVa3K86zNtXSTTBPlpG1NpVNaf44iQxxs6zstNKiWYdr/B+pGOJpvENcGnV66DZT9xJ9u2Q55nhLEiHUjmdsjDzV2yc6n159excWPOxZM6a2cZ+7UV3mzeoKJi7G/z6XobJ76IWKRcnUiqQmfUvcB+c+8LOQ6J49hkScJsoKgmMVVeUVX/FdfqDU3DMyxcw8SWAq1mQqhhxOCkEUFesBWdfEkB6Z3zK1b1Ok7RIYzmbEXDL4iClgtHlmV0zFXs1KORzthNE5I0xTSMJ7oAXddpyg52arPS77Gd937TVYnjJTdBSmrlKnZls3J0xpzoS4ejn6MDfbGDXcLa4xM8VyNLU0abA+AU3Ck5oJI/xp7DU395G6dM+eVL+9y7NiY1YgpNp/nJVYLx64Rlyuv7P+Qz7xGmrGjsFAxa8Bf/e42as019499wbTTiUv1v6HVrZLpJZs9oFs9QVqBHCt1qIvMTgvlnxI0RSTFBm9u0H+1S1W2E30WpC5TiXapshDUwccwMEY+oOQlCd/CSJoYdYCQfYCuN1HoDqWJqugWZoHl8GTP+JkL61OWPOWscEXd8Xv/rJtpJjLlT4TzXwtVfBV1yKfsR6/EqB5MRl4xVzsQn7BwUXLu3QxCv4Bpj1h/9hGN/wcRN0XsVuh9x9c0ubWMLN/gWnbjPxeIDZq7kynGdYf0IK9eoZzbJjRbMn6Pbv41r/4CNnoaZN7n+CWz2NfY+bNC4dR2xfoWF8Q98uPdL9jclN+/beBOTr/ziOoXt07x+C9tpUqqfoRV3eOnDHd555oxA+PRbCZvlGl71x1gqYKP8AMuShPYx99pjvnO6h7MyYCV30crv4CYWNz/4gKFYZ9aeE48vUV8YyNqCfL6CLQJsmbB1/z76ea+pOj8cjaOIFQIcuUqYxOwWkyeHo0skZcZoY0B7dAsrcWnIjLXJGYXMMS7+mNfu/y7NBzHbdgMnc9GVQ7N/zPZwjGlZy8h5WeKfH46GrKMr7zxy/l8YVYz/f6/+b23hqKQkqwryqkICmYyYFgPcykNSITVBrhSVBA1FISWmgkwqCgESRaUUuVRLKppcaviEgFwqSgVSQcnye3KpUOcKxVIu9ZJLeZ5a6g/kUkMopCKTCm1Jn6dSCnX++3MUFuLJz9KkXEZ09eU5TaEUWSXJRYU1GOKHKbkt8JREryoqw+b05iXiKqW3ekLftcgc8FTJqJaRehXhqKQ2MSlXWuyvTpnbgtQymLV8buxLkr0MjQWpO6c9LQgncJeMZz6+zcqp5EYJ7pbHjcWUg+KAX/sxHQVWprh4MiFJE+y1ALMQiHN9gCYFSnl0+x1mFydkTCnVEh9XSoWcJYjYJTNT1Eije6TjTeaYFGiWxoGjM9mOGZQV34zWEPOEfZnT+emYRKtwKpNiHpJmAZGaME0NEtliHBo8aG4ynAQM3Yy7jeuM/DN65gDf8JhbZ7zx9AvcclrsHZlMnXUGWclh2ENaG+y3SzJp0iwbtL0EozJw0xBLtpk1JO+1u3i9Gv1mg/7U4aXaVdalx6ATgrlHK5pTapJbDzqgW1gKrEpgSIGVaxTC5MTTeLSpo+eKJIfOWUKwSHBzA2c8JS3GpGVKHmgMr1no10OsWQPjsYOqfK6Y11kzjpmaOdf8HupERxwn5PMS5a9QKUmuFMb5sy2lwmb57BdKLZ9zoESQS84fSkkhFaUSSHGujlCKXEoKFIWmMbN9fFUQFTkVDorlO5FJhZKSSipKqbDO3x25NFFQ6CapbSLDJlqzA4BwXKx//z9S6/fI731M+egu1eAUlWf//AuHJgSGpmNoyy6KpQVcSSoWRoqSGrHr0ete+1I71j7PcYxznWKkkZg2vW4X3dApy+p8FFHkec40sylGFQvPobe2jIl/cVTRdZ3ZWJDPSkaNOn27wRel05ZlQqWIRxp5BpPGBfqOZPqFUcWybUSSEY9MDL1i2LnEKLQYeT2kV2HqEfGaojn0sJRPmAjWqoyIkru1mwg/QgiJKk1ip8XCbDCttfjl2rd5+/keY2+KLhSXjlzefDFksbvBq6bD+KLD6cbrzDzFrU88Mqfgx1/dIBg7LHo1XpIut8OneePCBv31BdYix587vH+rwaRV0kp9irhOZT7FaQvswMUwDQaNGrPuhIU/4XT9Im4KZ7uvcHRLx20+w5aYorUllWVzJ6jx9dtriMJicfX30bae4uUP2+x/22TfGTNuZHiRR8UKqRCcmF9hYgaMutsU85DE2UFVC+KGhyXBLz0wXQRbtNhgQ2uzahRYL/vIKESfNpB6idzYww82GasGXvMilalQwqPRm6IMn0EnIGnucNyY05wG2Dsai7HH/RWTi6d1OpmC4Cm0YJWGMijaJYe3miS+jSYEq1qIW1q0im/R5imiCwGdJGdmKRQ5jzZq9I+3kKnJif8NFlrOYX1CoVfcCVY4zFOmhc3vJR1iafATv0amdkiNjJNaF+cFB6XDarNCTlyUFjLodtH9JS1OSsnsHEbcTQXFRCc2HY7Xuk9yHLa93GFH7QVD2aZICxb1kF7YpFQFyi75eL0gGF8gTypkbCILg3lrjX5t5RyruGzBzh2HtBETTQwyqZg7DXqNGsW1Z3HMAADd9RHPvoqHwLr1Atmvf0Hyy7+jPHz4z79wLC9PFFIpyqqkyHM+6Ra0bIEYSvzFmPXZY6Qmzo3r2ZIdsFjQMVvYrOHPJ2xMz54Ewz4XMqVZSsvdwspDavGYzWjxhPf4OaJQ13Ua2jpW7tAZRKzHRyDAdZY8Dtd1lzkOsYmtHNqLI9bVHN/3ieLo3IK+vFXxzctYJaw83sdxBKE3or/3Drt9jXm1T/10E3fWwp4Idk7eIy5jPtw4JDCGbA81dg91auYqRvUntKeCZx7+Pbd3PqV+CtPtiq27bVYnda70LmFduYydHJKov0TPFdvHHqkuEHrI85/tsJtfI3AvYNfe59LRL5jX5jhzjSuDLW582uRoZcSWuEmQ3KRSv+Dy3btYUR238Fg/avD2C5J0bYQXNXBzk87Rj1AnJ0TXx8yvzZB6STUxuHK3g9v/U1wVsv72X5F8dsyf/s0GspR8cKvgZKXg2oGH8ezvYRZw4eg/cfljnV9vwiv3BD+zB9SnFZ35Do1xkywfs6b9H/TDhFZP56XHTfqNirmX4viXQH6PzmTG1w4/5aglQTfZ8RKmfoal+2zMXbziOTbmD3jh4Oc8qEo68RqnRcXmnR06sxYtcQFbefjyY1bK9/ETg0Tl7Bx32L4foKHT2HgGVzRpJb+mm37G+qBDXJ8TxtBrLFg9beGO/xC3DKmd/IStzzLuXDxkUIsJDnfYqgqu9Oq4lUuQuHR6PyPON5nqC8KDiwRaCEBY6lj6BdwqY2366EvowM9t9W2thq1vEsQR2+k5OhBxHhBLmaRDupNnsNKAehWzcXZELnPuXPlb7Mk69cOS0GmhZR6a8Kj3jlg/62Pb1hOT2+e2+sDcxXQMro4eIRs+t4MQrdYEQPN80PUlQFw3EF6AOCeZ/QssHMtFAxSGYaILgeWHaJWkshwKwyaqX0R+XnIrCgrbJmtkSzXe3KFwWyzq/m92HIa+HFvyjKQKqWYaua0z73TJ0vSJW1aeKwTThYNcQFSziZo2CEF5vuMozpOj+dylKnRSf4PIXP4NnydHS9uBNCNf+FiFJK7tsPBNIq3LsGtjiU1m7Q8ZyBbTs1Xmts73b/0xI1Uwaz6ksveJ7DnzoEvadsmyOr2awaPay2S1kJ1BRK7ZDNo+hhkwLNusaT6Z1sJ2vo7Xcpm96OA5yzLXoqqRH62TZyEpF3iwrVFXDgu/xyB1GNZbJH7GwlgnFwHS3GW0XhIsNGqTNlkX9o47nOx1yR17aRlzNhHmFeLVAdIZUWoV87rJwe4a02gNq7QYW08T+c/xf//xdfIsY7y2YOZGjNZ81lWTwpJ8cu1VprV1huUJv+qucf/CIbWZi3W4wmm0xciqY1h/TtQ84fIjn882JF5iUShJZNWIRMC8FvC+XVuOmlJwZE9ItZJGukt3USA1i4nq8pn5Iu5JwkxOWZgWC9tke9FCFzalqzOmzl19g8rXWevbTFQT33AQaCQypNBcxnKDXiUZlA16WkSBRr+acnO4Tmk3kIZDFV4lX1XUoy1G7ZjDix2KoCQsAspxE7BYn9xEZTofX9gj3lwF4S1b2KminDmUwiSu7yHcpa9HSknlOGT1jLQwKSOXXDeYtn2ysliO2uaySJm0m0RlC1loZIFD7FiUqkR5T7Nmvki8tU5PmqQzgUolea1D5IXk5zyOqqyWCsgwpogCMm3B8eYlDkUNbfBrypP95cvq+ssx3rBQWUrVP0FG83+ZhUNDw9R1dKGDUhiVIowmlKkFaulYrLLsyahSFgWmrlFmKZXSljxRVVDlGQKLMs9Q5RINWOY5EhclDWRZUmaSMs/AqJ7U6pWmLTsmSoCUlNWyB6CjKLN0+Y9KiaoslBSURU4pc0xdX7IfFctGSpaD9Jd80iKnzCoqI0NVBciSqiqQVbHsvUiBLAuqKiMpDKgaKH2FxLPATKmEILUtRqKFe3yFh7sVCzUnXbWJwhahrHNV08DooB+uc6KGaHGKf+Tw+NqCdGFwcQo7hkSlkipKaScOynCZlyVxITBnAtlUIHW0UjCrX8Q4KxjZFqOOYnWgoYkBiTVEJHUCWXH5KOUgn7OocrR8uUOMhaQUkGmCBZtoE5+JZ5LKisS2MP2M2lGGaSlyXVIZESqaoZklQi4wy4LmzEKTOShJrGs8WFmjH8z5YHsT0zdhKlAoQq2FlBp9q+R93QalYZomI3OE5i1wkxPMtIn0BHrqcOOjXTzDZGrHnDUPGXsOIxSJWp5r6ZkkdlM2zgy8yGNYD3BaNXSlkToOUoJVxBR6jJWamEVG1hVcChqsbATYhUBmglbLxKxSni09DA+2Oooy0FgrBU6s0KuKzhZUqs6VtMS1B7jCQZkmoWliRSauVrLijdBciyRPyU+zZTkyTQmEj8kqjkpoFcMlyMfusXe2BB4/KjK6WR07d/HHERtigBSS20mBio4w0gamaS6DDkpRlSVlliGURFaSsipRpk6ZZcjKBUNRpBOMuEIrMlQSAfAkDqZpqKpEpSnqHwk0/u0djipJWhbkVUlRlcjQx85CCvcx5jzFLaE9O6MUCkM3KMoCr1yCfBr6Eq7jVhEd1T+/VfnNqJJlGTVLwywD/GrGyvzcVn8ODCqrCl3X8JXALG1qSUTnXAHp2Etb/ROQT6VhSodGNKLDAr/0iZP43N7uIJMcR/MwS2guBpiloLJHpIO3eerOEQ8697DSLYzqOkZp0Jr1EGVCGRyR5keESR0jqpE1BmhqB7uAbnRKzzkka5RIOcGWDvUkIYwlBAGpLHHnA4z4mJFtI+0mpXbCzIBMqxBVRqHHJFaPzIBMHy9doWaDUV2QmAmVIVEcY8RThNYkcSyUzOn2HILJffz8aZQb4AYjqkbBhvuY9QaYqWQmU3aMAQ1tjUbR4JX4I8JFibVYQnCP3Zh9f8pX0y6h6ZMJyWXjPi+Ux3yaZdxSBkG14OXjFml4TJ0NqnzMH9z9PrXmgt3eA7TQxBopJJIL1S6h9gyb+Yg/6H+MKBXogoebpxx6YzzD5+LkFRxnj3Z5xHbRw1F1Aj3inneEaa4i1pqISGIDO8mYV497XNpvMzYmqJUW5tTGKECzS7RUspYu2M0fcE13uN+Z4ZkG8yjhqz8Mafo+garjHr7N1Y8i0qfm6Fc1NjKTx2XG5qcrOOkmtalBO32HlalHdzWjNrbwBhWTdkk369Cxv0Y3jvhvf/QDhKxIcgMzzoi7OrWhxG9u07n8TWqLPp2HPyeTBQ/3PNpzD62EVj6j3jTxy2tsJWc8P7pNrlW89fJnXB5vcmn/DpuaS1vrYlgNtkY9nsmPn4wq1RPlSELXuYS5YrLeyMjcHNXqYKxuAaC7S8auKnKE7aB319D8EDnq/fMvHKam45sOrmFhCp1ETjj1U9JAwRzyWoPoUkipKWDZYyksiyzPiKc6xWNBEdgsLq08KbkpFAKBVJJ4YCKPJEXbY7RzDij+Ao9DKUVyZFANFfFug6i+PEGONW1JmjZNhFJk96CYQ7K7R1RXlOfnKQCxrqOXiuy+jpVK4ivXGfhLzoTy2yRNm40LT9MMbYz9AM3WyW6so6ERhJv4nTl6x0OfBHjuAMtsEzd0zq4HVCs76GFBQ6YYSkeUFsL30XsCVddxbnybTi1GaAJty6Bt5dhP+2RmHXmsMFcdwr11dNMllAvKSjBSDcq2gXUmEZlDx/4GjTWBFViYloksFXc2fNz15xGHW1QLRb/5GveeazCzhsQssAxJYUoWbYc8XCPHoLf7Gg+M5eF0bM+ZBjnToELZNt97sIGhgxP+GfdeUsz7OgcOVCsVd79iYgrBbN4kN0M+eulPiNslZxsCSzfRyyV/Nhw5FPfqLJyAR00HJ5ZIo+LDF27QaxfceFznOO/iZS7Dlse7T12mkfhMwoKoO6Sc2wzqLRalTZEajINXcXqvc78rycwCXWlkHRs7L4gKhwiNafA6iX2dOxdqhKMhi3pF5kneeMZjdbRNVZh8cu0P0BLB482YVl/jYVPQs+Ctp7Z46l6HqKHz6yt/RPN4xuG2wIt0tEFE4ut0Vcju/ipRo+AHW7+Pn0CEhpWXnK2X1PqCTa3JN0Wbs5rPTzc8FlZBb13RnHl4C43EKVFOjYujkFPf4OOOR2UoTPcqC+Fh6RpBXGL4BkroFG6dzBMUQkOhUFJRmQalU1BRQ1YWD6nzvqhRaZ/C5+cYlr0slSmF0HSEZS/PPP4Rn9/awpHLklkesyhTSqHwhM1a75SxU6JFBcH0jK1PPqNkeR5RluUTNd6K3cG1d6idjNm+/ficx1GgnwfA8jyjE+5iiTb1kwF7twfLMw7j3Kuu/OncAAAgAElEQVQiK3RNp+nsYBPSGQzZXhyAENiWvbyytKyl1Ne5hKf5rB49IC0mT4S/KEWzLMk0g1rtFo7S2Xl4h5ZeMg9TPvvOWzR/5nMWDqk/amCN/wwz09no/z0qM7h9dYi9McasDP7wrxR//Rc6Mv23bB5V7N39Fat6wXgjRzNiKi1GCQ27fxNVf4n2YcrG6A0eXRyTy5LRRsnlg4JrH+vsTV7CCW/RfnSHtvwVxx0oq4Ru6vPCf16j8HOMy9cw4kvMsjdwf32PnUMbR2k4C8V6X/CD1xd07v8Jmt9E3/8JX/mx4IOXJvzS7OPNS8Z1uPHTyxjp6xh5wO7dh4zSCaUv+OyFf2AUz6g/MHBPNrHkd1GBwKx+Ql0YNPYFT5kl74YZF4chvTUbabyGn8fQ+SmmnVErLWpViCBnZWRST9sE1bM4+jFa+4fceE+xMtB4+/WC6z34vbcEL5zcIt19jr3hfVbvv83WseB/fX1OPE5ZOdH5zs8DLjVepdG6zG75Ft/5/kMONysOVwr8WGAnLrVRRPfZ17H8TTqPfsxG/Cn//n9xaU51/p/fT/j+N3K+8iOH9eZ/Q03VWfvs/+XWT/pc/bli1FBcOBTc3zNpZWvs+n+EVWm8fPJ3DNwRDzrw8q+b+JOUN5/JmLS7INuUesJHrZ/wrTda+IVLqhWY4QhfQju+iu7UMJIxYfSAwo84fCFF8CLz3CC1UnZth1xTpI5OT1XkIqfnvE03+kPuBBlps4GTWfhKMdclp1pxDiuWy128ZxIvciJV0dYLVuNTrkqN++MBVe94+bK6/hK2ZZrILKHqn6D+pc44bM2gafvUTAddghQOUfcGI+MTUt0gEorTVgtlLK9rsyzD9TySOKat1yikyUJzOa21lwtH/jnIR5GmKVM7IM9MZoZLP+wSxfEyAAZPzGYL6ZNnJhM34MRuI1g2Xj+3iqtKkuCSS5OhWecUfblwJAkKmDkOVZQQGzaUgtN6nYWnMzKHpK7Hh9tXmat3WdgrRL6HqEzut64yJOJsPaKbdTjoPObHt+pkWkFuwtyFMteIuglio8HQ04i8jCAuGHUXGCcK25E0a4qkbpEUCZaKMTsGYauBUZkoG4Itnb1dmw1PMnM0GguXtWc1ioaGZSmsY8mlWcixFTPtpFz5KMTNDEathGEnJXEFriYoNMWjNcmgDmYsKUsNUQgeNdfIThwy0+C255G6AtGEe5ckxtxkbX6RXs1nkerkWsG9nqS/NeKlnkOxX+ejSyeosykTq0WWlCSUHD9KGNkR1/+2yayueLSyiqp0WvWUzUwxmMPdrEW2uIBuFfyD+AmX5i4Xki02yhV0FA+NgON0lSjyUA+HhI0B630DLXWpDIvEATvVSW2NeaBz53LO1XsV1kww8x2apoFeGsxrDtN6i/cvrtEaWpx1Rkxrp9y/dZ0rcR2KgJnX4NRb5/RCytTPGfgWWBpeUiO2LKpSp0wbnG3HkEwYC4lQPhf6JafBAl2luEXEd38VsTkxmecTotWCNy6MmL/v0Zr1EU5CmGVsTae4xRyj7LP3wKc5cEmCks2VkiANWZn2eT56wMCouJ3PKToOneMxdaHjCBtdt2lOJ2xnx5iGQXVeq/c8n3ixoBYECNulMgQSfQn0Oe/GPAl/CQ2UQpUF6h8ppv6tLRxpVTBI5oyzGGkI9GqBXX7MMwMDHJtYmhy0t3DcEK1aXqF+rkEYFybZRCM2bc7aHTRDpzrPcSgURV4wyW2KccXCdThetb+c41ASXdOZTwT5vGLcqtGz2l/acXweOV+MNLIMRo1derb8UuTcsm1EmhGPLYy8ot++yjCwWBgLoprHycVtSn+dqN4gs1sIX2OwfotxqJj7e4gqZFg74MMXHTaERGorDJoGj+mwvxdhOjpTP8JLTY53ErShSTps86gNb2z/LrMwwgJ0VyNxYgbPe9ifNuhMAj5xLvAzYbNxIsgNi/tNl2i9xX444PVpyI4V0Mtvcri1hr6u45gtUBUfbI053Z5zcNwhHNTIGy/Ru14RlAWFE9GIQMs1PK0JeogqTUTQJTUlxbpFf+c7rDyqmPkOu7M6prayLFq1XkMVMYdXarzfalCYfR5tCRqVSaV3yAxFHH2PQbjgzRccVqMWvTWdqtQwjTml1SFp+JxsrVIETSpbUg9WEZd9Pq61ad0PeGmi0DdaPH7tMr3MIbYTKrPikWtwnOu8/pnNjSON0fVv87P/4euUmk5iZbyfCPyBi5Il7Qcuzb6B8cIfEu5EfLBlIQ0D9Izt+pzH320yfa8BqY5969/yzqWAOMwpRckktqk8g94i5Mp7Ek1q3P7Kn3HUOGMyO+MH2w2efWDjyZxoTZKfrpKJFuOr/46RaRDnULhQrC+I6xbRfsg0bXK62uBnfod7W4Ko1eO913dRU4fKrihSnb3HBvthnZ8HGxSiJK5v8kY44+rONuYM8tig1HROV7b51FnBNM0nOQ7btsnTlGcSn8CIGHkr3PXalO0KY3PZjdG94MkZh2a76N0NNL+GHP4LnHG4hsWqV6fjBJhKIIWDm6+z+hCsxoxuUvHS6F12jka4hX5uXF9yN9Zqm3S7T6MWPf78V++j6RpVWS1BPmqpRLzavU43uMAzs31qbz34Qlflcz2Cxs3OU3SdVV5+9IDO8B4A1uc6SdMABVdWX6TpNPnW7Xe5FfWe9GVgyRxVpWR361VMYfMHH7xFTkqln/E/r93jufebpDen7O2v0e7/Oe2+4j+++Vfs16ecrSq8TOdHX5sTTC3CsINefo/N45zXPn6La9cH5HV4vB7RHdvc3YtpFOsY6R+wd3bGK/t/zdGlZbqzMYTRVkq9r3Pl7ss4nVexRm9z+ehndIcGe0c+H97Kee1nAb/4xoh141uY8jqN3rvsqHeoRMHq/QBBRFKlTOoZlH9BMNujNv8p1sExuwPJIIzRY8HZZsXVB1u08+8SEPL1d37O7fURRb+D+cybeLELKmB7foOa7iD1CE/8J3IzYetsiz39OrPyAaHtEiYGnvIozISvxe/yuDqjXbVwGgInSNk80ZGWRzv/JmvyiG/O3+HpgyaxXRB/9S7N2OLFwzWePb2Jo22wMj7k5ek9VicBx80Fs3rO4+0JdpizkX0dl0tcXXzE1sl9Ht80STRJZyFYiS2qTGOveJH/j7g365EkO880n2Pn2O7me7jHHrlnVlXWShZLVFESqSZFSd0zLfSgge7r+R3zH+YnzNVAN4K6R9Bg1NMSh6LErVjF2piVlVvkFptHhO+2m50zFx6VVdTMANJAahoQiItwwBBw2Idj7/e+7+OUbV6d/IKkfx+1jMmDFvXcsJgf87t/5RL5/z2ebtK9/+d882+n/Kc/KOlNfLbuKz56xeHtD2/QDN7GrSQ3/+sPMJf32dAlz9Z9qm7I5oN1RD/Hrvp4taGyz1Geg7Nc4NsjdOMxUxHgV1/DqywuHZ/yHf0DVLNkRMX1wz43P2kSByXDaJd+/ApX4nN+t7rHL996h0uFxeXzj7l5ssXluE2k+kjHozc+5HJ5tCorvvBxfNE52vauoNoeuxxjOOGRbSMuqPUvGsGMASEQ0gLrn9YS9s82OJKq4DCeMkoXJHWJVRkOpY1pNXlNeczbLk+Dt3m8u8qqrPioK43jtvZZj0OedAJ+8PIA6diUxRdlxax6DUyL5kLxYM3nb9vXKIov2LIrjcMSFl7WwEksPtt7k7/jyovBkWXZCyBTb9nAVIr3N77BA5XjeRcaBwbHWeER9rIujcLw0513mQaKyp0ya/8X3r+tWEQZWbRJ4fQ47wk+3/pjjqsnfPjmGS+fDJl3z8gCxawrqSYB83bAwY1bLH6rwvgVOpyRLR1UO2c2t6nPGzy4Yvi77a9jhIW2DF7bZraT0msHPFBXWV+ELBs7PNj8HY7XPU53uhxtTKmrLvduHHNrskc9bWC8bayWIQlyDqWNykp6iUXoTImqAbaJSHqXOXA2OCltDrYXFLlN0U355PXbfO+zDdAWH916jbubY7pFA2MliEIzjhzuqzVuGEVw7nHAgGduyg59zs6OyZ9LnJlivKXQhaBoOiSNiFzZ9JYNjoKYe2uG5n2Lme8ys2AeS7ITRfizCt0wPP/dDlHZYFwL8jgjCSySU0l+YDioFswCi1nPYl8EnLUV7zwW2Mrw4bFh4z9H/Kf/OOe4k/Hq54o//GtJ6ggGXY3uGe7sG/6vpodfhjQPDCav0c5VfrzZol20aVUe++4uctDhicgpKonlSY5VRu9RAtdq7MzQGRkaaovjoaSKC7LYxT9xqQc2sgSjBV7qoIsG7iThL2+0ee5cQ+UOj50dvpZ2GTdDfrj2HT5Y36eoc2p7jTLoEbs5BAOSNGBsap6bHYYfP+T97X08v8VQ2Ex8n9jy6BiBsByEHVILiVEGYWmE40MpENLBaEmc1OQ1WKNTygtnqAkufBy2g85SqtEhZvkb0jhC5bITdVkPWoSWTSEqtP6ym6O2FIUX/prlXHguOZKicjCZpJYOmW+ttiqyfHGiKGRJWboYCZXtUgSSXNpU8kuNYyW42mjLkNuKXIWAANchFwpz0TlaZysfR+n65I4NrksuVt2mxnFBFNSFQktN7gbkvkNVCzaO3yY0EcyekIcBSeBSWjZHm9fJFh6nvRgeJCwaGs+qaBsPqW3mkeA87fOBOGRt5nDqtXltf8ThSxVRp0n9WGFZNlJGFL7EqiyMr7Asl6XfYBa20IlDZUcsow1qJ8B2e8SdkNH6GotIUMZNLO1TyJBYDDlXSzwrZD6sWDsIWMhjMtUiCTyWdZPUCkmaFsYz+NUcmXi4owlLaxfHcsj6Q9IQDoYVTukz2tDEvsX3f2ShIkUWSrQYouWSabPFe3sWubTRs4CtRyGmbhFnC37sXOJAPedRY4dAN/g4/wBp36LRnpM5Lpnb4mH/Nk49pAwMy/AD9s9zPr5R46aK7449FlaPz9avcbyhWVsITgYLng8TdOVw3B9yaebydLfJT9pzErXGlX2HB3slf/WOJEwsBrj0pM0nt0JOojYNpVl/Kqgdi6XrMW8GLBNJtJSkbsBff7Omki6LPcOTgc3uwRY/eKvNv09bpK7NT3Zus99dMr8VkjBm3OuyYAOxdspkFDDxZvyfW3N2T66j/S5NOcUyT3GVhzI2tWNIVMBBd5e6PidrFJwO2/jxJUqvYmZsiqVH0nA5cX1yUXDWGLPW2aXcvkqZRbA06Ewz7/Y59qMvX1V0vYKRZznLJKStBFqvuED6q50cv5Z5+//X1fHPNjiWZcbj+SnP4zHrOiMyTbrlGpAhjMFN5rSXT38NARmGIXG8JFJdlBniVjM6yegrtPqVhpFlGQ1/C5k38NIp3SJ+gYAUX0nHBmIdVXg0J0va2SHwBQJyief5GK3xzBbKeESjA1p6cYHnWwGZPM+nTnNc+wqqgubxc4QnyLIUy/kVEeuMg0csjItVXUWkNupkTKM+Y+fOM45619HpUwoNibKhvI0pK4YPn7C5fgRhjBUvmPpLVLlk5+Q6Xn6ZRn7IpeJvqGSNU4E2BQ8CzfYjSZC9gyreJVrc48b8PYKlzc4o5GB9xts/bvKjb09pVr9NY/EyrrhPRz1gWU1pPW3CsGLzcYS8/RQ3WSdILFqLD2k/GVH6cN4d48YpnhXhZlsE2RaOadA/uEeQPCWIbF6vP+Xe5QVH3ZK12Wt49galY3CL98A6p663Oer4NOZt5kWfod7ArmLscsSVB3/JwozYfr5DO+ny4fBXtB/NqZolNV1ycUDz4Jdsf7wBaw7t8c/oHxkCJydxCtqzTVpin6uHnzAfKrxkn2ieESQ1GyeK4VkN8lWq6jPG1kf4mc3ayOasueTBNcHbn7mopIEQu1x6/ClH6R2uPoHbnzsUjs3+boVfKbywQ+20WXi/IDwfMxwHPOkmaGV49xdtbOHTafSphEdbfEhgj7HOBJZ4BnmH7vHrFO2YMGtSFzNGux+zPV7DSWLWTu9y0n9EMPdwn2TYzdcROqdxfMA7n89YXKoxsY84fowOC1TYRZQ2Mk6R0wMskaPr9+nrLtOTOyzNBmXVQpgAa36OnJ+iHBdR11CV+I2Iaj7HkrvYbZsw0IShjekNUOsrA5gMwtU2tiqwvAC1tkkRRnB2/N9+cCzKjE/OnhM2GpxZ23jFOa7XwEhF4YQkruSw2/h1BKTrkuUZg9Imn0qWyuGg219xVaqLE4eBoiwYFz7FRDP3PZ4PnYt17K+H3GYzSb6oOetGHNgdhOBCHM1ehNyWU0WeC85alzl0ajzXJS9yMHwpjk49ZFEz6l3jPFyZ0eaDJkK3SdwtvFpSum1qLXk6bDPJh5xvrOO6EUm0gbAEoVWhVY/ckdx7a50n/ZhkPWXhzHm6BcqzGD53KZwhk7DLw91NEjfFMoKNmcXCP+bBSykv7+9SFW088xrJ+pClpVluJWRexsFSsFzXJPFl9KJF3bhN4XWowoLZlqSyK+q2JNQ3qcU2mdsia7zN4lLCwq0onZxICraeR9TtLnm2TqVtRrs3me9eYqF8tHqT3nLCUznlJ29d5sZkiJY1fuffcMXTtC91mEYz6hQCv83cabGsm+S+xZ2Xvs5ZT7OVReztB6xZl3GGfVAVQnYxgU0V+SxmDarQ4LkdJnsB0qnQhx1yf8C87fB4Z5N0uOAHb1xnMFXEa4ZnbYdxdolLszaefBszuIy0LPa/AVVU0XcDjvck6oe7BGmDwP8jlpuvcq8piKwm86jieC0n9zTvPNqmLj3K1veZeoqs32QcLTCi5q/+uw3cGq7f28QycPeVbzJVJWUPZvaEoMiJ1xrQskkft8nrBp73LkVvDavTZnqzSyP8BnOr5uzWLsU4JHVrTja6PB28xKI7ZzjZwHiGQuVcxSVf2EyjiIOwRSlKjFvgWOsEzQatoomdKupaMm1vcNgYYDtf0uo9zydLEpZzh9hMOXB2+FT20eYOXGgciJUEwEUvsDGrXPk/5foXKSsuq4pK1MjKw1Q1qkzxNPSOj18gIMuyeBFya8omdtnDSxf0islFyC17gVnI84LIHqIKn6Bc0NMJWZb/WsjNsgShGWDnNu1lTi87uXhTWWVVfN8HrfHKPnbtEp2N6ImYRmPVzmSMwXU9TFbgWTvYpaF9egJzQV7knA0/5lJyiVjcQ0kXVfaRqU3vbIZcjMn8Z/iqS8t+Sm7nCE+D3kBWhuH+KYfOAu3PSb1zcMBGofMumCayiFHLzxHVnHacsv2kB/qQwX7FG08GBK0Cyzmlmn2KWyoyv2TUOub9V+BxF76VuLhZg2D6DMKHHHYPOBc2wzLmZ29afP3jIX46JHcsYucui2kTa6RwOo9w91t0ji6D5YBVUuuSev4M/9khYafBifUxUVYSLOZ87dPHRNEfUDiGcfwDjuWCxuGA2l4S1hZv3uuSDRo4xbfxVIxdfI5dzwicJo4bsB1nNE2AND1sBnjihGb5IbYVEiY2m+aUxkJyslsSqCv4VYewfMIw/gzpVORrMcMswCpi0rCibUDKy2wkD7kiPqW/sHhw02JrKtg6VdiVTY1LbSqG47ts1Pf59s8FjdhmWmrmewltrQjp07Q6vO4/o3RTGouAg3zKqT/FbsGbv2oQ6D/ErW3eOvsJE5UzzzWjrkujkhR5xXm9IKs6WDFcuf+Q6PyAaOEQPMlp7S4YG9jQBXa5Ryuac1ufcvZYcFCN2Dwco1JF4ib0W0O8bI1WGbN3dkIhSx7e/gUfScn3l7/NfB5SyXWkjOien7A3Pr8o8jEvAnXz2YyW2kZGNVb1iJ3xCffPj6kOnqwe0iC40DhsTJ5Sjw7Ry/lvdnCs2LErR6dSCinBMhpLg0eFFgLLSKSucOuCWle4QmNhUMbg6wpVC4SuUGK1CRG6xDY1ljHY1ATo1d81gMA2NRK5+gwKWVX4ulqlY7HBrO6FXt1DYnBNjWdqnCqn1tUqHYtGmwpLaywDrq4IsLB0RTdR6OrHrJcz8n6IXxYEFVw5f859UbDTGrMWVohohKNcQukQ2mApgb09Ypg9oz/KibsJwRUPW7lsttqEtqAbal7eNqSexBQ+3dCm2ogYWE2kDLFTSadrcemSjV0ppOUxWLMo12r6RtCfBdQ9l8izGdxq82o0pp8HVE2HipJB0aCzb9NMJDuhy/qgptn0aa379KuAS84UZSxac4dWpmi/+RE37x5jH0nu3Kj5+OWcG47F+B0L9cQCCVdtm7aUbBnNvFnRlpLTdycM4wDnANrGcM3KkY5Bh1B0HLo6oWXFxNhIU6EoCVRK0SnpPhXoekJp2YgiRVTrVKoGWWKpAulqLC+jUYBrYqxKM2+nWLHGBzwl0Z6gsSgoHOic2bSeW1iDHKErCjshaS/45BsNLh20SUNNW2uOBkuK5xVmWjLKT4lNwXAqoF2jrJyT7YLxtE+qQeQ2i15EyoDR1jnSsWif17jzmnbDw1WCZVgw6ZwyON9A2S62ZWEch/A8pjFP8ZSgXKRET08Y5DN66pzOpAWFRRqWRG6IU3dolSnb5QH95ZIPyhHvjF/nzYXFTgo9d9XuNphPuJ4+R1pylUzXmmB2QQ5ot1CBhyMNoTQI20HY9uoh/cJBala1gkJ9uXH5x17//J2jX8EjaK0xWqOVRdzsfFkdaAnqqn6xKu1mguy0YuGGPFnf/ZKrYn3JVTlNLqoDoyb7Gz5FUf76OvYr1YGjF9WBrLwieYFt2yta/YvqwBbPfPHr61jb/n9WBzYcjC4ZrXepqnc4bc6wrYLisza15fHZ9a8zkTmf7vS5+lxyZ2eD9tymXwTEtJkJl49e3mDhz1HlAtMSjFopylg0CSlNi6lq8cAZkFk5tmMzafrMvQVH/ZD+3GdrZDh2bnA33EYZhZ/YTJmAZbCEZE5AKiLOmq9xx98iM29wNqzpzxzGzYKWaDFTEW3hEldvU+U1GYLybJdy4bDMXSQWiY7Ak7x35fcYXy649UBxPKg4lRWxgP12wPx4DQPM+GNOZYk9bHDcSfBCiztrhm/eD8hO+izcNofuHzE1FTiShnKY1wXPGwIpPQxrlNpnFIYsNi1ix+LpWklzKemdQGYiZmGLSeMV7jUus4wKnoUJDekxVRnTRsnEGaJ1hzPnLZ55NyiahlE3ozO3ud9wyW7Y/FHaopN7pO47zOubPAkN0w1JuLSYozmxBTk7lMZhLr9HYgv8hsfIzpmoktTW3OtusDgJyITD3cb3SC2fiXeOkIJpJAmFhe1Oya01Kk9T7P0BpugykyVzoVn0BY4DU9ujiptkPnxwGUa9gko32Tu+giotSremWVnEueQ0bHJn0MS2fUzvDR7UAVW8xUYp+O5ZQZhLnu7d5BfhVSzLuhgc5sLHkXJ56bFp19jPP6d1nkFzE7WxC4AM/mFWZQMRRnB69I9+zP/5B4cAKdULWr0lV+1cjfkZu/ODCwTkShz1fZ8kSdhQbfx6QHM559L89IXlXEmJYRVyGzgbeHlIJ5lxNUlJLridX4ijSim6eg03dxkeH7FXnKxCbp5PEi9xL7gqLbOBrz02nh6RsLywnKcYA76/Ekcjaw+/gs39Q9qhork45e75J7hRC3P6gHijgvI/0Bop/oef/Ijn4Rnu755wbd/hsDOncG38xTpO8SeEpcW7vzxmf+ucoqU5P53x0L1HaFz00S1E8tvY+hTv7i+JOynurEH7YJ3JS0+J7q7TObmF7fXQo8+prY+wK5/oqMfR2w+oTIUUiji7jclvI04+5Hn6U8qiJm9k6Okmx2rE1eN3yBZXKcouk/y/sPlIoHLBolviHvsM7g+wLYXcu0rZEHDylzzdOORffXYN63GM3874/PqS8NEmMv2j1eBI/pSJP+Py4z7p9hl+7XLipMijG8jkX2OcmGbyv7GMYmyrpntiUx6nXH6oePLuDrL6t4h0n50n/5XspsXrBy5/r2MunQgad3La3qv4y99hbbbPuvVztCj5vHnOzffXmJkFd1sz8vJ7yOxN/JO/Y/3oQw5ekpy7KduP4aWfNtjvO7St7yHkNlf2f4S790uOooLOYR//2OJ0R5NGhrL+EzKryTj5c+JFyubzNazhEm1PMI2a7Z9dB/fbBPMG2x/+HJMq7rz+GO1ZdKZtnKlktDuh5A9wkxr38H/l2sdbdA8TnrsFT1+uuXX3EjvONkHvBpvVEbef/mf+7E/OefXDPV5++luISpJHGesypLm8we5yxtb8Q5x5k181PuDds+8yeBRzWTZZr0MkLpvP7/Ny9nxlOa8qqqpalWNlOb3GTYKNEHU5ZHYlQt8t0BfpWOsLPUMIjNGYMofflHP0i8uYVc3+F9pDWVXUSpJbMFPBanBISY4itz1SB5aWR2UkOTYzJ0DaNqUosZXCAJmxSJRDVUpSYTNzLZKKL9mxUq/YFoVDZUli6TBzVj0JgeuzLDWu7WIsTV7b1EiW0mMmNLntkWmxEmHdAF1LCq2whWGhPBa2zaHf5zi4get5jKWH5S5IQh8rVLy/e4UDr8Gk7nC0t0ZZPEQ5Htq0qC0PQ0VdacplCY4Co9C6Q3OpGUxrnMrCKyXGyZi15nzrlxVbhym6u+Td+wk3cx92Q5oi49bpkjBPePWzOdl2TqVgEdW0lhI/r/CFzWDmMo807XMPrSpcHdEcjejG11A2FHbEZ60Juax4eSTJ3JTBMkFoAXuayvJ4vBVileskSQtPBhQ3Dc0iA9EiVTaqlHj5LnYywcgulnaZhwKZ1GRuj8R30LogPO+QdXxKochfaRJZFvHAodtvI/Y9ajrcHX6NUztm5Hl8VD/kLBsQ3Wjz7fMd0kWLZ/4mP9y5hV1azKLn/OSVHmedmEoeU1pdYj/gqLXLj7sFxVaCLHMm3SZPdy3mskLOG2jbYRF1OW8NkFXNzHMpNmzCvuR6LumaBoET8rp3lUrMcHsFaRhw6azJaE3Q2YoIzlw8SxAOKuZ2TDtos+gECLeJ7Qb07A6ydigoOeuvM23vMXdtUv7UUNkAACAASURBVFWybC05bUT0VYvc9qnFJYreu/TSJxTBOvh94iThOEho+y2SwmXktJiIAcPlFK+M+LNrH/POk28wtqBZWrRKwVG7x2dS/RqQ6Yse35d1k4aBeFkSVyXW+Zj65PnqIfW/9HGYNKUeHaF/Uz6OLy4heCFaSimRSqCVi7YVeVtRfQUBKbxVTqSobOqpolINsu7F4ChLCstCAEVZUpQ+ujJUfptlewV4UvLLsmLLsigXNqY2lM2ATLmAQDsOud/CuA5oQzVRVLkgb/bI3DZ8xQCmHQfhF9RzHy00RXfIwleUYUHZkIjQpbZ8nDIDq03WUOzvfI1n/pTz3oTcNEn6bYIqIG9ApQIK4OzyDeadAXUTEmeOFYSkecR5c51qGaDpYaqbzHoTPrm1xmgrYNw9Zdao+Ps3OvyruU+xt4u51WB0HvD3N1xmV47xqxLR1XC0jVAR7toV9rZ9Cq8mV6w8LSbh2a3bzB408ahx65tMowVGGT4dZoQLn0/yPbxa4kc+AYK1yU1qkXJ+fY1n/RT32KUMY+ykjyUijAtC7uKxRh22CdMBhda0SoFSa2gZ0py7LIY3GDsJnZmPvrPJR6+MubJoIBtQWC5R0uX22RHvR4Ynbxha+VVeHrnEDUGYKLzSYlhZXJ67FHbJebKOYwlu7TscbTZB9ZDGIaoaiKCLP+3hDxrcMBYHezFy7OCfdjC+z52rbUr7OlUATd3C912SUNM/s6jsFnXpMnV2SJc9lk7K1K6ZNQR3WgVNL+J3ao/MODyXaxx0cjpnDmQVciGJPb3KOVkeqrTRznXuX7mNmFdMw5pFJyVLPBzd40YaEouCk42XmdsujU6fcbxBXdfYTpegCrGkwlKQDNd51LlOHK3RrxyG3atsVz7RvIIarCDC9h2EspG6hlpjuQ6OHSKTAEGKsuWqh8Z1Ed4KUmZd/EZrhJIIL0D8E8uL/0U0jrquXyAgTVWhihi31PTmT79Cq89f0OpbqrNCQMYz+ssTlL3KsNi2jbkIuTX9LewiIkgmbBQrBKRS9sX/vwq5NRiufBxnC/r5EV/g9V6E3LQmECsEZPvkgJ6ev8DvgSEIQqo4xbOvYlfQfv4U+4JWn9WP8SKPVB1i1wmqXMdObNaWx8T+EZk+Yjfzed64RyuLsFWApSMaWcFv3blP6/UjynrGx5dzSrWgEpcxqaISfZJ6wZiHmOqXdE+6bN9vc8UpeOO9mF9euUlddNEHdzgo7+JnTd58sM2y/DnY0HJ8etLHK0Ls8X306SecbS/wpyXzVkU/tfit0QF7y2/iqw5D9YDAW1ComsROGD5o0ng8w69d5K1LSOWiyw+xRMEi2SHPJ0STFkG1oHNgMMOQyjFU0c/IwjHN03V6TZvT3hLjQaR3kWoTSUUY3qfrHjCsfa6ltzgs9xkum5Q6xGZAS5/hOEcs9/bxMovruWGr0SaOQjqxwRV92uKEXesTShMzVzmD0GFzYvOkmtOvA4KizUb9kMvqFywCkKnALiVdCwbzgGHaYdmEgfycbXWXRaCpF4pFrlGJ4caHPiYMsYoWSfFDdp5pkiBj+1wjazhSSzqyQ6C3CLXNzeQXeM0Fg6rJsZXRUiVnQU5YdfDYxCHjxvTHXH/2C3r3DR+8umRtZLG5v8WN4iZh53X6+YRri/d4FNxl6/mA2x/vUVQlH7+e0Dv7GgqHRrFk7+QJmal5uH6fQfANyuOfEbNJVnewiGiOnjPMD3AvThxVWa1qCNOUILiG6Ho4NvieB2sd1HJVHyH9cKVxVAXC9ZH9IVYY8U95WfkX0jhWWxUhBJa0EJakaLWY9BvUckWwr6qK1HPJsoxFblOOFbltMx50/1/F0UXmU40NWegxGsp/wFWpL6DTNtVcs1iLmLhdAGLHIcvylY9DG9IzRZEJFt09pp4m/Uofx9JeQaezcw+70MzXrnMe2ivS+VqXoNRIb0BbL1B1A+E5FA0LGhGNfptRNSayv4ZGEeomluiRuTWfv+zx0etbpGHJuJXiypSeWCeIhljzANsG37uNcjc43FVEcZP1ScD/8X0buQ5Z2WPWeYPR2mWc2uFn7PBs5wrMDHYMI7vP1O1w2LzFQ2edE06wPYHINb2Fx/NCEeseYR4yKa5iFjALcs6jgvV+h4UIOMPnshtSG0PVfpMwrWhGEeedGXatiFxDO2phywjLFWw538PxC+ReSGutRg5WWYfWeoA361M1CmT7a4TBq9gdyXQzxA03YVPiuiGWbFMGkumVlwla13B8gTSC823wckHV7FPPWuTRZcbXbUbdAumAsFwmA4v1tmHo7eHIFo3hb7Ox+xJXAgdLSqb9HDsRLAeSo3vrrC08xKvf4/ruNympKds1GPALwWnX4vX3NpG2zYb6PuFmSdHSCANubnHJLsmuORRnm6vw4Svfo+wVTBPFsluicxsLQze28ax1sm5NtP7veG8jZ2fbpfTH6BrOFzZ3vSbXiwbTls3Twdukgy2e1xFuuuqOmXRiMr1NGTtMlGAcXqUWmnzNxS4GRIOA3tLHzR1qrTjqX+azxu5XuCr1KnG+jPnawqUhC9KjCuZLBDU6XgJgfeEiteSqASyNv0zO/iOvfxkfR1kiBC/oUpYGmwXN6SlGyVWsvshxHBe3yAl1hF33cPWS1mSCpVYhN9txMEaTZRmBWUNVAW68oLesiOP4RQu6MSvit5+1UJWDt4xpJhOEAN8PiOMltu1gao2bD7Brl8bylGaa4DgOXlm8gE7XcYZTrKNKQWM2Qlg2jfkjJv27iNqhDk5g3sItb0OR4C8eIdcekXlzylrSWG6jFg75+gRjMkpHMLEE5X5FsZlRjkdE3Qpt5WRCgNXA0jnr1Yjjeh9XdMBRWJ6PbxaEixqn7BPmx2yMH+CVDi/tT8jXn6LGUGsIshv4hUNjecDa4jHz7jFCSDInRxUdROMK+qyGuqI5H+Huh0xeHVGLOUW9y9i1aaYebrmNLQSFeoyRGme6gT+okXmHxdqIp+t93owFabVkX79PMssYHHSYH5+x/5pFkFlcftSnyLuYtGA2u8NxOiUuS771SYPe2KF3WHD8Wp+q7JLlx3j3P+BgO6axtJh0cl45bCIzmwN/FytpY8oR56MPGYsZmQdv/o3LeVBy51sl31x8Cx3fQv/qY56qT0g2bKKnAc92Z2w+V2zuhzQev8tsrcsPF3/L348eceORy8mgpFLQnUne+CwiTX4frQKeHf+U7OGc806TRmrjpDE/74159bBNumzhxpLylz9nPDzlzqBiAmw8bYJjMTMRadIiJ+bO6f/OYaeLevYtppFH2AyITYLnWOg6I1guGOrPaezeQ8mQtPM1zGmDrB6T5B20UVgSqiol1wVZ9ZCfNj8gqL9Gp9wjLpsI0SCanNGfjnHdixNHVa4MYGmCxwaqJckpKIwL5yfUx19oHBc+DmWvOkfPTtDJ8jc7OIQAx7Ff+DhsBUJbyKLEmWToiz4OXRT4vsAkKbZaWWatusSpVmjHoixRqlp1K+Y5yqkQZY0sS9Q4xUnSlTgqBLqukapE6gai1LhpjVOkIAR2KrDjFNdb8SukqRBaIascx6T4voCLIh87AyvNkZZGVGDPc1RVMskDDpw5u8tdFklKs7SQZYEoDNFszuOdhGya8eZpn/utKVQheTmh1hmm0LSOJoTlKX5tUQc5R84Jrmkh4hZUJV5coxYWJj5n7bHPslhS0qH17IBszUPrkrxasszG1IVHvhiSFhOsFHQARZ2ia01dLEjKMfP6AFlLyrri3EnI803qqkZrTVzPiRZdsuIQbzxjbeTQWNr0pzbORgd8m8I8hzLjxkmIJRc0z57glRUvPy4JWx1iLyNkQpwv8BeSo12HBUe0FornkUTPc1SeYI0fk6Vj0Jq0brD1UBGlDodCIVSFdHK2z+bsNjM6RnLSrWhdy+lNHXamCssXWD2L/o5FupWzM5O0rjh4rsXX24qNlsRT4N2SvLnjMm8YrFnF7Y0mLU+Cp3ClIkwkr3gQN2FbVehGghGGABvZD3CODYE2BJ2YZ+/MuPXYZ+EZ7K7ikijw+hXKAbtQbLqKs5bmbCvD9zWtOMRyDK28xFaaiZtx0Bux87jknbt3Od6aUklJ51hx62QbsbmGXVd4+YLT/gHLUNLKjvmtz77Oo2bNcNbBt306esm1fEJhSu6XYy7NXuKd2OaVuWboKCSGQZFwvZziFi5VXVFXFSqLqcqSjtNZcWnqAitPMb6PFbWAi5ZzAF2vWs7DaNUC9pscHCuNQ79Yk1ZCkF0gIJ+sr1NL66IntMJ1Vq8JnexLBOTj9b0XCEh5YUr5wseRnRVMGi0efgUBKf4/EJBP/NXO2rZt8uJLBOT0pKKTGo7XWjz2V87SoigwGJwLBORiZBB5zcFGj7PQIa8zsnaHsVwjCd9gEiimzQ1MAD/du8x0cEzmZHzSWyNXGSI3dNw5ltVGS8Hh5U3i5i46hDrIsMKYCpeyEaFnbbJWm/NOA6feIW92qQYWIzyK4WW2GjnMWxj3JkRDTKVIBk1qp4+9pll0KsxkgJA+RftVsDdwxNtYCizLrDi9/oDK66JLhe2+w/H1EuH9Pr4W3LvsMFj4TBLFpTrCtQRp8Mdo4fKDr+8wbaSYq5rC12RhxOWJS+mkFNafUPoZx1da5C1BGc7gzGbWd6hOhiRNGK/9CUmU41UBd14fMHUSvLiiEUoqs8bE8fnT33V5Wmv6mU18BnFi085tgiwi0U1G8R6fZyETChKlmF0RqNriXNYc6T5L1eQDc4ufnPVYZGAZl9k4o39uMTz3eGMyILIDns/f5lflDXJPMdaaxDN4RhB5itxsIoXNif19pjU07A5zJ0NIwbicg3TI2WDiOPxo61/zpLWg0A6njCiiLtKRDNycTA7InBbK/h+ZbQd8/I0e4+6C+UDhhzbxMmI3hifNNj+//h384jWU8Bj1XH701oBlr2TXibg60Rw3OnzaWKcyNXFrk3Ds8TdXe9wrBvzBccIry4rD3mV+1dhFKRuta2qtUVJRVyW3pgrfGiPXA5LtJvpJhJwnwBdZlZX+KFwP2Rtg+eFvXuN4oW9YFlJXeOmCMKvYWRxgpMCyVlyVL8TRddnGq9eIlnN252cvCn6+WLdmWcaas4GbN+gkU66kKWmSrjo2AF1rpJJ09QC3cBmcHLObryznq5BbjOuuyopbeh1fewyfHbE0yy/F0QuuSp1mNKw9vEqwuX9A5EvicsGzjR/SO7vKtHsPuw5ws3+Pzg2bj0/Is/eZRAmtaRNhz2npOcm6hRH/liDJ+cbP7vFgMKLqCM6bC6KNEYs1i+biFdz899icpfzOs/e489YjLj3yWZLzH3/ic9BMufP9K1jlNwnij/nWw/fx2g6/94uI/+XGKa2uw3Ld4ZWjb7NWbXFz/isWnU+41VTktqGk4vHylNc+HLCTfo+m08ekf8FYP2TzXpd+3eDhMGbn0S6DaYPm4HUIBE7yF0x1TPfsXZxpimPZLIKUnadb2MENtJkxrf6UWmd0H29yeKsgKcfYi6u0J02MDhCZIdE/ILX2CeYR2w928aOaoipo6T5e8h06xWMm238OY3BOGtQLjRN7tMYN3OwaVvEmrcVjGsc/ZBKdEoxs6trQObN5LFJm+XcgfxNn8iNa6QckwxpnFDIZznAqi3c+bNOJ/xCrt4k7+SuS8g7WUrHRajCJwDcW1/I1wvK7VMolL/4MNZlx6b11zro5tuPwpDnCmUXI7D8QJi79R39BNp4z2/Z4dOUZreUljLJIZE1d/TsqJsj4B1hlHzV+C1mdslG5iP0pLV7CtvuE5Ejzd/SfHNNIIobLNruPIg53prw8e4Oo7jGcjnktfUwlag42P+KZF/D7n77J1+eXuWQibOGw9ewBrxWHL5yjRmuCYOUcHTZuYHUUplZI4SLTGL2YrR7RanWSR0pMWazQCEKsfv6RZPt/EY3ji61KVVXUul4xV5Qkk86XWRUF0vFJiorcstFaUApJqlxq2yHX4susim0opEILQWnZxFZFpupVy7llUVUllrAohUQLQaUcEu2s+kgtm1S5GNtdrWMLSS0EuWWTChfp+KSlxhhDbSmMcqiRaAG5cogtQeEGWKKJU87oG491HLRVIGwX2fKp2326tsbeKAjPcp6tC8RagHho4/oS9XqfaOCRtGq2sin0bZp+hR8F1GPwioLBTPORbuDOmugcnkQNTjqSRegjz1yQbVrpq0w7BT97q8OTDZfTaMKle/D0VLBnfM6Mx92Z5MAxVHZJ4FrkQZv3r2/xxuMOKBttD4ibKXXYIj2SnEcuI79FQsAlxyO0LNxyZcmmPMcXPqaY088KkvAEq7iGEQKlQ1qxxLI8irDC1W3CUtEoFNJIrKrELzws08OqQ56sC9zYX30PKsJgU6oIv9hl4acIHVLLktKyKfUKhSGwsI1Ea8mpF3L9WHG4DqFxOXcUKvPQUuKXTULW0VbBrG1TKwuBzbjTosx9jGcTJU0sepxHkvaZzTQy1MphOTHUhcDBpbI7LNqKqnWJ+dqCViroLyS7py62Fihd08ty3ttLKewcS3RQbp+0ymgYEJaNhU1tS4rSJ5E2tRtRKoWxCwpto4VFieQ8dCj1GhUhlo5QUcRZKJhWEXmsmCufA9WmEjULr0uorvBZQ2AlKa3KpYlLplyWVnhBozekUmG3Wiykw8L2UQLEuMBN7xM+KqjPT1eDwwvg8T1KLKgrvNffwbn2MpP/+X96gVD4bz44xFe2KlJKpGUwxiJzfSadHWr1ZTo2cT3yMGNe2pRTRe5LJt0IaSvKsvqyj6MoWJY+VW1IfMVksEaW5Rf3+bKPI5kpqlozawRMlIeAFQIyS4ltB6E12dSmKgSL5joTpyJxPYowx1x8liwnn3k4QjPrbFJ2QoJHd+gFr5C/Ar5f4+QOUrYpLclBT3Davko48dka19zfOqE3sbFdMDSZacNHRnIQz6iUhUpqnrfmPNspYdHiu36H6V7E/Tc8pi+fc+w3SKaC6jQkc2ssPwfZorQv8bR3iaNowfiyz3NnDb2s+bif8dsnm0z8FsetK9wPQqbWgu6Ry5O1EguL/tYtposWYamZtW7z2fY67VFEq9lk2ppz95bH1kySxgFubSPrN3F1zGSzCZlkHIZksubSeYt8FmGETW1/g8I3HO82GQ2nhIVivtamUzXRSQPtG0zjdWxrRtmwSdsNLEdSSzCeT6UapMGQWfdNoKBsBuSNgtoJWVtEJI5HWTSZ+jtI+1s47oxsz8f3DLkj6LglLXENK2jjr79O09tiM8rJEIzNOcYRHO8FHMo1rsQtPr9+k8LtctJTnAO6FMiFy/GaT5Kt0atc+nydIsrImh3iKGUZOaTehHFLYT3tEgeC7fE3Kd05iS8ISrDqDo7SKEujdAOvsOikryOqLp7TpJD2inuyDe2pi1yCkBlXn3Q46jagDMhyF0uF+JZNnWssIamcgNTpoKVBqOsUVpt+cJlLzZBwUVNryfFgkztBH1vZaK0p6hr7Asg0jQPatsZNYCw9lpvrWOXqNGH5ATqNMdLG8gKEHyC0XiVm/5HXP/+rCvDViK5hFXILkxkb8dN/gIAMWS5j1uwOrh7SiGdsxqOv0Oq/4KpkdL0tnDyimU3YyuMXCEjgRR9HS6yvEJCTJZvpEUKAd4GAXHFVDA2ziWs8+ukBm2ZJEISkafwVy3lGqK7gVoLB0TMWE0GSzylHnxB7AivXPOqeU5pNiC2ah49Q5h7eUYPO8yHSPCZPPIrhBEELT8Pe9ITajFj6msWswG5NuPxA4sUhJX2ErlgufomePoXzTdzEoE67uO6I8rKNnTdxs6e0jlIm8piWLBm3jrByyO2S9tLFTX3a47s0lr8kL6a0jgJEpkm7BZcentA7/zqe4+Gl7+Gk9/BnLXqnfUx1jp11qScdDK+icKn4axrTKbZzjXzi0kp8bC9l8/kudvgSwswQ5q8QVs7G6QaOTNjIPPaSgKZp0dTfoRYJV+2fk6gzrhuL7UHAjf2AaWSj7D4t2WUtPOTt9k8BxXrVYNZI2Do2vJQ6pJ1duqO3uC0e8jz6CZcrg7nl0Fwq3FJyvVFw1QsItcfV6acI/T6CnGTuUezEtG3JZtmgKwK6mfi/qXuzHtmy80zvWWvtteeYI3LOPPNQdaqKNbCqSIqDWhQlkSLVElpGG+0Lw5cGDP8W/wMDfWHAQqNtteW2TIkSxUGkSBWLrLlOnSnPyTky5tjzsHwRWQNbaoBsq9DQypvMyEjsSGTsL7/1rfd9H/bkW9zS92hZgiAWZLZgc6IYCE3b+kMaqsPn7Pc4qg/4vSc139+oMEJyuCUJbZ+m2AMhuM0DvjaZMjYed7uHXDJbpGGOXwg8eQldT9nd/xmVcnnh7ibvXjnk1ntn3N1bctC+QTn7fbxlRqPehzghtjSXDq+SmZykGiGsHnVRoMsl7embdCpNfPAL1tUXGE2HfDDfY6Ps0hVN/OkZ7ek59gXJrSxLwjBkMZ/jW3vYHUV92ccSW9TGRUUXOg4/QF57Gl0b6tmY4tFdsjd+isn+K0CnP7k+TP2q63q1vXB8Ug2Tzo2P8zjKgshZEa5mhU0xs0gDi3G3jbIsivKXO45F4VNODYmnOR9YH7FlBR9mjiqWc025qJm1A8aDJoJVxkaaJmhtI2pDMtUUmWTe2mNsV0TOCtVnAMe2Ic1J5x5WXjPtXGESaJIqIfUdck8iLKj0iEo3Ea4g7l6jbPpkpcdUdKk6HbJAY3kjKtNElBWT0CXzt5F1zYZdkNHFlBKtQkwd4E7neE2HcH6N1nwlB75Uad4frFO6XYwM8Mo+W/WImE1mRcXY9FFAZiqEbFM5EtXfZV3AqDmhaIX4qkDUJa2kiVdb2MJFycv0Fg18R5L0JYO0Q2ejSbO5TvhkAEKwtvZb7FrgrbmsbQtSX6JK6Gx76AdNujrkS81/TaIr/Msaq1ngehbLlkIvNHI4IAtL3PUvsRMUWDswrAW+lGQOdOIGlW5jtIUJv4IwkpmjqGXNyJHcDzTdKKQ47XA+uEl0uYl0K2aOgULgCsi1oHa2MV6Lov8c850tbLeAoeS6XSF7YO9ayGyXIg/Zsb/I1HkW1QFaYMoa24LFtqIab5GnNjPxPHlwize/ZlEMDLUjaduCsGmRtXroUvDBjc/SbBTUjmRXL2n0HNwQulOBUQ085XCVLzLpZ/CiRXG9yWT/GZYYNuIemhVCc9R/nrOuR6xKhLVLXRvmgykjuUk+MswaLm9c/wy9uMOwM2B9vs1TtcVNr0Ev05hKErXWGYc9tNbUVUVZVSSeR9qJSecOhZkTpxlJmSCnEdVwFdQjfB9cD2HAnJ9QPnlA/v4bUP3qNLdPpXAIIT82uVEi6xKrMrjxfFU4hESVBV5dIOIYx/jIKsSqM9wo/mg4Ki8Kg8pzbCOQlUZnKV5UIbNfzhxVUmIXDWQlcYscL58BAqe0IUlxLiTnVtFAVhZ2EuEWGV7tIZMEALtYZY6qUqOqGjdZ4qKQZYSbn4ESiBRK+wydz2jPBV967cdUz5zTnkhuPdokYEKuDe9fL7HKHazUsD2KqeoZUW2wc6itKZWqIW8jzR7kBdcezhm3lyRS8ni7YP2BYv9GyeeWz1KT4URznNMDgkbM0q6pKRB1xSSoya09SlURqwXEC7KtE4wJEVYBQlE3utRLhZGG1J6wc7YgrtpYDTjqLXnkjLlzt0YsNxBacpA85ok/4tl7e/RnPifdJe2lS/fhOrGdMpcJ35+9hohKds7aHO3PaMY2O8c+MzziqE9c1Hx/8nPOqiV7T1yCVNH/qc/RWk7TXCVd9onKCd8/e43G3GJz7rF7rHEnfeLEJwwMRdZjFi04XhyQN+BnLz7hv/kPgsQ3vPV8zaXZi2wvb+H+xYxgL+H1V04w9yNO6jmqktx+p4E37iBLRS1GbOiYe4tz9NsV93cKGksboQSTvI/KXN6M3yU+Bx7e4MnyhGn/nOffvMzRwGaaJ9ilw3tPOpwkc6pWyc/sD+iddcgHKVtTj7zaY2HlPJAxzQOL46XN+WhEf76DcEd0jzWukTgiZifNWNt/wKGtuPUkpSorTmVBO2riFJrGeMJ6+Zi1yZyolfComFKkLkZk9OsWvdrHi5e0yiX6ozyOEj8PiJZLnLKH8SrKAqoM5GJGPVnNOKr0QsehLEyeUc8mmCz5te7xT2XGIeTFgJZVzoYqc6y6JMjPqJX4ODowDxBRhKs6qNrGKiPC+uPowA+h0laW4joSVTbQ5YJQLlFpiv6EO1ZKiY1Ali5uHBFkpwC4rou8QECa2mBXCmVcvOWYgCVB7qPiGMNKmlslGVoFyBK8+TmdrCKd/4KznffJRI4zrMllAzv5bUpHoocC25Qs9RHeYs4w2Of6Q8kHL7Wx85yaAqXu0YvGPHJyevMWiZxinc6Yb21T8xwFFWZcEpkRdubSGp/TtNbY2D/g5Q/2UJsZjcji1LOZ9Y4ps0cs7Jq0WfDcOz5ueR1d9wmWH7BZ/ISTWwq3tAkOI7rap570SasUrxKU6oxcT9ncf4QKA0b2iMjPSaoCsht4hUMnPeTM3efSyRGDA8WDZ0JaQ8Pl9zzC619nGZTo8hGIgrDqU+sRjghYn4e42gazpJFn+Mm79OuUNLBoJYrrZy0snXNzonC6l+lGI/aOH1AKSWPs4EZbNM8ressAZ5BjiQ38dEazfoxZGpi9iz20Odw2fPnbDv3WHiLfJYkryncjqvVj0uKcyBqzZQLUxMN+chvTsLl38Dp/HXyA7Wm+mm0wFzG784CxXyB4CpHXpNld1u8mXPkgZSRHHDbG7PzM5+Gdc0S2jpVnbD+4S9o9pViDovsLMmNhn1YMjtZpTG6zbMy58eRn2JnN3vuG2atTbt4/oNGacfPkBs21Dq4ak8m/5bBzj+v3r7N3UKAsSW/5AbejlFbnJlfn+3zBPMIuA0Rzxq5pcvMgou/2GOgaW5XcPHqM+BOB+QAAIABJREFUXj76hK2+/sgdu9t9FjY9Qtch82xMq4PsrgEXx7GAqUqE7SA7faTrf8yU/RXWP2nhqIVB7xrWrpYIIfDchOZSYp1LsrDHaK9DqVZHtVVds7RXSV+zpaI4NKS+x/mlTZSlKcoCgUAIKKuK2cSiOKlIOiEnOxZlVf4SAlIgWJ4IylHFbLfLeWN91a1ccGo/1HFE+4Y8Msy2rzNqwPITWxVLWai8JHmssLKK6eWnGAeKorxNOTglbUfQs2gvNUVzjZSav/2DP+ZwbQhZwV/vuBxcPyPd8ejoGGHtMQtr/p/P7jFnjiMV08IgmiWyp2iQgx5wes3lO1++w/HOMefzAHTKX15f5+H6Pnu9Nb5yLjlqbvOdV1+hcBMsc0A7nBN7JctrPslhhzxpMdv+CvcvP4/QGS3pMb9eYdcO51aP+CCgkxla9u8w3siYexboGtEsGOgUZ8OhPu9RpRrb+iZtL+X0RYvZbYuuY6h2BG9f8tg7GuCpmm37v2MRViyedVhrFoRasrytiC2of77Jwody838Aq0aUFYuG4vtf9ViEOf55h63zLrOwhemHFE7FpO0gRk3mWxZBprlaCIphg4UyTNd8nMAlaH6OX/ymJow0582Q7dKjIKS40WbR3MZdu0rspTjdkvNcED9n85g9dmsN6TdY6CPq2vAzy2NcGpalx7CVkcnLGKXR/AFHOxZ5Y4OTzQlFMOHw6ZBo4FBm2ySWxWuv7HHYXCDWCkzzKqN2hR8JlosOldqksvrcvdqibiue3Fgw8ySvdVyWjoW112Nt7rBwfd6+8VVYfI2f3Onx7rV1iipn1pxTDNf4rVHJG9d2+dPG59C6JNtc8tZQ8pcbHdalz7fOcl6a5/z9zef4dvPZi63KSnLuuC5ZkqCniktWjnrnMaocYZqbqM5K2v6RAKwsEdpGNtoIx/217vV/0sJRGcO79+Zcv7sqDu22R74oKKjR8Yjm8OBCOap+ieQWWm10vYYzndMaDlenKvnqZjcY0iQlcLdQWYA9nzIYp0RxhP5PTG6+GaAyB//BkmZ+ivhHTG6e2UIbl+D9Y5pmge99bHLzPJ8qSXHkZawSgjcOMYFFEscsrxxwdvMR9VGAnWn08vepy4zWG1PMzjv0Ttp0cps3+68T7u9Q+2eYpI2qSnqvLVg4jym7EpPWRN0J1+e3Kfz71PnLyDE0TyYcWW+hDzqkYYL/8GniO3+LPH4VSw1ozMZcYgZKMN45JjXH+POcbrqJZhNprtCKHnJ1eshJ8YSdez4jy8NIj151BdvsIrDo1G+yyGNcbZN5OVsl1OWMlmlhbB+Vt+hWb1Mu5mylu0x5QGuW42SKrXu7WPozVKKC8jsYN6F9ogjmmiIADegDD5n+LnaSkIz+hNTKEVWNWlr077aw7Jju8BpV/8t4w2NaH/wZji+YOoYXX9ujNXfptBsUPQ8rfomwekK3fA1HOaiNfTY/qLl8bHH7PZf41RdR4gZX33qb9uQDWi/NebKdcuQ2GXeWbB+FbAx/Hyfo0R//hEL8mN5Ysjv1wU343FuaD1KFk/wr7LxFxZ9z7WDJ7pFi2FngU5PKHn/0Z4Lu1T+mObf4H1/7Lo87C7795SX3+2MSVxGkIW71NNKs4yQLmuVrZL7gsH3I9bdug7LpVIJOnuBYO9jWku7429x830VGAdfH66RVxpO9Ba+Mn2Vgb/PMeIKIHvLg8k28ScnWyWMG8YC+22fTBDjS4aWHd+kkB0ipMKamrg3aXlEQbzduU21qir5F0fTh3pRqtOrCSQKEMWBpTJ5Rjc8+yur4r1I44JPHsashqFQKjAJpENq9gL+sFJ/CdhBVvcq7zCVYFsJ2EdpCCLX6GhA1CMtCFBIhNNgGWdWgrNXWqK5X0NzSArmKQpPCW70g20E4JcJxVsaOUkEtEcpGCnf1/dp8/NyK1eutDUI7oC2EU6NlCMrBJkRacnUdqcB2UMpD2C6m1ug6XP0Owl6drwuF5fm40qL60C9TCZpxSuoIpBF4ZUmvSPCLmkZRYOcVvcWSsDDYpqCoasQc9FBQS8NC1pzrGmsm0XHNtC7JK8MkEpwvPI5MgLA0o0WbsGjSiFqkqU0KPKiWnMc+Mreoiwr3fMbZrsM8D5gWggY2h5HkLPPh3Oew28Iog2VpjLrMTSzqqmacSpy8oEyaNMbXefvmfVpE3JYeytJor6DvtUllTjO2kYHAvtGgf3mDOOrhfODT9jp88dZt3FTwZLPgpu1SaEM5qAinDbwfKbodh+vXOhROg1dbhitXK9xtw9mtivXMw1pqyksOctsjvOnQ75bYC5urV9t01x3sSmMnmqtP7fD1xm1apeLWmoO3M8WkOYO2pH3i4QubVuTSms04HZRM2xbP3G1y+UmDnz7jcH3u4KQOZ402RWXjFRaDk5rT3RS3MPTPx3hJTFDEXJs8JjorkesuW2/vs+EalpbDXl3jD3oE2Yz144yzjs36+Rqnnk9SSI4aLod1l7XKYeh0eauVc+77aBuqzT3ePU1ZC2u+sKy5biQHrQ4/b61ohFW1CvL50B27KQLaskTkNUWmkMePKR6+v3qfez7m7huk0ynFvXco7r/zkTjsV12fkgCsRgiDMYYSQWZ7xLbgqL9KOV+Jtj5MK0pZyy2ysWCpNYeD7j84VSnynHHmkFUlc9/lyYbzj56qzKaCvK4YtZscOp3VqYq9SlJfbVVqFqMVAvK8s82hcxG19olTFZHmxBMLJSvO+pcYtWxkecDxoMQ2mj4uDWmhS4mQNhuLknuXetjdJs6ZjwwMQdAmFusI6VObCuN6THcG+JkCneC5l5kvKnx1E6Na2HrB9kLwVr1L1TVkXk3Zztmd3KJT+Cjt0jMu/XrB435N3OqSuh0aUQDKQpoWtQrJwk1mYQPL7DC6bCHrlW5CHkicykKGmsvmFVp2hVKCRFQcOxk1ksIKQPXIccB6lriZMjXgmSssHYWsXSy7D1WIERWV+MKKn9vV5OmAeecyExnRjdcp6TILupw3v0pKSSpXYry3Gh2SCVxVES8XAadG87eLF7h1H74ziPlRYKgcw9oR/O79ARPj8rDo88HhUzQXJcOdHkmssHNJpQS/f75Obje437/Gfa/JvQ3DMgBVudjzmsVMMqr7SDze0RscRT7LXLJsKM7KknvXKrxMUFYbLG1NU/8W05sJJx1N25ec34SHdQscSXSwjvF9/uqlbzK1K06vnrFRJ+TeArcVcnY7YDlZZ263+evnvsLW0mPmVLzxLwp+1LboDvvkkcdO2eDMlRxtfpM6rVG7a4xYEQtRiqTXppwYFtpi7m+hDTg4BLmH33W4lRh6SkElSYMOSy9AyFUQlTGG0nHIkoQiCagZkdQO+aJGnh5SPnkAgLQd8n/7vzB9vP9rJ399uD5VAZgQAo3BTSPCvGBvefDRcLQocnw/IIoiNqw2br1OM5pxKRp+gquyenlZljJwtnCzkHY65UoWkyTJL0UHKqXosL6KDhxHXEpXR0+u6xHHH+o4alr1Jq5xWT86JmKxgvR+gqtSJxmhdQW3gK3DQxpjQRzuE9d/x5wjVCTZjDboz/5bcmV49u6f8DfPn4AKufPGLj958SG6GBDLEp308GTGxuNHvNt+i9a8way5oHcypTecgbiBMF9Hl4e8+PNv89orc7bHgoOe4bST8pk3YSf9HP76l/Dnb3Pl4A3u7s3Jghg7Mly51+LSBPydV1HVHRrxj/jMW++yUClT4eLqhCDWfOtHHXZ2v8L4ep/F/M/Zfn2CUxhKUbBlK969U7IzXaOVfJVW3GB99OckxRmbZ9CaSI76S7ZPXL705oDGta8zaxgK/gPWuUVrv8Gdwxv832s/ZOfU4fM/fh7P/yxlsqSa/m8YWWAP2wiT8/QPtrArRfXZEEu69M2El7LXuIRmkg4pOgWJXXMrbXApuEMYe/Qb92nfeg1VVzxXerSsVZdWiZpm8QLd6TUu9w7xB09orS9xopRlZtGuFGXXo9VwCIs2l51fsBT3CRQ85/VZDtRqUJ7XbHst6tjhRvVTrDpiw5SkSUUlLF5MBoQTwe7yN9HVlG8c/IhUJnzXPSccakaNfV76oA/eBrr8PRw54/L9v8V2EnaOB0QipM4Um/tTBqqD510hqM6pk+8xriu6s88TuiFZlmIZg+1XyMLHESk6OaKqSmw/4G6coKUkcZu4dQPPNBDLc9RyhOOsdBxFUeKEIcV8jlS7YIMlNEpKxC+JuwwmTf6LiwZ8ah1HyYe8k6qqqIHU8Tn3N6g+KhzFasbhxExrjzzWxDpk2LA+Po6VK2VonufMTYuiUkR2k7N2g9RLsdSHQKYSKRVRGlDUgrmvGXqrwarjOCRucoGANMRRQF4opl6XoQpXXhU3+QiPgJuRZh4WNZNwwNizKKoGpmwy6p8QLSyme4KTeY+qMvz8lS/SMaeEVclP7gScdX2aE7AJkNLGEi5ZuAFeQVa6RO2IThKBzsi6m4gyYEGbu1+8id0KGLs2RS/hoEpZ2jVkl/nGcZNH1zfJ0hF3b63RjV2O1w2P9hpM+i0+pzsUUYNx8xo/3rOpSx9tQM0U0cCh/uOb/MFZRaf2SLybPN6qWTRyBktwc8WyMcE6sxG1R6E8Ivcm43CT6yc3ebB3zv7OhGN/ncf9Nv/zaJ3ciajsOxSFIg48kqJNIp9jpq7zdv86T1Wasa8R6kXsomLe2Ca2Y3747GUsY9HvTIhPfc5rj59MMx4sG3w/exuVVWBVNPbXic+vkJUhw3Kdv2peol07dDKP9QPBpG1RiArfWaNTeRyMtjmYtnhXT6jKnLSu2b1fUPoVG4mmGdk8nva455fIHNx3HA6nFc25IHcEt0c2ynKZHVxGny/4yy/PERk0px2Y79FPNHfSLgJ4M73DQpUcl1PGO2OGVZsnaptG1GBueSyk4P7ub3O2ds5mexMdu+TdnEeywVOlw1NpQORusZE9z6x/TDsHlSXYF7tlV9UoI6CWOFaAUQZXexh79c94XNeMRc1C1kjp4MsGQkgsZdDS4FgetQOWcVaK1UpSmf/yAvGfW59CxyE+IqytogMNshJIAbalqK2VjkMagxaCyrLQlUIKiSUl9kVeB5b10VaFusKqVtoQSyoczcq8c5HHYYnV5yqXSAFSGJwLWJNjWatrKAXUKLG6vq0sHKtGCYFtrRCQjragqpAZSCHQSq0eq11Es4MQY/rWLqk6JVceuco5DF5gXJ5yoGOaN1ugXuetZ2KeOQ4pHQuV1fhlhZflOPMpQVBSK4ESilRVVFmNPfW53+vi3JUUqqbz0GejbpKKEq8OVzwUXdJM4Nk3LGZS4XYkBonOFUYDBpQweEXJef8QOfTZlSHVeYFdn5GLAf7Soa41w411Rq0xp5ZD69yhMcrwsopSKHKnJlwU6OYS++wY6Z/RHSfcPppx46BBw29TeAaI0CLHKxq88GTGvcOcZ96d8+zhffzNy5gwRpqS9kiRWymalJ35DCUVXryKavQiQ2sUsX0s6U9SGpHgeK1AP4ngaEHZb7B2r6bemTMrSkRsEZU14b7Ng92cW8KjKls456fYiyM0c5pLwXubNlf2+5xtZsRFjYgM6iBj7kW89PMOW6c9hv05bhoQtyLqQNFMBPaO5PyzDTpBzYNlxtN//wwzx1AGPsnQQSI48Acc986JnZKlkxFEEpHkNJMUuy5xypL18Zg0XNIrziishO0nDTrTnMuljWdpHDVn6gzxixjteoh2jziOEUIQ1xamkthSoMuC8gLtqMoSISS2baPqGswKESJZmfGqqoKyojY1qsiBEqu0cI2LUr9eSM+vsj6FjsNQlsXHJreyxFCjk4ggevzLOo4gQEZLXN1FmQ2sYkqYfELHYa2GqGma4nrbqLyBnU0IywiZxCuT24c6DqVwxAYyd/EXEX5yiEDgeh7iAgFJXaPZRhkPNz3GNwuCICSOIowxH6Wca/saqgBveEi5EFhpSuycoLJ30dOUzD1G5S8gRIo/WuKoR2T5jGJgUVU/xZtbbJ7dgjq7SG9eIvU+afuUR4Mhn70/YPvQxmrnqPo2FBnz7IB4bYfMZJBDoDVRmrFV5BRlycyLeffKNmYqKewJWf0Bbu6SqMtUIqOmSylPOdh7m0jE2EOP/PwZUs9BqSUpAbUIKeUhehkjrCPyGtLIx9GCI9mhqiG1E6bmGJGMSNUmUzmhjmPG0mOoLXKdUJkMU73Hws8gbVInPdxkwubBgu1HXXS3gzATTPVzWiOXMAs53IrYOZthtMA3BXaxR+c05aWjt7n2yOWnLz/ElCV+EvOH311j1xFk7QbNyT5XHr7JU49cHmxnXH7c4LyVs7w+I7NbGNNn4bzH/fY7+DHc30wJpgEvvCmYBSVb4zZhomksHuIv3+W3vtvh5j2bu60pX/h+yJ9/q8YZXkLXPs/+2Ts8ap9QDmJ2Hc1XfvKQcKk4222xXX4DISSvRP+RYfOY48GU117IKVzB3uEeW1UfJ9vDVxFPHb6FtMZsnEpq1+XW/jqXD0oGNLBvBnjLMzYPHtM3inN5iBcrkiRGSgVuQGkqUlMyrRLKqiLwAqI8QQqJY2oS41BSE5uciUlw6pqqrijqgoZusIhiMl2u0CRFQaX+WXQcH+MRLMtCaEluhURacDTofDwcLQocxyHNMtZztRqONl0OB1vIi+jAFQLSkBcFo9QmH1fMgoCDDZc0y1Z5HQLMhcltOoF8XjHsdziy10CI1TWSleScumY5EmQZDDs3OXJqbMe54KoYHHtlcovGFjKrORs8zShcISIX/SlZsMdsYw0TnlM4TUoZcNTbZdTbWMl6O5I82KbObWadBuVhh8S2eLzWY9xdZ+qeM20lHF3Z5cmdHjeXkiK2ON+weHiriVV7lKbA1IpYOWRFSjzRVFOPNHyK9+70EEYS2xFZ+zaRUdR5H+IMI9uk3suk3iUKK2Ex0IzLK6SOITMNiiNDndsI/QqLgU/avEaJoHZDlK0oLZ/siYMjCqrgCxiv5Phai6y7jchhIh3KyCKzulh1jdT/EiENw12fH/3GOqcbc370qsvklsPvpQ0q2SZ3/w33LgnCvMGsE/HajR66VjwlJWoeMhpksPwy7z9VMG/dJAs1oqr537+5yxeiNZ6ua/Y3WiBv8vZ1yePBjKHboGikzNfOaT7Zo7R7vHX9C9x1X2LczsmtJf7Q49+3Kw63NV9+5zrh1OVg7Xc4W3+Rf/f1bRqzBnefP+M4bHB8PWM63qMSOd955r/nbCk53R2jlObkD12aqaDjSb7whqZWhh+uf5lpGBMFKTdOND/YSRj2fbRZSeRzFfIg+A2qqiT1Smbdkoe7Frff6dFyA76R9ThpNLi/vctpOKcuW2ym22RZhjGGq7lDbgqmzTaHzQFVVa3eo1mGkBJba2bDkiyCSSPgKNxD2/ZHknPXdcnimOXEoi4nq5PNXxO29KusT23Gseo4CkxRYZcRfl6xHh+ubPVKUuQ5QRiyXCzpWm3sqo+/nLMej1YIyDT9SHKeZRkdZxOdBjSyGetZTJqmF7b6CwSkkDTFOnZm058krKcnF+5YlziJ8S46jqBax64duscnrLMkDEOWUQTGrNgraY6vLuEU0D88wnIFWZZR6w8YTMdsDR0yc04lJGFi8a2/+DGHvRGzJvzoCzFXnswZh5IguowbfwOV5Hzm7feRszPeu3ZAXUfsHO/QPr5JMLBQ1VU60Yi9u39F6ae8vN9k2fSxjcJUGdfkZdrl01x+co9n3ruLrA3n3YL/ozcjOPO4OWzQWLuKU98g4HV6zs8QpqKzCPid1xpIp2Jz5rG1/gqdeIOA77GRHdBaKNKu4s4jj1mz5uU3G+yqL6Ndjxe817miFkQ7JVcLiTqvaO6XfPXnA9xnP09moGW+i1ul7I76vHBwCbs/xVkIXhjv4Ho3cOoZ187+DCuVdMYhpybms096BKnNttqiXT5Pd3pKFf+cn9xOcdwhV04ltai5sexz58kzuJtXePr8EO/sTV6/taBrCb702oC3bs0otkZszD9PmGkC3uIzB+/wjlexSEtuztfYaik2nyy5NHRpVgMuj9+gV7zD3rzNi2/1kFtDPvNOyNt+xPb5N6iaNq/c+z4bHyz47ucXWJbN538SolTF4yuwtfhdJq2KjeTv8LyaoZ2zN+lw9dGUltmmUmcY2cekMX7yGPe8pD3vMm6f4EwNYpziBx2M1SSIl7TyQ6L4HnoSsja+QZGXGGMYBNvo1KFRpayPT6iqiiAMiZZLpJRobRNmDWzTopWNWB9NsfWKHVtW5QoBOZ0RyG2Ee+EX+/8xBP3PrU+141BqlZ0o6tXMwFIKebFVMUqhhEBfzDRELVBSouXqcUupj0ltSiHFatgphUQrRaUU1kWamFBqVVlrwYcf+uJntaXQ6mJuAqvnCIElJRr10SwDY9BKYS5SxT48HdJKUCuF0AWtaIFfzRj6MaWuMakhUE2WwZxIJ5w0piyaOYltyEaKUmkiX7K/s8vIkojSZ+69z1F3g1a8QekuIRFkbkbeHpJ0c269ZfOop3CTDh/sSoa6gPs1QiqULwnyjMNejnQrlJ3RUBVKl1iixlEFgwhO+oZGLjnddfHcNse6iU5sOljY2sbNNL0zgzu1mG6muFWBFbjUpkIawRuDMUkx4vl320x8g8x99i95fF/f4rdKC6coCJDcPG5g5xWy/5jZZsSzsw7dcUJ9GVyhCLTF7XccXntJk7kt3n7RY/N0Hb/aID9yGA3W+X87l8jcEr+A+9fHNJddxsPnecCAG9Lm8Wafn/mX8NSCJzcOGZ72mG1V9FNI2i5mKWlnAam3h+Oc0VtENE8dZqNNDren5F6XorKpWg1MqPFlyOx2jhNKuu2Eaq1kMohp1AJLCbK2ZrkJmYrAdll6FcapqUSGk8LNeop6EvHjVysujcdc+55k0Viy3A5w0qfpxBE3Hv0Cz3jceHIf5ZfUVptrBzl6s8QLd+glKd1wypOnDlhbKvZEDx2vbsVOPsUXfdaqhNvxhLKq0MvlxfZ/NeNYx8JXPptFxO1ijNarGUdVVdjRkjzL6XhdtO0hpULKX0dM/qutT7XjqKqKuqqohWAZdjjc6K9Szj/UcdirbcAgEWTnFUvb52Bj5x9GB5YFo0iRj3LmYYPHm/94dOB0VJHNCob9HgfexqqA2Jos+zg6cH5W0UtqzvrXOfhPowNtG5nmRENQWcXpRpvz0KbIc87Wexi3wuQOmXOKsS4RNQR/+tWneNSbIPKS0h4ixAqwbVd7ZG5ApGzeXbvKiXOVpBuTNa5ztnUJy99hqzqnPoIi2GTaX2PcP+Hffdbncc/n6ug2jzrH6CQjEz3KyuYvrg+wc58H20v2dYRYlzxcL/n6cI3MdJlWz1Ec7TKyc5I1l5Gx2Bq2Gbc0zyUhseUwz7/ApC5JK0n30Oa0nVLYhtd7mp3FGr1CMyq/zLEqkKHNQtcI7SGBhuww0x5+KRjnv01r0eFskPNwUzK1F5hwg3rX44vCY0GDA+uPSNcdxnVOUZSk2qV227jGItYhC93nyVoHlSfE3GAqRsSOzVH7DtuF5EqUs7BD3tn0yYXggTxn3e6zb80Zq4wXxRqxbDEuX+BNO+NIDdmYCcbtJltDj1k9Z1k2CYVmv3Gdfd3krfY1DkvNO2tD7r/kcDIY8vv+Fu7C4YH3ZdJdeOCcsQhy/s/P2Gij6eQ+R701dFkxLL/GvesZD314+Irm+bdtJu2KqG94NRpQOx3e3fk6gxOXyWXDw2s5tvCYtUuumg5x1maubPKGQ2m3yP113r90jWKjoDYGO1FcntQcNtr8orFFVdfYQqCSBMEqCnMwE2ymihPvMne97Y+iA1dJeBZ1UXJn6RBgUYoFdf3PoHD8Y8pRWRnC+Tm784N/MByNoog1q41brREu5uzOhx8xZZVSIMRHOg4nC2nFUy4vI5JPmNzKauWO7YiNlY7j7ITdi62K67rEnzC5NesN3Npl/fExSxYEFzoOg8FzV8PR0LqCU8Dmw0MCV5ClKbF+C+Ur2gdrLP13sIo/wBTQOzhgnO0TDAPGwRsU1RRhV7SnX8Qqb+HFgr35mNrbZ5GOOO68xfrh89x8chu3tUCUezizmo3sbR7tfJdj1cCKQm799JB8+z5OZw0v/gIbR/voy69x9Q2HeXrKqDUmAebdCCv/Gqp8FmfxQy6dvE1pMha5zc7dgNv3Q44vQai/hM42cBbfZ/sQxFKxbF5hWQyRUrFIbOrKoq489Og7BFWOXrbpyCYTnZObikrcpqSDKhVe9KfsHr1A7DzgUuby7rUP6J07lKKHKv+I9nTJV/7m3+MvUo6HLtEdF7MUfOZRn6C/ydriZQb5lJfbf0ldpiyrioWtCTyX35z+gkFyGU9e5Ya4x1fOv8ddJ0KPcr5y3+JJVnOwXjFYfIXm8lluLH/I87/4Od/7fEFn2MOkAa/e1dw9OudS+ru0vC02T/4Mfe0t/qc/2cJOS/7Xfz3nN3/g8qffzOmM/g2dRZ9n3v82R2pBUZ0y7CeE5+DLgH/1Vz3CF76JW/i8+s5rWDcesnFaMhSaq6+vMVzPyEfQ5FuINOX65NtsvguOrrDzlKO1iH/xHx3W3Fts3P5t7OSM3/neDwhfXGAtniHezoiTBCEEHXcDKw3w6oTG+Gi1VQkC0sViZeS0bay8haKNzs5xJiNsZzXjKIpVHsdyscBSezgyRJv6I8zIP+X6VDqOVR7HBXgaKC1NpiQzr0dtqYvCkZG5LqnlEZmAMrHJtc8s6KMsRemWF8ClFZApEiFlpUmtkHk7uGDHfgidNmjLIk19ykqysANmdn+lAfE8Ih2R2DZUNXnmUZaayGkxky6p45Brf3X44XnUdkqeOWhjWHht5qFN6iSk7i7SFizDHpUVUUsfowzTwCMKcqrMo3AuU+k56AppGkjhoC2JJ0JaTpPW7Jy7coO9SYfePEMFDpaxCeuc9dyndG9xsr2GqnOWWhHG/K/xAAAgAElEQVSwSW2tkbkNFs0+5+2rtPouhdNBqDGyNrh5jmCDUodk/iXe2oQszGEiwN3kyTWP+SAnm/coK5/C2SHuOuStgrXYR4suEoktNUq4KGlRh1u05oZevMl+vyDyU8JFRZVLaicgdSwq+TRFo4/uSvhAs3B9Xr8luD7Z4GtHLRJf0jy/Q2aDnzd4x8wJpjNmxw1K5UNiM3NDHje2OVqPuHzSxnmjyf76Ae/lW6R1j+u5x/5ai7+/fQnLEaz5DtMvaRpSsNaqWH9wBeM38O0rFM+6XHdAb7scS4+Tay6zvmB6fBNZODj9l7mebPP9zwwQOmbaPeewGzL3phRqgyhs8Kj3KrNJyqI9IvWXSNvDn9q8fyXk88U6tYH7m1cZN/rkgYVeehxe00x7CVfHDUSjS2znjPks+Y5GOZA6sNgy/NtvuTyT7fHNesAj0+D/urVGVpUUXRvX90jtFGMMC+FTZhaZFzJXA8qqJHNcUstHSrGa2c01RW6ztJuMtbVix1YlRVGu8jgsnyTzMKWgruqP8nH+Kden0nGsMshWJDeBwEgJlqRwvI+BTEKhXY+iFpS1TZ0KKmlROB7YNkWeUV3480sjqWobIwSVpUkVFI7BfEI5WglBpSyMFBhHUZCvfCzKoXBq5EVYcVVY1AgKy6HQEu37FEJiDAjLRthQlwpT1ZSOR2opCgdqK0Bqi9pyqV0fySptu1tmnNc1jbrmkWNTahth1yg8SqmIjeJx0+PJWsrL97cxdsWo3UIVa7TshBJJKhVJS2MVDpeHCaNOxvxKTnPcZWPSQOcFSAvhthBhi41Zkwe1QlAhdI3BX/0pLRejPQrlo6TNJFijtCSJk1NbLkZaJC5U4gyagmCc4BRgpKA/03iywi41svZJq5y6LAiLkuNuxM5c8OTWGTzaI7MltQo5dGsyu8/hjkezUCQehMMNpPFJLPjRcy9jJpLcLTho7rN3/CI//ZzFjThiOQs4dDPuWjnP/U2ApOTGfsT4DwfEgcPcBnGmKHwPb3CFyXDIfjRj8LMAjMWiKRlZLru5JhlvcK/wIbeoyoqTds60CAhHMxY6pp/bcCrJXY+x22DhasahYH+tSxw4FNqhMIqZ9lkKh4MWzFrrxGkPL/A56fncmPlIIfjB7vNEaoQZZDSeeBS+xbi3xNMheekRlT5vbN0g6PhkF5F+bdkiayyIHZtyoSgtj6Rtk+SrxC2jNKUtVlZ36WEiQyFqctulqmu051GwQqcaS1MqhZGSStsUjgGtqZWmkiWVF5CXBlNpTPlxcPg/9fqUOo6aj4pHXWFVKXZe0IkeY5REqQt3rOfhxDFN3UGbDbxyRjc9/ZhWfyE5T5KE0NvGyhv42YS1OrlAQFoX4KcarTW+WcfKHYLpgm56ghArd+xisVhtVaoaT+xg49KanNCtF3ieh3dBq/d9nzJOcayr6BKawwOUr4jKBYv179E7A3+ek65HhPM9rESxPX1Ckp6RGguZv41wjtEzl8Fpj9IEOJVL/3TIfB5RWgOC0ycchSc894tnCLoFyn2W3nxMV7+GKu8jZIdcpxit6BSKrfMFLh3aizN6J69z5dE6palYrp3yxuYJWbNApy6iblDV93Djt3n6zKI2PnvR+2y9XzFvZ3TDr+GXmwzO3mAtGxO1DWuPU4ySFI7Cr32a9GiWbW6/8T4j5vi5S7Eo8eMRQdcl1hJVXaWSAif+Ia+8q0l3BQ+3Mm6c1vzdVsJz712mpVrMxZzf+MUPKFMolGK+PmJnfB/fWNxc7iHNFRSCpTinzK9Q+BVHQYPDk3cYzJ7CKUZk+Rqn6TEP33ybO/czqktTlt5TREGLWBsyWZAlJadWxpECS0vyNKfKh+wPjth5GFE0fQoVIrMlOn1ARgPrPKXmIakRlLyHlV5D1RXe5APEac72UY1UEA4nBFlIK+ug6x2klHgnj5g0R8SNJXLWR8gG8c4hp7MhVfl7yEjQnjxgMGkzu6AMBosQGUUEsoGWO7jZkk5xjpulq/gJzyNNV+rl0NtC5w0aIqU3O6CsSjzPx00SpJS4rkuYNrFoEWTndM3ol6DTQRDgLBY41h5SNqhr889jxrFaq6IhLlAJBknS7HG61vslBKRzgV/cyCTZCCLtcbK29TEC8kOTW5EzSWzycckiCDnYcMizi0xSsdqqSCmZT6CYlUwGXU6dLRACW2vSLMPWKwTk8hyy1DDq3uTUNRc6jgwMaHvFVYnPFVZeMVq7w3lgI6uY4a5DMo9otQST9ZTUWUf/f9S9x5Nk2ZWn992npWsPDx0pKzOrUBqygW6IFqPQjZnh0IzWxtmQZvyruOWGtCEMRrJ7Wkw3SPS0AApAAaWzUoeOcO1Pv3fv5cKjsqrIWcwCtYCbhUUsfBEW8d7ze875zu9DcBk0XGx0sWxJFbRxjQZheSwHt7GmEVIauMGQdstDlxGb2fdpWg2PXxqxjcaYthl3PBb9b+N4b/LhazXtI4vLwQHGjmDzzGJ1FnLZ2me8YfPhq11UpbjcTMn7K6qoAmcfjB7KfpO0dZMHKqTyGxJCDgc2Kii4fTqkXgV47h/zy72E3EvofbuNKUzSlkO7ELz0aIDOPNSdP6YKMrKVRvrQ6tc8jgV+Y+HcX/tq3K1/x4NXNGkoCXPBL19qmIUNz/bbpPMBpRfz0d73OYpzeguLZX/B+TWfILe5Pu6jpiGV7aDC71Bsdqg8TWIG6G6fmerTaQxkFYF9C8vd4NFdSSNN5lsRFi3SsKRMHLQdoNs+ta0R2kRLycLbZrlX82wDksseWeIz7b+KGd0m3eoQlIoyGJEcKHzVwjGGIGxOb77AxXVB0vXQekXcbuMYJpoYeeHQCItl5x7zbkbZqhG6RW04HN2IyLY2UW+1qGyH8903SHoRlWmjlVpnZJQl/RzKmUHmhJxu7VA2NSCwbZumrtFoJpVLeVExb3c4bQ2RV+E8a45jTWUvLmuqBBbtiPPoAMu+8qpIieeut2OzqUFZCnRhIcR/fSTgf+3ri0kA+8zxSLB2VbrpgsHxJco0ME2DsqzwfY88z+mIFk7dxS9ShvXsecq5dYWCF0VJyxpilz5hvWKka/I8e54QpvVaRBPVXezSpjWdMlATQHzGq7JeaQ+aIY506IzHDESG63pX7tgrcjQr8dQWdg3dswuscJ1vui8X4C5I3JyaY5T5AkZlUPkfs31YExWKuXOINBVnbdi4OMFrvo6bLfnBP/4179xs2FoMWNpjRKPZnnQY2du4vI5TLgncx9yRhyzSDPuo4Vtv3yAx1xSrI+9iiPu88ffvgB8wR+MPNIE14XDvkiD5LlZ9DyHfxykfs3Hqcf/VJcMPh9RxTaBdvPorOM2QXvoep+4h1x+4SN9gFUquX9h0FzbDyVfRYQDF39FK59wctzjZlHx0YwkG3JEb2PSohMa2/pGbA5+ggF+9XLFlKOJAY++3sPIhXVJ+N/sJv7xT0wnB7ipuLwP6K4NXzzaJrNc5OLngheFfsF/EDE8Ndk9c6sGCrzyIyPd2iKpXGRSPeO30PWpb0ZobdBcunanH6bBgx3uRuL7OTvo2JO/SzgbMeg1zXRAsclqZw6b1LeJqhzuXb2POz7BFRNVO+IbSHL2ZMbR8vJ/fxJM1PfUMGVTcwiYRR5hDyeipjx2b4H2ZKLH41skv+KfBBHM2YOs4whMV05sfUnoGVhXhSouN2ce0x3ukpoWU6srdk9HWAU4zxCtzhmpJUZdX16hHUawBsLY9wCk94lXDMLmgaSS+51GUBUIYuK5LlPrYMiSeLhgslriuS9NImqbG9wPyNMWXGzgEmFr99pQqSqnntnqlNRoQssHIU4RlYpgGRlliCIWR5xiWg9AK0dSIIsOQFkZdY1rrIB8jLzC8NkI5CFlhlQVGnmJ+JsjHsC2EikAZGHWFUaUgBKahMfIUQ60RXEGD0BaiLBA6xURhXCkgTQG6yBGmBAWiyNcPpzyjTpcoX1EaFZU5wylqrNygtHPqoqFSgqXV0FiSbmqTGQ3KcJh1Y/7mO2/y7ugxbfMGD0aCuqip3FfItOL1pcVU+nyQe7xfpBhas5te459euMlczvi9uksx95g7ml+2btGbD1gEEyx1iqlLRL0i9SpAoUWOUAsC2dC9WOI/qxjfXPJwv+YPH91CVBHm5SmifIJ7EoBt8pNvpbT8Nm8cBciyxjIUZ7pkJWp2moiVOaUzTXjhmUPjT6BqwFF0DUUlFK6E5mLG0ss5NxVF6WM0UDmSQ0+SlRmFXTA2DL78zKGRCoWgNBrMumbpL7j/tYZk7hO+D94BND3F7krBSuKGDc3OgkFiY/dMzLwmnNp425p4bMNck95xyGyNlBNmYYX1NKDV8Vh5FfYDibOs2fbn7CeXjAcXlOOA0aXJj36Qo0RGy5zg6RY3IsmgNaOSBXIxx67BszKC1KM2KlZuSSrvc+fnNZ5ZM5EZB88C4tszelUHqxZMo4ImNRBZgmE5aCUxDdbXoDAQQiFUjVFmGGW5lrQLjXFVqhi0QDkYssaoMwzZYAiFuCpVTBRGbSK0j5AlBimGlhhNs75nDBB5CkYNxhUO8dtQqgjBFeZ69ZQzLUo7InUNjoYDmquw4kbW60/7omBYmhQTxcr2ORqtzeF1Xa+FTKwVkJPCppzULMKIR5vepxzHlTtWGAbzGZSLmvFGn0N3ez33dhzKssCx12HFy0tFXmgu+rc58sC7wt5hLa4WZUU6MTFLydnGS4zDtcd23j6Atqa0CyzzDnmwQwG8f/efs1ImaMF47xxlSBzt8q7f4jsfeqxcxdv7+xy1brNZh+TdLXJVc653aTUKlQXkbcFkp0vj7eFqjbE9pNJdtMpQcweV+pTdewhPEQgTj20O2zfRQcrmKiOPN6gnfaT9ddL4Rc42HWSkWO0HpP0xnpRo4xZZEDIZfpeL3hsox2E8hCbMeToCbbj8y1/s05MeZesPmYqCf/L7nPVn2JbgfqdFd1Eiil0au+JJ9vtM3Ra2ALvQzLs5dqbJ6JA5XXK3w7PBv+FBe4EUGkrFT4cBjedQhV2+d2xyeLuFvPbfU9XwpK2ZvSQ42zc5tT2+dtRiOPGZBC7v9ffwWwaVqfDSFs52l0U7wS8jWinMzW/wfryHn9jkUjHdkwzw0I3mxbqNLxx+Fv4e56FiGdZkjk23bPHT8gmVKPgTe5uh9Hi3+DYf2sfMOxXdsksSL4gMkz4e1y9aCB9+tvE/8vFmQn+5zVwt+fmtHo92DtlqYHW+jfRqLgZ7JP2A0lxb5H3PoygK2oWgmLLmlbb3KK4M8bbtUDc1aM24dinPCybtDs9aQ5SSz0sdIQS2ZXH3sqZMYdqKOIyvPbfVKynxfJ8izUhmArUsr+7F36Jx7CcPOSEbvGZFVDTsLw7XHIdpUpXlVRZGysjq4qkNWsmS/dUFtu1QVeXnFJADbwe3jOhkc25kKVmeY1+lnCv1aR6HV3lXCsg1x/G8VPE8kIo22/jaY/PohEStCMKQPMvWS25BgMwKIusGXgPbT46IA4NGZjztvUvrtOLJvQuKeoGX72IuNVuPfkG3WBOptf+YyqgJApfo8iZW9SqOytl7doE5+oioPGQZLzFqyXf//oBdZwev+xUOkoRvLH/KX/TvsxEGfCU/YJi1Sc2UO9UePfECo+oDfOfnfP/PTKw65+++lhNtVlzsJOB+ByleQTR/x81H7/La2wZHOzX/0/885Gy75D/+YcbO+R/jRttsnf4ls+QBO2cGvY7PfjvkZ+6Ml5KAzfzfETcxN+c/4kYzpWgJvNpi6zhk75mB1hYbyx/wLKoIq/+d/acOxsqmCDWlhiIw6Zzu4+dvEuoF3/yHv2LuzDjqN3RWJmZmcf3jLUbs42WvMpqcsnX5l/zuT9ss+pqtk4j/4J9w0a24XLyIl3yLaPEQ6/wX9BuX1Fvxtfe26GY+96/NOTh5nbDe4e77DzGiD4nv29zfWFINU667Le6ctNkr3yQSXXarX9OvUy5JYGGwk/Y5bX5F7Tb0ZIuWjHjj8lcs7HcQswU/+PGAX91dEi0adqchTv/7uLXDN59+xGHnkv7FS8j6gq3lDc72f4qlTczmn2FVS0ZPnzGcdsgs+zkynqUpIxHjiW3iLOWgmJAXBSDw/PUHqNaaUbCDlwf0ZcG1ixMa2azvkzzDuNq96pYtXN2mn03YP5viXiWA1U1DFEYkqyUtYw/DiNZqyN+Wcewn6sZP/LEoA+V6lF4fabAmR/0G0w8obI9KR6jcprF8yrCPuhIy1cbaZ1l5FbUIUdKmsUOyyKF0AuRnxrFCCJoqQCmTOogpvXXYsXYcSsuHqzyOJveQjU3ltihNFzMIKG1/PQpzXLArZOWg0FRBl1Wk8IoxYewQlwW5a6KsTUxlYgvYL3qcxQ9oTwqe2BWFXVMYDmnbxD4Fv1HcGo+ZdkpqM+T2Q5tFu8PhvQM673o0fZPKdEl2NjDMhGkpyU8d6qVFZtvMCkUhGxYtTVrWHA27+EWbRSQ5GzY8ubbizeMeAgdt9JmH15j0eqxaU969N+TxtsaqC8adHiPh02xdpxfHXN7W7EQxx32T7dklQaoprYCAmFV8wNRpswwLauXQqiJM4VMZKdK00YaBNkY83C04eGiw8g36Y5PGhdAUCBwcs8X59+5y65bgwKiZ7lY4XkFXufQufOrApmwCnlYtds+7lMpjuehzP6mZxAU7KiZvPJKiwyLdorIDcHJmnRtcvuowi1NWzRbyPGCytcvRgUfwckDhLOjMxmQ7EeOtPumTHsEqQl07YN6t15yOrpimPrutO0hLI1othOlTvHIDc79mIHPGXsSWkaPLmiAJ6Vx0EY3B5JWQzWGFaRu0qi7hQtNvDxkpF8e28VyPaCsm0x0Kw0NJhRWGlJZPLT1UZSMNn7LVp3TXJ13l2DRujdZQ2zGqMqgcyIPe2lIYBJSOjyEMpGXRCA9d2zRORGkL1NXYt5ENdhhRGg6y9lHSRmD99iDndf3JWn1N00iU0BSGxdSLPhUyXSkgc2WyUi5NZVIYDlM/XqecmzXWJyY3oyRRHo0pyCyXWRBQGPnzE8lzBaR2qUvNyjKZGjEg8DyPXNg4zrpUKWqHRpksnZCp7ZA5PoVaN2E9b+2tKKWNIxVzJ2DlOEyxSdjiYleR+afYekXu+hSN4GzwGsfyNoebNXCKI5coNEUYoESIMjweXb/H4W5EWwZUU5NMwzjucnngI4XHwnf4cGODlQXCaTjpbiLDDnOdsjFtUeYtaG4wG8X87Te7WKnB5XDBvDVj3l7gPNpaA2lih7NNm/blLtPNjD/73gYrS1PEFa9f9ujmLu/2N7jI2swMwf1znxN9wrKzQd7p8D0vxsx9LqtNDs0QdyVZORpPBoSlS9ZvcV56lFpy6G/RaXtcOD523bCoYbHMKW76fPcXHswN6r92eGeW8WS7YdoVfPPDIU/ObEYXQ7ZbLqk3oPDvMBnFaF8Rz8BlE4sGvxrQ+C52vEGwqRA1aKvg14OC0blkUYcUiUNZGiyfwvnKoJ3B+YbDubvB4qHkG287vCQNlo7BR0c+J2ODqXuJIRX9YsbZVFF2QsaZxspN7t/3eTfssnd2g8d2mzEzLEuweKo4sGw6hcsDFXGcaHZOa+yFRhYr0pFEZDaqUOQ+fOBVbA+3SdIGpSSJ5VL5JsvKom7WDuWJa5IL53nYVFmuN7SXuNSGIncsZu56XT5zfQq9Bicd2yGrBLW0SGyfqWd8zuRWuAFZDblyaLRJUyuapv5N3+ZfzInDtq11KpFlY1oCQ0JYJOwUh6irB0dVVc9t9QOzg6tHxM2C3fIS679gq++727hVRLucs6cz8jy7Iks/fXC0GeFWLv1Vwm55xuenKi4oRay3cbXPcHbGUq+e2+q11s85jtC8jtvA5uSYMDNI6wSrmtB4FSfZuzRmilN/BSUkw3qOsypZyIJi4yl5MCGXOY3ogbqJVhVNdU5R/YrY3KCpHISuMeohRjHEdFu0VgkHxz8mjY7I/ILBeIe92U28VkpvdoPAbNHNTtm++DW3jjaJco9H3TNSnjEaT9i5dNCWgZBv46Q/49qzFzFdwWvv3OFJf8Gyn+HWr9KZ72JU7xEmK6Qq2X3W5cI+pO4sMeU+ihGGMtHyHcxsQawikvgcK+ti5zuIJMeStxA6Rcofkz5JuPtLm7RvkscQ1TahNQC9h1WvuPvRX/Bga4U/0zzbFdx53+b2Q4M3J/cwvvzP2VxdsLnx5/zOzz0KX+DKhmuHCYZUmPWXaa8GvHFxRDl4C2VAXkm0JzjdUVzLI0biy3Tyfbam97l7/A79iSb7+gwvs6naBVYWESR/RNjaZf/JW2xdnDIJV4z7it97u8uP/uVTZBYQpFu4Zc31j9/i73beYvD2Fjt5C9GbIDQcHG5i7rkERcDm5S+59M/YuhjgTQRfOuxwtP8+g/QaQt/AqOfEzS8YJorOZfc5Mp5lGUMiXLFNpDN21YS8LACuOI51qTLwt3GrgE5asrs4ppHy+X1iGOupSqdo4dKmV4/ZXU6vworXU5UwXCPnsbGLKyLsq6XT3/TrCw0rllIiNVSeT2YHnHaDtUlcrA3zrrtuGm3UNuXCJAksTvqfhBXXn1FA1kxrn2qmWPouRxvWc2HTJ9JpwzBZLE2qpWLajTmxOwgEjuusV/CvpNOrmUVZCcbtfU4d+blx7Cd5HNnCw6gUF70bTEOHvMlJwhWqJ2n8Pq6ZUdsx2tacv+iTP1ZMpSZp9Sm8hNqokM1arFyamskwoIptErONWZlIS2I0LRa1R10apLst5Et/QL87ZyA109f75LJL5dRsvuuwmq2F0h/udFm227SWFcudfWrrJqtOxuXgGjuLDqb5JnZri/e/ptGNTx4OsKMWTlCjqgHm1MUSL1N0Ekwt0W2PyNhlJhoiEYPThyLEcN7E9Ar8iYttZNSdkKKMyEYm9bMeQkS0rO/T3nZIDYOs3dBPfYqooZUE6JMRy0GX/+tf/XckfsPuqcCLNIvvuLz3dRPztMOryyGzUQde/1N+sifpLSzSCKx+zZ6l6cz7lK0Rh2HA22EEAmoFla+om5rLheSN8RaF2eX8xj1OnA7LElabOQWCop2T7hmMP9gjXsWUvReZhLcobYnhSu6/4jHevIMlofQ2KPGY+Hepg4jja22Mqcd4mODmcFzH3LP7rCJBGb/E5WiPVtLHjCwMP+ZydAMlR6TZgNIKOdv4HoWzRejFKKXwPJ+yKOhWBtXCIbVdjjd6lHUNApyr0hwNYxlQyYZFK+IkjK44Do/yahzr2DaLqaLMDGbhNifhxtqrotR6dOt7FFlGsnCRaY2S6rdnqvLJtMOyLEyjwWpqPK3oLSafK1UC3yfLMlpEWHWMV2f0Fgm2/XkFZFVVRKKH1TiEeUZ/0VAWxfpE8hmTW1i1saVFnGf00ynwqa3eddfNUb/sYEuL1mpOzywIfH994uATW32FW2/gNJrOaorRmOycHjL3TzlLp1z0JniFQW9xBy0Vr/zVOwTPJI9upXwsllROTt4ziPQAP9ugrQp+Z/mMy+4HBMrk7gcFy2jJC48NvjLZI37hmxTVKbdP/m9WryisPCBattiftbn0E4xwk+7yNXbVY15NH9JLx2zPa97r2oyWNsqY016YOLXF5vkzvjR+SKYkB0fw8ocxv341Ze+spLjrYktwy48Y954S1QGdPGJzvuBI5WwehrSWG4RJhRDvU1pTXny6h2xm+AubzeOQyq9wqu+Q+RXN8tdMC4V9YnO/m/A//NkmP/wXM8KLIWXdpalL9EcfsOwsuXzgsOgndJ5KRmODttxHj76BLRKqk3+AI5/RI4eT2wXyhkugTLqXNZ4aEKoJbfsB0onxUoulvWDnos3Ek4R9sKcVG8GM3Y0p/qOERTJmMjSI0ThaEJXbYGh6+RFBkpGGklRW9EuP0LzEth0s8wDTFHTNOS37EEdeEjURTnHJ7kwwXAZYdoBTwoP2M7I6Z9pvMRpvcjZwKPUj7FriVD0sK8EpHxGnks68vyZHr5qbLeljNR08VTFYZuTV+sThOC711YZ22xpgSQs/r+nVM6SSBH5AlucYhsC2bILcw24ComxFr07XeRxKIZuGoA5JVwl+3cfAWo9wzd+SIJ91j2P9valrBBXIBpGPMa+mKrIqMasIkSQYtkTgI+oMo77EdFyM59GBIIoCM3CgiaFKsEip8gzDttcN0Curm2HYUHuYWYLIL9cmNz9ApAmm5685DuEitI9RzjH0CrMKMdJ0bXK7stULuw0NiGqKURk8EYIqtmgsRWmdomyL2qxwUgdRS5zsITvHE842UwrVkNYNKtzFswssam6rC661cqZBSrtw6GYF5WsV+eEQ24UmFiyum7QHJv1nNW0voesLxtszLDPGPGvwo4yX1CW7mYMyDIrznGVTcIOcjtXgSk0fi9O4h1SS4gWXi7LDxZtPsE89WpaiiRRRp2bXbtA9TVAYjG8tyJ0pWbBLU1TUpmYQFcyjGR/fFjiuYCY0h7MWc6+iNhWaksI6xzENlBGg9AWNDJnED6lPUuz6GxRBiqzGBEmJYYVcjiYMTjWPbwpeeb9L7lXUVkZ/kDNIal4vfQbTnEf5GTPHYuvJJlZeY5kJdXJE0jMYHgZ88MIUa/UCyTKjnOTo3EfkU9yLc7Yykw8OzgkSB/GqwbGVkTxO2Zx2qU1NLQ3mXkLh1LQ8C8s8I+0oGudNVGOj7BmteoG1NFg020zrC7KOg0wGvCYEtdBcDp6yNAp2sy7uxMVybKzmlCa5xJLXsGSCkCcYMxtjso6XEGWGyDKE0UKYIaLOMBfjtbNYCCzPQ16VKmbkIZoQs8wxkjGqaTCjNbJuGAaW4yKqFkLYiGqFoSeYrgtNg2oarKZALBZg+WBEz1H03/TrCzlxOI591eOwsC1AW2Rxh9ONwVV0oLhCztdjqFFpUE40SSvgZLT3qVflav78CcdRTWqWYcyzTY+quipV4NM8jqB//wwAACAASURBVBlUi5rxxoATd+dTjqMosJ11qZJcaopCM+7f5cRbJ5uvvSrrPA5RfMpxXGy8zDh01n94tyJvX2JVrxOq9RJUYDi8N/oeixe+SRLXjPckRdWQe0uu2wYzZ8hKK/6PTsx7xjFh4vELLeiMTY5uruic9dkUA5aGx4euQCcKp7ZxEou5jvjZzSmtoxZzt82T8Ca/qHd50I+QUvKsn1ALxWEn4Uv2HsMyZrH8Ovf7Obld0SpDFlsh7wdPOek77M/bZCLiovkWM5GQrSq2jj2S0Yu4riLrD8mTHkXpc55+m7QqiWY+l6MEOzaZXQ9p4gJ10cORXRzr36AdTd2xwM358JUYV71B0fbBGCGdHsuNf8bSqagdDxllnL8EF0LxUyfk29UGY6PNw+X3uBSCwDG4qAveyxt0aXGab5OpFuf1Pu/UBvlS038ccdEtCVILiaYquzSETI3rHNPhOLR4u3WLdhbQf6a53MiZWfvUukUuXiAVDUtKCi2phM1jd4uVJ0nFCEqPB/0X6Ty+zmnfoDXZwOr1KB2LVEeo1KGODQbyT5hHGUY0whhFmAKErzGVpggihO1Ttr6OHG0xUzGl62EGAVVVMawtyktJ4kQcbu+tS5Wra7Su1xzHRe1SnpfM211OWqN1qeJ9WqrYlsWLVxzHrBVzEl/HttYnDiUlM++qVJmtkXNR+tj2b/ou/8J6HBJQz0W4aEmwHLO7/IwCsirXeGyWsmF18fSIOFmwu7r4/y25FXnBwLtqjmZzruf5lQLyU47Dsmy6egOnchmcn7Fbnj1fIEqTZB0LKBUtdvC1x8bRCUu9wvcDijxHowmuFJCReQ23EWw+OSIKTfIsB6E5efUQjycIpwI5gDIivLhEXE4xe5okPGZwHHOycUS+W0PTR4kGlRzT5P8JMwuJnnToj3usBudU+gZG7aLNQ2T9F8SJTXS0gTu3aNFG1v9Aoe/hp39AmLzPf/vjB8S5RYXkH19ZQmryo+0zWum/wmxusH/+jDt8TEnNKGmx+zBmFr6HdsEuvk28ukG4+nsi64xO0tA/6yCSI+yw4taHN+nk3yMoW7Rnf0stJ/TPI0ovxZUW9z7o8uDFS1D/DQpNbv6v9JYl1x85pJ7m5bcDTjopfrWDV3Tpxhlfrv6aJQWjhcG5L7G0Re5qXtCvgg6wswmds79l57LD5nibuT5C549olYqNs98haL7CrSdP6Gz/JaKfMzx22e4IXvnIZLIRMLr8Ln54wP70ATtnH9G4DU+unbL5sUckF0xfrfCzf0t3dsDrD/6S3bce88Pfr9g4MzFdeOtWzqQrqMx/T7TcZKP+K249LXk8qnjjY4MnByUXocPt0wH29a9i1TbbT37MxfUzdj4a8vLfdbEdi2dbj9lZDDBUB6oMP/kxfvo60VkXpa6Q8yyjd8VxRFnKfj4hvyJHfd+nyAs0mqG3hZuH9FTJ3uXJ8yW3dZixged6dIsYlzb9bMzu2RTP9Wjk+mQRhSHJKiE2181RIUukKflNoxxfMMexZjbAQpsC6bZRpkAbJsqpkJ6HNCyUCNGFiXZcVNBGWjayrhGf5G1YLtLw0NJCmx5NaKGMtfYA1icOTAtZuSAtpOuj7DYgaDwPiYV012HFqnTQ0kTZIcow1r+DuX4kN56HMhxUY4MG5cU0gYU0HLRQVF4ETg+cEgwbbdnIIKKJG1QIyktQYQu8DIxi/R7DQAVtymCTpRlhDQc4ho+IoIw7iNJFxjHG5j2cVOLLPoxMKgKC9j5bhxso36Yjdnn4tRihAaFY7U6pH6Us44ZpHNAsXQ57Ix5vaypdMtUeFwNJfPs60nEJ8y6N6ZG5fSaRTdMOINxj0vopjZNysX2d8iSmFCF5NGJlhLilR9rOqZXNcrDL8bZBPnNYJydscjq0kNkGMix49w9u0mw+wZxuUMYdEsvg7dE9MrfkkeeRdBLiZUzdXvGyv8Oe9DDDGG/nGkYQkulN6Dt0exq/kujRBnLhI8wBrcEek70Fh9/vsoWPb1UYfo1R+RhYBIOQd3d8ztoh6Z0ueWXje4quv8AIe6SdFk/3X+Lp7Vvk25fIc8HZ0GTPO8MSFYEVk/Z8xrdf5PxuSFVO+NnLGyy9JdqUnMzavLyIkcqmvHMPf9RlaW7xoLON7dhkd0IuL2Pq+x6NECThgNTyCaL22i3kB0jDRisfXVto4dKELaS9jn5oXA9pumitkZa/jgdwQLqt9YDB91GmjRYGjeugtIeuTZQdoCxJcwWAqaahCQKUNtGNC1I8J0d/0+sqX8iJo2nk1bRD02hN5biUjsFk4K9Llc9txxYsKotaCnLbZDxs/xdLlVXh0tSSLLC56DuUZfW8B/LJVCWdC+pGsoxDxk50VTY5FEWJ7awVkNnEoCpg3tlg/IkCsirRev1eUVYUUxtHSGa9LSahQ11XSENSBRGmHdC0CqQZU7s+415E4naofJPcadMMHYooJDBTDO1gKom0HTzjS/QLi44TIIfQKUcI20XlNpUVMFMHLNwBF50QR7uEIiKlzTh2WHpdTqyYH1931wtLQlNEYwx5TtJq4zUjhPAZDgw2Wwptaiq7ouo1TEOPeGUg6SAchxfUiwgzI3NhVHhU3le5jBrSe13Esos2HdrdV6ntHE+ZDNslljawt3024zahsYHQcFf+HoWpaA8sslixM42orIgNM8DFJRBtdtlhZmvCyCbwGmJpY+QVhh3hiBjTtQjCWziFSdm1KbY2YNBCJIKyvUcuA462OuTbr9OxFFFuo+cWqxhM3+Rkb0R3HHG0dcDjgzbPNnN8T9Bs+qShYLc08K0uhhfitm9yulUQiOscD9bhvR37Dlaj8PUmluURu1uU2gSjTWfXpmV2mPRKescu4QdtlNAMezvMnA6FjMhUF6u2yJtbXLYE6BbKajDU6+TBPuNhdDVVWZcai8KgmpsUts140Lnajv18qbKsPeqiJvEDxnGAVJ9O/oSxRs5TJHUqWMUO47CLbVvP5Wep51EEOfncQiXVWlEif0tOHJZlPqdGLaFwi5SgathMDtGf4Tj8q6lK3+ri6hFRumAr+aRUqT6XANZ1t3GqmDifs1tmZFmGba9LFSkllmXR1hs4lUd/nLD1mVIlSZLneRwxa45jcHrMlk4Igqupiua5VyU0r+E0go2jI3zfoChyGrOB1hHHez/BsgVuvcdg2eabi6csxzNsX/GL5pDENJiHR1i1gZv16TUFW8Gf81PjQ/7gb2IEFpXbJe3fpFMN0PoGqv6Y1oMfs3l6C2gRqoCWanFmv4WTXCPIIvbPT/nue5cYpklqFfz87od0HjTMusdEUxfDvkmSPEW8/z7x8oigKGlNDVZfzdi5sJDBn6DyG2y89R8p7Kc83C8ZPLL5x+9lnNgNt+53GT77UzpNC//jH9KpzhALn9mNhM7K4ZW/CvnwT2vK6k/RJowXP0Q1OcGJye4gZDA20IbkRnqA34T4MuH64m/xbYOwiFh4BXHp0qpdrCDAm3yZ4fycjeKveeGJx+5JzDSa0pvOcAsbs/4m5uolEvEhTxd/S+1ovvrzHpsPPURckQQ1VutLdOevsP/erzj/1a/42e9fUAUx4nGPZeyzddmnbG7BfIfg4yf0WFLnOfUgp3AdDl9/yOogY1X9Cd1igPOf38c9EtTDc8RHA0qn5PGXn+I8uEuevIItK5a//t94eG/O7/yqyzf+aZfpMOBx/xm2pzHrf007z/HS/8DBxbexnvWBT9ce+iLGFduEecZ2OaaorpDzqweL1pq+v41ThHR0yfbk+DOlSv6c42gXa+S8W4zZupheJYDJ53kc6WpFaO5himgtKjP1b8eJQ6n1L6q1XkthhCD3Iy6i/c+NY33fJ8sztqRHmbikTpvzjo/l2NTVesmNKwXkQsVUC4PE7XHS763dsuanyLlhGKwynxqYtz3OhbvmOByHIiyeA2Dp0qesDabhJudWjR/4Vz0OnnMceRZhVopxa4dpYFFVJdJQTFsNnfF3qfyc0vHJbYOVjrhsa9L+nHbaZbFbY3GPwbJFFfRItWTe/j20s8njXZvLgUkRhsT1LsbSxThvY9U36SYmgT1CV2s5VFPbOOU9RL5NZflMwj4fBj5CCAqr5vCaSzBrE8gVZXgNo2qRmj2KzivMouuE2mbQ8dCtGUuzhGyP0m/x7q2XuagPGLdKjAPNrFsiDJOnGz3G8S5aBVz0fpdn1ox6T3J8I+HeA5OLLRvpCoToIxRgfhlJxXQAzoXJLywbc+xRNgFvEjJrDP7GuE05qbEWLaYqA6HYSdu8dqz5UupxYh7wN/IrTKsuXTPg49WS+8sTatPidXWXW0HMWe8ai/ibaAN+fmOXVsen8Rqi5ojI3CWpWjwNb/B238RwM5Kwwe63aNUabRpYdQctbLQTsTIkyXCDJNZM45C83SX3Cxy1heVFuNdfY7UnSe09jDgkiWqK7V3So7vUiU1pNZy3/4R4dcZq6HB/P2S5W9Gfx8x3JMpskdseifc7nLZu4Iw6a4mS55KlGf3apso8MtPkoh8+TwBzHIeqXnMcC9GmahSLwOXMM5FS4V99uBnCwLYtlnOTqrRZ+APOvXjNcUiFvNprSYOELIuoGhtZGb89uyqffq1/EArMuiIoEtSVDqGsSjxdI4oCF42lbGwqgjzBrE3spsGybdCaoixwhYOpHOy6oFVp0jx7jqRrrbEsC6cxMaSJXZQEJOslNxFg5AmOLNFKYUsLS9t4VU7QFHi6Xq83Az4SWRSYMsBUa1l2bNnkeY40JRsnAQthYTcN0tCkjsmjoEXqaOTglIFs8eDgPoWVc+3tl7GbgkDWfP3nK97dTbl/r09ieyxYcjOtKFIDoS2kECSdgOg0IolBqQqZW1ReiekpDCqiOmOjmGGYBolVYjWXOHaIETcYU41oFMIVDOwNHvgJOCZuEJEMFyRdl/oQpNDMo4opDl4Zcrd5icvTv+GdG8fEWUKc38FvJJ3ZIXN/jFXYZP0VQjh4so1T1RiyorEgc6cY2YrBGVipRady2JiYqGGMX72ADDNKdY5QEmEqpKEphaJITAZyD8sQaLEiC06o7Ta1gP2TFsfdS5bDFEmFokaRo5mALdDegMCXWE7G0UFDsVCUU5cz3yR2fGIlEYmJpWsuNg3GI/juBx557fDQ7vKg63LupfilST44R4s5dr3CXzYk9pLVB0e870pW/YZ4GjAt5hxvPuYVYwNbdNGGpBUXLHoNBTG/xkK4IYg2hf0ILaERAmEmWDolyNclhNd4UBR40sNULpaq8LIMUVfr5qi4atBrjWVYmMrBV4qwSGlks75PyhLDEHjaw21sDGXgVAWBTvGUS9M0NE2Dj4Qiw2ocTGVg8Jt/aMAXth3Lc6IT1mE+TlMRLqfPU87tq5RzM03xLYWhfOwmI5ITbGe9Hbs2tQmsssBzPQwpcJqMYJ4iivz/k3Ju4ggTU3qEVU5UTNZCpiqFq5RzlMbWPobS+NWCiM8oINF41dpW71htzAbCdI6UAqMokGaDEWYkzpJMzEFlGLVNnK/Q2Tm5YZCGsCEVajbDEMe48g6lKMiix/T0Cd1qirn0OA0y7pyn3LzsEeU9NpaXvJz/jJff67IKKrbPLbzJOT80Thnq1xAyZJA8YT/5JWaj+eXLKzbHJa/89AhtH3Fw/PvYnbtsLt5n7/El5t4FN45isCzm37ykEQKd97Aqj+70BGu1AAW7b60I/ceYm2frHogqsaRDZp1TmZcMx22eFGeklsPUsLGyCU5dYDqa19pLHqZPcVeazOtj6Yi9yw7KkWvpeFNw8CzBKQSZeIISGVJLrj07o3tYILbuEooF4fQj9h5U7F10kEpy2npCkZYcnAZ49pfoz48YTj6AbcUf9k3OmgWnt8/ZKhRxYtCRPVpb73F7/oCbpzZLN0W+75HeLshjwU46ot003HV/gqceUO9J7h2HtM4lD3zJmTZpkWKYPtsDj/PgGF3leImFIy6gOEQ/vYM0PRq7oXw24cR9H2d8C2dh4QYBGo1sLxC6xJAlZnOMlcdEy3V/IVYxZpLgixhTRNi6pJ3NyfIcBLhlinVlcotCH7MRWHlO2IxppCQKQ6wsvdpVcXGqFhY2XpMQ5dPP7arEKkIslzimjylMxBdw2oAvMAFsHR1ooA0ovJjEMTgarcNzhRDIplkb28qSQWFQjCUrJ+TZ6GCdct5IDPPT5uhlZlFOKhZRiydbPlX5KVmqriLgZxNFuag5Hw449HfXOK+9zuOwr6IDlxeKXqE4H9zl0Fsj6WvcV2NfgWerC4GoGk5HL3MZrRtXSiiqTsnKXGCFC7Q1oox8Dnf2WUZ3qKMlEoH230C6Yy5Fl2TRZuxq/vyFLWa9MZYBTZyAK3kYCLazmES3qNzr3L9hc7TTwkpD2nMXZcHRzoLN3KSQPX76hsf/cmODlx83LOKGWdvg7a92yFtTJsUWnt3lVy99nYdfPmBhnXB03gJb8nD/GY6okY/2KOOIxeiPeLi9/h9VrRGHN15FRxNmWxHj4Q0oLOabP2ASlSgvYtWbUCqX/+c7B4jwmOJ0A1B8nP4RK7+meEmTWx3cOuBs0GNglXznUUDpdfng5g5K2dSyIG3lKK1YxW1a3Rb7KZzHA2aDf8+7r4x4UrhoNMd7pxA0nBRd9tOQ+cChiHaYOTm/XAxJ7Ro5ywlqyYU3JLHapPUbnBsvUJqas7iBbZfKWJHYgjNvl07h85/3v8FbGy+yihSTjTZeIyhchRANib9DqE0uZYeJu8/lXsPwzEeHOY39AunmiGbhg6G4vPElit4eebVPR/hc2CWVbRO3Zmi7i7QUdfx9Lne3ye115qfrra/zVg7FRLNyYh7v7FE260g/x15fYxrNzcKm0AWzdo9nnW2UUjhX7p91dKDF3YuKYqWYtFsctm5ifaY56rkeZZ6znGjkIgcF64/u3+zrC8ocXT/ltFYIJfHyFVHZsJMco4wrr0pdEYZrtd3Q6uDJ4dqrshpjX01bPhEulWXJwN3ELULa+ZL9NKUoCizbxriSWxuGQfdqyW00vmC3OAMBnnvlVfHXJ45YjvCUx8bhKSvSdTMpS0GD63movCQyr+E1sPn0BN9bKyil0WD054ydc1ajGWb9h0TLmJdX73NipZyMMmzT5vz8jHx3QbkaIbKvYuc5vffeRfcv8JIS03nE0w3JxPHoHn8HEbkYzTE7D3/Go+tL/sVPdtk4NRAI7g5yRt19guAOVv1rZt3/hP/2AGfaptmrufbeJud3D1kGrzBSt5Hinxid/j3oCYPxG/SCiEz/n8hAUvG7uPV17iR/z7V8iiEEX/9wwI82DnlnlBCbLrH+t/TrHjfKH+N7c7y5xTg6pl20eend25zcnGI336NRNcXyh2AY0NiMpiFxHnD7wSZmD4LidVxnyu3Dn2GnikymTIYL+mPN/nHI106/9P9S9yZNkmXnmd5z7jz6HHNERmZGTpU1V6FAggQJAmwKDTYnk0kyLSQzmelPaSfTQguZZG2SQVI3h6YAggSIRqFAFGrIzMopMjJmn93vfM85WlzPzIJ1L4FF3VWG+fVwT49zr3/fd973eWnt3WU/H/GtZ/8P3/p4E1tamNLgYz3k6MqMTnUH1NcYnH/Gnv4Jcyvl+o9cpO4yvZNy4yPJ5I+/Tmv4PnuTf+IP/ulXPLha8Nd/WHPwiz2O367YyLp4lYNVb9GaPMBxPyH1JhT3Q6KJz+zanK7RJzj/HiKC7YsHdO9b/PAb93n33gZLNwdxyB/9xytEe99AiZK6/F+p8py3P36DOx9t8ON3S7Rrs9g5wyz/FUGZE8z+PRvPX6f7dBupJHEUs0yWrBPhsUWcplwtpyR5BqxEiGUTUL4Z7OBmHh2Zszs8XZnkmqq4iYC06RQxrm7Ty8fsnk9+veKIY+azGS1jF4Pg167H3+TxW0cHaqXQaJQwqIT58sZRGya1YVIZJlIYKEAJQWWYCMOkFiZKNBVFZRhIYaARyNU5lWGAsdraNTSGIZC6yXGRwmh+D6zONbGECUKjaDD0tTCoVudVq8cMYTQaEyFQ6NU5gkqYSEMTlyV1OKZTKmwlcZnz7Z/+E7/aX3J96uNIk8OtnHteiOlXhEpTiopb6RhXRNy7Bt3+LrcWinE/YHCti7NwMdb6eNc/IPAe8uDqPk82Q0I/YGRd4GVr5IZP6sRoPeB5+4AoD0jVkKkX00q7tFSM4Rlo6XAS1GhzgHUK5bAk3bxGVSu0DKmlzWkqmKYetinoLyPuSXheKhyrJK0lVaHJF4qxVWGZAt+KCYwYEdvkcYg2HQwMLCdCCIFrW7i2x9ayBdEQQgt7UhFnGt8/ZdKTzFvgpZL/6sddjjdKbAoqWzEYw8O+ZDdsgyfoHpmciYpLy+GyFXGrMFiYIc96HTLX4ad3d9i96HKxUTB53+WaFzFtRRx293jwNY8v3j7jwf4z1u+HGEZKf1LRKjWmEsQzE28zIsgrYloEtk+rjpn6DqaKqY2S4cYVHqSSM3/Ko7iLaRpIo+DSG3ADF7SFrdtoX1NaHS49izcmNfe37jHrK0q3grQEXWIv5mi9TS1MMqWphEmNgdKv1nktVrGkq2sDoV+uc4WgFia1YHWdrEheq+uluRaaNSyEgTSgNvTL9a6EaH7PVwnk8yLJrfGP6IZyHkYM11qvdlXqirnTlHDT0qQaQWZ7XK5vYFgW8suU87JkljtU45okDLjYbGTiL7NlV7b65Rjqec2422HoNVthjuO+alWkIh0Jylwz613j0tPMXzgT4aXkPBuZ2KVkvHaDUbR6XIAO3me68Tl3j1KiZICpBfcO3uHxboEhDM7bivs3NdOuZuMkxlA+0ndZtL7Fg27JLIyZziJEPaEalayrLrvKZ1bZnI0jjrahfC1i53kXTwQoy0cToisPw7qKZRjosIeyHXSQMNsZML72Gu3aZXMaY4m3MDxJRU3S72EnFq2szWitxEh7KKtNEX+A0zNQXcXzgU98bZ/t9YL+3MQPN9HKprX5+6x1cmRk4vYURtcgc1zWYwPvaR8hYb/1PQpTYYcCr2XiRS6zGwWbCwc1XYOgxeXX/w1LV+EvJfPLlH/39YgsDjktQv5y2uO8E3Me/hGf7e6yk0RM92tO+zOGbkZRDZBWh7zlUndisHOW610WosewP6MyXW5JG+mElK0Djm5cZdEryN1LHt7sc3lDszOc88HxJuuLgEV4laXbonZLstDGxGT3OZzsV5g4aO2SugsWg4C4fgcjdqmEpPJ6nOyvU1YxQkAa/TG1O2fpX2G45+CYNfP+Aa2swq02qG3JvP0dTm7dJm43ArAXNP+NXFBNDFLb52xr4yXl3HEapbTWDeW8qkqW7RaXrT5SSRYvWhXRENGTy4pqCYtWwDDebijnq+zYhedR9BrKeVUIEA6G8RUInX5VcTS2eqUVhlaEixFbs2coQ2CaLyIgI5bLJQO7i6s3CRdTtmcXL2cfL24MRZHT83ZxyohWMmV3uSTLsiYPdtWqmKZJW2zhVC5rlwlb2QlCgOc1e+i+35jcGh6HR//omG29XLESErRu4iJVXhDaB7g1rD89wvOaCEoAPwhYTL/g9i80sT+grhRZPmZejBiMQyL7gtb8iLP2EHF+C11soWVG6+whp9vHbF12mS+6dGY2w4NnRIc3sIJ9guklr31xn/HXf8LEX/K9jzv80T+HPN4t6Wy8TbjzLvHiY8LF3/K1TwZ0ZxZfXCn4zg92eTw6Jzz4GlZ5G3/xz9w8ekYwFoSZzxtPfNbvLvnknREb6s9pF3u8N/wH1h6fc/9OyTc/9DgZTPhJa4R+5tF69j/g0GJy/L9znJ9hTx0OvZytM5uNzz3K7QC1/G9wcji5/J/x65ytSwsU3P6hydJXRM4GrvFf4jkzLk/+Fx7vFvzVD9vsnYWsjRzsyibZ2KVtfRM7G+MW/ydKbvHBL24gq5JleITSGdce/SHGYIf++D5rw7/HlJo7n/R4/8EGP1SX2BMJO28SLn+XvS8+YfDslOyhYPgnH3Ljs3UMPeLgYkBgfI8g2WZD/xJ3+xf0ZM6VZ12iyuDqcU5ihITJJstIEBb/kc3ihEnWxpxeReoavfecMvsaytzGVIrE+j6yGtI//h0G91zqliDsTanCHDvvIZ0UVf4NvdMRg4cbKCWJopgkWTY6DmOXKEnYy0ekeQqIL4kQNevhHm4W0K4zts+PkbJuWvpkiWGYOI5Dq2zj0KGTDtk6Hf1nW5XI2scREUKVKPMrYqs3jFe2esMU1MIjtxzmrStN8vxqxpG7LkW0onstPUqvw6zlY1gmsm4iIDWaoihIVQs5N8idLvO1PmmWvbyxvNiOzZYe9RLmkcOs3ThnC7+ZceR2k3FRLCNkZZKEW8ysktxxKePG0lx6PirLKZIAx9As4p0mAjJvbhypY1M5mtOrPZKiR13XPNz/Gue9MVk3IvR8KuMBSecRZwcHJOM+qV3waLfNaW+bQAeYnsW0HTDb7TLMBlRpQGlsc+9Gl7OdGlPO+fHvR4R6jZPNkl1/k0jFSG+LtPsOwysdsqWgbPvce2eHJ29OeFusoes2KnyN09tX6LWAzOWnS5uL3pzl/ozyF+ukrk9xvs+TvMeP/IzCc/msHCHVPssoJInWAI8yeoustUulbTxVYXgmVhAgHRNltsHUWMbbGC2DWWCSWopPJpLeCBbtGHkZkTsOhfdNlsGSk+4Oyoh41K1wtc22EVMkPpnjo4w3WG53Oev2ISmYeiYzX7D0NkG0GHYPON4p8Ysun95qk+7uY6gPKTZOKPxdlOHiL3rMzBIlLE523uaj9/tsJHNmZovE6bKMPIR5wHSgyUVB5jjklsH0Tszt2R5Z2MFUFdLeZrLW4nQQsHm2h1EbyKBFunMDfaYQKKR9G09fxfCuIbdcpK9Qfg9tF1jEKMdCBXfJe7eYbXZQSlF4HkWUk1QOdeZSGAbjnrvicYhmoFnkaA0zHVPXBnnkMXctaimbzl7BqQAAIABJREFU6yRuqlrHdcinBnXukHkDZl6E67jUstmOLT2fPOiSpxEUAoOvEKz4VVp9jZQKbSqE1uiiWHlVDHRVYZgGqsjRmKActKrRZYHBKgKybj5YXZRoUaOVhZY1dS7RRQ6rikPVElmVIC3QBoZW6CJvIiPRqFXFIJRCyxqtQJUFWhYYlokqm3gECeiiQOgIrTS6KpF5jVq1MoYpiC/bLLWi1ppKa1JDMJcVWtWUUmLlNvbSwktrzLrC1AWt2ZTAm5Gu3adXWdy93GJ2vOBgNCWwbrElh3zvyT12hORky6OrNV5b4LcFcmCih4KOZXFHhfS8LWaD5jMuYoV7pcZYVjgzzfVcsVAzPEtg5pqk41PES1KVIAqJJSyy21c5pKDffsrlm5J4ELPhp2w7DllX42cWju/DpkuET2AbBLZPut0ltKdYtklla4KWiz+xMKTHcK9mcfsmx9WMgTDIipiFzpjriNKc8HTgU7QGeEcL2nmCv7DJPZPLIEIrh6VXkMQmx+sBaVuBm2O6gK5Zv5xx7ekUbVfceJ5zcDzlYRv+7rvw1j2r8TW1W5Qe/OTdS2aR4Fba5qx/wMwJmdUxqXY58gP2nlp8cnPCMrrJqHNBKXyEMWCBjW1DEfd51hlzORCYl2AJg0xIZDxBnIWYCAxVwLzm0Iwx2x5122Lct7DcIaUpKCyNEjl1kaILH6UkhmWt1hto5QMSUdeolQBMao2qmp09044a0WRVI3XePN800UXeeKu0RFUOKAtdV+giR2qFlhItZRNTmucgfbQym6pffQValReVRjPjsLCMGltWuKqiVw3RpsAwzAYdWAd4SULbqrGVi19n9NXlS3fsq1alIHYtbBkRyoS1RUKWZavXaZSjpmkSYGHVLnGa0C+GCNHIeZMkeRUBqW1s7dFJZ/T1Er9KCfL01yTnrhHj1NBZjrFkIzkH8EqfosiJtYUjWlBXtJcTYuuM7rIkqHNU8Yh4/TPCeY5T3sIXSzanD5mLY/zZBbc/d7kxf4ZdPMcebKPX1+iODln/4d+z+5HN4bU+n98q2f7ZmMXVBH2wxK5inPSYQPycrb8+Zle7PD9QvPaPPf52/QvGg3fIZMhZcZ/s8jlbpwPWk5iLvS+4d+OCZOqwUAdYyQDz+SntWcpib4i5bDFN7nOZnnL94SYieQszt4mffsGk9xhzFDK1LNaXu7gXFdqekcoFVm5wNL9HnG/QOupy2vmc7acuCRP8yEYV13DEjDj9FHhKv5ry+uiAjfOQiT2n5blYqocn57jqCXFqsZ54XLYu6UwTLDL2jl24eoAoR2w8fcTRnQFO6lPqkL60eO9ziVVOkEgWMmNEwZARVXWfaGpgeRXhsoVtCuzCp19nvHHh8XTzgvbaM6powd7zIa8/K2m7d6gtwd6opN77CVq06E5NOjrAHv0Ld76YEMn3wBDsjKckrYT12kBOz6gNG50cQnVMe3aD1Jizf/wRvaJNZ9ZcsHY+xytLWiLGIcDTGf35iKD4suR8pePwbOw6JCpzBtkQKWv8KsVfuWMdxyEqWtjaIsoW9LPxr4VOh3WGu1jgGx6GCF9Kzn/Tx2+h4tBUVf3ygq5ljRKCZavP0frgS+jAVxGQ/dwgHyoWTsCzjZ3/dDhalQzTJldlGsU83fQoXuSqAErrVzqOec3FWp8jb/uljiMvimYeohTzS00v15z3b/HMa2Tm5erObzsORl6yHAqMUnK63mEYNSY3WOVfVBXdWpNeQCUlR3sbXMQ7LLshruMxbvXIejco05DKiZCGy3LjDtlgD2FbPH1bM08sMCas2W12FhucXAv5t+/32D70kZbJ46sVfy0jjraW3DXblKMB0857TDo7fPaOj13A5bpk/gcDjjc/4EAFaKND5v8ex7sFS7+PqwLyOOWoN6HuWZSTHsugy5PNd3mwY7PsLnCkw3l7m0hXK7fwFrVlM2t/m6h6F8fy8EKDcO4QdgLKqILFOsK0cM0/RdghRuRimtfJu5toagwDhNtGeCbu5rfZFDV4Hs+NgMp1GcY1KoC3Ri1mgY2t/5Qsdnlw0OZobcQylmyca5KgR0sMiFSbbHsHHMl8I6SlPS7WK1y1gWm1wPTB3WLpJEyutBHeLU5ub1HFXbyORzZWFLnLs957fN61mfRe4yPlY9cZlW+htgfcyCw8u+ZJf8DFjoVRWtTdDUZKcLZ5hZ9aa7x/6CG0YBL/OZWfc3z9fWRvgQxN8tZbdKxjpH+F3MsY9/97tN5hcWsdrcFefRG+0nFEPN3ZfdmqvIqAhOuFTXFeMO50eNZe8Tgcl6IsMEQTAXn7siRfakbtmGfx1ZXkXL4yxGUZ85EgL6BMmxngV8TkZr00uZmmiaE04XLKdn6Otl5VHC+8KgPRwq36RNmCnWLy0uT2ArJaFAU9ax2n8GmVC/bq4j+pOCzLpF33cXOb/njIdvWq4kjTBlaspSaq1/Cky+Dsgh2RfinwF3zfa0xuehe30mycXBAExssZh+t6FGVBS5n4agezqtg+eUbWPqI97tKN2jzWf8PSfsTG0Rrx4q+QIuPu0YcsrCGtPOAi9HEXMUfXNK99FmOFJbW1pDw95eMDxbWTm5j5kkXUYhSdU2cKZcTk5pCle4+JdwMDg4U/4vaTUzoHh3jGDQx1ndL6jOjZObe/OMB2HCbtJWX9gKSscfJvEie7/O7HH/L67IxH6xNqVTD5TsLFluTG0wG90fdw7Zjts3/kQfsJ/tCmPal47Z6iPd3k86+XGNVf4mU23eHfcvAgoK4XXKxNeO9nMbMI1q0tIv1naDK+d/xLTvI5w+sGN+YbbIZrdKsFt9U+rtmhyyXvz74gC0x627uMNk5IrSlXfv4umVUj6hn+NIHZz6iCBfVsE+dsA7+TYnnNe7KNEE+cY7QPWXcfYbDk1skG61GL/iRir7rG+mSd7zy5xy17xPe/84hW5pG5FtvPQt5/tEe/f0Dd0lw/PsR446+5+7jPO0+3edg2sZcX9Ic3sMrbGBiI9O+IdMn+oUE5SqnbDss0J9k/RKmr2FlOuPiE3mxB73D0iseRpQx0iCvXiIqM3aP5f8bkBgNnHafw6MxKdmYXTcXxJZOb4zi00wBXxnSrKTvjGa7rrCIg60aXtFwSqQ1cApwVrPgrYXJ7MeNoQD6y2btWElkVaN1oJeqyoDYNZFmizBp0A1WVZQlaNchBu9Gv12WBEjVaaRQ1uq6RVYHQzbRYKYWhLbSSaGU2/WFVIBAoy6QuS0wh0FKhWelK6hqpm/dQlw2aXlkWsizRpkQrkFWJqq3V42AKgSxLpDbRQqGVbH6uK2RZUmQF5axDK2qj7AijtNCOoNCa2lCURUbaXzRDq7RGZwn4PdS8pq0E3mRO++KcjDntk5rYG+FqH0NVtOdTts5OePN+hZ0JnhRL/LKLnywxvRq70nh5QTtZcuP0BMcySScli17C0nYRQpNaFZOq5iRQnLX76HaO1hMypyK1CqxC45cKb7bg7ucVvTMP7Uj2T2zcNONjSyO0xlY1cZbj6ZKP3lnQXQ8p77iU5xkq8ShqyTIV6AcRs9sLfvnWkkXyGr3pOoWQCLPHtdKiqNc5Ot4gt4ZsDnMuiympnxIt5wS4OEFEOy9p1TkLpYgrCLQCY0hlzdCqi5vl9FVCICd0LiWWXeF6Bcb0PrtfdPDW1/HyhN1nh5xuPcIu5zgJlCW8++MeB6M5rTd7zB2P4Pw+3fkCqjlaLli0Q3RZ4JUFWkmEAn9ks9hOuPCfElctdCXQdYlSNVqrRrekarSskVXZ8DSsZg1JHLRorom6LKjLsqmYV2tUa40yKtArdoxsbPH1CrXZ5NmIZp6hVbOGKVCGaP5dV9SlhSwLlJAgGg6psr8iFYdpWhgroZewHEorJHMMzgadFTrQoK7qRoqb52yWFvkIEtvldH29yVWpq1/jcUxyh3IsWYQ+zzbcVxGQKwKYYZjMp4JyXjMedDl117+EDnzB41il1Rcw6l7j1NN4q3ZJ80rHkY4tzFJyObjVtCpl+dI9W1YleQ3Z0KB2JOe7A3Kxg2dqlGmRdRyS8C6+OGDWEwy9kh8dbDEcHGMuZ8y3JNHEIpRtRL+LQYBrKzbzfYyLXXSgybY9wplBub6BMe4h8JDeFRYDm+l2hFsKRnsJqIDJ2h4y38ErezjqDUR8k8MDwXCvoLIr7t29Tlz4KHMLw46RrTc5GWTkgUlrYRGrb7A1g+O9Nc6yAZ3K4uPbf8mzdkV/EDD1Ex5cb9MuI87XTpHnOyxjzbz/Z9z3XUTSYXiZ83+9saDb65It2mRP2iSW4mdXb3G8fkESnTLZ3afQAbWxy8RcozqpmHsWF5vvYyD4x57FeO0WranB//EXCf/68TrbI49fXd/k5693UJEiyGMODxTj4Arn22PuJFcZJV0+dm/x8foulbVEHE14EnT5ZLvkzOzz50WXyLb4+63v8kV/jivnSM/GtDOeXxdc3or4lruObRr8+Hc/QNWvczbw+dD3MJWB52dUYQtd9tC1xAnewZUFy+02kw2LK2dtbL+mXW0hLA/HMMH+A4aDPlndQulXEZD9XFBMDBLH53Rri+JFC/wlHse49iguSiatFidxt2k/fi0C0ubusKJMBNNWwGm0g219SXK+ioBMpyZqUXy1bPV1/WrGoaoKt1wS5hXb08Nf43EEYUCyTFize3hsEi2m7MwusFe5KubLXJWMvr+LW8a00gn7SUKapli2jQCkklimRUds4pQeg4slO9kJCEHwgsfhr3gcYrfhcSTP2VGLl/F6fCkC8oWOY2P5jCAwybJmv/1FW9PSNoF1jaKq2H5yjlc2zw+CgPPiU0xnRDCyMct1TGNOMDpnP/kXNk4qno2/IBz79Io79C52sLZu0M9P2Bv/nPBcEHcqPr7xCDMTzNwF3uSbWJVLp/iUbfVDbn7UopsKPtsfEp50MG8N2Rh/l/bybTYnH7P5yxMOTjQ/6l6iixR5q2D/vk+Lv8DL9rl7+BPwn/Jos2D/aUw9mXPgSe4+arPBvyHWbYKt/xdNhX+xyyiewHIfKx/A1i8Q9Z+gaoOk/DFBOWD9k3Wca2Metx/gTW/gz7dw83dwRcL2YkoqHzJq3WPt/F3aD7qUxglr/Tewiy6tSrH19J9IN8cEo5yy0tw67nG49zl7p9+klb3B66MT1ne+j3cZcvOn11jPpuTxmJ+/OWH75HtEtc3B+WdMJ/fQz2e0Lm3GrPHpe0sGR9dpOXdxREhresTWYoZyz9ga9TndHGJftghbHQwrxs1MluFPCC/OCGXMnc/3SLyM+s6E+HgL23wPr5B4y3/L+vISf9om6zrc/vwuwy2bSZbhpX1aacHNex9SiD7RUQcpX+k4BqKFZ+4SpUv20iFpkSOgudhXsOK1cAc3i+jWGTvnz6ll3VDSv5yrUrZx6dBNL9lRoyatXkrqqiKKIhbzOZG1j2FEL/Udv+njtzrjME0Ty1QIZSD9kDy6gly5Y+uqAt8njzMK6SGXLrXbJm+7VC92VVYVR1lVFLKFWpjUbo+k26UoXsUjqBWPo0xDFIKy7ZJ3GhygdlyKOGviHZWiXobI0qQMN8itbvMeVmn1ahWPUKcBqtIU8Q5JYL5UlmrXpSxKXCWolw3OLRvskMumYsHz8IOaepiyiPvI0kW6EWnbZtGrSXfXeTK4SVC32bq8gj+2uZHYXKzFfPjGNURdU7DgybWPCO0UcQNUehXxPMIOtrhrvkn5NYt6Ingru0p9vc0HW4Ld6Q1E3GKtf4vDb/Q4MzTGTgJnGa0NxWnXQ/7qCmW1zi/f/BYP3fdZ9IYs70ZcdMa00ZxsRaQPdnELF3XzNcJAEog11tsprbyPU4Rsdu7iOjGGabDeu4vdaRPrNsagR9EK6O9vEY1ijLmLY4O349AaVOz0HYJ6D8+M0IlHpTdQpUneqqi3IyZ+QtoqCAqHizUPizdYxluoOuLZxoCjjetsp31qf5dTHyxbs3DHLP0rJLLF4/Ytnvk3GQ8mRN0Idz5juLHg4Y1rfH3RIyoNjgZXedCWjOwNFhtrTAZjEici9gNuZy6iMsD5fXr1GcqWyK0NajujCkbI/iZqGeIUAdr9fcwypVvGUEiS9T5VKHB1QBrEzA2PYfs1bAKsjVbTRgeNbb6sHGTqIi2DrOeTl0XzxbeqOLTWFKKDqqEMbTL3ClJJhN8wY4RhUFs21dxCFQ6VNyB3Q+SLXBUpMfyAIlxSZy1U7SAqG8v6SuyqvPKqNHvIzUyhFgaFaaOsleRcCzAsCtOmwm40F4ZJYToYhkVt8iqQSUGtG/19LUxK26CQivqFAEyYGCvvixaaUgiKFUcUy6GwapRpvfICGAaVaVFYvHwPL87Fas5RQlGaFqVlU8iVac+wqCxNIUXjZxGCwrTIm+RZhGljz6/QR4AVNL2nMCktl6ndRmUOqRGiKptSeyRKNJ+LMphJF225LOMUs77C057POWecGV1mjsnjTsRh8i4tJ+STvYJLb057ZjF96NPNBgzqgIvLDT7BxIoDPnUuyd8uqBnTUhZSCYxc0vviki11RL1ec2VeUu9kKFPQOq5ojXJcAdWixBnPCI9rngwS9j9PONuW+GcuqlCYNaipJD5b0n06I79SMg0TvNEjwofXMZMKw6ggOaJ9ccHQSMh4Smde8s6/+Bw4BXH7Ot16jjOo6BAgxRpPt2pc06a/7LIoQ4qlphIJVdiirNrMOjGDRYZTSzZmNq4Et6zo5QlXJkusesFgmpMJzWCScHByRgeHUDjcTA7ZeDrmb/4woeaYaycR6xcZpmMSu5sE0kZk54SThG4haC8VOga3tlib+RimS21YKNFj4bTo93d46lxS7l1F2Yq1TKGEgRJGww3Fp7Cc5lp4sc6VhRKNxyQ3LApTAQJtOZSq2ZEstYESGrlae1KZzfMtp5kbWg61IVCi8XsVlvMqO5Yaw7QoTGe1hhtf1lcmkOnLgdNCGAgFXrqkl30ZHdik1SdJQsvqYqsNPDmjl1+8JICZpgkCijwncnewy4igmDJQDTrw13dVLEK9jlV6tGZLesXZSnIekCSv0IE+29jaozU6paeXLyfeX9ZxeOY17Bral88xlwZZnoF+FdXX0haOeRVRVfQvLhFV+jJC8kVJ2fW62GUP25jTv7jALe6zfeyS25+yeSm4c3qdzfkBQesKg+Sc3/nwHpFKON8Ys4xneFLyi/cq5sEt7PJbbJw8RB4f000ivrgyxe3alHXBH/5gi+3rFSE118uHJO0nbAx9gq0jUmoOWxmGYxJYWxi2z9ngmIvzn1PVOaQhab2gFjGn4RIr3wQ7Rvqfse0k3FkfIK5l7J85rOuauhcQnt/EMA32Okesiz5qY8FtcUzVbwKl3xhGxNU+dZjw2u+dEUYzvjEoic0Se1eS7M7oBA7hp4rNXs1fvZeSFGOqeswkKjFMg8A1ee1knxiTTfMp//rsZ3iTFgfTgN1nglhbBNaYtfSbtAyHW4v77Awf8lSWeInL+Z4gaM35phWyV30L0+ljDy7QnUta1x9z80kLZfWJyzZ1JFGli72IOVAP+OTGAvn5Bu5ljDSGZPU5YtHGCFuIGqrkHrUuMOY1TvCY7qVCOjVhKXCKDo7ICcf3cXVEfNpetSoRSZIQixhbbOMVCQM5Is3zlzt/L9CBLX8buwwJlzm96clLqtfLVsVxCYoYmw5hMaQ3Ha9alZq6qomiiOV8jmfuYYsIQ8kV5uI3e/yWKg4JNPvHNZrc9Vk6Ac86TQSkIRqTm+d55FlOv7bJpiZzy+Kw18Nc7Wu/4HGUZclrVUA+VUx8l8dr9qtWhVew4sncolhILnoxh9aLCEiXPM9WodOK2cSiVwjO2vscOvJlPJ+mAReTFSznPqKUnHSvNya3onyZ9FaWBV0pSKculVXzbKvFSDVlprcaghmGgW345Kc1mWcx22zzOBbo1CBpD7g3KOiVEdeKNo4KWGwOOF+7w5FZsKwrztqavVzilArhdjAYoOw3mGxuUC9N5oOSZdtgvl0RlB5XWCMl5qzc4lPb54vQ4pncRhYGMjUYLhOWxRaFbjH2b1F2rqGdlEXkc7I7xpASVzlMuleIsPGLb7Ok4iNsPplknPcdPvg8ZOyD1L3mbyJ+lxSPxMmx5LuY85pxBP98J+S1UUiCy73zu9TPK47eq4gLB55AmsM3LjaIE5uL3OWnP3iPaZRTtDXTdoFb2BjSRJR9uk7Aae8uz3s9upWFuaMofAvp2RxtJ2wN95jPOzzv3+X5/i7SFNz/ekEWKy43a7wLl8HJDrHwsJZ7JKLFob3LaM9g+9zidu2TaoNadtGFwyP/A+S54LLrobcClHUFZU852xig0y6FZ0Hnd1B1zbG3Rm6tM5bbKFMha8jKkMRwGQ7excBnbPoopV7GH8SlST63mdsuT9cH5CvzZBMBWQGaAxmSy4pRHHEYxsgV7DjP8xU60ObWWJFnJqNwm8NgHdt2mp2aum6+CNsJ88UqAnI1NP1NH78VHseLeATDMDCRuFVBoCSbw3OU0XhZqqohgC2ThJ5o4VZdwmLJlpxiuw5lUayYo4KyKOnYazilT0su2SJrdkpW4dYNj0MQqwFO5dBfFmxVFw15zHXJsuwlASws+zjSoT+5ZEukjYHoBY/DddFFSaB3cCtYH1/gpIJiJRAL/IAsz2gpE09uY9YVW+MZTtVg3zz31Y1jw+vglCGusSQcLeiXn7M12UB9csGyZxBeSKJUooMWfvacwvgHds9NWhNB5lso5tz5TLPRu0PLGXB7fILKfkFQmCgn4zBIeD6oOd7epfOrbyI6NlZyQTb4iM5lSL43JLyosZ4I3vtU4K5HWIVFmD5GjXN0XLD1aB3n6qcYDnQu1tDygNoWFONPmdQ1VWIQPpqhxhHlwz0uvRFZEWFWBo/Pf8T+P7zO091DbCyeXx9Tuppg8RpZsUWeVaSJYBRl/Gz7h1x7foON4z7zaEZ94iN1hFhWmOMpZX/ExMiY6Sm3P+sw703YeHQVM7hCZT1FPf8lXIRkEwvzaJPza3Bafoo1+gamCCCZYWRTLMNkd5lytj7kkXFC+6c72G4LM4gJjp4TBCfEG49wcgN/GPH6D7oc72rs3W8QpF189S/0zzJ6s4rOcM7Xf27xP/13BbOdgPbhf41tOPwXwWeoiwn3zkYEXZfbj17DTATZ2hpuGeKJnPb0AbYKaF02w9EXPI6+DnHkgLDO2RktSPMMVlzcciU5H3ibuJVDKynYSi9f8jiSlzwOizgLcWRMR07ZWs6xnYY5WstVxTGbE7GJob2X8Qi/6eO30qo0xKGmXRE0HhEhJHZVrNCBJroqMUsLuyqwzAqhNaZqzrFEo91/aZuvCkyjRmiNIWucukLVBRaqaY1ksx1raonQClNW2FUBCBzToK4KbLPRcZhKNq8layxdYpY5dtXsoTuWQFYlwlAIDWZdYtcCVTU3DssymvenLQxU81pViV0Vq+c3r2WaBmZdYOgAQ0tEnuGLDuPtjO6zKW8e17z7qMCNJIFTIcWCw/4xTrJFf77J0lCIGG7ck3iGjd0XZC0bbbYpWibWpkmxM2dvz+fNwyE3To/B9rhxMuUN85SfvW6QBynXHzpcPXK486yDOdBYSqGZU7dmRNJgq2zTKQrisYNlzFiGJZbyWbQS7HPBWtLlxD/DqH3mg4KsVaLnGmlJCj+n9myKQIHURFKTLVL6ZylmXWHLglYyoqpnuOmCeDni6v1LIifl6+cC/+oddsdDvvn4B3z4tTmHr8/5k7/z2Vh0CYsF6koM7CJIWZpn7Mwi4onF2qlk3hJsuTmmzJlHS64+PaN3+ggMwf/2FxecteYMph7XzmPCzQLLDQjLnC45Vl3TX1hokSGlgzWbordyKpHx9ucJF+6Qm6MOMosoQ8HeecpSSRjnSF2j/u+M4/aMLV3Tm+VcGR1ijrqoLMAaSGxd49QZFs3aNqTEqhzsqsDExkBjKIlZFlir7VjHBL1ag4ZVIbSFqSSWKhFSYpY5VtV8kdpCY8pmnRuyxlYFjtE40UVdY5U2Vl1iiN98lfHl47fEHFWA0QhitG4k51GPw7XuKx3HSnKe5zm90iQfaWa2x9P1Lcwv76oIQVWWXOYOxbhiEoY8/rKOQ4imVRGC8VSQzyrO+z2eflnHURQ49qpVGTaS87PedQ69hhCWFy/Cfxsdx3JkIsqak7XbDTqw/HKrUtKtNcnQoK4lz/bWGOkarfWvSYNN4ZI9z8l8h6PNbcbOVfLCJwly7kmTn7wZcGNW8t/OLRadkJ61w+JKyIO2TeZIFrHiZNvhjcplrQp4YLf4+807GIYgCRK+cE/xz12W7TZXv9bmhrT5aLvFT1+/yaS7ROqAy1s+2a5g9HrIBxXkdcjF3gdcVgqzNviV3aLoXWO2FVA68L1fDjAzl277u2SBxXwXeu23MPse59ol1hp72Ida0Wv/KcmdAc7aJuasQg9yXKUpdYQY+5jCgYHEaHVZi9u02xbpuw5L4MMrbb697HB+vc2/+4bHs82MDWWxuOVTVppQ2uzgIMsWZc9Bba0zS8BouTxomaRtk+FOyUm7x83LNo/23+SznSuYlsnja1OOtgo2zyL+/R918fItBrXgP3ztD/msU3F/84QL30Y5Ps/MNq4n+B/nFjNP8KTzVzz0TO6900VIA/07GukCYcE8CdGmwa/iq0ytirZXUtRL8m6AU1n0K4FOXEzDpmt+g+fdkLHfDEd9zycvMuJMkE0Ecyfg6dY2+QpW/MLKgNYc1B65zBm12jxtr614Hi8iIJtcldvDmnwJw1bI03gP27JeRkB6vk+epszGBnkhkIUFfAWyY+HFcLRpSRAKQymi+ZD9+XP0alelLAr81TBx0+ri6w3ayxlXX0RAluVLynmW56x727hlTDedcjNLSVbDUWhmHJZl0dfreKXH+sUpV4vzhnIeBI2Ow3XRStFmB1/7bB0fk64iILOsMbEFfkC9ioD0a8F+/0I5AAAgAElEQVT24XPagdnoPOClGamlLULzKmVVceXpBXHVDFdfyH0N02TP6+BnfQI9Z//ZJa5zydZym6Is0UoRxTGDJdhiG1Vcsjx/QhC1WaZN61TZFct5TKE7CNPBW4zpVHMMIVDpmDfTE9461HT9LtvqOpHR5erikFuLHyFnS97+bJ+T9TmFr9gbRvj916icdXzx17z15JCbjyL2jz368yW7E4vJmkHX/lOCus03x/8Bfz4mmvv89B1Yeks8BL2HAVH6Z2gBO8n3+fZnHf6/D8b0ny4J5z5HaxnxtE+c/SVBWfAnj37M090L5l8vueK7hPEmVCavXWzRru/i1DN+L/sRd5/MsTptbkxCNE2rG7GNZx7QcR+x5/0z142Q7SxgLQ2ohI3dK+iZ23SrO+zJp/jyCLTgsj5lPV3y5sOAG887XLF+F8/t8LXjnzJwn/Dw6lPuHt9g7OwSnA7oBx3cahtTmLhPLuhaJZE7BhoZgCEE5ZUEN3sLUwj6s8c4NNLudLFAuC5SCMrKAGMfpQqCJ4fcvgxIsxwlJUHYDDc3RYwvtmklCVezEdlKx+EHqzWoNRv+Nl4WsqYKrg+PqV7MLbJ0FbXg0c9jfN1mLRtx9XxlcqtrqheS88WCtrGHb0QYsoavQnYs8FLeqrVuEGemTW0apF53lR1rULolyvPJTI+CCFlY1IZPGnYb5WhVYdkWaMidnMIIUdKiMgOWkUtmeliW2WyEKo1lmRS5j5QmuRuSOj0QoDyfVDhI10FLRVV6yNoid1qkho30PArLBzTa95FmQV05SA253yYJbTLLA0C6LqVTYikDWdpIDWnYJpVe838OAlLDwTBMUitqzrE80rBH4cCSbgM+1goRhuRKIksLd7GBEbrUls20LchEgIxrZBaQFAG1tCi9gDRuKqzcEbjmNl90HbRSdGSHQNt8Lja5V22yfaGZnLQ4dGHkVVRVB0/6kNssFl0WUiGcq0x7PkN9Rjxd8qRbch0br7J4ctKiHmve+LDNmRriK59amsSnHiqwKFx4voyYPG8hfRfzYc12FqLenDG92UObIXlk8mxrwHS/w3unJspzCT1N0REwb2Md2yjLwh0NiL0OS+3zyGowd65tsy1t2tJAao/gqEvrscCaasKzkkVLslYv6QQWuoJRavA8ddGGYDmJkWmb2XCXe6bDhtVmICz+5brNg9Dh5uPb7M5usaPbLH1JKMHFxNIW22EPnc8wyhfblyaGMFjM+0irkQykfpdEKJTvkxoOpeuCEBgFVIVNqWHm9bECn9xqbPHaD8hMj1x5yNKmsjySqEPuNBGQyvPJLR+NJjcCZGlTugaJ36OWNdrzyC2vqdQdlxIHWdkUdkhqaaTrvYxH0L5PJmyq0kNLwW+DNwq/NZBPQzg3DANhaJRlIx2HrLv+Eh1Y1xXK9cj9nLyykdKksgKyro9pW1RV/XKoU1UVRemhSk3lmyzbFqX/olUBqdSK22ihakUZ+WS2CzTimsKLkHaTVl9NLCSCIu6SuS3UKl4PNNJxEW5BPfVQQpG3ByxDi9JvSj3lNtNvp4Z64qAMk6zjk+mq8eg4DqUXIYRBLjxkIqltn7QVkDsumTtYCX0U2vUodIWa2UjHpOj5FEYzGyqNAtVW6MqlWgrk0qZ2YtJuB2EIcstHWjaVcEBrioWFLBQq7mPZb/HsVs24e52L9jlpnJAPNrg2llj1Op30uzzsa07XTGLZ4iI45cnGAEeAcWmhDYNz//d4/PqS8eAaz3rPwNRszbYZdlPeHsXUVs15/y3+5jvvU81LLj8w+Ny0qauSwYXFzHYZWiU/8P+E8kJRn9S4oU+RlwhhkGmfDUtz5Pf5fmsHhQbbRrbly9L8raRgfVbgPLzCZGOf77+R4+Q2vUUby7IoZcl3lw5jw+BBN+TnwRuYlgl1jl2UPNyNMRG8MXOICkHu/jFlaFJXNb/aNsFqhH2R4/F75/9/e2fWY1lyXecvhjPfMecauqpHNmeKpAbI9ostC5IBQYAh/wS/+MW/xO/+Awb8IgsyYBAWKVsWKYiSKFJqij0PNWfldOcznxMRfjgnb1XbJIVWd5FqKtdbZt68Z4oTsfeKvdcSiNbx7tGQ903ROxFKrDUIIRlZ0RkbCUE53aeQ4MKQIixoeyv4pLLYuY8RinJ6AGFAE9ddHVMYUcYlVaWwSw/jSYrpoEtVgNb3aOIu3a1NjC1byiAgH+hu4gmeuNU3WlMbh3GSOhlTJAOap0rOiSKKMKNdBbis3ZZGfNJ4JhzH0231tqnRTYZfNkwWd3FaoZSkLKu+7iFj6O3iiWsEzZLJ6gTtdSXnntdZQBZFySC+iWpGhOmc/SIny9LeIrJLVTxPE3OEbiIGZ2sm5TEgiOOENF0ThhHOGCJ5C4+IYfaAiV0/lao44jihzQsC/2V0C8P0PjJW5HmXqkRRSFl2qYrvvwR1zfT+Ca7u6jgupRCVUkyiKV61j8+a6YNT6uCcnfQ6VVVhrWU4HDLIBFrdxE9XTJYnnd2DEOQiwx60hI9iYjfF00cEq1Om6xVSCvDnhGGIPw9wzhKp6yQ25vr8TT5zPuPEm7OzSWm/dM4rj+7QmEN08FlkGxPN75CUBcYZ9tp9NoP3GF/cxkfi8xy+9BFnryPMOfGxQdQ/RASCwXlKJZZI8TmgxpbfZXQ6IjvprDgvtV0HRGjvFqpKidNztDNUVcVkMmW9XqGUIokPUdWEwDYky7sY5/D6xcIYw3A4ZNoGyHaEEQ3Bu8fEL5yjlppwuU8QBOiqxBdHyHCIWp0QyhSvt8IYxglefh+JwNe3US4kyo6ZrgxlWWz1cMuyYGc4JmiO0EYzfnjKJJ/heT5KKZqmQUrBQHh47jmUkIyW7yFoSJIBm82GMAwRQjBqJJ56Ht9WjFd38QddGv6kjiNlIEd46jmCPGWan3epimA7Bp1zDJMb6HLI0JbsnD34cKoiJWEYEVcjPDEhyc+Z2AvCMKJtm94CckC62RDo2wg13Jacfyqa3LTWfdQhutZ4p6gGAy4mcW863dV4RFFnbbdsfOqVoog157s7WyGfpyOOdRPTLi15FPB4T3UWkPrDFpDpxqPZONa7I87VtCOTfJ+qLPH9AGEt2VJTV4LF6HnOfbMt6nLOdZ+pKsp1jFdbltNXuIh1R1zBVj+kMYJqGdJ4LRfXxsxMjXOwDjoiVkrJSEbUJ5YqUpzvTln415H1Pk3drUJpGBKvGpqNT+kFXEx3cP3qUIsadhza89ikkjr3yZNrnO/dQErJWq/xtMYb+TjnyFKfPBfc2/kqd/Z8qqIgPdI8uvkexeglAjdAPh7TegPSnVeYC4dxhqYdsY5HnA8OCZygnCkqIykOvkw2TTkXr5API5x2nHk3kG5DOx/idIsL/zmPr71KE3eFen5PQgetpF561NpjtrtP4SxNU5PHMeVut1W9EAnNScsmhLPR57DiiWaFtZZNEHJ9ZbAbzSYccTHcIbu2wSXgppPtsbKNR9tAevAc54OuxqGqqu32pnSCYh3QVLAa3ubxSG+tNKSUVFVFFYQUZ5KwhfnRy5y319BPk+5SUllBdaGRwPzos6yUI+t9jz3P65KB0lKvAkpCLnY+B4G/vZ685zAOKkW18Sm8kIuD/a0FZHftLeBYuQHNectqMODsaIDp60Au2+q11qQLqAvFOg44jw87PY4+4sjjmDxNKTYhda0QMkDrT0mTm3MWa0X/swVn0UXGyJz35KiirirCMMQrCxIxQrdTgjplfLHsU5Wmeyiua3KL9QGqCQnMhh1tyPMMrXTHcTiLpz3CeoxqPMJ1wdjO6SKOrskt8DtyNGz38YzPYD1jLHKCIMS/FCOOYkxe4NlrqAaSxTmu9jrHLdy2O3ZoFZ65hmtrhrMVTdulOkmSbPfbB94Qrxni6Zzxak3lzxilVT+YHMPBgGRt0GYPr84Y2WUvXCQoRU5LQzRLiOoEz00JqxUjim5ABwvCIMRb9tdkdtBtRNjM2dWSNE3RWnEwfMh6Z8Zo8wpeI5CNR5ieMDQdz7JjStLmHqO5wUfgVXt4ePjrB0T+guFFROg+QASC6UrSsESZW1jRIJp32FnfpLgo0EqjPU1QNwycjzZ7aJszOE/xhaWua8bjMZvNBikVsT9FNRGxskwWZxjXqdSbXql7MBiSpArdDAnaDaNqgZpssCvLaJXheT5hXRO0E5QOCTcLRmWN52nqqn7itYrAb/dRxidZz9ix9Glp185QVRXTZIRfj1BGksxXjOs1Wnto3UUcQgiGTuHVe0ghGc4f40S34OgsJwgDhBAMKtDtAb5tGc1O8ZIuSrC996tXFCQuxjN7+E3B8HyN19QIxPZ8nXOEeg/dhCSVYVyd0bamiy6rckuORlmINjFxumZcrAm2HEdDFMXoLMM3+2hiMG2XLn0aIo7LbdKuCEwhrMBzLUldYI1ASYXX1ERaIOuCSAVdDYdpSJoCTae6pWy30uumIhA1yvr4riWuckT9/0gHmhrfJiiniG13LBCE0nWWftLhjMWzDdIqwqYioSBWgrzupQGlw9YVnrRoB3FTYaoaUfcTi4KyLomdRmHQ1pK0FXVfABYpoO5WhkQESGuRtiGucyJShu2Yuu5SlagShG1XIOdbQ1J3TUzdPSswtiWqJYHxkFi8tmbQdN/dyJxAGILa4KzDp0HZgNDVxJXB1Tme81g6R6lSXLlE2jEKS2BLorrEOEPUhoTehmFT4iHwTIsSktDmeO2KYVsStGucdIR1hhQZwrUIGqRbEFUpsq47314RUDUlsbMoLJqWoamonKGqK6LSw9adwHSsBigXoNuG2OVYXK+C1dKalriSBG2AcgmBbUkoaOoV1IJBHeMLR9WUBDZBSo+wrRlQ4OFTNSVh5ZB1iUTg0aL65x1XBl13PIuyCl0XRFqhbYK2MDANSV2gbYtsJb7popMEjbYWKRyxKTG0JJ5ENAWB7IjUuFEoZ1H92NOqOwdrDIkvkXVBiOqepTMM2wpVd1usQWmRvQ5NrAzSdc87MUXXHau7MSqlxBcG30iUDQlc9xkfs01JEk8h6wJfGBQG1Tebfioijrputi907RxlNCQNFPePDmn7Og7Ttl3IWdfsFILivGUdDLh79HxvAdn227ldqvJqJikvapbDER9ci7d1HPBEOnB+Ybi5rDk53Ode9NxWlq3upQOxltWpYVpYTvbH3ItEZ6/XXFpAdtKBmzOLqAzH13Y4HwTbVOVS4m3SOvKTrhvx/u3rzDDgXF86XCOkRFpNeT+njCPuX7/N3M8oqkmfbzr8IEAtSooLwzoYcu/oFsju6TaywQ4N3sDnuYWhXDmWOzF3j7p8OtMdv6NzD+cci5ml3LTMxkPeP0y6NE4pFofPk43mnLFHlTnqMmS29yUe+RrrLCs7YBbcxOzu4TvYPKrxDCyv/RqracWd4BbL+JA2aPGTmwg9p7mnMdJgot/hzvNfodltUEqi+50wUzmK05bCi7l7/QVKQbcShhFl1dW4TFuP8mHOMtHc3T/C4lBaY/umSD8I2LsoKeaGxWDE/d3bFAc5duJI0yG6fw7zmaEuGma7E+5OA3TPS3h+V3sjgfWZZbcwnO5N+GDS9XQI0bc9NDUDLyB9WOLVlvvPHXBPNB+qDxJCMDaQPeq+7+HhL7HUnaVBVT7p0C7yluLUkEnH/WsHuDCg7VOVS+W4Ye4o++f9wc3bWwvIp6UDXyg15UnBbLLD3enTFpDVVs/3M2cV5dpyMR1zb/QS+pIctbbTlykKVheOdpnRVl0k8knjmUQcvu8hhOxXonZrAXkrfYR9Wo8jjsmznCM1JjL7jNINz28u0L0eh+6lA8uq5MC/RlgmTIoVL+YFRZGjtdftqpgu1N1x+wRVwOHpCbfrUxCCKIzI8uxJHYe5RmQDjh6ckJN+aA89jDrT6aG4TdTC9bvHDKMn0oGXdRxDq4i5RdM23Lrz3raOI4ojir4Z6VY4IcynhG7Nc3dnBME5R9kN6p7jSJKEw0wQuSNGWcrtzXkfcUAhC8x+S3Qcs2fGhOwx2Vzw/CZFSsHc7zQYgkWEc5apOyQwCbvZGS+llizP8LSH5i61e8DB6QsE+S388ojdi7vc6COO3WYPOXyf5+bP4zvJsDkkFj6Tx3/JuDrjhYdfpx29Rb6b8dLdXyKfnqOaF0G1qOJ/8MK9luq845ouydEjQiJ3jajKuP3+u1TOUNc1w2GnSaGk4ka4T1gMGLcNz68eYV0XcTRtR44mccJ+ERCZKdNixa3ZGet2SZO3HJwdbV/aHbePryN2NzOeP8+35GjYt6FLIRi5G4TG5/DBGfWs3U7sSinKomScDBiU+0RG8dyDe7TFAu1ppJSY1nTkKB5Jc4QUgpvv32OMIUm6+iA/CBAIdhpJ5G5Q25pb6UNUHFKVFcaa3rsn55ABoTtilOe8UC22dRzBU2LFR+E1wiJi11Y8f/GY1piOHM0vxYoDdsoBoR2xV865fbLAD4Iu4ujJ0SzdMOYGmgStNfoZFF08IyEfgxCWth8IDoeRmlwHmF4ZrNEC4YXkuqWUHsZKGinJddANAHvZXSuojKNSurd/1KTKo9TB1pDJiBYhZd+2LGm0T267/XUjPQrlY70QrKVxEuMEpfLIRIDwIvLa9ufo4ZSjRWGEo1Q+qRTUynVV9F5E0YKWCmM6W8rSC8idwbnu/0sddISaDroWaxS58ilkROlFlLZbyZz0qJTAGEGrunuDoNvKVQ7hOaz2qZzGOEEtFLkOUFpR6AgjfVrdbcfWVmGtoBIeqbIUqrs3tR7QiiEFIQavuzcqpFBgbEuqPAoZUeiAFklrFAZBrWIqkVD6IbVKqAWk0qdRMU50vJIVYzLpU+mODDd+SGEchfP7e6MovZDCttQGhPQoVIBUitoLOvtCJJn0saJXV6PGCINTHpXUGCupRXdvchFiZEuuA6wXUrSO2mgskkppci/E930K42ilR60tAkFrFdZKSqVJ+3GnpEKpzg9GS49WdM+y9gOyxsdTve2GNiilUSjaViKFIJc+uTBILyLTDa3ycUBoJcZIWtGNYSk9au0w1qK8iFwbSuthraTt703eyzU00qPRvdC352OFpEKSKR8jLMILyXSvOSO7e2Ndd92ZDGikh0FhnET6IZmqafpxY6z7dDS5Pc1xaK2QypEj+MEAZsObCN0ZMjVNQ+EHVElF2nicryx/63ssJjdRWvfubBpw1HVNVkc8shU/ikNWeweUZfkhQyalFPlK8a7LeGscs5S3uHTJKsoCv09VyoXH2zTcj3dZeXsUfkA96DRHyyCEoqRchbyj1xxPDqiTuHdyE50hU9NAC/kq4DVbcrJ72PUyOEcYRtvtvrkIWFctfzGpmY9ukukpF8UObdt10tZRRLqouEglrwWaxejmlhytRIkdGfwmJE8FxyW84UUspnsIIUi9IZ7n44UezjqKjccHVc070YDV3oQ872oR0kFAE48pp4e0a5/XTMUHkzFrc4TDIsyYIvKYewf4TlBcSB56Defjm9STPS6a6+Sxox5XrA9vY6MRZRbwZ/v3yOJXWO3fptJVZ4OhO0J70ApWG8F3k4rz8BqNgLZpaJMnreELFzErav4msSwHt7HOobTqbQwtdRyRzVuOM8ObScwySqh2StqyZSnHXXRSNxQbzTv+hnfkkIUfbwnNy90viaBcebzZFNwd7bIaRn0a/aTRkiCiPHV8YFPujndYDYbduJWqS2sQtFaQX0jeD2su4hsUAsowpIi7HR4QBKVhs9R8X9fMx8/hReF2670KQ8qkIq0ls7Xk+77gfPd6lyJ/yMkNlibiQZHzd2OfVXSb1pp+jFYIIfF9j3Jmea+oeG88ZuVPnnJyM5RhSBVNKFcBb9mK88p9OprcnkgHdvUcpm2pdMPj4pS9WdrrkXapymDQ7YVP/R0KN+Rx+oCDpejD3mpL6pRlxSS6yaI2LPMzDjbh1gJSSrHlQ4bqOid1ipnV7G82H1I5D8MIrCXmBm/5OXI5Y/8prQTn3BM9juAl3q8fEKcV0yDsfVVEv59eMHIa7T/P+/VddhqPpNdSiKJu714pyWG8iy1HvBW8wXQ9RuoF1/PnKMtym6pMCkXl7XJeP+ZgXm8jrEIWcOTw7geMmbLxE2aLOxyuQpRSzLxzgiAkWAQ46xiq65yLhmJ1ymHa1Qz4vo8JH5Cp+wxPb6OLF3i3rWkW5+yuQ4xt2W33KIbvczR/EQ9JaK9zP1qjLn5I1Cy4/qgiHb5JXmcc3M0p9mZY8zx/Pfw+dX2PgwcjyrMuz4/67cldEWGiPd7Ub3BwcdQZR1UVw+FoW+NyMLhGWXoc14/ZP+/yb7/3R720PBxXERsZkjYzDk4y1qJPVU6Puu3JPGcoj3h0tCCbrTmsoi7iKIqtxKNEEKtbvMEa0hUHPQelVOf5k+c5k2RI0B5xx54wNAI2m35cya1fzwCNMkfcM3PGFysGpqvDWa/XnRQDsNtqhH+TO9lddhdNJ9dQlX1dyog03TAVIyq1y6PsPteKcNvq8LSvyt7wOdZ5zayes28MxrQMBkPSNO31OHwGzYRz19K0GftF0fuqGNq2YTgcsV4uSbzneUemLOyaQISf9Gv+bKUDtdYIT5JHQy4ORmRtjZKXYsVNZ21XVawbj7yQrMZDEOJJxPGUdOC6DgmrluV4r/OWLaut0I+zFqkU6UqRMuZ8R1OVVccX+J0eR943ueVLzXK0x1IeYK2l7BvXHI7S76QDs1XA+uBllt4TwtMBed+M5AwU64DV0auU4RNiqwxC2jJHIlgTUM8t1dEXadyIVKXMyl2atu2sKMOI0aoiq31m00534XJlqGWNGbf4KmSzEYTSZ33U5atCSjL/OqXS+OOujiNde6QerIJd6iimLAuU0qS7U9rhNcq9g059PNEUOwfYQYB1lk07ok6GrJMjfAvVTLHen1CNBGaQsnQv0yQhZlSyqV+iTRa0FwHN6Mu46Cbz66/SDrrIMPM0TV2TtJKyEGTXv4TLd3DO0jQNTZJs5e/mLuRoaVjujWms7RzM1KXrWHdv0kVLYCWzyR5VU5EfpZjSsIx2umM1DelaUwwHrIYCv/FRujuH8qmII195rKMJy9BsSUiE6Noe6hoXROSnjtUo5iL2KKsS3duUGtOJ4DRWUswEi6Mdlv0OWtUvKF2RosArDVnqs5x+lhK79eu5vJ6qKtnUirzQLCcJyvOomwYBFL5P3Te5LdqIoVez2D3cNq5dXo+QEl97ZHNLKhyzqaSp660ehzF9xLFTkK99KGu08baR+SeJZybkc2mPcNZm/O/qLl46JigLpOweimwaojjG5TmPrCND4C27LdzLl/VyBRZ1xR0/pMxTAgJ8P4Cq7MlRgWk7juP7VUNuWmJvAnnGZRho+1nZWct3ypJShARYjLFEcQK9WLEfBNRlyZ86SZEJAuHwPL/T0oftStZY+GPjaFeOqI66hwrsxgMic4abQ+R5vLcq+HIT82jYUsVzokoi+/A1iCKO1xtyIQk30bbgTSEYR46gClhsLninqDiNY7xFRRD4eFIzDEsoFWXjsM7xulBkWY1fCII6xvbRmC5PCWYL9EXK97OGZH3IvssJ1z7GGSblkHLnlP1Vl2v/xSbDuJiRO6EWcw7mQ5rqjKGLGZze5+TGj/jDnVNuPFCUdcmL7wToaoRAgIDHE8veQnCvrRjIGB/X7UzUNUFTYIscKRWn2uOi2OAtE0Sff/u97qYxhiCKeDdNuYcjVAMoCwZxycvzPd6vZ6jAh6bmL/DYWxa80ChWSuOkQFQVfhB0Vp5C8D0UF5uaoNRdJHF5n5WCskCFEX9cbljhEdsBLku3ToTWdPaL1jm+WWbUqxF+XeOcJU4G2HTTjQ8gaw3/x4JaSwJru07rpu7GWJLg8pwLIfmzusFbaoIwRJRPdWX3mqN3tUdTZPjLuJ8M7PY96fQ4PH5Y5BgpiNYxsirxPL+vgWmJkwFms+G7rQXqrmTdfWqkA2VXGg1YYcnajFHmUFm27QNompqBq5GbTZe6BAGDrNwqOVfVJYchuhdzNKKt1wxaRRiGP9atvnEOV9eMfZCbTScd2ESo3q3eWktpDB4Vw7bBGMvA1egs7dzqm+57izgmrGo8Y7fnAhCbBJ3nXVm47xPnBZGJKcsS7QS/m42Iuc433DGZtPyz4JBfNiF/efwWP4promDRpyqG2CSk+YbK9xml5XaiHDnN765v0krH77fH5Kah1YZhuiGoQ45UzG/MdsiV4A/NXRocJoqgLBgaQ2IrVJYRBD5ZOccFD3l5PYBWMJ07qsGKwSrEYtkvJ2TyITeOW4R1GNOyk0Vs7D0aueLa4xGfH1t+/fgL/F1zjz+4cY/d05CXZzeY+++gB8cUpqE2Y3w/YDV8zGl+jfMgZrww+P6Stu1SlRENqk9VvDAkbzKGab1V4L7M843p7k1e5jRCMBINUV7wb+weN6uQPzTnpKGgmFxQBb/C755MUU3Df+cBuQ9FkRO1EUXRlXPXcYLKM4ay4wfqXpJSKYXOcxKTkLUFQQpD0SLW6yekey9JCZCZiiSzqD7VHLoGtqmKwxhLEfgkm27yu0w/rDUMaVDpBt/3Ka1jUBmitisKA0cQhFuOQ8YxbZ0ySiuMaWlbw9DVqD5V6RbVTmtm5DpjsqcNmUa0uPWS0vO2QldCfAo4jjzPef/995BSMJ3usFwuEUJ0al9pp/1pre2q9qZTFot5V2TzVJ9H0Kt2BUGwHXh7e3vM5zOkVD03su5KxIWgrmt8399Wz10eV0pJHMes12uSJMEYQ9M0Tz1Uy2g0Yr1e930Anc/scDikLEvatldUSlOALR+ilELrLkcej8ekaYpzljt7HgeE/HD5NiLwedl7jn0/4Y9Xp2zKjPE4ZbPZYK1lMpmwWMzx/YAgCLblyxrB10cepXS8ef4OrTFMJhOWyyVhGHKmfb4Sv8qJqHhn9h7G2u15ddWrHW8URRGDyYjlcI0fjlm8vRN6idYAAAaHSURBVGZ2kVFnLXnZsCklqZ3x8NShhysmyyXq8ZpaKkbXLcerEXdLj+r8IdnuktNgwpdm/5aJhmk84NZbJzxaf4A6/YDH+jOE/phik/LW47dRsmvOiqKEqippmobJZMpqtURrvX0mURRtd94u+SNrO05gvV7jeZogCMmylC+OKgYuZfXwuwhPIv2KmT6hvPHPMc7y7uIOJYY8zxmNRmw2a0AwHk9YrRZIqbb6Lx2h2Y3VyWTCZrMBYDqdMp93vSpa666EvucP6rruv3eDc65/fottr8qlM2FVVVueJsuyrvJ0OGS9XhGGce/x2mx5j67H6QlxHEURm82GJOnqcdq27d+TxfbvRR+5XXI6SZL047VhZ2eXi4tzPM/f8k5aaxaLxSf6nn/iE8diseCb3/yfz6Qj7x875O1jvrx7kz/4wTc6t7gXv87t4R7/7bU/+kjNzTe+vOEkX/ON9/7q/z8Gghe+/jt87+wO33zwo5/4HZ6Q/Lb3e/zHxe/xg8mEb9//Ju2d95mnCw5G+7x+//XtZ7/2wlewUvKje2/Qmpavlb/M2//re3xh5zE7L36B3eKYP33wOv/u13+L9UGAN19yPfxN/sv8Wzw8/h7p2+/iNvCVl77KG/d+RPMMCo7ErS/zS/u3+E/f/zNcfzeHXsh/+O3PMglivv3Nb/Eo+2Rfjl8kuE+45vyZ6HHAJ3+inwa8tTjGWIPtc8o35scsqhz7Ee/Fa+f3mZXZj72HBscPzu/xzvLxT73HkR+x+9aMcZPx1SF869HDXtLPkljzof+dIqiNwRqDs5Zh3YXb0jma+Sl/vlhwtp5jj0/ZWyVYU3Foz7EfvMnIeGzyrskvqCukezbP/q3FcTcZP5Wvp03J380ecCPZ4aLY/JMccz8vPLOJ458iHqZz5mW6/fnO+pzjf8Aq+DcX92nsTy7a+e7Je2S9DupPQrO7R/P5r2PSFnPymHY562Qc24a2LD702bYqaUwD/UvZ5Cn0ux3F4pxvrM54aXzQ7SZkGVII1puMu29uKM2T6KItsmdCxAE8yhYsqvxDv7PO8dend3g8WH3oPK7w7PGxJw6F4Ghnn1UUfxLn8wuBvWHy4Z8ZfOTv8IHkp/x9xE+/3wmGf20U4yjA15rPHd6itobDpmQnSDiTFYVpGSifl/au0VjDXDTM25zxeMKe3Wcy6Swm2mbJZDwh8P2um1N57DvDrcPrzOsnL/N0OmVPVlTmk7ccvMTe8MPXfUxB1a7Y29t/Zsf8RUPXdf7xorOPPXGIomHgCR7n+d//4Sv8zCAbQ3pxzGde/GUmQcxnp9d4a3nCbpjwOFtxnq/4q7O7/MbtV/j3r/4LQuXzX9//S/7z639CPagoy5K6qjDOUeQ5VVWxKDMEgmvT6+yHQz43OOBbD9/YHrNOKsqioHgGHMdPwuvVfTypyP+eCOwKH8blTuE/FB974nhxuM/1ZMJrj+983K+6wieIG+MB//LaqyQ6AAfvzB/zOFtg2pZNnfP22UPyPOP103usX8lpteFHp/exdcOv7d7meHnBvzp8lUWV8e17r/PVyU1+6+YXOpMrpcnbmgeLc/I8A0Ag+NrkJndmJ8z63/0scLVc/XzwsSeOL+ze4EYy5Q/EX39kEvAKzw5f2r3J9WSCloratnzn8TuUbcMbHLMbDrjouZgH6Zz76ZxE+7y9fMz1eMLnptc5v77hVw5f4HG2ZDcc8KuHL7IbDrrdMgfWWfaj4fZ4iRfw+Z0bvHbxgAfp/Od12Vf4GeFjTRyeVHx2co2dMGHoRazqq/n/HwME8KuHLxFqHyFgVmZ89+Q9nHPMyowXR/tb8nXTlHzn+G2UkDzOlvzGzc8z8iN+87kvsh8Occ7xtf3bfG7nGlp0Jf4ASki+uHuDP7r/dwDcSCbshgO+sHuDP3n05s/pyq/ws8LHmjh8qXlvdUqQakLtsao/qdO6wseBEpKzYs3vv/c9oNvK/KvTD7DOUZuWu+vz7Wetc3zj7msAFG1NbQ3fPn6boR/yIJ2xqguGfsR3jt/hb88fIEQv1mQb5mWGEhLjLL7S/PnJu/3vBOYq+vyFhvhp7KoQ4urpX+EK/4ThnPuxlZyffBH7Fa5whV94XE0cV7jCFT4yriaOK1zhCh8ZVxPHFa5whY+Mn0qOXuEKV7jCj8NVxHGFK1zhI+Nq4rjCFa7wkXE1cVzhClf4yLiaOK5whSt8ZFxNHFe4whU+Mq4mjitc4QofGf8Xul6llqfBzvkAAAAASUVORK5CYII=", + "text/plain": [ + "
" + ] + }, + "metadata": { + "needs_background": "light" + }, + "output_type": "display_data" + } + ], + "source": [ + "import matplotlib.pyplot as plt\n", + "import matplotlib.image as mpimg\n", + "core = mpimg.imread('Results/core.png')\n", + "#core.shape [:3]\n", + "plt.imshow(core)\n", + "plt.axis('off')\n", + "plt.show()" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "This is the die image of the top die (Sram Die):" + ] + }, + { + "cell_type": "code", + "execution_count": 2, + "metadata": {}, + "outputs": [ + { + "data": { + "image/png": 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AZT9QIhePkM/GyPf3wogGnFLkUoa3ZvMUNdfk9Rbje2+w2G+RziN6k1yNDNnsDmLo4VvbqPd31srTmUYrhXzyGLHMkPtbqK9dpRkUiDqArAmEk9ctcpkhDof4r+5SkMU3zWrAyOMl8kSByBnfu436IFlTGZcvXebx48f4wqOeF4jLLfJu0EGyDL13KBs6SP6OI4qFQD8Z8tmvT3jW3OJHzCO+KX8Pc3eZMr9M+2MfIf/lv458sIP72T+CK1c7N63WoX6XSuTv+WnUpMH9/X8H960reLnamXKDY+RP/h28f470FRzfwD14G8ypl48A9/wBNEvER1/A/e1/C+9jOcZyWGQYYxm+u4/+7X8VOR/R/sx/gF9obvB1Hvk38HWNkZJ6YuDxB4Cl/Ye/leqfjrF1xT+RQ5yHbJFRmdv8pPkGQqbxGxboK1cux12SKuJ+YXdGyICdjIYTFosFSq0mqNYSKQKhDOExpumeZ23D4eFTtJboLExypVfleW+x1kXAfYGUoTypJFpL2ramKDKUUt0LryiCBRzmJN2zkozHY7RuogcRrg+L1rrOP6289EUl7QhkWXi0zqJvGP3R4G+fRyiKznt3DRjjIi5QY61nUAx718r4EbSNQ+siltPGKwQIRV0bvBeMR+PVxFSKwWAQ3iw+PWslWgdMxbm0MEgEKm18MhqFAROsERnraqmqliIf0TTrmAoofFxss2xwpjxnoXVhSzFoIehgd3ePp0+fUlVNd4+IAEfw10csF03c/ZBr5UkpcR6qqiV1szWeo6MZSuUU+fr1IGnbNLhGcZch6Tr8/15zl5PsDbb9M7a4A+oJxfZnmIyfIlgipUbrb2L1algFc32BUjVCzJHSotRHaH1IluWAxxiDtC3y/W3k0wJ/vUDd2Wb89be6PusPE/n2MXqRofwMrb/R7f5oDdYJpBJMtyoQSwSO4eBjZHaJ9w+WOL6OUvGN5lusn6OURIp77Ls9jGjBBxegbeFjOSTPiwAq+TTm4Ph4Fhav4STuPPb6B0lVNSiVkWWSuq57eg4WhveC4XDMYpGwK8WlS3s8PXgQJ3V/jIcxqZSmrts4HlcYJMjYZ8kqSmMyWDpKZSiVsQY+ETBLVUiUDBiclI7pdPrCsXwvfVHxPgySbrUTCVMJPqn3FiIucOpOEqYSPsFiMcYzGg0oy5KqrnrXuu6eLMsjEBZ82oB1OvCOPNc0TdNtxQE4a4LfKXwEpdbrYkxYmKRIXbeqE3iWy/AGCmZiuFdrxaDImT0vz3BLwHVchLapgSF9CdaZwllLQjnA8fz5Ada2cau3iS33Uc+Wpi5RSuOcCOZ3rzznHAhFMcgh4j5KSba3pzx58pim8bGKK11qrbDW0jRVr/6rv1ppTKtwtgXZAg3z+QFleYKQxDdeE/s4SFlahPBkWep/BzR4X3d6HgwGlHULS41oJVpq/PCIsvgWqHW8SylJsbvEyRpPi6de21IuikHckZohYtvqZkY1tzg5QgmBtVGXcZFw3uFxFEWGMev8DOctbdsiJCBW/bq9vcXJyQlluYhtiv0Sx0pR5CwWi47Pkvol8U0EPrrjye03HB4+A+9QUrGaD9F1Mi3WGobDIctl3yUM19R1iZQ+WipBZ2nn1NoWa1tOv8yLIkewxDkXcU6Yz08t4t+FvAJMReG9pywDfqGzQAgLmEow4cKis+7/OBcGuXMeY2xczT3OeebzgGpnOuv5rY62TQMuvQnE2r3GWMqywlrLeDymLMOiJIQiz4uA3xjTe06QsPtDdAU8zoWyvA8DoijCIidEKA8PbduyXC6Rckjb1msmpDIG6wKQJ4Q4U55zDmOC1eU9OBuA162tKWX5hMVi2d1jbQQEvUcqHS0Vv4bhGBN2pZxzlMuStpWdjsNOWjDTExZjrY3tC/8d8Ke6uyddM62OEdl7eF/QtjmtyCmmV9C6xFmBc5K2LWjbFbmtKMKbfLn0eK/CwtoWtG1BluV475nNLE5p1LDEZobWN9iiRl92lPPFmq4MgqWYQQbOK9qmWFtUrBXAECmJZESJlFMGg10ODg4A8D7syDStovQF4whWLpflmb6RMu2krfQEcHR0TNPUcRFrQr/0MJXFYmXppXvS2HTO0RqDlKrTs1KKra0pzw6C+5HGb7o3yzKklCyXYSyE8kKdjDHkeUFZLpHSdaB9sJjDrqNz/kzblsuSoTKADHyhpmVwaXgRMZXVzg2ERSVgKmmrWaK1RsrTqL4AEfCXtB2d5wEvGA6HSFnj3Ax6fmvmwnVFkce3niDTGiHDNqnOFINBQdsGbkFyyZQSYdtOSlTkZZypC9EHFYFlmGW6YyV678jzLNY1bANrpcMbd+6C7yxXJmSmQUUdJIS+L1qrqKOw6Mi4JV9VJUpJBoNBh/ZrpeJzJPjwRgycEbf2PPAIKSOHJdYj00wmweoR+EhHD5MmyzR5nsfF0K10FSnrUimGeYMUB0i5IFPHZKKhsg/x/gCpLFIZ8vwIb/tvxAWDgWE0cgjRIKQjy47Jc4dSMrpbBWVZIvcvoedDctOgD6e4j6ZkzWBNV0pJRnODqPZRoiHPn6+xRYuiCJiCWCKEiS7lU6xdMhqFN3yKqM9yg5cOH2kQg0FxhgUbWKxuTU8Ak8mY+Tzs4gTOR+zfOFbyLFhMQrCCArSKuIsk05pgZetYjqCuyzA34na57o3NhNmEeVV15SX6xmpMqm5LOMt03HUUKCXJsvXFYjAoyHRNjE1AZxl1vf5C/G7kpZPfAkhbkOc5eZ6TZVk0AdNH9f59+uPX/tu54HsmbEWq/mTsXxcwhrCbEEkVCPASaz3eC7TOV/cIiVSqh6msf9ae1ZUlu9+1zvBeRLA5Okg+7GpJmXga/WeGXRVBWKBOl+ecwAUzZq1teT5ACIW1fb1AJNcgle7889PlpecEV2ylz6YxsX19fkf4PT1Lymz1XU8H3gd+TOIbBV3kAYPq0ff7H6WCrvxaWXJNz6l9iX7gvAcvOmyr/wl6T7Va75dURyEkSupuPEmpybJBHE+n6+jj+JRruurrMizgPgL14dM0BueIWIXsnpXqaG0Yk4G30++X8BzvRbw3jTlJng/j/Wd1mfosWI59zCPpWff0vOpvvEd2nK71tlkbR6UIL70syxgOhxcTU2nbZsVTEan7E36xwkJOS7QD4j4+8Y0cUHNrwXfb0Ct/M739g4UkECJMOIFDCI+UQbnBp/SpkpG4lObx6boEU7abUqJfXxH39H20RsI1UgikSrE/pzGjsKCAj/VcL0/KcH+aeUlXAUdxXTkrRYmuDSDOtEH0cJD+vVKKwDQlLNJpvVjpHYRYr2NvSekwK+8Dv0dA9NdNqMda30RNOtNVudNF1GeYPB6ldNcXQoigC+Hjc9d1la5JCAbCn1HNSs/hOc4HNmqw6k/pEgHexfad/i3+7OPY7Y2DwM5O7fNd+0Rsn5ThZdjXh0gvTeGjnvvt87Rt2MFc1WN1b+BmgZSa9Xz0vtfe9fGcrP9wb6/DoyTrJ7xcHW3rqOt1jOq7kZe+qCgVfPXlMviUSof9ceeDTxewkNVeepLkkzrnOqAprLYOpQLuscJd3Jq/KYSMOAK0jcE7OhwkfYRQ3fU+vlnCHr89B+MIf030W521NK3p+l9rTdsapJQ9P9lGX1fGuq7MaNVanPMdp+C88pSWHX5hrKVpkqkeGJLrfnn/WcEE75usAR8JAyXoKQ1MQdta2tYitYj8oeDfh+dLnLNozTqGE60wYyxGBuJiaw0N4W3tXISWow5SeUFXGW3bYozvMIfUJwn7EkLSNG0gIrpgqRhjz9VV4IoEToi1jrZp197cUuoe5kDkejic89FKW2EcqrVBB9Dp4HR5KYDQ+XVMJVwbCIZNY7pxYJ0N49ebOCbF2j0+KCqwqHtjWMrgCrZNi3crTDD9Hqwi32EjfUylbQ1Kadq2xTl9BsMJ48DQtqcXFYPIDL7Tq+1cqheRl76opMGdMBWlE09FRDRaxliGs6smQgR/s/Mjw31SsuIICDosI2EqUgryPG1h685vTfwBCL6pMekaGTGOgPecxjiCUkWHg0gpyTPVDd6Ar7iuTek1K2Xyn9eB0yxjrU5nMZyAwcienxziRbLoF69wGKVVcKNUqLezAbXvYziJ50C09Pr6TBhAlokOU0l1SvyhFNuz1gcq6CzTGukkWigyoTAx3koQFvcs0zizGpRZprHWIKXtsKBVeToAzrF9QvpgpRCwo36fJQnP8D2TXa8tKkoJvA/xNiKOlUxrZJ5R18kt1Kt+kYHukMbK6b4J/SHW+iWI7663NmEqdPhbGgt96yf0C3HcBHcj6VlKGeECHS0ZsTZWAg6ZtpfVGqbSj8cK42A1LxK2pjNNlp2dcwHnSXM0jOkLi6lkWcBTsjxnxVNZxf+c9V2TK7Huj4dBmCOlxthkTq77vEplHf4SjMz0HNn5vAHIXPndxppuIpzntyffPBqSnXWTfNEOl4j1lkKhVd5hOGvPQ3Y6OOvTr/zl07hEE9/Ca3gQkPxya300h0/5y16Sti+VztbKKYrBCg/qDApJ8stPYzirGoUF3526J7w1fTTb5Zm2J131MQ46S5EetiBXfSdW956nK6V0z6FY77+EU6y29UMMV7AqdK/P0r2rOp2H4aT7g9pX32XZACl1rGOqQ3ICQ58FK67X3z6WF+dAH8PxXsT4KLnCIHvlpWdpnfXG5erZYSyotfZJqaJbvf6s07pKsUghmHCV0uK7lVeGqXTkL7nyGYMv6OKKeNpXTuCb735zLuAgxjR4b8h0mDzJb02+uXMtqjMY0qAMZVjbIoQjy2RnlgdeiI4+8tm6JOvPY+PC45FiFc2TZZKqaiNTMdbVW6xt0LogxDetninFCj8ITMjTTqvtLJ9OF8IzHOaU5QJrm+6eNN6E8GgtqU3y6XvDTAZcCZ/ar7pyAp8BdAz0FL3yQp85tM7jZGENC/HeobRAGNHdUxRZYEAHux4p1+sSuEauh62s+i5Ykas+kok35MPv/T5biQuYFsCpfoHATA18jaSooCdZZNT1sqtD6pd0jRAOY5ozfZMson7dAZqmDGMyyzGm1+ZOl00ckysSpZBpEXFd/xmTxqRnOCyoG9eNlX55ShFxmoaE46WlMTxLUNcR7xLJ3Q2wQ7CgONM2a1vybr74wPWanJ+j59PIK0nSZK3tctbqTGLMTodxGBN8znXGaWD/JWwiRbQWxQBrLYNBsDTKsgp+q3U0TRuvE5FpWAMCmbdxVXfxTU8sr+zoy8aGt0LiHqwiaIO0bcBnnI0YhzExYjr8Ht7G4c2QygjuRoiKPh0wKZSNmIOjaZoz5WVZhtY6+MDOYdpQ3tHRMVVVMx6PunvaNmBGxtqQl8aqiDGtCFFN0+KsBxG2QtO9eV5QFAOOjo4DRcuFoLW2DboMerYYU3bbrgnDsTa0qSorjDM0vqURitlsHgPYAkZV1w11vXJ/Qn9ZnKfr39R3JlLwR6NRwFSEj5aNoDWGxWLVZ0mCNSU7jKPfL+H3jLpuYsR1wMPKZUm9VBgTFu6kD6HC4p9wHhBn+qbDRCLGkX7f2blEVdWRN9J2bORAHmwYDoYdlymN9aaOeXFcyCFTlqv2CSE5Pj6OWJqIwKnp9XtwbYpiQNO0HU5prIljOYyvLNPdPWFXVGKtoaobOmJvN+4K2sbE8RPwnsB1uXA8FdeZUhB5KkpFPEFHbESvYQAQFqNkQifyWXqzJyUNR6POT9Zak7mYosC6LvWB1m3ELwQ6+plKqRg/EyZ6lqtu62y9vCAp9UHCSoLfmnWuy3gc6NXe+2iOCpwNzMvRaHyGpp9lEnzym4sz5YVJ4gJeIiVKabIs5/LlK1j7JBD/4j2Jp6KVYjgcsZjXEZNYPVNrg1QS7wIno//bbHZCURQMhzIwhoWI5WWdyzccDmKIfWBoJp8bD8VggG402mu0yNje3mY4Wnb3ZlnWw1REF5LvnOlhKgkvCtHabWvQOkNK372UlNIhivYMb0QEWr+UKNnvlyDWWrIsZzgEYr2HoxHDfJeDg6eA7/SRZSvMTKuwqJ/um4R1eBKOFX6fz+c452L7FqiO0yQ7cHowGCClpI5McJ2Z3pjSjEYxQDbq+fLlKzx5WuHjYqCinkJdc5RStG0b5yB8F7cAACAASURBVE/qF0WWhTwqy+US71ftS0RKrTVFnmOydQvEGEMxDtv6Wmu8axiNzur808orwFRkx1FJPBXZYSoSIcKbJuzh9z8rzCV9l+dDlMqYTKYhH0R6i4j+dZLBYNjtTvTzjggkg8EIpTRVVXfPdQ6qquw65XRdUiS17ngxEnrlVVXdvfWT6ZhlOePRpEP4158pkUqCF7GO6+VlWU6RD0Kktl+17/DwOc55xuNJdy0xf4v3grZpKYpBxJ7Wy/MxEnY0HPfKKbh0aS/shLSrHbaky6IYoHUWd0lW+WqCylVIsxB3UsLvkvl8QVXW0a073a+rGJiiGBBMetldl3ZyRqNx6DeRgEiNQKz1WfoolTEYDGNU+9kyh8MRweJIFIKwO3NyckKWFR33J9Wv28kXMtZjvbyAG7Xdgpi+39293GMei/g/H8ZdzG+yGpPxeYScKzLqoK7b7pnOCQ4ODkmBt6Ftojcmg+UyGo1jQGJylVfPUipba19I5hTGc+Jy9T+j0RgpFM6H7ffBcBjb+mLLwktfVPqxP+mz8hEdIQ7lvI8nxWogwndtW+Jcy2JxgjE1g2F4s3XXxXvruiTLAmNQ4CJmFsqr6yXOGYbDorteq5CqEu8JcSrrnywLkZ824QC48FwC23Q0KjCmpmlWsRtt21CWc4pCR0ym/8yY6iHiBKfLM6ahbStkh3OEul+5sotSgrKcd9cKUk4OKAYZbVtF7MmuXZPyt5TVovve2prnz5+itaAoslVZsW1NU2JtE37rnpXebhZrGjIt405d4ONMp2OGwwLnEz9nvW2jUY5zLW1TphHSlRf0vGpf6Ltg0iM8o1Fx5nnOtdR1iZCiw8T6v9f1Eik9g0GyOByDImNnZwtjatq2WuuXpEuBW9Nz137hyfMMTrXv6OgZTROyqwnhYl3orinLeRyTqvesVQ4UIVysY/hNKc/e3iUQFtvxhPzamMxzTVnO8b7fL0EHg0HUc699xjTR6hMRY1pvW1nO8dgOM6qrKrK3LximkrakEk9FZxLrLM4HrMAYGzkIn8xTaSNPZTAY4JwNZv5iwexk3vnl/T388biIGc4EKo88FW87s7qqqpBOMJZpnWE+X+Dx+HNiIpKvH9bCkLWtaVtS6oPj45MuW1YbfVGtNXkx4ODJnNP5TVRrEARiXFXVtO16su0Q16GjleMw1tA0LQ8fPqJtmxgDVHV1C7yCltlsjhQ5IV5q1Ya2NRjrkAKKfBBIVQQK++7uZe7fv4dxK05I4miknMCz2bzb6uzzVBCCZVnS2BYjDC0th88OuDKfk2KNTvNUjo9DTtvE/nXOduUlPackVImnopXGGsPx8cmZcRJc0RxnXedy9reU8zzkKJnPF3EXzzGbz6nmaUtbdMGZKnKfnA11yrKCqjqbY7isahBijTdz9ep1nj8/5OTkJOJQvbie1jAZTzg5OSEAta7rF+dBCU9rLLPZvGtf2xoePtzHeRPj5xK3ZMU5ESK43nU97/WLoW3bLpo7y/KufcHqCfyVMO7WbYjhcIQxC4wJmJyQkqOjIy4gozaF+Ic3hcpEMPcI8SNSinOBoD6mksg3CTyazU7w3jPZmkSXVHaBXhCS0aTtMKkipkLAclLA1vb2NsfHIXtanoc0fvAMzyopU5Isy6NZ7DtXRKsVT2U63WY2Cxm7EpelbVuWiwXj8ZSmqdcmuVIBEJURazpdXnBH2mj2S6QMC9atW7fY339IWS67e6QMulRSB5zoJIS7958p44LnnYsR1WERs9by5MnjgKmMYgwRAhXLCxN0lV0MQPRilgJoPiRrMqRTKKG4cuUK0622w9LSYptkOp1ycjKjbZpOl6l9eV4AvmufkAmkbZFSrSUY70tVV0i1GgP9RaWuK7TWjCdprAgm4wnT0RUePdqP/aG6fklxTUopyrI80zdSyu7tLXvEsKdPQzrJlFp0tUMUrlkulx2mkjKxSaU6d0sKyWSy1UUFK6W4ffsNHjz8MJLQ1sd4nueExNdVGAMpJitek55lTNvdExa7liwbhSRW9boFUpYlkyLcHzClmune9sW0VLIs63JzKr0iWYXBlCFlSzI9+/clH1nFt9ow+njT6ZTlckFZHsdrZbcnL4RgOBx1qQ2GSq8WJ6mYTKbUdcViUcY9/NCpi8WcAOxm3fdJ0hZgWhhDWStAcLksGQxGkbQWomiLYsD29g7792tC/MzqmWELN+UsMWfKCwMmZMhDhPgaKTWPHj3GuZBfNy2IIXYoGL113TAcjtfSdwIomYhQmq3pDgeP2ljHgitX9nj48EHHLk24kpQBOEw7QamOMvrXSmmKYog1LrKcNQrNs6MTFosyLq4qckFWE3O5rMjzgtEoJ/GCQu4O3QVBbm3tMJ/PEDK+kHSOkGEn7bSutNaMR5PYRxKpMvq44ngckhhVVdw+RoWs97MDBoMRQojVJJesJrlUbG/vcHKybqkIAU3dIIXs8Vzg+vWbMZ1kyK+bsqclHs14a6ezYtI9SmoExEU84Hyr9gkePtxHKh0DasVaeQEXadneDidLSNGPn9IR5xvEQNSqG5NZlmHNiuLfl62tKVId4lywfkfDYS+PzncvrySbfsjPED/eRdjBs8rTed4nyeqaqlpiTMvR0XPqumIyHnfXJF/Se0tZLmKUrWY1wkJekuVyjrUtW1sTEj9AKRkTX3tc5Gb0P3muI5szTlTve797trYm1HW1lqOlritmsxOGw0H0X93aPdZGTCXPzpTXtnXgj6QsYZGfcPv2LbRWHB8frT0LAmdhNBpRVWXcTl49z+M6S2U+O+7aXdcVjx49DLlfhkWnx5S/JRxl0jAcDnrPSpyHkAsmy3V8E4a6XL58ia2tSSCInelbz3S6hTEtZbVclRf1mecZWaaYzY4jThAuSTlNJpPxGV0Z04bE1zKSbE6VuVzOkZLYhqDL4XDA1atXY56V8lxd4n20itafJ6VgMByEnCs+8ZI8jx/vU1Ulk0nYkcR3mgou1+yYLAvJvfv94qF71mg0JGB/oQ63b9+OW9cpJmh9TA4GA05OjnsxQ6vPZDLGmLbL0SIENE0dd4tUBH/X27ZYnOC9jYu8oG6amFz+grk/ENyWtFoqGxiJKT5l9TmdTyV0corrgdW5P1tbIfH18fHTzm9Nz/DeMx4PugxaKl/FO1hjKYqQJzTk0vBMJlPKctbxGFI+ir6k7boEMqfE0mlLeXWP70xVrQOafv9pMtdXJqQxNuQvcY5yucSY9cTXeZ538UTee4o87LLMZvNohaw4KCbmU3GxTv3fkthezEfCLpIO9/b22N/fp7UhqND1dBB8bBOtokRATOU5ZDTrW9ciCgVedOkHA/3CxTqltosY95NifQQ+9p0xBqVMBPZDG8bjreiOBmr/4eHhmh4hWCqDIuz2OWt6/RIkuAFzTk6CWyFEOFGg0M0ZXRmT+DMOE12F05JejmkcaL1Kx9G2LYeH4Wwfa214SUW8bzKexpfBaiykfgnBkjYmmfadhbRcLgj5jX1vbPbjh0Q3Vq3zXR8nSzX9ls79cc7H3byaqqoxZt2129nZwtmS1lhMGyzXlHPmReSVLCrJrO7+Hf5FnyF4erCs7g3MP++hrkPi66Oj53jvmEzGAY3PWqbTJe9sCT766A5VtWKpCmkwogEahHhAWR7SRZkCZRl2LhbNAU40CPEUIdbBwNA3AsQhThiEOEGIu6QVfDb7eNUOUdFQ07YNs/mvnbsdJ6Sjdku8qBFiHyHWTWxjQnIhJ05wNFTVA6Dh4OAuKb/o6mEnWNHi3Qll+bX13zodNtSuIsMg5QOEyFguw9b306cfI4QNx4aIEkSDEI8RoqSuwzX9ZzpxBMoxHNYYfczWYJerg4wfur3LL3zlayyXz5jNl1jRhl0ycW9NB/N56BspDa2oY3kPEGJA4Net+m65FFjmNGaB4Gy/QKCqL8rnONGGfpF3oRdHVpZpnFW0tDjXYt1HPHt2v9t96feLERXWVQjxECHO4jcAi+oJXrQIcUhdfx3wzOcr9jMA8gQjDCFl5l3m83ucZec2GNEivUWI+wiROC/3AM+TJ/eQyvT65Ql5brl9+zYHB48AwXQanlnkJUJ4xqMxSgnm85Nu3jhnWCxmgO9OI1ife0GSRyBIyahihv2Lhql4v1opIQYUqpT4OuTK1Lo9A9ZKufIRQwwGDAZDjGnZ2pqyXC6pqn2k9Ey2Zvzm33zI9RuGpvm/OqsIYLKj8fmbVLlie+dXKXcrTouUoAa3abIRg62vc/ny+ccSDLcuYbIrMLzL5ct/j/N0vb0zwGZv0OSWne3/j+yciVCMJBRvUmcZW9tf5fLls36rEJCNbtBmU/T4W1y69OzcOk2mU0x2HTso2d39eaw5W6md3RyXv0ntYWf3V/DN2TewzgRi8Aa1HjCefo3Ll89PIziYXEWNbzDceR+1/QFXx1/mxnjMj//E1/j46Gdo53MmW2Nsdou2aLh06ZdoqrPkqcmOhuItqkyyvfNPKC/XZ66REtTwNo3+9v0ymIR+8cMFly/9P5/YLy4P/bK7+w/J5fn9Ioq3qDP9if0CkA2v0+gp2fiDb9svNruBHSy5dOk76ZcvfWK/yMEb1Fnol89/fsIbb7zJBx98c+268XgLuBoTluVnov4hWHwI4jUZ2WTSWf7L5ZKyrJjsaHQWeC9Zlq0d//HdyisBakMYd/IwiX8TpkL3OSvJ5w7/VVVVtFSO8d4xjpiKMYYHDz6mvXyNg4MnHYgJMK1yynIPlObJk4c8fLg4U4qQMJ9NqWvF4eEzHj7cP7ctzw89db3FyeyEBw/vnWtc6a0Jdb3HsmzZ33/A/PjsQBmMFOXyMlU95OmTxzx8eP5kOTkZUjU5R0eHPHx479xrbh1cpal3mS/mPHxwr4vR6UsrhlTVHt7Do0cPOdg/u7DqTLBY7FI18OzZEx4+PH+yHB9lwA288KQziUI8jODk5DkPHz1iemOXur7MsizZ379PXZ4d4Gv98nj/E/tlNp9SNYqDb9svjrreYjY74eHDe+eOJT2ZUFW9fjk6v1+WyysMqwFPfoN+qZvi2/bLjWdXqVO/PLx37qKS+oXfqF+Wu1S14Nmzp9g2Q8b8v+uS8BS6eXVW4pfx9/rUfJpMJnhfYU2Kbo7g7UWj6Yczf5oug7h2MaDK+zUs5PTK6tIi1MsNEiwVw9ZWOAf45OQZKc7m6tXrPCvWUw1u5NWI9x5rLKZtaeoaNwoHyH+CB7uRlyin51OSgDumQ8nW8+kk6fLmxjmVZafn0wmTbYtUOuJejqOjo7W4te9GXrml4iKBLIiLvt3pHR9OmS7htxAJ6pnNAnFtNAqLiLWW/f2H2GtvvOzqb+Q8iZBFIvV1mNkLhshv5DeW0/NpJXHnSvR3Gk9L/+xG12GUq/k0AlHibDoqVTCdXkhLJVDE+5iK6jCVEFCYgtT6ItWKp5ISX58+TKxpTgL2kOXcvHmLp4PiE8y+jbxU8SE5VJ7nHclwY6m8HnFufT4lSVyWRN48jwWrYlIzEQMGtRxhrYknS4RI9NFwlfBJa81yuXhhS+Wl81T6LEBYkdp8h5VIUhKk/t/EZYEV5hJSFngWi5K2DWxOCNuph4cHMdXiy27BRk5Ll2QrsNe6t+fGUnn1cno+rUR0f70X32ZOBQnzqcUY182nohgSEnYFPo5SkvF4cvEslZBTo+7yRFgXYx982nsPUa5hMezBuN3xF77LiJVlCmPCYlKWZZdPBQIfoY1HPGzk1UrKm2ta050lY53dWCqvQU7PpyQJQ0nzZZUUbPXX9bgszvmO/zMYDCjLirIsGekQvRxy03hm7QU89jTQi2VnQoleXEafkXgWzV6ZXOF0wXAqm/fhJDdr2y5fp3OO2eykI8lt5BVLpLp6H3gPUsqOvr+RVysplui0S5IwlpSz9+x8CjuukewbyaAt3juqqgpZ3/I8sHxjpn0hAkv7wlkq4Ncxle4wsRWWEhIJnwrc6pHldDT3siywFwPV2XeLktaa6XRK+4JZvzfyHYoPh6X5PGcQ+/VFCVIb+c4kAeOnMZV+gu7uULtToqQE4bvfJSEmbDWffC+5fJh3Iaj0gpHfUpa0jlEbv++I2yJhKusO+SnuYVxdg/mWtsZUTJrkCRnN0ql+G3m10t/tSexLqTaYyuuQ0/Ppk+T0fEoi1rCXADuk+ZTAXvAgBEpr8phh7kXklRzRUZZlt6+urIhZulyXE/Z0vhGgx9NJx1usFpakEGMM+HBwWMiq1W4wldcgSfdta6ibcFCcNRtM5XWItZaqKs/wVKwdAStM5TzrYkU2TfFLKwsz9amK+KWzlrqqyNyLH3v6SjCVvg8ofNj5wae4khUg25foIZIWkz6zNi3S/VtCXpaN+/NapOsz121xyo3r+Vokpab4JEwlMWHPX1TO+3fKwx+/634QMT/y+dvTn0ZeCabST3zdP0xs7RDyU2BQyvUqRDr0KgVBpWTa6cD0cDZssno28hrEhyRQeZZ3/epfkMuwke9M+mfy9CXl8Q15UgTen5f4TPQSn0mMjUfXetvNp5Buw8fcQHLFQXoBefWYyqlVLyUbPrsY9tl/vkO9Q3ZwvXbshZCC0WhIMyg2mMprkA2m8r2Tb4ep+N6c+aR50J9TASux8WTEtOuzeqEn0umLegCvDFPp8qlo0TUgxCiY7gyZviSCZt//a5ombilX8VgGAV5gWsPh4XOqG8sNpvIaxPuYx7ZpqXSNGQw2mMprktPzKYkxAVNx3nUY42lZ4ShhTpk2nHWV5lNRFPFl7bt5Nhj6M3Pz08qn2pBWWnDl5oB88O1uW/FU0mLS0XF8KnK1A7S+E5QwlfAJqR5VPGYjo65bPOFNubu7c8Yk3MgrktM8lZg/dSOvXoLFvppP/aRR4ffz55P3Yt329wKlwvHBa/PJh9CYcIRHSgL1Gt2f8TTjj/1XX6ReWu5/a85Hv37C/EDz+H5/FQ3+WZejNhOoXpLelDrv9Hq2wlRE/D2c7OZ9ODUtZNUfdGbe0dHRmdV7I69IfMirqrOMvCiiRbkxU16HBExlNZ+S9HkpaeE5LaqHqUgpusyCq/k0RMmKVUpJ2cV2vYh86teNs562dTSVo60do7LhUu+oSBmT+qZDjvrMy7CgrDCV/qcv6ZDoPC9QSjKZTMiykBYPgp959erVeMjWd9nyjXzHkjCVFci+if15XaJUCAZcHcIWPmngnzeXujnV6x8hBEWRo7Van08iYig+YCp1Xb/e3Z/Fcctf+HNfY3bcYprgd707mSCb1VsrxCpU3VGPNuZT8TF/Z8BUzDmYyuqgpXRkaFWFYxxPTkKOh7zIO6zl/v37tJdufPct38h3LCueSsinYofDGM/1va7Z97+k2J80n5JYM4KYLvK8+QThyFN82O2x1tDWS9JZQc45RqMRzsUcw4QD2ieT/IWt0E9lqVjref607haUT5J0gFL4rIg5ATsJrs95PmC8u/vvLAtHem5t7aB1wWJedqHeN2/eivk0P32jN/LdSSIm9nMQb+T1yGlMJSU1CybJJ2AqXnTB/94L8nyAUvlqPi1KnBNIpbtFKZ0R/iLySngqSqm1c3/WeSqJo7Je8YSj9P3DFFCYDhPb2poQTlPw7O8/pN27+fKrv5FzJZjhAVPhJXAZNvKdScr5fAZTUeGcZ8H58wmIuaEhnEUkaarT82kLoVqcNeiY62g6mV488ls6WS3tDnTnsyDWFpYzWefF6h/pt8FgENPfhcPElsvDUGmtefPNt3g82dpgKq9BukPHYv9JEdiXG0zl1UvCr84ni67+fe4pDmu4i+yOFVklvi4Z5yHmx0WCYzrq5kXklVgqxpi1HLXepVyatsNVzmAq8dyf5P8BLJcLwHN4GPgqo9Gww1Q++ugj7Pbey6/+Rs6IJxya3pp+jtoNo/Z1iPeszackgU3uOwzy22EqLl5TVnP682ky2cK5eXdeUNu2bG+NLp6lkg5B6ij0UkT/LxyGnhLHrJLKpPtSgM/qt+EwWCrT6TaLxYKTk8MOU7l16zbPRqMNpvI6xBP7znUBob1k7ht5hXJmPkVJxLZwzdn5BCE/tI8XOOfJ8zSfpiwWc2azGZOdEP3vrMU5yfHx0cUMKDx9lrKK+VSkkjFHreT0wUbBugtmtdYrTAV8PBbTM52uMJVH+w9pr956+dXfyFkRId9ppjPyIu9c2I28egk5mbMzmIrSunN7tD47n4CYt4jumqYK1I/VfNpCRkxFaY3Wkt2tSxcvSVPiMqScDEqLiHskvy/ttZ+5s/ubEjgNBgPa1jCdBh9wsQxHTGqteePNt3g8nrzs6m/kE0R2L4XekNmsK69F+vMpSUpqFmOVz8UWRdrcjYvP6sibMJ+Wy5LJjkTpEGMnpWQ2m1283Z8U5diGMy1xBPfHEzCVFbZyXih3yrsSzo0ty7Cv/vx5QK3H0d1p25Z79z7GXr6+AWpfi4h4nrTt+nUjr0dOz6ckq/lz/nyCde6Xc46mSvPJkA4Tc26JNRZBwGDGk/HFS9LknKNpmi5Rr/Z98tvqMLHTflvy00NKg+AvDgYDrLVMJmFlPZkdxJQIgr29qxzm+QZTeR2S/HpjaNtmFRC60f0rl9PzKckq2RnnzqdwzSoxk7UWrYfdkTfhMLEZ422LkApjLa1xHB8fdcDtdyuvBFMpiqLzAXUmO0xFqeDbZZlEynN4KjEuKGEqIe+Dp6oWcWUdkdy9w8MD6pvrit7IK5J4JozNshg6oTYBha9JAr2++ERMRcrz5xOAjtCDjDhlWxukXM2nra0xSjfgXUwlKdmZ7F48TCVJloVD1nWWQL3E/JPnJpTpIpQRQEp8XWCMZTQaU5YVVRXOulVac/XqNZ5uopRfj/iQGEvH3B6wMVJetyS9J1EynCgYLJFPWgTS92FOZVnY/QnzqaSqGka5jClFPEJKlsvlxcNU0s5AMqE8ooeX+IiBnJdTM/4OgMN7QduG/fTlcoG1lmFcRKwxHBw8w9x8a4OpvAYRQkSug8UY0xHhNkDtq5fT8ymJi7yu9PmkHLWrv462rdfn03AELGPag3DdcDS8iJhKSipTAqC0xMb8Dwnoa9uzZB1rg49uraVtA1ArZY61jsEgwxgb4hIiPjMcjmi6fLYbeZXivQ8HibUNVaVoR+Pgw290/8pllaSpXPu+NZMOpzxvPqV7U5KmtrWEdCK2m0/z+ZzRVphrxljq2jKzJxcPU0lnlIRVsM9TEehMkecaa/WZTFVKhXBupcI1IamMjBiKQynJYFAgIm05WTEbeQ0iAvfI5QXD4ZAs05vE169JTs+nJJnO4lazJs+zc4FarVWgeEhJlilsG079DPNJMBgMyfIGITxKawYDzdbwQh7QHiyJ5AMGnkrEVLzAufA5azuHJE0hujI0SgiFcyBlBri4EHmkUgxHI8oNWPh6JHIYdMztkTLAbeTVy+n5lEQmTMWlUyfOy2Ebz/TxAc88PZ+McejIZE93pxSuLyKvJPG1lGoNU0nx10J4pAxZ8s/DVAQpg35SlGXFW3Ex21U496dtLv5hYlrDbzT3pIQ8h7oGWzc4e/Gsr5TKwrqwrRzY0epCYyrWOKp5w7erpPdQzWtMm1HkCVd4fXX8TiTttJ12Sbx3CHzM7HZ+zESM++/97lifT1mPiRuyLmqtLx6mYq1luVx00Y46Exh7KRJ4LE3T0jTtuZiKj5hK07TRFwyAlFKatjXhe+exxtI0dVxVX3YLXo5cvQo/8RPw4AEUA0e5v8+x3+Xt2xXtMeztgbXh99/1u+BLX4Lb2wcsH1+8Ha1EvqrrmqUQtMMh1pgLi6kUBbz7Rsnyzh1an/HDX7TcvweXLsHRUegb5+D5kcM9usNs+Bb/4o+3PP4Inj79Xtd+XcJ8Wp6JHm6aIS4mPmsac67707YG5wPvq21bbKvW5pNzHq8M3kXsZrkkc+XFi/1JPuBo1MNU4nmtWif/Lz9TcaVUh6lkeQYe8jzHOUdRFKtUlDI8Zzgc0pwyCS+S/MiPhEXx85+Ho2PPMG9p73+L29dqLk3C4LYWmgaMCQPeygLai8e9ER2mkjMcDMmy7EJjKrdvw2QLpFmS5yOuX/e8+xnY3ob9faiqYCHeekNCViBw1EZzigpyIeT0fEqSZXkPU8m7yP4bb8/Yu13z6M6E0SSkqZBKkmUZWhbxLOXV0TZ5lkWcUjEYavKsuJhRyt57tE48lR6mgsC58Jb4pLNfvQ/YS7BaQnRl2xqs9XEgB5OvbdsXRqlfpfzar8E774S/rZF87l/aJbu0y8Nf/Zj3v1JTVWHRyTI4OICPP4YfPnZc++FLwMV6XfoOU9HoLOv6+KLKgwfwzmc17fAqVub86leeYxrLlSvw/DmUZYhRGwwdb/6golk2PD+w5Pn3uuZn5fR8SpIwFYlnsF2xVCXee975lx/ye37fEXUpwUvyywb9CEBQ101YXHRGWVZonXVJzNMcfRmBoq8IU5Hdytkl6MUjhENKIvtvfVAG2pvvMJVwgprAGOJukMG7sC0GMBqNaAaDC4upPHoUPgCDkWCwu8Xlm0M+/B+fcvfuem6MBw/C3zK7QrF18dyfjqfiQgi+EIElfVExlaqCb3xU8Hs/f5PFScuTZ5L5keXjj9evG4wkk7fe4PL1Af/7Tx/w4Yffm/p+O0nzSVoL5gYlwZwKhn7GblvyueIRv5ZnMQzGUS9zvvKLV2lLx5vXjnBORDzTo7VgMhmxXM4AE+aaFAGjEaLr3xeRV4KpLBYL5vN5KCCTGLPb7afXdUNdN2cwFdPDVOqYnd+YcNCRcy5aJQHtbpuWJ0+e0Fx788JiKt9P4r2naRqqqmKBoI0Z+S4qpvL9JAlTyY6PGbuW59kAUBizhfc5h3LAN71kqU/weJyuyQY1X/jt98Ersh0P99s47xTGOIQ4oCwrimIQ8E0bAg6XyyWD8YsfJvZKYn8GgwHD4RBImIqKeVK+HaYS3nyqRwUP6SQtk8mEslxignfD9wAAIABJREFUzCz493nOtWvXODjlZ27kFYkIvAiXh7OUtdab2J/XJCn2ZzAoGLqGd3zG8+xH0dogBEx9w157m/IJWGsQB09p68d888tXacqWd984QpAHTMwohsMhN27c5P79exhjyeJuTzhbKCXAvmBbymlrquOpRExF9LLon5//YYW7BPNL0LYhEnOxWOKcYzAYBrqLc+HY0+ubw8Rei3g6TGUV+7MxU16HJLxDZxnaKi75hjr7FZTaAfY40QXP1Ay7M8fjkbuH5APDZ3/sGd5Ctg3igYs5jBRNY9jff4QxaT7VWBcPE4ug8IUDaqVUnW8G9DKvJ0xltV++LgFTSdeFIwWyGKo9oiyX1HUZy5BcvbrHs/H4wmIq30+ScnrYmLoixP5cXEzl+0mUUtwohxyYL2Jsi/COVowj/0mwY5fcYI9ynmOdxZ1Y2tpw9/1LtKXlvXcPwotchDlXFAU3b17n/v17NE3JaOBQUuGcBaEoy/LiLSrOOaqqoiyXwCr2x3kXD6QKh1J9Ek8l7buH72zkSITYhjwvYuLrmjt37uB2r7/s6m/kHEk8laapKaXEjEZYt4n9eR3inGNUPqCuvoV24Vzy2mlacxXvb3IoBnzwZEhrDAJLLuYo3XL97Wc4K1Fj8L6lbQxtG/Kq3Llzh6ZpGI/HtO0MY8I8q6qKyVb2wjt7r8Qx1lqTZXn8ZOFIB0Q8ElV1rL3+R/bOfU3fjUYjiqJgd/cSw+GwW6iyLOett95iMplsgNrXJEqpzv2RUkZ3diOvXHzAG3WWxe1gHeZPjKebZPC7hydk+jMU8i2utBprNM8eTHl8d4RZeoTIujk1Ho95993PMhwOqaoq5lpR4CHTmrIsLx5NPx0mlsdNf6UFQop4HpDq/p7mqSQcJS0q3otosfgub+YknvMTDhPbp7myOUzstYhYnembZ1l3DtBGXod4dNuSZxmZc2Tek2dZR6WvLejyYzRbGKl57ofo7ITdaw2uBT0Izwgvbk3TtNy5cydugEyRygRM5f9n7826JMvu677fGe4UY46VWWN3V09oNBoNgyRASOJMy6Qk05KnB79YtJeXv4qf/QH8AbyWKK8lPUg0BUoGB4EECGJooLsBVFdX15CVc8Z4hzP44dwbkZmVBRKozOwkGLtWVGZG3Ii4cW+cc8/ZZ//31hqpJP1O/4XP7bmPVJo17uMRjU3tT/DMbH6evp32hnAkSYxSkn6/RxTpOpIxcCq3bt2edTILXDQCp+J8mMbOyJTFsb9wKO85OBpga59Z7xzOxjivAUnXF/SUpO9beL/GDVfgrGA8iBgeamw158TAkaYJr7zyClEUMZmM8L7mVGzwqR0OBy+8zxcyUqmqijwPKzMqErWfipuJc4L+5CSn0uSWeBceB2b1Dru7+3jvyOol5LIsuXfvx/ila+e/+ws8i2MB7UVe4Nr2Sitqf96Q+xDSHjtHz0G/Wqp1KpphmfL9SlGxhREjfiwzXuYQrUtEfQG21mCMxRgYDkd8+OGHM1d9ayez9lZWFb2rGiYGcDz2tInogCbCg2dGGLO/RajL8D6EiVVVRb8fwsTGo30gSJbv3HmZ3fYiTOyy0GTMiOP6lMWxv3B4H6r3ZR1rozHE4h5SXEeI67STKdGrAtqHKJ8hXjqsPVQ81EroMPUJbazdbnHnzkt89NE9xuMhnSWP0grnPVIqhsPh1SsoBEFci6TgeEB7yIxRSqN19MxIZc6pqDpbRtQ9qGA0GuGcp9utw6O95+nWE4r1RZjYpaApBo0i0iSZyQYWuBw0YWKJc8SVJKnJWhB07Zjl+30ecQspOoiXHsKXn2DKFqawSERteBaeU5YVH3/8MdY6er0lhNrHOVsTwIqVzhUNE3O1fSQc96eYx3Q8vyDtpN9mkiQnwo/G4108ILXixs1bbC90KpeEcE787NwshiiXCV/7gHTNMs4nOJfgfReI6ZdDildS7PJTBAPEa7tI6Wj1ptgKvHL1yD+cuzRNuX37Nh9//DGj0SiMVGpOxXvJYDC4eqs/jaFPEyit7MncnyaD5BlOZdYJOWxN7jbLWwcHB4SA9hZ4qMqSBw8+xq1eP+/dX+BMiJl3cHHcGWzRoV84pJSz7J9bk0c81gmV01i7AazxSXSbnXvX8DahooNZdZjPP2F/K8EUDiqFMfOsrclkwr1796iqina7jXMTjHUggqF8q9u6eiZNTWDYDMdM14PL1PEVn+Ob+WO/B5FPHMf1SKVTx56G1HqlFJub19m7igYYP4+oO5GmkKJZCVpoVS4e1jma2nxBFdqQUEABOJJIcOf1j9hpSyQp6nP76Cjm2u0jnFGIxNaZymHVLk1Tbt68yYMHD5hMRrT7HiXrCz+C4XB4NY2v0zSdcyrRnFMJ4rfncCpyXvfTcCohOkCS5wXeQ7vVns3lDw4OsLcta2vrHB0dnffHWOA4ak7FxRFJmgYhlVSsr6/D1pNPe+9+riEINEBiDFFVEccRSe1r0/gT3bgv+Q6vI2njbz/CfHaPJ/fWqXLD59/Zwzk541SstWxv74T21O6gVYhAVVoRxxFLraUX5lTOXafSTG/md4T/wnyc2VTo9K3ZLrwGtTGNRghJlrVQSjPNcyAYBq2urqJ1ENmdNgVe4Jxxao49j7B1dDrdT2mn/v4gaL3qczCzlA2/pFRs2ArKu6jqFdaSIVFS8tJnt7n77iGybVH6eJuKWV+/hlKaPM/rVR+Jry1Gghbsisn0payVfkVBURSUZRE0KLMOhNr9zZ+4NY7g4QsbbmVZzfJ+yrIiSVK8D8FKe3u7GGPY399jZWX1vD/GAsfQFIhWVUVZc2VSSg4OD1haWlqQ5RcIKSUeMGWJrNYoypfJi1cxZhNIkbljYCzWfUzpPmF7uEKZaz78q3V+8PU+dqgx1bxNFUXJ9vYOZVkRxynOBYdF8DPr1ivIqdgTCfXzTq+OCzihoD2NpqA+/K+UBCxJEuN9MftCCynpdDocIMjznHa7TRRFJ953gfPD8dU6zzwQ3FnLJM+5vhitXBistRhAeE/kHyHFLlJohNgErlOmmipqQZWSCMXLvQfEqeetLz3BO4XuWZSeq9W1Dgr1PJ9Sljlp7JBSzEy0J5O5GO5nxQWGic1NmmStvJFyXix4WucgZfhb1rU/zWtJKWuP1ODRIoRHHo9V9bC3t8/KyipPn26d98dZgLnxtT9m0tSco8PDA3r9G8+qGRc4F8w4SmOQoz7OXcOJBO8zQJGVJUt2hIpbWDpsD1/ilekW7/35BtXU8uqtQ5xVJ9pdWRZIKdA6QqlAKSipSNOETtyZtcWfFReiqP1J7HEz1Tk9bTuuZ5n/HcjbMKVqYgjELDGv+R4XRY6qHcMXOH80GpX5325GtDvn2NvbRamVT2v3fq4RRoZh5JDqHdJsQqY1UbQOrDKJU6a3HlO0/4LKZxQbOWmr4N1ffYR3EC1b1BN3rM1JoighyAQc0aydhXZbckXDxIQQs9ofHQUSCO/m9T3+DB9M7wkLy42eZV6UaEzwU5EylGi7en5/PEysGa1Mq/3z/kh/7yGEwJo5pyLa7Zn9J0CR57XCc4HzhpKKZb/E+/kGVfWQolimMAnGdICYdpHTfdQi4lUkHezLW+TjR3zrP16nmlruXDvCVM2FQNR+RcEjWmuN8ycXUKQUV49TaQi9BvOrnJj/fUZPeHyg4o8/98TNzbZt3qd5qdlohcVo5bwxO4d+fuyNmZs0eQ/GmBf+Mi7wLKw1LBePkcIjxBFCjBBCAxvANQZxxt5LjymXfoQjQ98pSdsVv/hfPgQPyapDPTm2eFS3o3k79Mfey9ZCuSvAqSgt+e3//jbjo4qjp5LuUkqWhZUaqdWsViToVCKUMoRI0zkaywQhFEpqvAetE6w1xHF4rWCLB1ppWq0ORXQyqGVvb587dxeVy+cNIQSRjvB1DUqo4TrZgVhrF9PPC0A49pJEOrQWxJEg1gKtw7i+LQ0vP2qR3n+DER3stTBS+eZXNzFTuPn7Q5xVSCVrQyZNq9WapV1IKevYHEmaJkQquhpVykLCm19c4sbLbUwp8dMx2dIG8Z+N+NPiMzh3iPcR1i4xHvextoP3njiOKcsQx+H9I7zXGJth7AZaafLc1kVQEWVZ1PaSMVUlKbYccf+k90NR5DUBtRiKnydmIxXR/O3OnL4KIWm32xTTF/fkWCDA+7qERdTSdDGXqIcgMMvTboXrjJDCE728T9Yp+eXffQjek65Z1FM7e6pzQaLh3Pwi0MwcrDGgOHMm8dPgfDoVIE4UH/1gwAdfL7izfouIFrb/gGz8HaADaITYQYgYIQKRmyQdqmpUv8phLUMeIPgErVMgrKWnaYq1I6TcA0qUGrHaecJUvfbMosPOzg5avwRc3fTCv3OoOZWyLClUDq1WvaJ3crOiyFleWWF/d9GpnBeUkmCC77OpKkpZUBg1WwxZtYfkdoLLKywl5UHEZKj45n+4TjmFzf91iDUCaw3WhorndrvNcDigqkpUHBY/nLNYJ6iqcqY1+1lxLp2KB8rC8spbPW6/KrHjIX/y77/L4zTHa4XKuiAkGk2kolps4xiNxjQrPEqFXrOJ8mgCxSaTKVUVCqJ0Pd2xzjEcDvBnBLQbY0JUwWKJ8/xwSqfinDvT+No5x3QyodPpMhoNL38/fw5xupbOn/oZ24L2nkOITaTIWNOPyTqWX/7dR4CnteYQTxxB5xosWvf29uuIjhTPtF5ACQJHlegZd/mz4vxGKqni/vtDfvCfJ9xZu8H2jxSy36K31Kbf7iKF5FX2+UFxE0+X499IISRx3MWjcC4Beidev91eZjKZMJ1MAIWUXbqdu0SFQZ1xAKqyJG1dvfjQv6sQTe2PjojjuM6IOVuMfXBwwOry5qJTOUdEogW+i/dPwffwPgbfBzT98ohBFKO8BhJGeyvk45xvfvUa1VRx/fe/D14jpUBKQZYl3LhxnYcPP6GqCuIsjIaCHiaZJVi8CM5vpJJbXnqzy42X+4g85yDX3M8HbLsRwzwj7ba4L5exaR9VmRM7LqUizwuEaIij+fAriHXCEliWtcJ0xxv2JkN+qSxplSUHp/bHOT8rYlzgxXHc6qDxO33eF6+Jz1yMVs4HHlgzJan2KAVah5tSYYS/r/o8chLECC0tnZVtso7hy//VNmDDSGXLztwWy7LkyZPHGFPVYWI5zlmkDCOVtJVeEaIWiGLFgw+HfPiNgo3uOj/+9hjnJcsrS6xna2ghKVzCJJ888/wsixGi8VwxODdfktZas76+ytbWEybTEQ1ntbyxijDj5+6TqQzLy8t8wuKL/cIQAmMNVVlR6ALa7TM5lQaHhwfcuHFz0amcA5SUSDHFmodYN8LYCRYVPIeIiVTEhpK46jbKOqLdjMmw5Fv/cT2MVP7lEGfD6py1wU7k+vXrPHjwMZPJmJY2CBk4GmthNBpdjU4lFDw5br3W4drNHmJq2RslDB9MGQ0nPNnd53prE+9j4rhHWVazeZuUktHIYq0kxKFGeJ/MHqsqz8OHO1grSZM+IDEWBvcfo9vPn/sZa0nTdFETdB5odEL44OZ+IiXhWSxGK+eH5lg37m8nKvuB3MLjtQK/8jGbbLFzK+LdtuOLv7ED3tJadYgnfibJmE5L7t9/QFUZ2u02+AJrHVIEM6isk12N6Y8AokTy+KMxP/xmzkZvg4NPFC8l11jOgtkuwiHlEGufImU4KEIIOp0Ow+EQKScIDIIJSu3jPfR6PcbjMaurawwGI8pqG6iII8P1TY0e/+TOYm9vj9XVVba2FjVBL4RaG2R1RJwk9dTyJ1/NFqOV80G7VfLJGwaXxGwfZkT33iKyfbTKAEeXnJsHgnTX0XUx9qWUYir59p+sUE01tzeH4DWq1qm0Wu3aTvI+eT6lkwq0CiRuHEfkeX41OhUPVKXj+kstllbaxA4Ohpofi0NumykvZzHtTsLS8ohI36GsLN5bvIfBQABdvN8CIoTs41wICTs6EgjRY3dX4twqcSTxPmE8jnj04y1eiWM67V9hMynp+RGFiHG9Hp0IpE6I41+C9grLy/uhF6ZgxR3SF2M24hVi3afd/gL9/jvPfCaFY6M3phMnZN1bLN9cxnuIfYlHousl6411TSfOKLM+tzY/x1Yne+a12pljKUuIkjbda++ydPPszrDbS0jihNbSayzdvEnXjdEYDBonBGPRorsakcYJSafNzRsKZUpKETMW8/ftbSraSUJBTH/zl8gY0PETYl9xIPsMZRsdCTrthDhO6K5/jqWbYbWt5adEhP07kl06Swlew9iljOizXy2z4zyPBzF65W1WozvcWLd0kpTDVof+zS9T5nWVeX+J9fguVVnSXRL005gkUdzceIMyV5TipFhOSOh2UpIkZWnlNV670edQ9DAicGzaW2Iquis9siSh3Y1Zv9lGeIfEhfNfu3mEY5BhM8HN62/ztPMscZ9kgk4rI0oTuhvvsHRrfl4ib+j6MZXQ9PvLJEmL1vKrLN0KFqaZL8h8jkEzkG166xFJOya51qP/iy/RlL9pLN2pobufkG106KTtcF6u/wJWnRxpR76ir3NWWx3ipEv35dv0tiz6oOKwstjdmMHogCMxYdl0QWYUUjJZe8p4bZu2P6R7q0eaed75BwNwntZyWP0JJmmSosi5f/8jjDG02x2EKLHOIlUo3O12u1dj+oMGHQuePpry0XcK+ukq93844FbVpdd6nZ5dpVWVvOIK7vlvMO1t8GRYnngJLw/xoiROc9APQx2CkPSXluj3+2xt7TAtH+GpcL5Nmzf5M3OTweRzbIgj7rqH7Ihl3i9fRro/ouUr8vI3efRkeSZH/rJ/j1vs8Yp8RN8npF5i3K8wdp995iNJ4cjbf0Q//guizgaTjTfxHrocYlC0yFliQncdkuQxrSrh9sZNHrTfxJyyqWmlYzrZt4ljTbn6JSYbz1oFCAG2c48k3oX+Dezmdd7238N4yVC0UVi+yeuUy3vo+MckWZvljc+yagds02dHzJMF2usFIvkeLTz5+q+wwRYtSj7vH/OeeJWvi5fRr+7irn9EsjzBfOF1plnYJx8PWVv7ERk5T8VtzC9MGPePmHwm5f3fusYON/ha8h7317/Jgze+wpobEr+ak3S3SFzK9Cu/QFFK6E7I+1MEofYrbln07U9opyWd31vG7y+Ri9apYw72s2P0Zon7HzR8RVKgqVwCj18m8zmyLLBvJ0QbR0Sfy3D/03U6ZkpUQXn/XSa+A8pSfOn7+Bt7qEIw+h9fJ89Pqq8BiDzulRFRF6rfvUn+BXXsoQl9nlIRIb/QQd5wuN+MmG6GlUnXO4RrOzgERa4x/QTxikN1YvL/+Q7WeUTew1Sau+VDrg0qqv463OwSA8W/eJN8dFIPUuHoyX2y149Q6zH+v+vzn45GfHjQYfxXn+GjG9uUe6s8rTa4vuZxnT3KnmBzP8bsXyc2nvJ2Rj494gd/0cUUmpdu7eKdx9oKYxztdpuXXgoRHcPhEZ2lCikVxlQYozg8PHz2OP2UeOFOZZRqxOsO2/esLaWkmwlkhu1rCWJ7n6PdXYbqLlm0zLfWCvTn7pG7pwh3yl/2+h6+XZKvbMHbFuEhShLG/gGy14G1Edzdx3dyytzyo9cqds0u9u6PMHrKbrXNyA+QfYNfHuEyi3znI5KN/aBd8Y6pfJ/vf/kTvrtU8nv/UJCst5G/8/8Svfy1E7vSrBqVb48ZrHrsK3uo3/puqHuROZX1HEQtJtLDqqVcLTEdy+N/7FHD9zi9yu3igvz6CNlLEF/6Ier2s4ddSYV4bYhZyvFvPUa5Ad+RitgXlDisF8jqu8hXC+zyBGsrhr+1w6HMEHYbxd7stWTP4dZGOCHQv/Y+W2YHd23KQyq69h6aTVRUIdYSfFvBjafIai8ET0nJQK+ji8cIbyAKfsHi1kO2fmuL0n/CD+QO43yC27RMKThazaj6YLoD1D97H1Wb/nDQJVIJlamQKsK2YKITpi0NE3/ClxjCSEVoTyQcuIxJdRc/rQCBkBXSC0hLRBpjlcK1HO7GBDNxTFaH2M/8GdrpENO6XkILfOIQb+7RGkRMtlZhshTerDdCrE4hMxBJ5OuPkBtVff4FJZYnFFihMTc8ItEgLV5X6ChC0MPsL9GSHzO4MYKkRWQjdKHwBXgnULHH4ThKM4a9lFvpLi5OENLC5kcwmn921QWVrzCgYtyKaCuHOdzEPlSM7D5ms2Bc7VPdnLL73iZOlOA9eXvCk7ePMOp7FMWI/msdspbm9S+MUELQ6oN/6GjM48bjCe+//yHOWXq9HoKyDmgPGq8slp9+RIfxCvuBRh4IDvYKPv5eyXKyyf43HKbK+IpKWKqWiCcpvY/WyL4Dh/YNBCev1vKX/ho5+gD5+A7iu18EDzJJaEWCu298wA9dD+U7aLaJXIasYnbsa4yXO/TlU+5P32Ll0OHjO3h7D+lKfH4bM1qZEV1PhST5i1d5xDL27p8hWyPYTvD32yf2RWkdyLBrFW6qkY/u4L7+C3gvUOzQTcc8LjRjoHt7iv/FD8imkvJbn6Hckc/wl0VSYb78IcqX+O9t4H548gqtIx3ypW9/hFpzZI82Kf60T9LrsTMazcRP3nt8NUB+rkI/bdH5zk0+Gl9HrA7wrzxEZPVqmPa1p5/HScthuYraUgydgWwf59aRXuKrId5WYDK8iXFhvZ4032fMEp4eWBA258YH13j1z1v0XcrnbcUDcYtd+RZR9wndZIArUvQkwf/oGt4AyiGiCqcUWIuPFM4PsQKGywOscgiZgZf4MgEPQkl8WmE0GO85tB50jDhaQSztk5ox6rANVuKcwOQR+W6HqQeURCg7Ixz9MANT4p2gfLSJzTMwBuJp/cV1sNOBYoyIPf6jm/itMHLwQAmUIogxXS+HzhjhPcq38SVYK5l4kHYT/+gm/iaYGwMMHln2EELiO1uIyLPnPYaM9fQILwV4RXJtH7lcG4oLgY7G2PQhBZ6yu4GyPXgqsPcV+2KdZTGg7QTbLmWpO4Q0Au05ig07PcuvmR1a77/F1o0exbv3efBhi066RvXGPt6HEHarm5GRD6HvWoFWyFrKEUXBy6hxE/hZcT7THw/OenorMXfejOhFGY+ftNmxE3bMgCNxSJooUjHlUC6D30P4/NSLDEEYhJggxU5YUTICZSbw14eMeYmlFciY0NIFq60HvLw24GDaInJHuEzg0pK1zg+I0n2qOGJl7Y+pqvkXJceRTQqW77+BeRrjrrXofNjh2n8+KbZr5pT9pRz5X0xQh1M27n8UyOPoiPzuPv0k8AGdyCDFlCNSHI/op8+ekCTxIHJKqWhHR/TTk0vhghB4nqgJVnmcP6IbF8hyl452eD1/zVaUI6TBSMOBOCRLxvgRpPdK0GG/OyseNYbCx3TuQXkQ3NS9l+R+g24ZoVND/K7Fpor0YUXvQ1/viafFPodC0Gef7LYizTU38kNeyh/RH6W8aXKur0x5MtnnMNe4pI3/gsMMUvrvZRSlAC+gjGtdC3Q7DvmuxZLQ+ddrdLOHaO2DCWBeG3RJiDfBZIr4fUHnL5sr5iEQ3OJTv0e6nCNeV8j9it6H+41rBuBnOpr2dYn6nMZPI7rvHaAmB6SnCMg0EURfVhgZ0/54l979Z6tzhYD4NY1fj4juO/p/mdffpqYAR9LnKS0vkSOF2JH0/+oIZ8GLmGaJLBOG9K4mfttQiJjkrzboDvzsPdL2LtNUoQTIVkLVF2Stp1xbhQ1T0Pu+47WDnEiNuTH+Me17y8jPpNz8ZI2lP3JI1Wfn1gPk2svoCK6/VCJ5ShSXCJHUo++5VcjMX6U+JEoptFZ0Op1njsFPi/PpVARIJZgMDdufVIzEiN0nQybe4E2JnTh8BduujfcW5yzOnzyBDe8RitUM3guSJEVUnnavg5568sE+8RhWpwW/NnJ8Y8XwtT/9Ax4N5m76veWYw9/7PFlbs/O17/H4x6MT7/OI4DK3M3yL1WKJ/f2v8ejR2Y7wO/s3GRUvMRh+j0ePP8A7zyOAj+fbtN/oMvxv3yY/Muz+p28zOnyWhE1bmqPfewctUo6+8VX2/vrZeasQcPTu60xfWWfw/W+x99UHZ+7TobjG+DdeY/rwPk+/+h7WPLusLm9kjP7xO3gPB//uO+w9Od2BQxRJBv/oc/R0m8Gf/pC9/2939tjuse2OVl8hfud1bn48ZvUPBjyMpvyKjnCva/7wR3/MB9vbLP/CEpN/8Bb5oym7/+a7FJNnG2e5EnP0T98h62gev/c9Hp46LxDOy+Dzb1H0lhj++Ufs/Zuzz8steZPp2y8x+eCA3X/9/pmrFa03uox+822KgWHv336b4XPOy+DX3yGqUg7++AfsnnVegKOXXyffWGf0rYfs/MFzzsvhOpMvv8703pC9/+c9zBnnxd7I+I0vBkJ9///6DrtnnBcdSUb/x+co3ugw+FcfsrK7ye8oxd5jz91SY+KYjisZRDGQEtmK5TRhWcDHgy52JDEGth8pTKF487OAd3Q6bYrplHa7w8rKCltbTxgMjugsWZRSdd6y5/Dw8GrI9PHgnSdpa5bWJW2ZkrYVg90pYmgRuYBKYk1Qu1prsac6lWCOHSpgjbXgBZPJlMSXHBwMmPoWWZbhPVSm4mBnG3/rbnitY56a1lp8bThjrTnx2Oy9JPhjwWbP849w1s0MpYwxZ+oyrA3qYO8ctrJnvp81x97PnL1NOAbz93vuNrWM2jmHrUxdR3V6nyyNybh5zvsJMdc//MR9skGPIgqJ846jW5Z7XYG4kVP90NaFarb26HBYY848ntbKmb7Cmuefl+OBc3+rY2DMM/VfQH1/uEg97xiE8+IDkfk3HAPvPc4+/7zYU98Va55/Xvgbzkvjd2Jt3bg9jMUTvM/xfg98GHV6fwvpPLvTirx7QBnHYRooHN3lCm9KktjjvGcwGFBVMBwOmEwmszAxayehvRFCANvd9tUxaZqOwwEaDx2IAiWFbQY3AAAgAElEQVRj1t5a4Yvbhl6nU+f5KIwzaCWJ6mXCTqfDaDSqZccBUW1dkCQJS5HizlKfD7c1RbGLEBDpmNW1de7XQ+sFLh5SCrRUrD1V3D7QDPorwNlX7QXOD845hq2XiaJldLVNpJfQrkKr20EoSonzGQf+Bm1fUdYrj+VUYCuF9boOd/d0Om2MMXQ6nbpjKWhlqtapBPX6lTG+tsbzf/+fP2Q6NGRpl9/+7bcY7nriQcLRGLJJQttneL+JR+DcEk4EHmM81vV0ZxfPU7xfxblXACgKybgc87Q4pKxu1vPBGGNgvJuynB4sMvIuAYJgSC6FJLKKpBJEVj1XUbvAOUIIBpua+OlHSDVG6QHKWqRSwAZSOhBTWuMRZpxxMI0QSKSKkGiUsHghAEVZOrwXjMdTrPWkaQtBqKsLnIqml/WuhvG1956j3aA7SRMfvEzLkrIseWRyVjgAESHEFpEWSDNEEFZcnKt9Z8Q+QhQodYiU94PQLE4Q5og0LYmFx/vHQInSFcvLYyblT9ipBc4NTspwqy0PvJPPOpcvcCEI0/0SaUzwPLEGa12YluKRgL07ZGc1YcQE8bZGSI+KKiwVxodRpsdhrSHLUq5fv8GjRw/J8yntxCGkqu1ZYWiGV0NRexxSKrz35PkUPJSuqufAYW7rbIjXqPxJ4szWc/cmNyiw057UlYz8iNx2glOVB2ss48EAsdZehIRfEhyB5zACvNZhhWxx7C8cSkkMkry6hTGHVKJP5SqM3cT7hMQccvu+5YP7HRQph5sbmDcfMTpS+FIibWgvpjJUVVgM2d7eJs9zkiTFVGbGGVlrSdpXNEysqTEASKq8dthXRJHCRpJIaJJTBtVaNdlAIdMVIIpiYpOTZRlpleCcDcImrWl3OgydXwzBLwlSBF1DiEYJ4VOLY3/xsNYyVZJJ95DI7BMnE2JriXSGFOu03ZCDW0fsXjtk5GPUZzOiSLC6UeAMiJg6HjjCW0UcJywt9amqAvBEceO1Es5vVVUvbHx97oYjIXgqRusQCK2VmgVNeS/Bi5q5FidvswTD+X1BBSgwlcNakDL0gQIYVxWuWsx/LgUC2t6hpKRbl08snPUuB0KIYIylQUpPu5XQ6YSOQ2lF3vdk44jl+31695fh3k2qErY/6bD9YAWXe5ybtylrPdNpgbVQlpY4zmaZTnme0+l0Pn1F7Wl47ynLYmY3YKw5prKpxT7Hfj/jFebbCY8QYQgo66lR2MJjs4xKnVHPscD5w4OuS/C1ny/7LnDx8N5TFMUs+6oyFZVzYQnbOchTJvEBeVJSSYnqTogTwc3XRnjr0G0BwgKeKIpwztYG8YFycM4HyaN39WPFs6bmPyUugFMJeoTxeIwAcldhrMU7hzEVtpKUpqJ8hlMJnqfWOsoyPOa9oHIVlTKUZTXjXYKGwSCi5xsFLXC+aGpDKiHwcbzgVC4JTXuaTCdUVVj8qDyBdwSUE6jK4UWJq72d86nnR99p4UrN25/ZwxofPIysDt4psqIsq3qqI2d8SlmGdMIrN1JxziGECAYwQGpytFIIKdFRhIwEsdDEpzgVVU+TlJLESSBktVZoq5EirKHHcSgWa+wmm45ogYuHqM9BJOSCU7lENO2plbWI8oIoScnLZaS8gRAJkbVEThD5iEhEpElE2oK3fnEIzpH0PDoKnIqtVJ1AGDyHhYAoqksk6iXlUPtzBUcqSZKgdYQAlDd1LY0Iykwh8TVvchK1TB9R8y5152FDkLT0cqYelVKSZhmxXIRXXQpEqE2SQiJqUk8uRiqXgqY9lVojpWRqLVvplBvqEGslJZrObkxLdjCiRbXTJ5/s897Xl3FlyuuvHOFM4CqlVDgHWsdY61AqoSiCfaSSipXllTpe+AqOVMqywJgwhWlk7AKPEB7n7ez30whdj5s95pwBHJUpcc6itazvt4yGQ4ps8a2+FNTyeucd3gW5vl+MVC4FoT2VM07FWkslp3iXh7aCq83iBW054ebqI7I2vPuPDsAbkr4hXHsD1xkWUCTTqSWO597Q4CmrkjThao5UnPNMJsHgOncl1tpAMlUWZwRVZc7gVJpQ9nr+V49UrPXoNMJVnuk0n3G+7U6HUiWLq+VlwYd6mkoIvFtwKpcFWYsOp9MpVVVRSEle54g774lcAULhXBtRGcSWZjKs+MZXl7BFxO2NAa5qBKkOpTSdTo+jowHT6RSvDCAwxmKMpxTlC6dQXBinkqbBvi8xAtlwKlphlUB7TXTqrZUKpKuQAh3pWXGhECH5DjxZK0OEWRRHR4fkLbG4Wl4WRF0eX3Mqi5HK5aBpT0mSoKdT4jgiqSUbQoTovcJGIPuMk5jd24rPdSf88u/sIbyns+bY2QocShQpvHfs7e0AnlarhYpKPB6lFEqG7J8rp6gVQhJF0SynVVFnjtTJgyHaQSKekciEyY+gfkxAkqSoqqDd6hIVCWURRjdaK9bXr7HtFpnJl4KGU5FyNtRejFQuB8E8KQqLHLRwbgXnMrzvARrlPbGeEsstlGiRP3mZ6Ujwjf9wDZvH3Pj9I7ASpSKUCvzM5maQ6U8mU7qJQB0zMq+q6pko4Z8WF6JTMcZgjEHQlKlDMNCxOO8RWII7z4ln1voVByIsHZdljnMl48kA47ukadClGGN4+nSLvLNy3ru/wFmYcSqhtN81ERGLkcqFo2lP1hiWrAl8o/B1hy6wSEYGni6tIV95THx7n1bX8ZV/so3E0lk37Dy1xLHCW0WeT3j48KPaViHcgv7Ls729w8rduy+8zxcwUglJZ3keDGgKF0jWUPvjsAYq46jO8FPxtbDKVMGkKcsicJJWq4OYKIbDECYmhWDj2ibb6MXV8rJQ11xZIfDO11Wgn/ZO/fxDiOBzUhQF3g4D90FUe7NkeCzOww+PEl7/Vsb0epfRF4d8/Q/XcYVi83+fYMuQWy58BxBkWZvxeIJzFmMsQiissayurTEaPWue9dPiAkYqDilFqBEBtHU18ROGz14GLYryJ6c/zXC68V1pxFbOOYaDAVb0ZvEBznkeP35E2V9bXC0vC7NI2nrqsxipXAqafKwoCkvKWoXyl/mURTBczymWthj5PeK7Ldo9w6/+N09RArprFU8fZyilKPNqJky11ob2pCqcC+5vUgq63WeTHn5aXMhIRddB3gBR5eovYp2RrCTSKaTQzzwPmu003kOWpURlyVJ3hTTPmEwCwRRFEXfu3OGxWVwqLwWCwHQpOdOquGihEbosBJI1JvUC3F2c6+J9CiQcrApSMjL3Kre95PBgjel4m7/4w3VsoVj/XwZgQz1epNqUZcmtW7d48uQx02lBJ1EorfBAFEVMJuOrR9RCk9sapjfW2dk6eLDJA48DTldCNjU/Dl9PjfJ8Suoqjg4PKUSbTie40FdVxcNPHlD21y9i9xc4DV/XW3lfnztB2Wr/jU9b4HwQfFQsXWeI5AOkTBByHbjG8p5nuAv7g5jpjT300jJZ2/AP/9k2EkH/mmH3qceYkjIPXNjHH3+E955Op4P3E6yxM9pi6SoWFELoVIqiAKByVc2XBGMZa4MmxZwy1230Nt75mWlwliWIStLr9VETzdHRMHAqSnLr5m223LkXWS/wHHgfSHdbz/EXuDwYE+pygvgtx0qLteWsUDeQuZa9B9eZftxnPJjwl390DVt4Nv+3Ia4MfKbWMcYYut0e4/GIo6MBnb5DKo01BmMkh4eHV0/8BsyWHgUgfRMLIEJYVF15fHriMlPYihDV4JvVH284PDqkokWn2w5Jfsby8JMHVEvXLmL3FzgDYXYa+JTFcvLlYtaeRKAHRM1tNStAAoikJ/aOa6u7tLsVX/ndJygh6a4WPH2cICWUdU7yYHCAc45utwOywFoTtGQClvpLVyT29BSUUjPxW1RRH5DAlaAEymv0qYLChswVQqGUBoKALq4MK51VsrzNdBpS+KI45s5LL/FkwalcIkQQSDWdSrhrgUuAUookiWealSRO6jYiUcKTxpp06TodhnRHB+TTiG9+dQVbSDZXDxFWkiQpSRQ4lZs3A6eS5wXtfsj7gcCpjEajq8epNIRrM4RqeJRmmBZMmPzMGOZZ+NmHyvOc1BsODw8pRIdOXflsjeHRw4cLTuWy0HQe89SuRX9ySWhGho3kookBybwEUrxXmErxyeAG/Zvvs3RX8eVWxRd/fQ+Jprdq2HniQ2lMPgY8n3zyAGttzankWGNDgWgd0H4F7SRDQWFRFAgaTsXVJjAOa3yYm/OsTqUhc5u8kzRNkUbQ7XRRU81gEDgVIQWbm9cXnMplof4yW+ew+LlJ02JJ+cLRtKeGU6lMRSUEwkyBCQ5L5Qus/RHj+wn2B12mn33MX39tHVtU3LmxjzehEFHrDGsN7XbQqQwGA9p9i5QaYw1l5Tg8PAwZVy+AC5j+iHrNOzR44cWx5eKaTxGN+9uxZx2rWm5+r6oC5w2j0QDjO7Tq2h9rHVtbTyh6a+e/+wuciVlcpmg0RYuxymVACIFSdZ2PmEfkHh8qDjcr9No21j8g2lwmaRne/vJTpNe0exWoFCE8VRk4ldFogLWWdruFlFOcM0gZdCq9bu9qrv4ED4gUgSeu/CmdikB6hTr11iFrRMzEb1AXUZmSbqtHUqSUZQjkjLRejFQuHeJEQeFilHJ5aAoKpZREcdCAKaURCLSA64OY20WXG7bL7sNrPL63zScfdtDS8uoreygRzJeMkHVEx3UePXpEWVa0Uj2b7jRhYleOU5FS1iSSP+FEO+dQxEz3cBwN73L897KssM4yHo+pfJ80DToV6yx7+7uYzspicn8ZODYq8TSjzcUK0GWgaU+zhj5rJ+Fvg2CaC7A5yine+5NrvPcn65hK8tYXD/Dm4zqCo/GPLtnaekpVVbRaLfBTnLMz7qbdukKxpw2Cee50rlOxZZ2T7OscZYd1Hndmp9IQUeEPrRV4SZpmyEIFj5Z6u163RyHk4op5GWgykK3F1ToV793i2F8CguYrn3MqVUUpRPAfAvA+tCcbCj3LAqiTKZzztctiMLiOohhjbD3VUYzHU1o9F2p/rKUsHEMzfGFO5QLmD80ckNkcMNwdPmjgVY676x8fz9RXv/px5wx4R1EWOGdDHlBddjIcjV44n2SBvyUEaClRCJwQFMUiGuWyEMpe9GwZf86tzLagcWsNd55sV/NBpsfa4KQYqv8tSRIFfyLvgvZFKdrt9lXkVHxt0pQBEJe1TqUpKKx9ORQnh1iy6XQIfpkQ5njSSuIoQgs9W6ZWStLtdMh5sWHaAn9LeIjxtAWMoghvzCKi45LQFBQGTiWEucVxSBE8PvuUUiK9PDF1mS2WCIlSEuFDG4rjBGDmRxv8hwNn1jjqvwjOfaSiVPjg3vszd+55veBZCgh/fNjtXOix6/uLskTIxbz+UlBfCgfXIG8BZ6xALHAxaILTA85o7MfPwU98WBxrT2bWno4/UUlZk8BXjFOx1jKdzjmV0pTHdCoeayzOeuwpk6YgiBMndCpSekKJkMQ5qCoTBnUhuhBrFhEdlwLvGQqYTsAbM7OmuMrH3jPn6X7idv75MsyrgOPtacap1Pcf52ydDSZaTdsBjgnmXB0c1ujBQvpnWRpk5Os0UEte5GiXvzCtcEE6lTNedjYnpOGRnvN0MXu8YaRn9SbHtmnqIa4qpIQ7d2AwCP5axbjElDFaO5SCOA5f+jSFd9+FH/4IOnab/OjF/SwuAs574hFUEqI0riUAVxe+LDi4/xQft4kjj1IQRVBV4SeAko7Rx58gpn3eeavk8Q9hPP509/s0Gk7l5J2nNzrjvjOe0KzazW/UHkZhm2Z6dQVrfwI5FHQqEMsm8UwgpJjN36Q4bdJUP5d6inSsG27s7rQO80ghJNY1NnhXE1/6ErzxBhQFRLElHjzg4D3Nr/7SkM/cCZ1JVYWO5ckT+Ce/C1k3ojrY/7R3/Uw0IqxIHjO+vqK4cQO+8iWDHGwhpOKf/o5lbw+uX4e9Pciy8H2bTDytzKPLQ9pdRadz9TqV5jjPdCrP41RE7e587EIbig79zF+4GYAEbtKjlJ5xmccv0ldOp9JwKqc7u6Yzbaorf1JfKMIwJRw4H1yvFCGqwBO+EFmaMlXxlZ3XOwd5DkdHsL8v2PhMFzcdcTQQ7O97Dg9Dh3LtWviyf/gh/OLGFJmsA1fsm92MMvHImogX4upGzjaV+5VVWNnl3v0R7cyT57CzE86LENDvQzUpkFGHVjZlfR2ePv109/00mvY0fd4G4thP789od80oxYfECjxRpGcWrzSaI3w9IvKzBNCfFRfCqUwmk1nuT2HnnIq1FmcC8Wr8ybXwpndstmvEOpkz5OSUtpwNy6wJRYbT9tKVndd/4xvw7W+DMZBkkl//l+usvnGbf//vvs8H3xqcmO9HEZQlXH/3GjevrXDlOhXv8TUfZqTDRfZK61S2tuAb323xzj9/k3zi+O73thkdObSm5hXCdmlL8fn/+mX6t9r823/1Az784NPd77MQOJUJeZ5j62CxgmCG7evi29lihncnNCah45i3KVNrXSBYtSZJUi+C+Fm2UJL5F54BXAincnxd/fjVbGZvgOTZwKLZWAYIHixRlKBsQZa1iIp4FtwulWJ5eRkj4vPf/XOCc2Hq0/yutCRKFcbMh6ENmu1UohFXdZX8xLxdvPC8+6JhrSBpRRhT4Tw1MXlyG+cgacVEsaKsBFV19mt9mpjX/tSnoPFQaerpjv1rylzmOPl7FMVYa8myNnk+paoMOp0/J+QovzilcGE6lSQJa+HRsdqfMLerb5zmVOZkUjO3s9bgnWMymWCxZFnwaPEeDg4PKFpL57/7C5yJRj+kZpzKp71Hfz8wN74OnErj/yyVPN7Hz3Qqz3Iq1HV3kqoI+qLpdIJzjjRNUTLH+0ZlW9fsveAF49yXT6RUz1nn9nWH0XxQf+KG8PPpYX1fkkQoLel02kSRpgwaZJSUXFu/FmoXFrh4nKFJWehULgdKNe3pOb34rNHUbehEmzq2Wd2e9LH2VFUFiMCheO9RUgXLkqu2+hMySvJZ7k9pi7qgyQXRjZFYa57lVJyv54gWYw14mEwmxL5gYAbkvj1z6K+qikePHlL2FiZNl4KaUzHWYJ3Ex9GV5lR+ntBk/hRFgbWOqiopCJaqPhjdHONUTnKVM27SWYwxVMVkFk7mnKPVas1N6r0nL3LanejqKWqh4U7m6qjwf8OXzHmT4zfvm95Rgg/3xXGGVjG93hJxnDIeT/E+FBreuH6DLMsuYvcX+Bux8FO5TMxHDv7Uz9kWNGtzJ9rVrE2FNpckGVrP29NkkoMXSKVDcqgQV9P6gDrsuakviEzDqZyu/TnZn839VES99AXGlDjvGAwGGNGj0+kgRFAFbm1tkfdWz3/3FzgbzRL/sdzdBS4e3lO3p5ikltZHURxqeep/UtQ6Ez9vOxBSJ4SY1/6UeRmKcYdDfG0dKVSFswatFEpJep3e1Zv+zEO858VMxysspZQIF1aATmPOqYTH0jQlqgqWOkskecJ0GkQESitu3b69ML6+LDQrD8Co1jCI2X8LXCTCwkZoQ0pK7MxJPxx8iUPhQzs7tfozdwhgVuQbIjq6TCYTptMp7VigdBipKKUYn4P670IC2quqmnEq1UynEqwMrG04lerU81zNqTisrfAeJhND7Ar2y0MmpGStMN2pyopP7n+EWd44791f4Cw0HrXWUQmL13pBp1wSvA8cYlmWVEBZGUp/jFOptSrOmppTmberuU7FYq2hzEf165V1REcXa0e1tiUYOPW62dVb/Wncvme3Y276oQ6wEezwzK3mnertII5TlNIsLS0TxwnD2vhaacXtW7fJ0gWnclkIBXp+noRwxQsKf15wvD0FwrxpU3PjcU+ozTrdntwxtzjn5u2p318K7Wk4xLsg1w+LKZ7B4OhqFhTGcVzn/njiY7k/SimEEmiv0af9VKScFQo2OSTGVIBnMBxg6dHr9WacyuMnjxfG15cIUXMqWutQt7WY+lwKhCDwKU3uTxwRRzFKq7kATojAiXiJPibn0HVAmJAh26fMw4hkNBrinKfX6yP1Ps4alNZEkWK5s/LChbrnPlJpRk6BV2mIPZirAJ+3AjR7hXpeGNhqpSL6vdCzjsdB+q+15vat2wudyiUiqDlPV4t/arvz9w6hIw+FuPJMsvzZFdWTJyjYsioV0euFkf9kMgVECGivV38aEvdFcCFhYq6uUYAw2phlKddh7c5ZHGfV/jScSnhsOp2Q+oLDw0NyMtrtJqC95PEnn4TY08UX+1Lg8VhnsVbiT1XILnBxmLWnqsI7R2UMlSBMV5hzBs4FnYoTJ2t/qGt/nDPkdZjY4eEezjk6nS7OjTEmTHdCQPuVNL4OHUpZlgjAOFNXF/s6YDoIdZ4NE3OzA9DM6dI0QhhBp9tFTTSDQSjEk1KysbHBtteLef0lwdfz+SCo8oswsUtCMGYqqaoqmDAZQ0VIlJj3KaHDd96daFdNVX8jjtM6rP602x0mkxAm1umHzB9rLVVlr26YWJqmM2FabGouRcgwD9SCSGgif/KtlWo4FUUUN52FQ0rIpxOEWJoFtHsPu3u7lJ2V89/9Bc6EFCEqIoqi5wy/F7gIhDq6tK7TCXaPaRzNi3aFQEhJpBXaS6JjBmlaq1ktXRRpTGlRSlAUU4Rw9HodVFyBt2itSRLFylXkVBpordFa1x1KvWbua+WfP4tTOWYHVytqtU4QQtNqdVAqJp+GKZVWimvr18haLXR0IXloC5yGmGsmoqqCY0WjC1w8mk5EKlWbK51susHp5nmcSmhvz7SnvMTXRYgNpzIej6+eTL/p5aqqoqoqrDFhiev4GqSf+0DMDbLn1tceV+tdynmYWFXNqpSNNezt7WEqw8bG5nl/hAVOo65Kds30xzmclKyurV1pS8+fBxxvT642rQ48ZZOc1UxD/XPaVSMFCNMoa82sPTUrtNbNt0vT9CpyKpY8n87Eb4UrcfUX0RiDrUQImT4lfrO2NrO2FlNVeC+QMsZZS5zG+NzXvWjYvt1uk/tQbNVqtZlMrpix0c8T6i+lsRZTZ/845xgcHbG8vAJcXVvPv+uw1pLneTC+trVJU13cyUyb4jCVwWCo3LxdmTpKxdVtz/sY5yxRFLiV0WhI1q0QiDq0zJxLmNiFrP60Wm3a7TYAWaXqmpFgiycjQSxjEqKTO6JqKbJWs2pkrRWR0HhfEEWKNE1nc8SiKPBpwsHBPisry4tO5SLRzMu1Jo4ilHMIIRmNx2RZhlKTT3sPf24R2lML02qhlKKVpGRxTKSj2RJ/0K9oIqdJ9LxdRVE0y/OJ4whbSaSMaPyeoygliiuECFaSaarpZS8e0H5hitqGU5FKzUg978Xs5tzJm0cEmb6bPw6qnvNpvJezpS8hJFmWBTNfY8nzMFpZ4GLgPbjal1bMvnBhuH14eFCPVha4CDTtSdXtaKmu0RHH0gzCCk9oQyfalK/blKfmMVU9A9CAxBh3zB0g4MqGiUkp55yKbdLsfG0IAwL3rEkTtTneMbMZ7y0Q1tjBEdWkrHeWqqpmYWLNaGWBi4EQIlgyeoerc2Uak6bRaITS+gx70AXOA017aqYy3gZvFO9ONvzmsny6Xc3aVBDzc7w9hdWhhpkJJmlzU6ifHRdufJ27aqZtMJXBloLSRJTPcCp2tp5eldWsfqGyBqscVWWCoM6DreeIpgpmTmHe2YxWrqDR6N9xHJ+XVx5KEWNCygMAe7u76GhBmF8EmvY0nU6xzlKWJbkQ806m1g9VxmC8pbTz739VGVx97qqqwlbBRV8pHR5zHq8M3oGzlmluiPwVDBMTQpBl2YxTSat8plOJIl1zKhGxP8mpKKWCZ4fWxHFUFxTGJDYmTiyJjOv6INBKkyQpSs971IODfa5fv85gsn3eH+nvPRqPm0gHnQpxgo3n588YM6tDWeB80bQnk2UoqYiTmCxLZ0vMM04litBOEavjnEq9DC0Dp+JVML5O02RWOhPHUS0VUKRpRBwlV89Ppek9m1Q17dSsIOhkFeVZOx5iTgPvQq2+9VSlwTo3yyPx1OXbYn4Am9FK05ktcH5ookEbA2Vmw+k5jDGhw1ngXNG0p/+/vTf7lSy58/s+EXH2XO5a99Ze3VVsNnu4zXAocjiQLMmUNZqB5ZEAAzL8bvjNMOBXQw968P9g2IANAwb8YOnFMGxpPOJoRjI04nAkks292ezu2u+WmTeXs0aEHyLOOZn3VjeXrhq3PfcHJKpu5jmx/GL7/b7xW5TfRJR0diqXMRV82uC17/1Vc7vemsalHq6qBq0NQRB23sxteS/DqPGVYyqtmNbqe07YsAhhNj54nc7pgu47pQRSWqIoQErhMRb3fpqmLrrcGg8mkzN2dnauDsyXTEII7z7vMJWorLiYTGwdTLyil0c9ptLaqXwUpmIurKt1TMUQBAIpIYpUt56Ez2BofT4grfXHxsdeGaaS5y6nmrNTMT7RkUbXDh+pL9g2aG28dKKpqgYQGFOSmJqlXVHqEhd3052KZ2dn5MOdjQOzrdtdSW8mgL+iX51aTEVr58xWJ6mL1WE3HgJgZ3eXp1cq6EsjrTX1Cop8C22OqaqMQoyomwRrlZNCjPWYiqFey9vTNNrnPDLUtaapSh+bxRnRxXHisRX3XVEUpJntEo79qvTKfH+ctR5ETRsr0/kAoQQBAYHdRJid70+b5jHAWhdOMm4qRgNBUiQ0zanDVMKQ/f1rHL2g+ZPJxJswX20qL428nUoXT0XJDfG7paIoyNIMKeXHnphX5EgIwZt1w79NMqQMCKPYBbBWEQiJFk4VCgIfT2UtZWnnIiMkYagIVYLWmsFgSJ6vvJOh8tKQII4jrF1D4H9FegX3gK5BrZ1K0GVX6xOKtRkK1z/rfgrtd3XtsJTlckXTaBIf6c0ay9nZKWWb2m+9du+xeWU+/hLJzzEpJUoqJsPKu11cfvDKbuXlkrWW2BRYYwiMUz7mlbkAACAASURBVHvaUCLOoUVhXWr2D1lXLU7i15O2rFZuPcVxihAuK6GULpxFknwCw0lK6fTqpmncRzdrgJEBYbE4+5PNTztJjWeYs0tREoaDlDBUlKVTqYQUXDs4IEuzF+InTV0TRSFX4MrLoTaBtzEGbTT7RzWyd9XaoMVi0RkmXtHHJyUVd7QmMZqBbWOotFKgYCUijsQYMNhLa8o/Z907URSgFAwGqYsEV+W02QmN1iAEeb765N3+GGMoirVkYuZignZnyddciqdiOzCwDxqTE9uaaT1jZYdEUUwbCPjxw4fU29deKKk557f+BuqKPh45TMXHwRECzEfHU2mlldPTk7/Yhv7/kIw1iNrQ1HsYG6L1Fk2zhzEKrKJCURpBow3aGhq7jqkYf7vj1lRV5N5Rd4YxhsFggG4WND6IdlkWDIfRJ8+iFpzPQRRFRGs+CvjcI/1HbXxaC00p+t+yLCWKInZ2dknTlDzPEQLCIOT2nTukHxFOsmkarl07eBXd+8tHa2EPWrcL8RFS4JW08nIpECVh+H2kWBIE77v/q6cgCrQP2araz8a6cqFc2zU1GGTEccTu7g5pmlKWBVK1MaEFURhRFMUnL5wk2M4YB6CQu8Au2AhrD9Fagt3GMrrw3jHwDGO3gHtYC0UhSG3GdHpKyXWiyAIhTaN4/l6J3vrwVrRWhIPB4KXkMvlLTRbAGUgpqUD8fIvLK2nlJZFf4KEPdK2UdGC5FD4XUxuoSSGM7Gy5oM+f1QY/q4raR8x3cWgHgxFS1miju4N9PPoEJhMTQmItnQrzTnDOl0lAhAiOXSIks0Rw0UhtCtRIcQ48RAh3+xPUM7ZHDXF+RFU9AmqCwPD6geWZ0chEokqJsiCNIgwjH3RbsFgsuHbtkLp+7G1lIDAGJSyBlCAFMpLI5AWJzSyoUCCkQAYClfjgwH4Tb9muIufcJZQgiF9clkpcFgEhBfJDnhEIZOBuVUQgkYlC2tbN0tVmBMhIgsTVl0hk47XstXkgY387Y0HFyrXLT06DQCMQkUR4z3AZKkTkJqNrWf+sCCRWglaWOvAfC43UELn3VOh4iZSISCE0rOqCnYN9pstzjNHueymQwvFMRuqS9iSlcG2SAhkogkhiEN1zHZQf9DyXUdCN7fp9k4jcrYiQwo1RdPk2SkSBb/cmD9q6pI/xIwJ/wRAo944fEenHxgDS80Ao6es2XTkKi7CWIHR9sxZkFGzU1z4bhMLxQQpEqCBSKGUYVvepWVBVX6AQN2iaAotgKiSNLbG2za3Vb/gOmwSswVpNFLXJxMasVkuWywXD0KB8OEljBefn55f49MvSK5FUmqamqtzNjLICYzXYNheQwLwgRm3rdGjWYtSuVitiW3J2NiMnJcsGWCtZVoJ/lUU8Oojh/gO2Gkvy3gFvPYx5tHeDUfxDtsKCrfHvcjLfZn/fRYzb1zO+Wv2YB/opw3SHaGQYvnGX0Vcu5A8SkNqKB/dPuD4yfHDrkOFXfhss7NgFGsnIukHdu6fYGhcoJfnClw75zuqg2wRa2klKDvfOSMYBg8/9XUZxeKk+ISC7s2Awyhk9uMPoq1/nrjnjQE+ZioxaKN6X18jeLMlGc0bXD3nrr9xn3Kw4I+Oh7FPADvY12fYMiWb4pX/A8KjgS+aYzK74lniDn9kUFUC6f8ZgVJJ8+g2SVYJAcMeesidyjNF8W94lvrOgluecbkf85FN3OVFjdpv3+ea5Zfba73L3TsNnP33G9tBS7IUkv/FlROn6P1UByQ030dORYX/7MduDks//xm9Tbx0wEZsHi5SQHk4ZDnMOHtzkb37plB9wg1MxBGBEyTY5Ow8CRsNz9m9c4/DLX2XL5CAEZzbhHBeNLrnbkI7PSFTFm1/8D/ne8hBjNzeWJLGke6cMxzXJW3+PJHAhN4SQbNslb9lnVDJi71ZMNmpI790j+c3fQQjBDTvlrp0wtyHfk7eI3yhIhzMG166TfOlrONxTcGgmvGGPuG0nTA72GGyNAEv8+S+Q3OwPl0BZth98wChbcvBpRXo9I/07v80HH8T8X/LHTD9n+cYPB5x/6z7z6nVm5QnWPuSHyT32xTlaG+fnI+jUF3dLJJzfXWOpihXWQlmeApbRaAutV9SNcfGkm5qd8eCTJ6m0YelaT8dASWSbn0RCmYWYwxx1wY5EHJSYxGD3S9Sn5wBO6tA5YWKJ65zFzhF1YinjgNXsJuXxNrn4PFEUc1aVTK99wHRLYgJNGUqmY8m0CKhrt6EpK6nTIVN1i+0tg6gt9fldypPNTIcO4C2IV28TmBl2tU918hkviU6wBCg7B6mIrgUE9Q8JzZBRcY3y5BbmwqbSJAvi+t9Bragmb1CcjDfrU872wy6/h6iPkeVrlOd7JPEp4/PHLM02hpBC3qWZHSPrn0CxxWB5nV1VMysqCvo+VEmJqL+PkAJTvsU0h1H2LtvNhEN5i3cXW5gQpC4RBmx5A5PvEEURA54x3BoSTN7DVPcR9UNEucTmCrtMaESGsAHvvpchozcYRZDb50TFTxE6wxSvYUq3WCogSzNWxQobVUT6mAjBXT3i28UdjLigv0qL1D8llIKBuoFMbhHOUgzuuTjS7EQl25lF8CNiMSKMfp3t5jl5vMdgfs60cpuKaEqUWYAJ2FH3GEQPmM1mG9UZNKpZoWyArW5hCrd5ZWlGGpQchPvkMmUcnBLaE6j3MMUtkiRhLE/JoppwfoqpXsdWZyizQjQDxwMtSZOEsHjI7miHu837DE2M0pEzpy/vYIqoa8vusOZBdMI82CIWE6QNsHqXxSrj2DzEIPjj8WvYzzTMmmcsD3LsoGExPiPc08gZBCjGwyHzuVs/SrUpUiXetc57zFj/u5eshO0SjxVFzseEVF6N8VsYhl38UhV4Uc77jTxVt8lP5ki7KamIeYCsBWoZIY+d5KARCBtRs0SLkPHrO6gagkIxOJKwY5HbOZqceBygrEFmBUQaGxjkuKCZTxApjLIBLAuemhXfDK/zn8VPyAKDHFTInXyjLVIFCEp0UrEUApIGuZ37qH0FWTaiXhoEkiousMpSi5p3oj3kzo3+dqSlJKZRAUEQosZ7iPFmmAaNV1+SIVZNqcIQ+aVjJtmM8Xd20PkhmhDEPcgEVn2ACYcs4z1+YK7D53+AHMx7Xm5VmB2H6DefO0PfEfwrWyHIEOIpAokKBOawxow1fHaJyKAB3g0XvLPznGvmOVIY7BeXrPZrjj9X8s2/N2NpDWfa8Ej+kHNxwlk0JjqsWFyvqEcN6ve+i6r7TbUJFEprRGJY3iiwseV7X51QftoQSLeI8b5FUoC9P6PZKph+tuLPopDKCKSXaCYY5qJh/0FDtZszeU1z+u/9OScWEI/B9hNa7Bv0/opyu+H9/+CH1OUxwcNDmPW8VxHYLbCZRr5mCSSApWLFM+B/4wAh4HB8xt0U5A1L8JZFk1ObM/5E3Obe4QIlJPKOwGbADqg3JRhBLSoaK3nPFPyh+C3+9tY3+dQwcsD3pyThQdgZCeaiomKP46lhURUMNMhCIZeKRAuMkNSxZfraU3KxxB5abFahr835o18fw6rk3XeGFPNiI3SBbmqiyN2c1uXmbrFaLRluuwRkQRBgbcPOzi4fU1B5FZgKfZpGQBjRxdC01mIagS1CrLkQs6FUoAWUCjt3O7jDVAy7o5AoH7E8mYBW0IQ8XX2F5zsSbW8jhKSpDYUVaHsbw2OgxtgHBAxI7ZTJckxoIxpKVuYeZfmclBDDdRpzt2vGHjNWdpvSGgzHSJ5h7DaNve+uszkjX1nO5etkIie0P8FgCEOoBwa9/HF3pya8Lm1liWosKjfoxzX2/c1wfUHoAoQz0cjCwBHo/+NzPMFwX7/NdmqZFjlWLLD3ckSpEfOS4L1zhNwlf/hp7LX3IfUR2PZBnDvAPPsgo3gyI3rtKfmWYLhfI/PnUIxRusAqjRAngEaamKoIsU/GCFthxR68BlQ1yTxi/GzIg58N2S8Fp8mnOZl/mYXYpn7zGPHWv0EeZ+hv/DV0uTapvdQWbC0Jv/iHyCxn8K9HhA2YHaeWZklKcd64m4ovGpIdSfz2mPhfZggC5h7UbwCrFHEwR959Dz5I0H+yv3GyJklCURQ0t0vEF+bYVcb5//4W1fkAZVMwAbXPSWVTjZgolxv6nZT4vX3y/EIUOwHmiwHyXoB9lGC+PUAAd0fbPK22yIojrEggjRALAacB9u2UNBqwylfEJiIj4RaCZv8zyPMzjFCY7/8azcmwA2KXaJBjpDxAff1fwmiFefdr8O07vK6PmNgh2sLg/A0end+DnW+hXnuI+N4Ngj9KyeWAlUwJwpCydOYcYRgShKH3wauxF6zYXTK+0pkKaAfWzmbTF6zqX45eWTKx1to1MGItQXtr73DZv8B0djouETjAalUQWc3JRJDbASQ3mGUps62IP30r5SQOIZhgRRtIaA7DCQQ1Iighm1EONCUSJQuMznnIFvNAoHdXiCCA5ASGPbMXlAg1QaDRyRmlMhDNYehOwhNhicIQUz9jAeTZABNKKlmxuLlE7ESdV29mV6QULOMtzrZC9sc14rMLSDeB2ga3n9rbJWak4cEC8fvfJk41z+qfURES14b4WYb49NI9c1ix+K0FpXyEJiDcPiO6/j65DGFksAc5DYL8yz/EzEuOVMBcDDngDDvYgjjDxA0EDfZagZifY2zvqfrESgRHsLXCRjU/G495dHvOn94PUSQUxRMa/oB9BeH1CLN7jg5nyK//n8i1PVNKZ7Fpk5r6cIqJQ975qwVn9Yp29y2WGjuOscJiRrAY1eRfe8zkpsJgkGvT1ALlfQvXGkxyCvH32pmHsAGlEAhrkaMAbmXY85ibf/uPyZubFM0FuT4Ec+8cPbLYr79N/vwHL5zT9gs59V6F+c2fQfQUC3xrKlnNNA+FwdpTzJtzzFhjD3Psl09YmlMQgufRksfXp4T2iMk44qs3F66tf/cfo1ZBvw6E5Yk658wOWT44Z2cP+Ov/FF4P+edPloh//nkeLGb82WrEkVlQGwcjt347SZYxW9bkTdEBtEVRUdcNgUoB2a2rls7PFwy3vTWtcKrPzb2tj20K8EqM35zHqmtYlyNGCO+l3HohX/Cy7P52zzjfn5BVM+BodEC8alitFoiVpJ6mzH4wxhQKKQRJkpIXOafXtuDNGaKuEKGBxYyokF0kcmVnVNTksmA63eLawRxZ5Mh5vzvXuEUVURKVNVZbKEvEfNrd/BilCNvwissFugFlA+KlYH6ycP0BlM0JKCAJwdYIKjDPEGbzNFBKoaQEMwUqRDODh7tUIiA1AWk0YKt8zhPxHpgGbAVmwRMRYUcnSGMIi5zht4es9B52t0Z8uSIQguhH9ygfnxNTswr3CAafRk8NIrTYLxSozMLbtzFvjwnD0GW6M6Y//XeeI2+cUjw6IPqzEc/VfWwTcGCmRCi2WVK/sYX8Qk1wGmD//C627F0utLeTiLdKgt/8ASoN0d+5i30adyExVBRTVSVWWOxnLfGOpPrOdfJv7l1yB5BSElQzOPgA9XCM+YM33B1NHcFqTBRFLiTizRKufYBaKq5/K+T7xWveFF34HN1gEwO//jOUreD7N4me7FB6o821iYm99YRgd4Z8bw/7zWuAIBjFxEXFWROC1XBdI2qLyIFjTRymlEXBSgzg4aeogHSvQvzmuyghsN++jZ6EnQGhFvBUCJQyiM9/gIqW8KNDzNsjfqIFyW5BdTxkleyg9NJ7ILc4iaUolgRBQhwE3YEeRS6HcqM11jaXvI+Hw9QdtkZ7Y9GQ8/PpJzNIUxzHxLFzKFSBM5oS3s5BtvEgxAWg1vv/OOzFNUtrg0UwzycYoxkOBaARokGqZac7ap2TxJJifoP4BwuCWYDUCvXjHXh/G2UMw+GQ9PwDYhqm8SHpcoJa1sj3D1Hfvb3JlDAgswXZ/QlysUAd7xB8934Xq2I4GrFaLp0D5HyKOn8MywHmGw8YLDOqqnLBcOyCsV2yGO4R/N4UZUPS73wG9c3NWw/hLJSIPlsT3GuQP7qJ+sYDbt68gX7yLmMTcrv+gO/KvwrmCPXXvoF8dB37T/8+pnZXh7GZMWTGc3EHe/Oc8Pf/CRZJ/Ye/Q/SwICXnWN7mOIqgrpCxJfj3/zEqOYVvfQ3+5HW0dNfmUkm0j6gu7/xr1JvfQfz4M2T/rCHL7qEtjIuHlCLkU9uSiU4Jzp6hng1Rf3wflfeS33A4ZLlcEuwuSH/3XfQoRv3pXdS7I8IopM2wp5oGKS3Bb08RBxr19g22v/lWBzqu80qMPyD84gnBj/YJ/9cvbsbmUYrQWoafrwh+5znNIubBv7nO98VvcXx66h7x0oHKGsLfe04oQ9S3bsP3rqEuRJKXUjD4skbdLZA/uob6o08BkMcxpmnYSlPXP/uE4K8fox6PUf/iPhCR+ABK7SJXN1eE/9EThFCo//se4/l+Z0OllOLw+nWOTx6h/tYJKtWob99E/YkD4E0Y8jxQNFXd+dABSOHWVJoNWOZOalE+oVhrBR0GEWEYUV1AHKqqJktUZ/uilGFra+eTefujtdv5AOcj4sLvdubz6zlJ1t6k3bbb34IgoGk0aZqR5zm5P0UsrJUhCIKQsiwRAmJvPt7WF0URZVmyWq1IrUCT0TQZRd7gkpalWLu5yJtaUmMRRIDE2gBjBl27lguQcogQEmMKQBJJyTDImBWhd0m3ne2AtQOEiLC2pqqCS/VJGTjPXh34+iKsHXJyUvGMa+ylKa/XP0CIGYIFggZrC4w5QSmXdsGO3kcHpyAWiJ0cEy5AKKcS5TMMJUG4Yry9zcnJCaZJwZY42ewcOCMIXGQwF4fW4gxiVkADouDP0y9RVIUP+pNhCTmfL1jlIAiwKKwdbOjuq5UCRl5ydYHMrc2wdkBduZMzSRJqs8DuHENSI2IwImK5lJd4JYQiCIY+QHqAtcMNTEWphKoqKXLd1VeVgknRIKW7RdLaYyq2AQKMqbE2JQh2qKplNw+dJYqgrgRCKCB27RnPGNx1dlC5nmBHGnbnEJquTVE09Bbgrp2uPme1gpBYBuR5Pxe0FpyelFgzQMoY7AJrk+73upY0jSCORzRNAcS+fSHWpqxyhRUCpQK09puYt6xtdO1M8e2mpBJFMZB77UIDgsVicxP/VeilbyqtRV8LFjVGer8e24nVLa6yTtZbbTovYwNWUJYusvdisXTxH6LEP2swui3DUvqgQUKANt5YzNvF5HmJMc7d+3k5RJAgsMRxisXFCLko7oWhBCuotQIkxiqaZtSdiFE06AA9rYdYG9LUmnJRo9QuVVVhjEbbEk2N1jHatJJYitabmf2METSNABFhrcBYidk/YXR4jZMfRpzlmhNuYu1NbwMTgxgixV1qH5LUJCt0DFYcYrMFNkjACnIxQmcRmpJa7nFWKuzgOuTbWN7GUmDNLYx5g9KrLS50gZMIsT8DYmymmO2FbtEAMz1G8xS1pQmH2xgrsEagdYTW/bRKkgHL5YqyFG6zBf9M7COPWfLcokWIiQU6kNS2wdiAMNzyi7wnraEsAaEwUYMerjY2lVKW2NiitjU2sNhAY3YtqZacPa2hirvFpbUDL52nbsRqJWma/rpfCIPCoFTi4pJo5cauSpmeVOgmJkkTqnKFrhdY46LVax2xWlmEyBBCdJuYCwKvwDgeyCihUseARUnFcH/I2XSFVjVGGUxSoIdunoVBiJQBq0mIaSKMCd3cNJJKh5xkB8xWM6ypu7XlvJJbj31xac3leU4WGL9hOp+6bC/7JGIqLjJV2zDZxt0QwqvQPsqbuCipQHtCOGNQl5tEa02axhSFparbUAfO5qWNWhWGirp2wbK7yOG+vigKqCpDVRUYIYCSwFbU1QKH31QIsTlxrVXMsbwfXuMtzhDCooIV1jgdtmkK4lj6GCM5QmhEmGGHY5rFouufFA3SNghZo2RrkFQgxGZwbid6SqwPBi6kQaqK8/kRsE+YjfhgoZDiJ0gxBXIEM4T4ocvnojXh8YzYFkixQuoSuTIIqcgmMcXDghhDFCm2vaQiohOkOEeIAqkeoZRTW90ma1DK+mE7Q1Ai5Rlx+lPKskBYOBWWAMkqP6GqhkjR6vd1N7ZCQFnOCQKIIlxkMgKkrBGi9pKCc7fPc4t4coiav0vUFAijKIqym/AtuRw2sZMa4wq5O+k2FQHEifNpqZMlhA3EsMgmzPOfEQ1vwSJ2AdTBq+AuU4BL+5KwWk3oJRVHTeOkYCENUtaQJ4zTWywWC8rTBmFSxGyF0G3uYncAupglolP1peeNEAFSKGqTI69Nuvk6YYrcbZBZA6FGjBfI3YmbN0JgjCKt3iSftzGB3Xz/UXCArVegFIGSPlp+a6ciu1AJF9WaKAoRMvcStVMtl8vlJxNTWQ/S1GIqne+ICjymoi+912MqqvtOiBa1FoQ+UVIb7NdhKv7KMgj9gFZuAuDKsdadvHGcdMxSShKEQVf+xZQEyseAaVqjdlEj5dxX5ZI7OT1ZIOQSaLC2xpopcRw5YNhopF0g7AopE6BCCEMYVSh1ESdw/VCyRgiNtBXiaIut/X0mYoJzT18iRYAQKxCNm7hJSVmsEMIg5QJplyg5R8ocpWqMNVjzHKkWSFsiREhdzwnDFUkicKhijZQzlIqBECEMadpfSwoxB1HDSmEebhGy5S00a6TV7Awl03sR0DisSy42+JmmmS9rCaIBESDlyuvxLrGVtaUbN2kRosTYBinnDAaLS0niXN7fqduwFzHy4faGpGLDCNmkJOMMmUvkKmL3eca2ucdsMQdylPJ4kdIIUaCkRsop1sYotRmjxx1aGofllW4egJcQC9I0JM9zpMwdD3Btt7YhDB04WteVb3sOVLhUNaekcofi4VbXr729faazIzhXyCJAHA2RD7f9/A7cfObEz/G553lFIzVJlGIrNyc35rO1SG+HcjHzRrs2WmPVKFIMBp9Qi9o2Lq37e+PXNZzhhW/T4yrtpuJOp6a5rKa0kokTMS/urq4sKQVa4+/pu1ZsPH+xLe3OfbEsa90NVtPU/lTumd9udC7VyPr7fZ/AYvTFsvGbobiAMzlXdGtNL+1t/OpCArY8Wucb2O5fqXpR1i2QABeG4kJpa/x2fbhUZRcrtQ1eDrbL7bRuRNxJDoIuhWbPq5aX+OtU220ueF8b6Z9dH7PNdrT+QC1WtzkOeN509RlNVZVd/3osdg3Ds9aPwWZdQtgOb1inMAyoa+H7tzlubRvr2t1ybs6F/t+2jdaD1UVROG+itXnVvttePX9YOI+2LIfh9Lxo48866GFTrWm1iRb/M9p27jUfh176ptJKD208FRU4OxWscf4Jpk30vXn704KurZ2Kc0p0aHarG4qOCe59J1riy7Xd/1t/B60tTeOeDcP+nl4qiRQOTH1RW9qrN2N8Wnlj0I0Dht14S5+WwnpQU3QxKyDEGNcOjfHBivs2rdvhrNVIG56kXWxOBQl9/7UrTxiPTwk/26QH4FyZ2rpnnO7sedC4YNXaGprGUFUNxuBMxX2Fjpeu/cYYwlB1bTTWrrVJdwug7Z9UDndytzj9uLQURbIbg7bdLkuC8VKHdbGLtXGGgr58t4gu21ZYSye5Ws8nu+ZN6er3/UdgjWXLroikYNFofwCZ7tl2AWrTz5XN+pyZe4sJNo37va4bmsZ4Fd1HY0N0492IdmNer29tXIybE2154CQ3szJ+LmzOzRYzbHnV2XWZfn43TY1Sm/UZv/m3c3Kdmkaj2vlrbJexYt3T+VehVxL42p3kPehH657tTxF3qm/u/OvxOVopoPVV6A852z99oYz+nYsYjl1ri9dDXWH+sRe0pTez6L6QskXv2zL7OjfJdpKHsK5Xcq3AD61PrPFgrR89H8Rm/xBdXV0/aD1cL7ZHIDb44d52bvM9D3pe255XYs3FHjZ4KTpjua4nPu7Kev8smywSPX/EOj9F95y9UM86bfwtnFRjP6Q+r616P+d+zNoypBDrQ7zR774K0ZezMXa9BNqP34X5ymZ96+MiLv62tjbW6+5/3yxTrDW8f3ezD31mQrFR1yav+v4Zo7117ScwQftlTEV4OxXRxW24tBi7Ce/z9Vo63TAMQ9oMht2mtLbIgiBwaVC7762vT3qfhlbK6AfQeODqRW0RnsvrMSsuGg61CdLaAZVSEfi0rF2SJ9bi8m5slOJSWe7K1W9I/v1WvQnDEFlsbgw9lhQ4hN/0fWkDf0vh4gQ3wvFfKUUcx132SGfN1/OyLavtQzcsgi64cl33YrYQEtOOyws3vvX+KVefb9/6WDjTgValtF17Li4y6ANw9xvR5rh0fWjnExLQGylENvoobFdu6E3aN+eCoLVQXe9bFEXds1K2TrPWY3mym7PrvHTjYpFt/qR1PnspRLSbO5u8bP8fhqGXkrnUppbPrarUt6v1v9vkZRiG3uHQtSlJ0i5J2cehV4+pXNBFHQp9+fZHdE+6GCLtzgmGpqmw1viMhP0x1JahdbN2y7Sut9q1vLGSqvIni1wHs17QFr942z6ItbrABcrRugZ6y+A2hUVrN9KeEsKrTJZ+Q7xYn7W9+tb3DeI4YrVaOgvQtg2i/10pSVM3/aK2vi9+8To1xU1AYcFa7W5vhPNQpeWmL9uYBmsNQRDRtCbta/x015OiMwsQWBdHWMlOirw4tkpJ7yXe52xqc2W7MWvHqD992/goynvQbpJBm2ZNwtj83c0FUGvzQUpJFAXYcv2G8KJE2mJlF+dCjz2ItblSVc5UIQzDNYmg5ZcHsiWb472WtxjsRv+EkMRxSFGuzbu1+qR0ksbFNrbPKOVzA5m+f9Yaf3jib+cu8qomXJO2Lm6ovyq9MjuVNu9P0MjNGLWm1bsvxKj1/jLtc9a6WxhjLFIGWFt3nW6faZr2SjnsrgmjTu93zzgDtYayrLrAUQjTLcZWp1+nDtC1ttNtHXbhvnd2KNYDs+11oZt8rTWtMQaNp/ubRgAAFOVJREFUprGaRmvo4lo0l+oLQ4mzOfBOl97By0U9b7pTTwtvmGbdhltVFc6YzCeZsobGaHSjcYerwy0ardFWYwOI45j5fE5VscGnptEdv6uq51VrY2SN6axD2/okmrKsqOoIcCd602jWjVIdr/x15oX6Wn6maYrWRYffCEGXN/gir5TC34KANY6362FSwjBy8Vjr2mMqLgd0XuWdtNqW6czXhcd5tAeiN+tzQH/Liz5+cmtU2baxt8Fy/QsD6Q0y+/p0o7E436TWP679TUoX5V5r7VVN43OG625OSmmIoqjDENs2uVxZjs+bfXBSoTHaY0CbB3wcy+7ioO1jXdcf207lpQcRXbdT6fx+PPWpOPo0HB+VosMNlkPFtTZEYR9/oldJBHXdoHxogYt1VD7ZexwnXblt/hTAT+LNtrTX3i3Qtt4md+rFnQk0XrzU2i0wF3lObZaJ7IBod129WZ8xbrMRF/Cn4XCMlMob9/n+ir49YdhPsF7N6su1QFlVHa+0Npyfz1EqIGx5ufZOC1yGYbzWdtHxoKoqgiDs+SwkSZoShdHajcNm39pg5e6WZJOXQRCiVEBZVu2IOl4ag0AQRfGl8qyFuqo9HnQ5LUVdNx1v2v4FQUiWDTswen1c1nlQdSbw6x+FUmE3fu33i8WSptFdG531seh4XZbVxpxcT5nRlrXePykVo9EWCOE3jL6sdk4GQUhVeVumXv8B1vnc968F4J0ph7rUt6pyG2/Pu9r7f328nE0vfVNpfX/awNdRHHlQrr8Pbzec9U9vp9LaqkgX+iAIGI1GxHFE6a+7WtzF6dfuOestaDvd1i/MNE1RSlGWZVcX1lKWzoRaycvtaSWrQCkPqLUAZDsYlUseH8ednhyGEYNs0F2htn2SosWS3CRoT5P1Txt/xnaiqqvHuaFbhsNhP/l8/8BducZx3OnBra4ufEpLKVSX3EtIQRRF7O3t+RO31ctb8LjntxPdNw8FKSVpmnVSWBuyc7lcUlVVN8YX+1ZVFWEYuPg6Xi1r6zPGXb9nWdaPjcDnipK+3Iu8CrrxbnG69d/T1OWtaerazQOcyrBYLPox6573GJV1ONZ6O/r+41WOfs5JKdne3iGOnSFdhyV1lxCSwWDYSRFdWR6jk7JPDdz1GxfX1wWp9tbXa/U5Ca/xbVT0e8plPq/zSgWqk6Iu9i3LMm906QJUZFn2UlSgl76ptKJx/0X/H4dT9JjK+qfDUuj18rousVazXC5omprUg7/rz4C7Ww+CgDBUHd7gnoGqKrBWk2VJ944KnPWka9Xl9oSh8+7scADR4ypCWNI0Qeuaui5p9dS6qSmKFXEcuohaYv2GiE4FCEN1qT6ta5qm6sVO//3e3g5KSfJ82fe3w1RcRjmHN+mN9rU4gMVSlLn7DlfPZHJKEChiH9JS0PetqgqMaYjjaK0+V6dL4ZATRcFaH2A8GpKmcReq8WLf0jT24nd1qT6XcE5RFKv+HY/dtHy+WJ4xmrIqekBTbNZZVQVSOjyqxYuiKGJ7e9zxeZ1P7fgi2GzHGu4TRmE3P9vvZ7MJdV2SprHHTlpRzc2qolgShoooCi7U1ycCS5K4n5NKsL+/6+aD0Rt1OV4poiikKFasR+Ntn0uS2GsJff9aFxSXWVJe6psry3YbXlVV3QXLx6FXgKlI73PjMBUVCC9Wu522VY8ux1MxHlPR3WmfJAlN05CmqQ/Uu3Q4gC+jBROzLPa+OAIVNx1W0OiGIAgoipL5fN6Va23DatWaJ5vu+5baTdFtWW4i103t7CyA+XzuTaCVz5kCgVJEcczkZEUbP6axDQ2NB1rdiVAUBU2z6fvjUHjV2ZwYn4T76OiIsiwZjUbolaYR3gDQgjENq+UKCH0falefdEncWhUijmIWzdzlWQoE29s7PHny2PPaduPSNA1JkngspzfVNto7gHpQcrVadfwVtmE6m7FYGITv3/q4OF45twWlVD8uPtFcW8dwOGI+P0dIZ0/hgHDNYjG/NDZKKaIw8nYVjTeQ61Xs9nbLtVNgjaYoak7zU4RwEl2Lv7UXCsZodNMQRdElr2ig8zJu5y7AtWsHTKdT5vMFrWuDtf0zg2zAfD5HCNHNdVef8AveHZYtD7TWPH/+HG0ahxl5rK+tz220giwbUFWLznBQ+/qWy0U3l3o3BOkNRyuP32zKEA7LWnq10N00Lhbzj42pvALfH9sDc3jdrz0KkH4CvKjR7Xf972XpRLHz8znGGLJsuFae7J4ritLjAAJB1d0jCSR57oDF8XjcxShVgSLLhsCx118329Pq40a3V7fC4SK+3MGgjQPaYyp1XbFYLEmSsR/AxuvsPQgLgjCML9XnjK6qtRspp0ocHNzg6dMnLBYrr6+7slo9OEkz5uc53dWp1+1bFwXjU8a67xz2dHR0TBBExInq+ta2seV3lmV9WhPfP2uFC5oVJRhj3MQVku2tHfQg8QaOm+OyzqtlqWlwkdwE94DdDtRfLi1wiDuBP6Cul8B1guAt75Hbk9aQ5yVCpAh2gDccX23NiHeY5s5fKEnanFCCOE7YTfd5+LxNFyLX/nXuIwjJcplfGhspJXGUeNC+n5vHxydorRmNRn4utPPEPbNYrAhDp4q0hqAthtNidWk6YLFY+HoUh4c3efL0Z+hGd9JoW18YRiil/GEoLtWXpkOWy7kfQ/eOA2e1x65aq+WelsucYdiHJKnKnOG10cfGVF5JCr+LMWrlGk7SJw/bfMddLwq/u7Yu8Sl1XTMeb7FaLclzhzG0O3Cre2ZZxmrl0jVKJb1I6OobDocURcFqterKtcayXLpTJFBh931L7lSAMAq8uO6SaLVjkuc5SZL44EpzWq/nra0tnj50yZjCMEAZRUCwJn5KsnrFQL3JyvSgs+uLQOvHCBEjxDWk/BRPn0q0vufE5JVAiB2EOEHwDtYOKYobBIGLHiaYIuw5QtxGiDnGfMeBnfEbLGVOKT4giROuXTvg8eNHVJVew4scz9PU6dRlWXY8aY2jlFKMRqNuswmCgACYTKfkqzFKbuJcLeX5ykli2Ra5sAyokOoJzofGTYLxuJdUhJgRhhYpT2ianyDl5gQPw4DBYIm1OULMCYKHbg6YgltMaAZvsFwuyQuXeE4JSV41nK1OO7ylKJwULZVTl62/yRuPt5jPN4NjO4C69HhVP+euX7/BdDrxfj8t/tLPzeF4m9lsxsWAZYgeUymKYoNXz549dXMldCEwpFDd7y2WNR5vsVjMXQoWcInElKQocqIo9vih28TiOCYMA3/rZC/N89FojAzOOjU/e0k5sl5Jio4W3YZWUnHfbxryfJiI1f/mrkwt5+czXPKjgX9is4yiKIhjL6mIsq0aIUSnho1Goy6nSRAqhsMR2FOP8VyUVBze4IJEtXp7ezq0ZXnRXLQ3IyWLxYIsc5LKwTBke3nKJL2L0EtAEAcSJQ3D0Yxivh5sW3j7ghlSaoSYMBicsLW1xfHxMXWtkfIpSuZIMQNKlCoYDE5YzHMHVjJHsURikHKFkhXGQF39lHOZshAjaBqeP39GFEWkqerAp5aX7XVxu0lDL2Ra61KmJImTSkZJyLXyKZPhr7E7nHan28WxdapNe4IKEB6Mls5L1tp2g+/rag3hxuPhpTw0Wjfk+aoDkYfDAVkgubY44ix+jWLlfXwQSKUYyIbn6R2uDQ54dHTq29humC7vgfBlLZeLS3NBSkGcJGs2S62kcoQxhuFw5BZ5C+DgsB4HDDtJpXfOdPxur7YHg2GntiiluHXrFk+fvY9umjXsqZdUgkB1z6+ZZSKE7JLmOS3BvdM0DXVdE4RDwiCkEhcllSXDkO7ypK5rxvubmR5+FXolycTc9aqPp6LbGLU9pqJ1fckPwXjwylpNo2uwTudzyY9c9LD5/NzprVajm7rzmxgMBt0iUHGzZg/hQMeiKJhOJ93Et7ZmPp93RkhteMGWeucs3zbj6mt19+l0Qhg6CcfoBovbiAZZxpPTc6y1TKcTRsmUx9MxcdpgjcXYJXMjOJrNuitYcEBiEKg1HjXM5xPyfE7TaA4fpEyeh8AQY04dhhNIynJFksQkW2DCKcXJIXpeef62unqF1oo4y4jjmCwb8OTJY+97so6p1B2/F4vzDTsI95wLQeEwEjBlzYE6452TIZ85nyGkw1RcWX3nZrMpUgqiMMCyWV/L5/F4zPn5DOHtdMIwQBu9MWYtBUHQbWzGNMxmE1bUXMtOeTjb8gu1dHNEazSG47zm2eIpKkg2DpqgaTwO0qB1Q5omlzYxIejS7TrMyM2V69cPmUwmzGaTNb8o2/FgOBh16na7IfXzyvoxnnZ81rrm4cP3QdSoIMB6I7+2vtaIsd3EWkzFYTg18/k5UgqCIOrxTCUJg5C6KinLnKbZ9OkZj8dYu6JZc62ZTM66ze9XpZd++wPQOoQZ4yz6WrWhtcQ0pgUJ16LArT1j/eTK84K6rjk7m1AUJYOhT5VqwdlkWX/SrQiCkDCMWKuONsBT02hGozGtd7T0ojzWegOozba0thgtcOo2Kbr3R6MxRVF6/da1pywLZrMZaTpAyoBchRT3B96gzRlzyaGEKGU9+p21ztgszwvWHbmshVu37rrQgM0J8zjh+bzqNiNnUxAxny9YTKcM0pD353ajj9DzabXKmU6nPH361C/MrCur7VvL7zQdrLWv5+V8vvAidQiJ5fzekL29fYbDUWdEtclLx6u61qxWucNc1p5xp2/AbHbeO29aJ6FinUR4cWzqumG5XHZgojGWSigWnxpjjBtvIQRZOnB8HyiiJOPg4JCiKMjzfKN9Fm9MZ+nSgW7MSyHXNrHW4RGePHnKcrlyEm93b9nOfctsNlszFVirz/bBqlPfRnwbbt++i7V0sYHsBq9C4jjl/HyO1j5yr4U2wuFgMKSute+fe9cZJtYubIIKLvVtPp+jtfFmFc7sYmtr+2Ov/1dg/OZOtvX7cAtMTzKqIiAIIAis/7f/CGFZnocspkn33WAQE8eK/f1tsixitTynqiSTowFKtu8KRqMUYyq0LlGB27TOng8wjWI8zogiyXI5Iwhga2uAwFkgnk8SikV4qS3rbSpWAbNTl9Gv/V4pSxBYlLIeC5EsznYYj7coywXQsL3X8NmvzglDUAGoQGJlQL7Ul+pJkpDBIMaYhsU0xtbbhKGgqpYEAbz+1pxbr+coZZDSUuaSyVGKkhalDLsHBW/9xhylTNc+reHs2RCMJAgEW1sDggCuX9/HmJqqcteJs5OMKnfjMhwmJElAWS7WeACrecRimjIeD2iaAq0rDm83fOYrS6pqhZTWhWx8PvCnJZfGWSq32NpxCTb46dq9sz1yksF8RL4MWS7PX8ArxWCYsZxLZicpQQCjLc3nvzYnimE8zhDCUBQLtIF0CCZRSCX8ePVtUoFbtNOjDF2prh2X5wEsZjGr85jRKCXLQsbjjOEwYbU69+MCRa6YHg8IAsHOzhitK5qm2Jg3WsP0aAxWUZZLgsCyu7uFEJq6zgl8m2anKVUerr27zit3JbxchMzP0g1+K2WJY8X29hClwOiIo8cRVjeX+rW1NSQMBHXTMDvWSELOzk4vWbv/siQ2Y3hc+PHF4dk2aG9vj7Is11BsycHBQW9EIwQHh5Kz0x3m56059+V4KtcOFygFp8cj6tr6snzeWW/8k2QlBwdLnjzapqp6Ea29xgZQgeHeaxOePd0mXyl/1WnWTgT39+275yyXEdOzhItgdyv+be+uyLKa509HGybO6/XFacOtW+c8ebRL06jORPrXvjLg6/9gxH/3D4+ocs1X/2bJ3/hP7vLf/tcTzp5fdFpzdR7cOEc3iunZgKaxXnIx/Mf/xR6TI80/+58njLZKdnZynj7eRmvXjr/yt0b8xt9I+R/+0TF1ZQkjzZ17M5482qYsZMdDY4w3bnNhG+68NmU2HTCfRRjT83t9TrTjcnI0xJi+37/1d8Z87msp/9N/c0IUV+zvn18aF2ivh82lcbF2E2Non71xa0JRpExOI140t4WA3f2SJCm7cbn/2ZTf/8+3+O//4QnLcychx2nDW1/I+fv/5af4H//RjEfvNJ0zZD+OlruvTzg9GbOcB5fmQVvfjVsL6lpydpLhQlj0bW/50Y/LFnUtun6vUxhp7tyd8vTJLkXexz1pnw0ChTaaO/cmG+PSzkln72T9uCxRynJyNKRpNudki8UkWcnB4YInDy+Pi+u/REjNvddPOZ8adOMccI+Pj7sbKykVN2/e5NGjh5fetxsRx3t6JSk6nj17tvHd6QnA0Ue+9/D9n1/2agVnJwCPPvK5778N8OQjn/nJj35+ffnjn/9MUcBsArD58I37rzHcNgy23mF6uqQw11HRku3D93jy/tkLy3rvp5e/SweK/VtfIB5U1M33OX5uOX4O4AdZwI0Hn2Jrf4cw+zHz84KigO9/93KbLtKPX5zmZoNeNC5CwI37b7B9sIWKf8DJUcnJEbyMcXnnxz+/TY8vzO/D12+RjQWj/Z9y/MxhIkUB08UOuzcMB/ce84N/++J6f/g9+Hl8evedn9+momBzXD7kmV+EB7/quFykX3i9fPfnl/XL0CvBVP6ykwoEezcSilxzcMelcD24k7Ka1xzezX7O25u0tR8jlSAdBGSjy2dAFEu292Pq2nDt5se3hvxFKEoU472YprHs3fiLqfPDSEi4ditltWi4foG3t98Ykg4C7n5mdMmE4YpeHb0E9We/sw68Ik8CBqMQKaEsDFWhSYcBQSCoK0Ox+sV1VhUIsqGLYL+aN94gb60qAYOxi89b5Jq6/HiGS78IbdS50tTVq6/zoygbBSglqEpDmfe8/bWv7vCf/ldv8Af/y0P+xT95+v9iC/+/S1IqDg4OePjwg0u/vTL1Z7FYsL+/7/OyXtFFSkLwqYC7v0eDD338Iynd/QXq+gumZOsvvs4Po8Tdund0/81ddCW5+2Cfg4MXx929oo8mIeiuxn/hdz6upHJFV/RJpcE4IEoVTWWYT15OAKIr6unDJJWrTeWKruiKfiX6sE3lCqi9oiu6opdKV5vKFV3RFb1UutpUruiKruil0kdiKld0RVd0Rb8sXUkqV3RFV/RS6WpTuaIruqKXSlebyhVd0RW9VLraVK7oiq7opdLVpnJFV3RFL5WuNpUruqIreqn0/wB9H812FR9hawAAAABJRU5ErkJggg==", + "text/plain": [ + "
" + ] + }, + "metadata": { + "needs_background": "light" + }, + "output_type": "display_data" + } + ], + "source": [ + "sram = mpimg.imread('Results/sram.png')\n", + "#core.shape [:3]\n", + "plt.imshow(sram)\n", + "plt.axis('off')\n", + "plt.show()" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### 5.3. Discussion\n", + "We have zoomed in on the detailed images to further demonstrate that the two dies can be coupled. The following image shows the core die and cache die in the sky130A and GF180 process respectively." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "Our objective is to mimic the AMD 3D Vcache model. Both dies have identical footprints, with corresponding signal bonding pads positioned internally within the die.\n", + "\n", + "To simulate their respective real-world conditions as accurately as possible within the entire 3D system, we have conducted separate simulations for the two dies. As you can see, we have modified the BEOL of the core die, with Metal4's parameters derived from the top layer of GF180, while the RC parameters for the ‘F2F’ via layer are calculated by the average of two PDKs' cut layers. To avoid potential debugging complexities related to the interaction of two different PDKs, Metal4 is not used for routing for the cache die. Instead, it serves as a bonding layer, where the routing endpoints of both chips converge." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## 6. 3D Timing Analysis with TSV Modeling\n", + "### 6.1 3D Parastic Extraction\n", + "We extracted parasitic parameters based on chips' geometric dimensions and material properties of the TSV structure. In this model, copper is chosen as the filling metal, and the relevant structure and parameters are depicted in this figure:" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "The parasitic resistance $R_{TSV}$ consists of two components: the direct-current resistance $R_{dc,TSV}$ and the alternating-current resistance $R_{ac,TSV}$. The former one follows Ohm's law, while the other is determined by skin depth and proximity effect:\n", + "$$R_{TSV}=\\sqrt{R_{dc,TSV}^2 + R_{ac,TSV}^2}$$\n", + "\n", + "The external inductance $L_{ex,TSV}$ arises from the electromagnetic fields present in the dielectric region, making it dependent solely on the geometry of the interconnect and the dielectric material. The internal inductance $L_{ex,TSV}$ is related to the distribution of current within the conductor. The total inductance can be calculated by relevant literatures, where $\\delta$ represents the correction term accounting for skin effect and proximity effect:\n", + "$$L_{TSV}=\\frac{h_{TSV}}{2} + \\delta$$\n", + "Finally, we calculate the insulator capacitance $C_{insulator}$ by the coaxial capacitance formula $f(h_{insulator}, d_{TSV}, t_{ox})$" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### 6.2 Timing analysis of TSV\n", + "We have developed a symmetric H-type equivalent circuit model, as depicted in this figure, which incorporates both signal TSVs and ground TSVs:" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "Due to the conductivity of the substrate material, $C_{si}$ and $G_{si}$ represent the parasitic capacitance and conductance, respectively, arising from electric field coupling. Additionally, $C_{IMD}$ is the capacitance of the metal interconnect layer, and $C_{RDL}$ denotes the parasitic capacitance of RDL interconnections. In this model, we solely consider the impedance contributed by the bumps." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### 6.3 SPICE Simulation in KiCAD" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "v3sqOBn77kLu" + }, + "source": [ + "To investigate the impact of tsv on timing and RLC characteristics, we perform Spice simulations utilizing Kicad.\n", + " (ps: Kicad has been integrated into our environment but we cannot open its gui in this notebook, so we just put the code and simulation results here):" + ] + }, + { + "cell_type": "code", + "execution_count": 26, + "metadata": { + "colab": { + "base_uri": "https://localhost:8080/" + }, + "executionInfo": { + "elapsed": 580, + "status": "ok", + "timestamp": 1711026986099, + "user": { + "displayName": "Yifei Zhu", + "userId": "15764558996168935466" + }, + "user_tz": -480 + }, + "id": "W5PwiyIK7kLu", + "outputId": "dcc94b41-1da7-445c-8a91-dfdbc0d74b82" + }, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Writing tsv.spice\n" + ] + } + ], + "source": [ + "%%writefile tsv.spice\n", + "## take frequency of 80Mhz for example\n", + ".title KiCad schematic\n", + ".save all\n", + ".probe alli\n", + ".probe p(C_insulator3)\n", + ".probe p(C_insulator4)\n", + ".probe p(R_TSV3)\n", + ".probe p(L_TSV2)\n", + ".probe p(R_TSV4)\n", + ".probe p(V2)\n", + ".probe p(C_insulator2)\n", + ".probe p(L_TSV1)\n", + ".probe p(R_TSV1)\n", + ".probe p(C_insulator1)\n", + ".probe p(V3)\n", + ".probe p(R_TSV2)\n", + ".probe p(C_IMD1)\n", + ".probe p(C_Si1)\n", + ".probe p(C_RDL1)\n", + ".probe p(R_Si1)\n", + ".tran 31.25p 12.5n 0\n", + "C_insulator3 unconnected-_C_insulator3-Pad1_ Net-_C_IMD1-Pad2_ 164.343f\n", + "C_insulator4 Net-_C_RDL1-Pad2_ Net-_C_insulator4-Pad2_ 164.343f\n", + "R_TSV3 Net-_C_IMD1-Pad2_ unconnected-_R_TSV3-Pad2_ 0.00347282\n", + "L_TSV2 Net-_C_insulator4-Pad2_ Net-_L_TSV2-Pad2_ 6.19242p\n", + "R_TSV4 unconnected-_R_TSV4-Pad1_ GND 0.03\n", + "V2 Net-_C_IMD1-Pad2_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", + "C_insulator2 Net-_C_insulator2-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", + "L_TSV1 Net-_C_insulator2-Pad1_ Net-_L_TSV1-Pad2_ 6.19242p\n", + "R_TSV1 Net-_C_IMD1-Pad1_ Net-_L_TSV1-Pad2_ 0.00347282\n", + "C_insulator1 Net-_C_IMD1-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", + "V3 unconnected-_V3-Pad1_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", + "R_TSV2 unconnected-_R_TSV2-Pad1_ GND 0.03\n", + "C_IMD1 unconnected-_C_IMD1-Pad1_ Net-_C_IMD1-Pad2_ 4.11862e-16\n", + "C_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 1.27899f\n", + "C_RDL1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 2.79443e-16\n", + "R_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 27188\n", + ".end" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "UTQkhymp7kLv" + }, + "source": [ + "Signal delay detection is determined by a threshold set at 90\\% of its peak value. The figures and table exhibit the delay profiles for signal frequencies spanning from 25MHz to 2GHz, where the normalized delay signifies the proportion of delay to the time period:" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "ksIYK-hM7kLv" + }, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "q89AZQ6H7kL0" + }, + "source": [ + "| Frequency （Hz） | Time period (ns) | Delay(ns) | Normalized Delay |\n", + "| ---------------- | ---------------- | --------- | ---------------- |\n", + "| 25M | 40 | 0.60 | 0.015 |\n", + "| 50M | 20 | 0.45 | 0.023 |\n", + "| 80M <-our design | 12.5 | 0.41 | 0.03 |\n", + "| 100M | 10 | 0.40 | 0.04 |\n", + "| 500M | 2 | 0.30 | 0.15 |\n", + "| 1G | 1 | 0.26 | 0.26 |\n", + "| 2G | 0.5 | 0.18 | 0.36 |\n", + "\n", + "Notably, as the frequency increases, the delay introduced by TSV becomes increasingly significant, particularly exceeding one-third of the entire signal duration for frequencies above Ghz.\n", + "\n", + "We have integrated the corresponding delays into our design flow by 3D times, ensuring that subsequent steps such as CTS and routing take into account the influencing factors of TSVs." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## 7. 3D Thermal Simulation and Signal Integrity Analysis\n", + "### 7.1 Thermal Modeling and Simulation\n", + "When stacking chips, a major issue arises as to how to dissipate the heat generated in the middle of the two chips. Hence, during the development of chip packaging, engineers should employ CAE calculation and multi-physical field coupling simulation to analyze heat flow within the packaging. This allows them to manage heat transfer paths, reduce chip die temperature, and enhance thermal reliability.\n", + "\n", + "In this work, we divide the core die and cache die into 30 module grids and 5 unit grids respectively, as shown in the following figures:" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "Core Die:\n", + "\n", + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "Cache Die:\n", + "\n", + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "We proceed by computing the number of active cells in each grid and allocating the overall power consumption accordingly. For thermal simulation, it is imperative to extract critical parameters related to the 3D stack structure, encompassing material properties, electrical characteristics, dimensions. These parameters include chip thickness, thermal conductivity, volumetric heat capacity, package model, floorplan/stacking information, and etc. Subsequently, we establish a model of the external environment, configuring factors such as heat sink, heat spreader specifications, ambient temperature settings, and so on.\n", + "\n", + "HotSport, an open-source pre-RTL thermal simulator, serves as the primary EDA tool for executing this step. Within our simulation, we have established five material layers to facilitate the transfer of thermal effects: heat sink, heat spreader, cache die, core die, and package layer. The geometric arrangement of these layers is depicted in the accompanying figure:" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "We use HotSpot to do that simulation, a demonstration flow is shown here:" + ] + }, + { + "cell_type": "code", + "execution_count": 55, + "metadata": {}, + "outputs": [], + "source": [ + "!mkdir Thermal_sim" + ] + }, + { + "cell_type": "code", + "execution_count": 56, + "metadata": {}, + "outputs": [], + "source": [ + "!cp -r ./Open3DFlow/thermal ./Thermal_sim" + ] + }, + { + "cell_type": "code", + "execution_count": 57, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Writing Results/script2.sh\n" + ] + } + ], + "source": [ + "%%writefile Results/script2.sh\n", + "#!/bin/bash\n", + "cd /Thermal_sim/\n", + "git clone https://github.com/uvahotspot/HotSpot.git\n", + "cd HotSpot && make SUPERLU=1\n", + "mv ../thermal/ ./examples/\n", + "cd examples/thermal\n", + "sh run.sh\n", + "cp outputs/*.png /Work_dir/" + ] + }, + { + "cell_type": "code", + "execution_count": 58, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Cloning into 'HotSpot'...\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotspot.c\n", + "hotspot.c: In function 'read_names':\n", + "hotspot.c:190:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 190 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "hotspot.c: In function 'read_vals':\n", + "hotspot.c:224:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 224 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotspot.c > hotspot.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c microchannel.c\n", + "microchannel.c: In function 'microchannel_build_network':\n", + "microchannel.c:296:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 296 | fgets(line, MAX_LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "microchannel.c:324:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 324 | fgets(line, MAX_LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 microchannel.c > microchannel.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c materials.c\n", + "materials.c: In function 'materials_add_from_file':\n", + "materials.c:31:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 31 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "materials.c:82:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 82 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 materials.c > materials.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature.c > temperature.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c RCutil.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 RCutil.c > RCutil.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c package.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 package.c > package.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_block.c\n", + "temperature_block.c: In function 'read_temp_block':\n", + "temperature_block.c:631:4: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 631 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_block.c:659:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 659 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_block.c:677:2: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 677 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_block.c: In function 'read_power_block':\n", + "temperature_block.c:744:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 744 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_block.c > temperature_block.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_grid.c\n", + "temperature_grid.c: In function 'parse_layer_file':\n", + "temperature_grid.c:631:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 631 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c: In function 'count_num_layers':\n", + "temperature_grid.c:770:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 770 | fgets(line, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c: In function 'read_temp_grid':\n", + "temperature_grid.c:1573:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1573 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c:1605:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1605 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c:1623:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1623 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c: In function 'read_power_grid':\n", + "temperature_grid.c:1709:17: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1709 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c:1733:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1733 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "temperature_grid.c:1742:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1742 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_grid.c > temperature_grid.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp.c\n", + "flp.c: In function 'flp_count_units':\n", + "flp.c:1015:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1015 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c: In function 'flp_populate_blks':\n", + "flp.c:1070:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1070 | fgets(str, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c: In function 'flp_populate_connects':\n", + "flp.c:1138:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 1138 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c: In function 'flp_create_grid':\n", + "flp.c:548:43: warning: '%d' directive writing between 1 and 10 bytes into a region of size between 0 and 511 [-Wformat-overflow=]\n", + " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", + " | ^~\n", + "flp.c:548:39: note: directive argument in the range [0, 2147483647]\n", + " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", + " | ^~~~~~~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 3 and 523 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c: In function 'flp_wrap_rim':\n", + "flp.c:722:38: warning: '%s' directive writing up to 511 bytes into a region of size 503 [-Wformat-overflow=]\n", + " 722 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 10 and 521 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c:736:38: warning: '%s' directive writing up to 511 bytes into a region of size 502 [-Wformat-overflow=]\n", + " 736 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 11 and 522 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c:752:38: warning: '%s' directive writing up to 511 bytes into a region of size 504 [-Wformat-overflow=]\n", + " 752 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 9 and 520 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c:766:38: warning: '%s' directive writing up to 511 bytes into a region of size 501 [-Wformat-overflow=]\n", + " 766 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 12 and 523 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c: In function 'flp_populate_connects':\n", + "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", + " 1156 | x = get_blk_index(flp, name1);\n", + " | ~~~~~\n", + "......\n", + " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", + " 1157 | y = get_blk_index(flp, name2);\n", + " | ~~~~~\n", + "......\n", + " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", + " | ^~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp.c > flp.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp_desc.c\n", + "flp_desc.c: In function 'desc_count_units':\n", + "flp_desc.c:51:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 51 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp_desc.c: In function 'desc_populate_blks':\n", + "flp_desc.c:103:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 103 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp_desc.c: In function 'desc_populate_connects':\n", + "flp_desc.c:155:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 155 | fgets(str1, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", + " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", + " | ^~\n", + "......\n", + " 172 | x = desc_get_blk_index(flp_desc, name1);\n", + " | ~~~~~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp_desc.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", + " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", + " | ^~\n", + "......\n", + " 173 | y = desc_get_blk_index(flp_desc, name2);\n", + " | ~~~~~\n", + "In file included from /usr/include/stdio.h:867,\n", + " from flp_desc.c:1:\n", + "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", + " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", + " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp_desc.c > flp_desc.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c npe.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 npe.c > npe.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c shape.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 shape.c > shape.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c util.c\n", + "util.c: In function 'read_str_pairs':\n", + "util.c:334:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 334 | fgets(str, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", + "util.c: In function 'count_significant_lines':\n", + "util.c:540:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", + " 540 | fgets(str, LINE_SIZE, fp);\n", + " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 util.c > util.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c wire.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 wire.c > wire.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotspot hotspot.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotfloorplan.c\n", + "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotfloorplan.c > hotfloorplan.d\n", + "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotfloorplan hotfloorplan.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", + "rm -f libhotspot.a\n", + "ar qcv libhotspot.a microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o\n", + "a - microchannel.o\n", + "a - materials.o\n", + "a - temperature.o\n", + "a - RCutil.o\n", + "a - package.o\n", + "a - temperature_block.o\n", + "a - temperature_grid.o\n", + "a - flp.o\n", + "a - flp_desc.o\n", + "a - npe.o\n", + "a - shape.o\n", + "a - util.o\n", + "a - wire.o\n", + "ranlib libhotspot.a\n", + "Computing steady-state temperatures...\n", + "Parsing input files...\n", + "Creating thermal circuit...\n", + "Simulation complete.\n", + "Computing steady-state temperatures...\n", + "Parsing input files...\n", + "Creating thermal circuit...\n", + "Computing temperatures for t = 0.000000e+00...\n", + "Simulation complete.\n", + "succeed\n" ] } ], "source": [ - "!docker run --rm --name Open3DFlow_s -e DISPALY=${DISPLAY} -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Open3DFlow:/Flow -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script.sh && echo succeed\"" + "!docker run --rm --name thermal_sim -e DISPALY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Thermal_sim:/Thermal_sim -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script2.sh && echo succeed\"" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "The following figures show the thermal simulation results of cache die and logic die respectively：" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "- Core Die:" + ] + }, + { + "cell_type": "code", + "execution_count": 59, + "metadata": {}, + "outputs": [ + { + "data": { + "image/png": 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JCT3S2dKdaGm9ydS/Gna9hzqMog2KiorQ6XRkZGQAwsGZl5fHxIkTOXLkCOXl5SQmJjJ48GDKy8vJzMwkJiaGAwcOMGbMGI4fP87YsWPJzc1lwoQJOBwOiouLg83SiIgIEhMT2b17N5IkYTKZGDt2LMeOHWP48OHo9XoOHz7MlClTKC8vx+FwNPHTKIpCbm4uaWlphIeHc+DAgaBTPisri8OHDzNt2jQqKyuDvrScnBzS09N5/fXXmTRpEuHh4cER9larlb179+J2uxk/fjzh4eGUlZUxbtw4vF4vBw8epKGhgYSEBNLT0wkLC2PHjh3ExsYyYcIEdu7cGRwHNm7cOI4cOcKECRMwGo1YLJZg2hMmTCAlJaXD44lsNht79+7FarUyYsQIhg8fjsvlYsuWLdhsNgwGA7NmzSI8PJz9+/fT0NAQvKZDhw6RkZER7J2tqamhoqKCsWPH4vV6OXDgALW1tVx88cXExcX1qzFOAWRZ5tmnnmLFG2+0aoHJ4eF8c/BgE4vrPKLVH6VPBExRFHw+X/DNHnhoWjuu0r3IssxLL73E/PnzmTZtWl8XR6UdAgK28o03WrXAvOHhfH0BClifNCGrq6t599130el0PPXUU2i1WhRFYfPmzWzatImYmBgee+wxdTJwDyFJEj/60Y+Ijo7u66KodJCAD0xtQjalTwQsMJbq3XffDTqBPR4PX331FT/5yU9YuXIlR44c4eKLL0aWZaqqqnA6nXi93mAXsUrXCZ20rdL7hIWFMWjQoA63NHQIP1hLtD/E9fykT9RAp9MRERHR5IeTZRlZlomOjmbQoEE0NDQAYlrDvn37KCsr45NPPmH69Ono9fpeK6vZbGbbtm1ce+21vSqeVVVVHDhwoNnocC+wEeg54SkpsVNQYOHKK5PpzRa82+1j/fpy5sxJJjy89+6z3e7l66/LufbaFIzG1uSh+7HZvHg8l/Hyy693SMAkhHi1VsILdTxUnwiYLMs4HA48Hg8ul4vq6moiIiLQ6/WUl5dz6tSpYC+VTqdj3rx5+Hw+Tpw4wZNPPtnqOKCe4NSpU5SVlfHkk0/2apP2yJEjOBwOfv7zn4cItgMoBep6LN/t26tYt87N009notH0noKZzR6OH6/gscfSSErqvbl2VVUuCgoqeeKJDGJieu/FWFHh5N13O9fwa8sCUwWsFwlMV6itrWX9+vVoNJpgrPbly5eTnp7OmDFjgLOjI2g0ml6djxXIK5B3bxE6p60xX6nZ357IN7BJvSpggXw1mt7PF0CjoU+ut8PnowpYS/SJgEVHR/OLX/zirOMpKSn9ap6Vikp/IjASv7XPLkRUj3i/xwJsQ7hpPfSk/0ul/yIBeloXKlXAVPopFmAV4Ovrgqj0MYF5j81RUJuQKv2KC3VUj0prqL2QLaMKWL9ERlhde4C/oFpfKtC6BQaqgKn0O8qAeuAkF+7jqRIgYIGpTvymqALWrzgE5COakOY+LotKf0O1wM5GFbB+xUFgg///hr4siEo/I9AL2dpQW9UCU+kjbMBp//89N8JeZeDTWhNS7YVU6UPygVf7uhAqA4C2RuKrFphKDyPT8iBUV28XRGUA0p4TX7XAVHqYUoSl1XyMV/+Nw67Sv1Cd+GejCliv4UP4uNRBqiqdJzCZWx1G0RRVwHqEDcDhZsfsqOKl0hU624Rsb9Hg5p83X8W8re/2F1QB6xFOAvv6uhAq5xHnMoyipKSElStXYrfbueWWWyguLmbt2rW88MILpKSksH79evbu3Ut4eDiPPvpoMMS4LMt88cUXHD58mKeeeorf//73OBwOxowZwx133NGrAUXbQxWwbqMC+M7/f1lfFqTvURSoKwFPJzooLD5wWKCqCJRueiyN4RCb1j1p9QPamgspKQp1dXXU1NQQExODTqcjJSWFBx98kJ07d7Jz507uvPNO9u/fj8vlQlEUtm/fzp133snatWupqKggOjoaRVGC62bW1dWhKAo1NTWMGTOGyZMn97uQ7v2rNAOak8D7fV2I/kNZLtg7Ma7NihgSV1Ir/nYHMSnnjYC15wNTvF4+//xzMjIyuOWWW0hMTESn05GTk8PXX3/NddddR3R0dJP1NjMzM/noo4+w2WxERkYCYpX35cuXc+WVV7Jq1SqcTiff//73cTgcvPfee/z6178mLi6ux6+3o6gCpqIyQGjLB2bU67nvvvuaLKvmdDqZNm0a0dHRrFu3jquuugqv14vb7cZut3PixAl++ctfsnr1avLz84MrtScnJ7N7927y8vIoLS0lKysruJK7w+FQBWxgUwosb+H4eTSKvr4M8sxd65t3WbutOOeMrRZObG37nFoZLPWQvwOiOnHBg0dBdHLXytcJ2vKBBUbiB0KQBygoKOCzzz5DURRuvPFGNm/ezIkTJ1iyZAmPPfYYV1xxBYsXLyY8PJzx48ezbt065s6dyyOPPILFYiEmJob09HSWL19ORUUFEyZMYNCgQb1zwR1EFbBOY+O8d9A7rVDfMPAHF3ldUF/a9jkNgBtocHQualF8RhcKdm60FdCwJd/YuHHjGDduXHB/woQJXHPNNcH9m266iZtuuim4f++99wJCCKOionjkkUcA+MEPftANpe8ZVAFrk++AHIRT/hvABFT2aYm6jMcJtSWtf15nEU54lbYxV4DPe+7fr/aAb3CHT5cQ75POBDTsynCH/jRUoi3OawGz2WzodLomjktFUTCbzURFRXVglaFNCOHKAz6ko7fLYvFgMmnR6xvTVxSFhgYP0dH6Hlv9xu2Wcbt9REY2NjQURcFu96HXSxgMWnDboHhv64mU0+nhak43yDKEh6yGpihgdYDJAPoeesocLlGxTY0/L4oCFjtEmEDbQ6M7bQ7QnynCoC9qkq/ZBlHhYoWjdqkBvFM7la86kPVsBnojoU3WrFnDwYMHmxzz+Xy8+eabWCxVQElwczoLWLbsz/z5z7/H7S70H3ecU77//OdJ8vMtTY55PDJ/+MMxXK6m7ZQzZxz85S95LF6cR0mJvc0BhO1x7GgDyz88Dvb6xs3RwOrlx8nZWyr2ncI35fPBun/Dm8th/U7wdWFp5z1HYN2OpscU4B+fQ3H52efLMny+HT7bfu55Any9B7Yfapa2AotXQXWzaERWB/xhidi27O9avqs3w3f5TY95ffDGMpFPKIoCe3LhTyvgm73i2s+F0LmQLW3ndUVugwFlgRUXF/OnP/0JgFGjRlFUVMSYMWPIzs5mzZo1xMTE8MADD3DgwAG2b99OWVkZ2dnZfPDBB9x+++3s2bOHpKQkXC4XPl8en376PLm5DYwbF8PcuYO55BIrb711Aq93PwaDjsCC7QUFVv73f0/g9SqMHx/D8eNmLr00kYgILRs2lJOcbOK++7LYsqWSQ4fqKSy0cvnlg3j//UIWLMjiq6/KGTs2GpfLh8ej8NlnpygstDJtWjxTp8Yzb14qJSV2Vq8u4YknRgbXC7RYPLz22lGMRg3x8UZkWcHnU7jppjSWLSvG5ZK5++5MJAmWLi3G5fIxyHWcr/7vMNmpoNfCkUJw14JPC/sLYeMeiIuCe66Bi8fC5FHwuw/hknEQL8YxUlUPv/9QWBJpg4RlERkO35sKSzeI9Qzvnwe1Zvh4M1jtMGE4fLJFpFPbANX14PaICvvvQ/Dv7yAlEe66GgpLYUeOyO+GWY2/b3U9vL0SwowwNA3OVEN6kijjR1+L4w9cDwWlsGEX1DTANZeKMs27DI4Vg07bmO9Xe2D/MRiWBpdPhrwSuPdamDBMCEvgPp+uhP/9l9gfnQWFZTB+KGQkw5qt4n4tvB72HRXlLq2EERnw98/gzqthZw6kJoLLI14Ea7fC0ZMwfhhMHAErvoQ5l4hr6krLTJ0LeTYD6rotFgtOp5Obb76ZL774gnvvvZevvvqKDz/8kFtvvZXIyEg2bdrEp59+ysKFC4mLi0OWZXJzc/F4HJSUnKSurhqQOXWqgTVriklPN7J69UnMZidZWeHo9RLCm+sj0Jaqr3djNGqYMyeZjRsruPfebNauPc2KFadYuDAbm83Lzp3VbNpUwQMPDMFk0qIocORIA16vQmGhFatV+EuOHm1g06YKUlPDWLq0GJ1OIi0tjPx8C6NHRzd5wN1umRMnLNx3XzZbtlQwc2YilRUO/v73AoYNCWfunCRW/quYj1eXcM2cJCaMj8bj8lF8RqHBomC2KhSVKaAoOJwK769VGBSnkJMPB46JyvTuGtHMC23+OZxw8gwsnAfrd8F1l8HRIvi/T+HicTB1DKzZAis3wu2zRcX0+qDgtGheVTfA6SqRVoMVPvhcCOG/D8G3R4XFd+10ISJyiMHpcEO9Be6ZKyy6O74nxOHvnwmhyhwsyrPqG7jvWkhJEIJxvFiIR3kNVPk7gytqYfmXQgDX74Q6sxDLojJxzd4QQ9hqB48XbrpcnHvftUIgP/xClMFkEFbbZ/8W9yQmUpQ9t0h871SFcB2CuG+fbhf5rvpGvECOFovPP1wnxPVcCO2FbGm7UJuQA8oCA8jIyCAxMZG0tLRgl67T6SQmJobY2FhsNjEKMjo6mtjYWP8K0+W4XM9jNuehKAnASez2QiIidAwZEsGiRcOJitIjy/g3BUVRgo5MjUYiIyOChAQj6elhJCUZcbtl9HoN0dF6YmL0WK1edLrGfRAC4XL5sFg8Qb+41eolNlbP8OGRjB4djVarYdWqErRaidmzk8663sGDTSQmGklJCWNQgo5oVwmnC+3EDTYQZ5RwnXLj1UDcaAMWs0yppKDTCr+U09XYNPTJ4PVC1mAYkQ6jsiA6An6+AF5bAmVVQogCpA2ChFhhWQyKhTATNFggPkrIut0lKm9sFMTHgN0pfE4uN5itoPjzdXsBSeQ75HphyVXWi8pdUCosm+T4xnzTk/35DoLEONDpRLMsNkr4tvJLxG8UEwVx0eIeazUi3warKCuIfYMehqTC0JuFoAxLFwLywrvi3gR8c5IkxDExFtKSYFCcuEaXW4hVbJQQZo0EMRFiX0JYqC6PsFAD2J0QGSbyXXQr6PUweSTcfAW8/L64H0bDuT37akDDsxlQAub1ejl27Bjx8fEUFRWxadMmSktLyc7O5plnnsHhcHDbbbdhs9l48sknKSwsRKfTYbdX88tfHqW42IbPl8bJk7WUluqpqXHx4YcnMRo11NS42Lq1io0byzEYJGbPTkank6isdGG1ejl8uB6Hw0tBgZXNmyupqHAyeLCJJ5/ch9Xq5Z57sjhzxsGTT+7j2DEzWVkR1Ne7efbZg+TlWUhONnHqlJ3aWjeFhTb++c+ThIXp2L+/lr/+tYCZMxOprXUzfnwMkgRFRTYqKkT8sE2bKigutrNtWxUnChwkRHh4/QMPBp1oXmkU+NXrbpwuUVFHZgrflqJAcgKEG4XDOyJMWAFGA1wxSVhDHo8QlCOFwnrIyYfyWjAYYPM+OFUOWw5AUaloUr30f+K3uHKKqMBPvSGakpNGCnF6+X0hOOOHCkGJjQKdBj5YJ5q010yH2VOE1eLywOECkbfNIayvgtPC2ik+I/IvLoehqfCrxUIw588UYvzkH6C0SjTNHC74z79CZa0oV2GpaAa63PAPf74zJ4rrcHuEtbn7iCh/vUUI0LGTQtCLykS+ZVVCdJ96U4jSnd8Diw2e/KMQ3jAj2B3w3NuirBpJ3L8zVcIK/OcXQkCvvliU56d/FAK/K0f8rTWLcneUwEh8NaBhU6R2nMb9pj/d6/Vy333Xk5FRhsmkw+v1odPp8Hq9aLUaPB4PGo0GnU6Posh4PB4kSYNOpwVkPB4vGo2EVivh8ynodBKyLJzrWq2ETifhdsvIsrC4DAYNkgQNDR42b67g2mtTMBg0yLKCVqvB6xXf83hkNBoJnU585vXKSJJIT1HA65Wb5avB51OC39doRL4AOp1IR0KhMq+IfTkOvjdNwmCQ8HoVdFoJn09GI4kmkKKISgKiYkqSqJRaTci+BAT+IkQAhPXh9QlrRqcTIgNCWPJKhMDp/OfotMLpr9EIKw6EZaEoIr2AFSRJYl/jL4eiNPbIub3CStDrRWWUFX/e/prn8ohm49XTICqiMV+vT6QdyEev61i+Wq1I3+MVx3TaptceuB82J3y5SzRpw0ziOsqbCtQAACAASURBVLXN8tVI4l6E5hsod+BzrVYIqy4kX61GfM8ni/T0OtD687U6QEp6mNdef7fd3nBZlnnlqacY/MYbhLdyzq7wcH588GCTkfjnEa16DgeUBZaVFc5vfjOGiIjeK/apU3YsFg8vvDCe8PBeyldROLK2lL/4HPzXDxUMusB7pOffJ9sPCSH5fz9qrOS9gdkmrJ5fPghJvThTpapeWG7/+QPRPOwtKmrh3R3tnxegvbmQahNyACAsDKnHxlG1RODlKHxpPZCv2wHWqqbHFAVJ9gQtqA6NK+omJElUFqkv8u2j66UP73NnUH1gZzOgBOy8xF4H+f8++7i794ui0n9pLx7YhVqRL9TrVlEZcLTlxFctsB5EURR27drFjh07mDJlCldddRWSJLFv3z42b96MxWLhkksuISUlhc8++4yYmBjuvvtukpN7b7Z/j+OyQdnhs91YbnufFKfTWIFd9JwbzgmcAbYAkT2Q/iggswfS7UXUVYnOplcEzGq18sknn7Bo0SLeeecdxo0bR1JSEhdddBGjR49m8eLFREdHU1pailar5corryQhIQFoOzb3gMLrhqrCvi7FueMCcglMTuh+3EA9cBwxZ767SWRAC1jAid9aOJ0LdRhFrwiYzWYjIiKCrKwskpKSqKmpISkpCb1ej81mo7y8nEmTJlFRUYHP5+Pjjz/GZrMxY8YMfD4f27dvp7y8nOrqaiC1N4rcNaw1wuIKxd0P4mM1pxaobnasBBHaLI+mXmYL/WhQzTlQBZxo4bjZv+VDi2MUEoH4Fo73AWoT8mx6RcCMRiMulwun04nVasVgMOB2uzEYDOzbt4/Ro0cTERFBZmYmWVlZxMTEkJuby4wZM9BoNGRmZhIXF8f27a2NgulnVOZBdVH75/U1BUDz/oNKRPSgdXS+m6w/k+vfmuNExKj8EmhphPwM4JIeLFcHURe2bZleEbCoqCiGDx/Oa6+9RkJCAnV1dRQWFnL11Vdz+PBhbrzxRgB27drF7t27sVgsLFy4EACNRsPQoUPxer1ERPQzAVNkEV+reTNX7kxkvB5CRsRebMtqUhcFbx8XwkLrbqx0ujne2VWJLgR6RcB0Oh0LFy7E5XJhNBqRJAlZFiPWf/SjH2EwiFff9OnTmTJlClqttkkMr36LxwlHNpwd2K4/CJgVWAa0FXOvHxSz33OAxsWmuhMHkNLx0wMWmNqEbEqXBCwQHHDPnj3k5eWh0+mYMGECkydPDgpVMCOdrsmSTFp/tLlQodLr9f1qzbkWCbW2FEWIl9yFyJzdQUtWlgJ4aFvAVNpHpmc6Ljx02qeojsQ/my4JmMfjYdWqVSQnJzNr1ix8Ph/5+flUVlZyww03BEXqvMLRAEV7AEU0IftavEBEvT7S7JgPVbzOI9qbSnQe1rQO0SUB0+v1LFy4EEmSqK6uxm63M23aNFJSUjoQrnmA4vOAraavS9EUC2JdXZXzGtUCO5suCZgkSej1elatWsXBgweJi4vDYDDw4IMPYjL1xGCeXqbmJJRVg70WSnMgTBJzF/sKL7Cfs6cZtbPwjsrA51x6Id1uN9XV1Wg0GhITE7Hb7ZjNZgYPHoxOp8PpdFJdXU14eDhxcXFNXD4OhwO73U58fHxw3+FwEB8f368W/OgWJ77H4+HOO+8kMzMTSZIID+9nvYXnSt1pqCwBO3CmAcL6uDw+4BDdt3K1yoCiswNZKyoq+Prrrzlz5gyTJ09GlmU+/PBDXn31VTIzM3nvvffw+XycOXOGn/zkJ6SmijGWXq+Xv//975w4cYLf/e53APztb3/j1KlTvPLKK0182X1Nt5QkKiqK3/3ud6SmpmIymXjqqaeIiYnpjqR7H7cDnP5+c08fjTNQEKvWWIHTNP5KHgZcz6HiBU8t7TqsPV6QneCpArcBJA3oEsRflfYDGmoQhoTH40Gn0yFJEunp6Vx++eVs3LgRm83GrbfeyuHDh5Fl2b9alZ3s7Gyqq6vx+cSDpSgKO3bsICYmJmiIbNmyhYSEBP9A8v5FtwhYSUkJL774ItnZ2QAD23nfcAaKdvdtGRRgD2Kg6ccMaAeHzwH1m2lXeM3415etEFaGJgzi56sCFkpbPjDZ4+G9994jIyODe++9NziP2Ofz4fF4cLvdTVbulmUZjUaD1x+h0uEQrpGGhgaWL1/O1KlTyc/PJycnh1WrVjFt2jTy8vIoLy8nPT29py+1w3SLgBkMBl5++WUyMzMxmUw8/vjjREdHd0fSKioqtO8DM+r1LFq0iBEjRgRFqrKyEo1Gw7Bhw8jNzaWmpoaamhpOnz5NfHw85eXlXHvttZSWllJfX8+BAwfIysri0UcfpaamhsjISAYNGsSjjz5KVVUVkZGR/c633S0Cdscdd3DFFVcEwzqHhfW1s6gDOC1QVXD2cXvD2cd6kjrOHgKh0C/8XIoCjuOiaXeuyG7OaRyV4gFbTvdZYIY0MAzqnrT6ivaGUWg0mia9/263m927dxMeHs73v/99CgoKSEtLIz8/n7Fjx/LII4/w7bffMnHiRCZOnMjevXvR6XRMnjwZp9OJwWAgNTWVjIwM7HY7ERERQad+f6FbBGznzp1s2rQJk8mE0Wjk8ccf7/8DUl02OHO0r0sBDUBLC2X3YWdnEAUcBeDriak07WXtFeLZXWjCBraAnUsvZEZGBvfff39wPzExkUsvvTS4n5CQwOjRo4P7M2fODP5vMpm44oorgvvh4eHMmhWyiGc/oVsE7MyZM/zwhz8kM1PEK+l3PjB7nQhn0/xYX+EDyhGWSVU753Yzsge8ta1/7q0Hnx08FSApQkjOB3wWcLcwVs7jFhamuwrcgWXW9KCL69oitD1Ba3Mh1XA6XSQjI4MXX3yRjIwMTCYTTz75ZP/ygZUcEs75/oIb+BQRCaGX8Zmh/pvWP7cg5i/XFw/ovoOzcOSJrTkNNHYeBDpK9YMg9upeLFwHUOdCtky3CNiJEyd4+umnSU9PR5IkIiN7IqRmK8i+9qfzKD0Vha8dFIQaNB9C4GzhWHdnrYDSQlx95RxXhr6QUGRx7zr9E0nCeusRy00CSdtyhCMFLlgF6xYBM5lMvP/++2RnZ2M0Grn//vt7T8TMFVC4q8WPrA6xTp9J21hrFUUsZhoT2XOr0JhtYjl6g4QYBmEWD1mdG2INYiHanghl4/KBS4ZoPch2qPsaFJ/oD9DjD3fVA1ruRLSKQ1clUxDWXBith4DpKnZEhQ7tMlIQQzIiOfdmlbcWaj5v/fMm9zP0eCxkXtWDTc+2aqsqYJ0nEO75uuuuCzoHtVotBoMBRVF6Z8qBIoO3ZTVYsxGGp8Ol4xuP+Xzw5gr42QIhYgGq6uCf68HhFCtYP3Z746KxneWfX8DsqTAmA1G7HeDxwR8Pw6/GQejykk4frDwFVS6YOQgujj/3CnDMDHtq4NHhgAKySwjYp8BoYGLIuTKwA9EBOgq4gnOvAwcQgV1vDDmmAP8CvgcMCTnuBb5BxBb8AUL09vjLUkHnrJ5tiOjTV4Yck4EPgAVAqM/eDaxHBJx9GPHgr/eX/Sz7XQGljRfM58AIYFKz6/qLA37lg+iQG+nwwsoSaPDAD4eD1QMr/L+3ZXDHrzU4krU1LlAnWJejUSxfvpzs7GxSU1Px+XwUFRVx4sQJ5s2b1+1TDk4WmvnDi7loNBIjMsQq0qNSXQyNhU+2iKXhH7oB9h0TC7SeqYYhqfC3tXDXHNh1GAbHi1HfPll85+hJGJMNN8yERbeKc44UNq68DJBfAm8sFysujxkiVq6+dBxEmODL3TAoDh64Hjbthe/yofA4XFEL7zbA/QbYcBrGx4BbBo8My07CSRtMjYe0cCiywW3psKwYpsSBzi9gZg/8zxEwaSHOICq3V4Zb0mFpsbC27skUo9eXFoPLC4luWF0CmT7AJ4TC/y8HEZU+GpgHbAQWAe8Dw4HA8MRq4A3Ew5GEsHTCECK3ClGX7kSMAFmHsEjGA58BU/3HaxATB2RgJ/CtP62bgQmIQLABjfjKn95G4C9AFJDhL0cyQnjXAEbgHqAI2OTP53sIoZyLiBitC8n3G+AwIhT+PH/ZdiPExgBchAjEWgK8gxDwYf79UUAaQuSi/fkeQHQYlwNDgSXALQgBTgGcdqjdBp9KYgzySOB7Cox3wDseqDkt3rczXWL9knWT3MEBpR1CS+tRci9QC6xLl63X67nmmmuorq5mzZo1rF+/PrgoR0/0RFrNbuT6Cu6YWs7Gr8t5YEY5m7bW8c/1QqDiomHTPrGy9EM3QmKsWML+xCnwesXKz/UWkVbxGfh0G6QNgrVboc4imn27DsPVFze1ghqsEBUulp/fdhC+fz18th1WfiPy8Xhh53ew9SA8fCNEmkApg+OHRfCKYhvY/K/5o2bYUgWpYeJNHKmDSie8WwDZEU1Xw/bIQugeHAo7quHKJNEM/aAIRkXD9SmwqgQ+rYcrymF0NTjMUFwOtVViJlJgnrcTWA4kINbNOIqoxFv8+6GTRJwIa2gBQmjmIkRjOSK68lRExf4cUYGHIUThFGL0Rz2NwTHMCIEZjKj8RYjKHhgO2QDE0BjbzwrcAWxFiN1BYAUwB2HJbUKI5t2I1RFkf5ou/zUEOlirEKKXAmxGRMpOpbHZpw3ZtyF0YT5C4O/2578KuBUhqDsRgrgAiEO8TAr8133Gf52KFwoqYF05xJfDmnKorYBkM2gcohdUVwVJZsgzg1en77h4hS4M2dKmWmCdR5IkBg8ezG233dZd5WknQ0hPgvhoSB0ECbHisMsNkWEQHQ4O/2s9MkxYZBLC1+V0Q721sYnidIvPR2cJCyw6AirrwGqHoWlNBUyj8ecbIwQvMVaIFjrR3IwMA3sl6KohIh8inYBR5O30CUsqkK/dCwkGGBMDE2KFuI2PgRvT4M3j4FX8vjM/SSaIN8BgEyTqwWSBUhuY3KKJa6sCjUdUsmjEG0mHqNBOGl1eMqIMQxHWxRCE1VSOsFyaz1xNBmIRVlM8QnACviUQTTKvfz/an1cg3waEqDQgmojVCH/YWISw7EVU+kP+tIqAfQjxAjjpL2ux/7uyP58ohEApIfsg6m4g38SQ8pkQ4jocIdyB2IQ+fxqBvxJC6OIQQhvvP+72lz8SIcxSyD7+e+3yX1sAp/9+DEdYYBH+fELz/hoxxTW2s74CLRespdUa/WdaeQfw+kTzLiocCk7DV7uhpAKyU+Bnbwghu202WOzw+O/hVLmwaGx2eOYtOF0pLLHCUmGBVdbBO5+AUQ/Xz4T9x0TTcsv+xjyr6kR6B08I5/yJU/DVHtE8TUmEx38HdifcPQ7KjsHjRyHPAulDodYNT++HAiskGoU1VeEUn7+XL3xhk+JgXRnsqhFNx43+Mp+0wRmnsCC/LBfNzG/K4UgZxLrhD1XixTsRUTFeQlS4FESl/cJf/iRERbYimmAfIqyOmYiFeMoQ9aIAIRzHENaTDmGdnUJYJUWIJtVriIo8w5/+rxHCNh5Rsf+AsGhsiMpd4k9vqT+fbIQo5fnzGuLPez9CsIz+9I4iKvth/zW95N+fg2giPoewqi5HNHFfRjRbZ/jLmokQnX8g7tNsRBNwi//7l/vz3I0QxWOIZvJJhMVWhmjG/qf/Om5ACNVz/msKWG6/RVi5AcE97b/eD2n0z+1AWHQahLC9C4wBEhwOfD5fx60wHa03IQfyilFdQGpn3cUO3ZaGhgZ27txJfX09er2e66+/vtunE3m9Xu6/6yqGRP0bo0EIjVYjnPIajRA3SRK+K0Vp3Nf6n43QfVkGrVaIg9crvq/TiuOSdHbzcdM+mDcDDDrxnWC+gLdSCI7WAXI5+BR/PpI/4nTIvqw0/vX6/9dK4n9FEQIWyLvSCXtrYc4g0FhFOhoFXBWA3Dg3OvAGCjiiNf7Ni3jWA5cihZwX8AcHLIPQelGKEJSZCMEJjLP1haTbPF/J/5kUsl+GqPiBdAOWoAbxUCkh+yBEpRAhaAb/5xoara/EkHIrbeSrCfmu3v/dwPe8/vQCrTEvQoS2IprJJv91aptdr8Z/TAnZD5Q7dF/2nyeHfF8bkm/ovg2IeOgh/vjee+0KmCzL/OnZp3hoxRvEtHCqAiyRw7l040FGjBjRZloDlFZN1W6xwFasWIHJZCIjIwOdTtdj0VgzB8Ov7xLNtt7iVLloev76IeG0b4IV8ap1I9oz3ThV5XAD/CUf/nMIWL6k5xaUbcZuRBPnGfwVg0a/UmfobLwCF6JST6fl5RnPpWM2C+HDaosaxPX9BNH06y0qgVWdbUK2FU/nAh3f1y0CFh4eTmJiIpmZmWi12h6bSiRxtoXU0wTykmghX4mmNmo3litgPUlS7y/PGGq5dSWNcz2/O6+3o2l1xzV3hk7nFTAjW7MNBlicuO6iWwQsISGBPXv2kJOTg9Fo5OGHH+7d0fi9iZXGFZ5d9IhlpCjgKgNvHTiK6PlR+wiflAVxaeUI/xD0yWynbsOM6BxoiwEVdlMVsLPoFgGbMWMGFouF+vp6LrvssvMnpHRLmBFOk55EAddJ8DSAvbrlBaO7m4MI/1cJwnG/lYG/MHcd7f9Ul/VGQbqD9kKynieT7jtLtzirVq9ejUajYcqUKaxYsYL6+vruSLb/EAjxXImoFT2Ezy7CL3vrxAj6nsCDuIzQrYoL1oWCBWFlVtF4P+rop5162ja2C3R4RbdYYC6Xi8zMTOLj49HpdMhyH02e7ik8iFGRXnr0ybYfBYe/edpTLYJaxILdzemXFbYX2IMYOrESMYQDxHCRO/qqQK3RkaD4FyDdImC33norK1euZM+ePcyePZu4uLjuSLbvCSwOq9C0778bUQIjKqHHehpDB232sAYPWAIDfQP/B1pk/cq4UQXsLLo8FzIvL4/6+nrCw8MJDw+npKQEl8t1fvjBtiJWvS5GDNPugc5VTxWY/cE0Wgp/0x34gNWI5tIF6uvtFBWIAbAgpk1NauPcXqO9kKzqVKLOo9FoiI+Px+12M2bMGCRJwuFw9KuFL7uEHVHrPfSY2aJ4Qe7h+PeB0DZ9EBl6QOKj8V710cJ6LaNHFbBmdEnAtFotUVFRvP/++9xzzz2Eh4fzr3/9i9GjRw+MhT36CNkD1oMiuKDcjbHvFcSk4+bLkij0jxD7A5E8Wh7IexHCV9ZrnEtQ/AuALvvAvv32W3bt2kVDQwMGg4HBgwcP3EVtewsfuE71TJPxJI2RIFS6ThUtL1uQRS8LGLS+LFFg7tQFSJcEzOfzMWbMGH7729/idDrRaDQdGomvKAoejwdZljEajUiSFDzm9XrRaDTB471OPSJUAqhtLpVWKePscXImxGT1Hnlq2+uFbOG4LMu4XC4kScJgMODz+fB6vRiNRjQaDT6fD7fbjVarRa/XN6lvPp8Pn8+HXq/H4/Hg8/nQ6XTBVb/7C10SMFmWqa6uxm63c+zYMWRZxmAwMGbMGAyG1odfVldXs3jxYjweD9dffz3Tp0/H5/Px6quvotVqyc7OZsGCBV0p2rlThohyp6LSBjn+LZQkhID1GJ1sQpaUlLBmzRrq6uq45pprqKqq4qOPPuKVV14hPT2dFStWcPLkSdxuN0888QQJCQmAEK8VK1aQm5vLiy++yNq1aykqKgLgxz/+cb9yD3U5oOG4cePQ6/XccMMNeL1enE5nmxaYoijs3r2bcePG8cgjj7Bhw4ZgaGq3201YWBiZmZnBY7IsU1xczLFjx7A7Bq4nR/GJpb28FvDZ6NZOgUAQwXr6tpcxtByd3cyIOfHmFj7rB2v8dggfnbveTo2aCVhgrWyKJFNQUMCJEydwOsUEsPT0dO666y7Gjh1LXl4ec+fOZdy4cXi9XhRFIS8vj5kzZyJJEg0NwnOqKAo5OTlYrVZkWUZRFObNm8cNN9xAVVUVLle/6tbonnFgu3fvRpbl4I2pq6tj8ODWA343NDSQnp5OZGQkbrcbRVHQarX8x3/8By6Xi8WLF5OdnU16ejqyLH6Y8vJybLaB8iifjdcMdV/5dxS6dczXQUTIZuhbATvg384FBTEi/gxnN8GGAdd1oVy9RQ0iOElHCESB7RQ6Wl0hRUYWL3m7naSkJEwmExqNhlOnTpGTk8PUqVMxGo1B40JRFBISEti9ezcWiyUY/t1qtbJ06VIuv/xyvv32W+rr6zEYDOzZs6ezpe0VusX1N3LkSJYtW8asWbOIiYnBaDS2eX56ejrHjh2jsLCQmJgYSkpKcDqdwSXZNBoNXq8YSqjVapk9ezZ33XUXiYmJbabb7wkEp+/mAauB+FN9PcYrtBznsimtHB9I8zo6eq2dnrrYjgWmNeiYP38+t956a7ATzWKxMHz4cK6//nqOHDmCw+HA4XBgsViw2+0UFBRw//33M2TIEE6dOkVxcTEej4fLL7+cmpoa6uvrsVgsOJ1ObrzxRsLCwqiurm6thH1Ct1hgs2bNwu12U1hYyLRp09rshZQkiUsuuYTi4mK2b9/OggULOHDgANOnT2fz5s2UlpZy5ZVXkpGRETw/+N3uKOx5gh3R4whN49n3BnWIiBXNOZe4YR0hEKG1OfGI0NcXDK31QkLQiR9aX8rLy1m3bh0Gg4EFCxawa9cuzGYz69at46GHHuL2229n2bJlJCQkMHnyZL7++mtmzZrFjTfeiM1mIyoqipSUFNauXUtpaSlTpkwhKyurxy+zM3SLgH3yySfYbDYyMjJYunQpTz/9NLGxsa2eHxYWxgMPPBDcz8zMBOCee+7pjuJcENQCG/oo71OI0My9RSVi5aLmTOICErDAOLBOTCUaOXIkI0eODO4PGTKEq69uXHI8OTmZWbNmBfdvvvnm4P8RERHcfvvtANx9991dKXmP0i1NyPr6eiZPnsyUKVMICwvD7e6hOTE9Raj31d59ySqKcNh7LWKhWZXuxUXjz3ZBRNMI9EK2tKnjwM4NRVGYPXs2y5cvR5ZlLr74YuLj47ujbL2HFRGiobtnOstQv0X0Pqp0P8dojC15I2Ihj/OW0GXVWkKdSnRu5OTk8Ne//hW9Xs9zzz1HcnJyvxro1iECYRp6wgs+0LzQrRAajKO/RLNoHsgjcJt7Ozx0r9HJJuSFQJcFbO/evSxatIiTJ09y5MgRkpKSAAaeiKm0SQNiMVuZ/jmvcjMicq0RsQRa2/3gAxDVAmuRLguY2+1m1apVNDQ04HK5yMnJ4Qc/+AFRUVHtf1llwOCjcZHZ/khg1peJ/lvGLqNO5j6LLgvYggULgqN4QYTY6S9TDcw20OsgLOR1rChQa4bYqMY1I7ubejeEaZvGslcQww9i6blnzevfQld/C6ww3daz31UCTUqphWPNj/d0viAGxBrpufvs4uz7GRiIa2qhPN2GGtDwLLp82TExMWRmZga39PT04KjenkJROrat3QqH8poe8/ngTyvAag85Djh88EEh/PEYuHxg9cLfCuCv+WD2dC7fJSfFatzB8iJ6yf6CePhDA7xaEcHzPqBxcKML+ITGKTRKCxstfFaDcGw3P+84IqJC8zSKEKtu2/37BxDz+ywdzC+wBQawNj+/eTDbwOZFiGro91s7t60t4F5sfvwAopnbPM9cRLghjz//b/1bQwvlb2s7gRja0fwefNvsugK/+3f+zwKDWHMRqz5Z/QENOkRgIKu+la1nq1y/pUuXrShKiz+ARqPpER9YURn87kOxqvawNCithBGZMDQN1myFqHB4+EbYexR2fAdl1eKzd9fAgmvEscEJYpVunw9Wb4Ljp2BUjPCbzE6G14+LVbBNGrglHfIs8FkZvOYfSTk6WojTxfEQoYOvyiHRCA8Oha/LxYK0RVa4MkksTHujT8wNH4uoRB7gc8QS9BMQS9zPAv5JY2XcghCjOuB1xEKvkYiXrxuYjxC8A4gl6kFUCp//vEIaLb1Q4TqDCC5rAMYjJh+X+NM0+fOL8v/9tz8/A01X5w4MVwiskB1womtoXI0amopeQOBClzYMXGvoqtoBoQmkF/i8+YrggXwVGlcYD6yILYekXYAQmhhgFJCBmKsv+69rMiL0UC5i+TUNIvCuBTFINgYRD8yIiP9V5t8Cnx9C/K4l/vsWyPs4YpxeAjAcEXrnWxr9hxX+71WUluJyuTr+wm9rIKtqgXUet9vNa6+9xvPPPx/cXn75ZSyWnhk3YHMI8bpnLmw9AA/eKP4u3QD3XgNJcbB5H2zYBY/cLMRKUaDgNHi9UF4DZr9ldLIcPv83pCTC5zuhwQmpYaDz665OA+VO+KAIqpwQb4T5qbCrGh4aCl+cgY9Pw6PDxPk7qmBntdiP0YsKlG8RYlhG4/CyE8AuhHh8ihCPZBp/iDzE8mbjEZbYGeBeRGWZhbDYliMq4whEZcnz/5+CqMxWf7oeGn1DXoR1FYYQxwoggkafsORPw4gorxWYiBDJ48ARf3qBjrCANaGjscmkhPwN/T8gUAFhaf7Qyc3SaC5KXhpj04fmGxC55lYY/vIfQwj6SYQ1GxmSd2BcaGnIdY1GiNEExGDdXGCc/56dQlisE2lcObzOn3fgfoOw5gr8eeUjfsOokHyN/jIeBCLj49HrW/PKN6OdqUQXqoB1yQIzGAw89thjeL1ezGYzHo8HjUbTc/HwJUhNhNhIITzx0eKY2yP8XOEmcPlNhMA+gEYDDhfUmUFJFcfcHuEHu2g4TEyCmB3CKpMVITo+BYZGwo9HwDcVkGKCWAOkhEGCETwyoAGTVvi7XDJoJPG/SRssLk6laVgxJ5CIEKiLEJaPnca3dz3CWX6Cxjd1DDAIYR1EIKbxpCN+vID9G2hJBCwWD00jYQf+JiIEM5amFR+EAMqIShfmL5uWswWqhZ8lSPMmZwCNf2u+mHng+6HCEroF0mxehpbs++ZWnwHxokhCiE5oc0+hcTm1CITImBDCE/Dg+mhsnYVakKGi76XRLRD4jikkXwNN77PFn/4kIOfYMaxWa8fHTbbmyGzprXCB0CUBkySJ6Ohotm7dypIldaFjiwAAIABJREFUS7BYLCiKwp///OceWZnI64Xv8oU45Z2Cdf+G4jOQnQI/+QO4vXDbVcJ5v+h/RBMTBSw2+NkbcKZaCFx+idjOVAt/mMkDcx2wtQI2VoBHgSlxsKUSLB6odcH+OqjzwDEzrCuDUocQtUXfCp/ZXZlQaodFe6DQBmlhUOOBX3nEWz0WYQmcQVhM7yEq1UzEEIC9/mu8BGEBmBFv/NPA1/7/NyOsoXhgKaLyDRaXyDeIyhPt//wYooJFIH5kJ+L53+f/m4WwFvL86QxDlNOCqKBmhCWhAVIRomqjsQkZ8CUHLI9A/fGE7IcKSvOmYaAJGJpOc99W4BwpJJ/m5wfy9SKEIcZ/DdUIYfnW/50hiHtf6C/jEMTLItDxUelPq9Z/3Q3+tL70l2OU/x6u96ev8af/NcICkxEWWZ3/872I+56NsN6K/ecMRvymFcBFI0YQERFBhziHgIYXAlIg7lYrtPlhgLfffpvs7GwcDgfl5eXcddddwfFg3YXX62Xh3VcxIvbfGPXCUtJowOe3fHwySJLoWVQU/z7iHGi6LyviPFkB2QeSC7TfCd9YoMJoJWGFNXhgUwXcmAYGjb/S+D/TIP5KkjhfVsQmSf6KqoD1BOBu9PuENnsClkegompofA4rEc237yEExRfyXQlR+Q7TWIGbD+IM3Q8l1IIJCIYUst+AqITZzfKzIZzRHXogzpFAs/FcGI14SQSuN/T64Gy/W+DaPAjBGo64z0rId2n2/dD0WrMIO5qvC5j68MP877vvotG0bT7JssyfXn6KhyLfIKaFDn4FWLI/nEufOciIESPaTGuA0qpDvVv6LiZMmEB8fDxLlixBq9X22DCKjGT4xd0QYWr/3E7RgAjk1EKMk1N2qHPDs2MhvJO1S5Gh9iT4zmFq6DHEg/8kLY9dLAU+6nyy7XIaUaFn0PSpqeX/t/fe4XFVd/7/a/poVGfU60iWmyzcbQySCwYDBkPWLC2UhJLCbniyJN9svtlddvNLviSbkA1kQxIDIYBN26W50XGvuMqyjWyr967RSCNNL/f3x5kZSbZcZEuyZN/X89xn5s7ce8qdOe/7Oed+zucI628kQ/ZInN1P83xM5+KmEjkQ1uYCRtf51c4Q6yo7sg7KsAjYhAkTiIuL4+mnn6a2tva88cAulvDYyEg52gySbv+PLibfi53W0v+8s50/knMdzlbukfbpupQ8Ruo6jxlkR9YzGJZqf/zxxzgcDgwGA3v37sVqtQ5HsqOHEjEgZWCg9+kwoNCBUg+KYU5XRrTl0M92xRsg/cfABtuuUgEbFgssLi6OTz/9lNzcXOrq6kbMAhsxooCHgu9LgW3DlK4S4m4AJPB1Q9eWYUpXBhDjXgXB9xfb9RxXnC2kdP+nIVcZl6TbkiQhSRLf+MY3SEhIoLq6mkcffXT8rQupRDz71jOsLUGhAKUWlDpQXBUtbHRR0/ezXfHtt39Aw9M32Q/s4vB4PBw9epSOjg6Ki4sBaG1t5R/+4R/kydxXGDHAyuD7SoRj7eVgDn1Ll0VdpjJcCrMRLisWYOdQT76AkNJXG5ckYBqNhry8PMrKynjooYdQq9U0Njae97GwzPhDg3CeBdH4LhfGfuUYjxgRsyh0DLHxne8p5FXa5C5JwJRKJS6Xi7Vr13LXXXcRERHBzp07ycnJuXAHPZmLIhrh9ArCAbX5HMcON0nAvEE+b2DwxT4uBg1itsLphkXiMKU/EhgQU4/O9TTzkrwj5aeQZ3DJg/g1NTVUVVWxY8cO9Ho9eXl5I+KFLzOQWIQXP4iJ16MpYKnB7XR2M3wCpkX4Zo2nh7dRiN9kRNwxQmNgZ5tKJHchL4558+axfPlybr/99vG/biOI+SihNXmHcVlohQrUCYTd8H1djKxb+2UgmotfJSiA6JqaEG3RwDjwywqSiCjziK8EMcR4YHa7nYqKCtRqNZMmTaKzs5OmpiamTZuGXq/HZrNRWVmJ0WgkKysrPPQjSRJdXV1YrVbMZjMNDQ1YLBbMZjMmk2lMRVu+ZAFTKBR4vV6efvpppkyZgl6v55FHHiEqajwOsSJGiLOD7z9l2AZ8VNFgXCbeS26wfALSOFu86XzMCG4XgxuxdNqN9EV7GA+oEaGYRvy5++kzyU9nEGGz2WzU1tZSXV3NiRMnMJlMvP766zzzzDNkZ2ezatUq0tLS+Prrr3nyyScxm81IkoTH4+G1116jtraWX//61xw4cABJkvjwww95+umnRy5Yw0UwLH5gK1asYMaMGeh0OjQazfjzA+vPCN1c+t+0rjDDK8ylXDrFWd6PB0ZtEZFzWWAKie7ubqxWK9HR0ajValJSUsjMzKSkpISIiAiWLl3K4cOHw6cYDAZsNhsKhQKttq+zvnnzZiZNmoTVakWv13PPPfdgs9koLi7G77/c678PZFiG/qqqqnj11Vdpb2/n0KFD2O3D1O+SuSAyEAP61yKiT8iMDCb6rnNom8cozqE8W0RWNfgkHxs2bOD999+nq6srfEpKSgq5ubk0Nw8cJfV6vdhsNq655hpiY2NpbxdhK61WKxs3bqS0tJSjR49SU1ODw+FgzZo13HrrrWOuZzUsFlhxcTHLly/H6/XS09ODy+UajmRlLhBzcJMQYVvk28fIkEDfg5NRp39Aw0FQ6zR864FvDYhGUVdXR319PR6PB5/PR01NDTU1NRQXFxMbG4vdbsfr9eLz+ZAkiS1btjBz5kz+4z/+g87OTurr6zEajTz//PNEREQQGxuL3+8f8ZDxQ+GSS+Lz+Zg2bRpr164lEAiQkZEx/jzxz0Yc4rm3nuF9TK0EjQkCXpC84Led/xSZy0MUfQ6zl/XZ+vmeQirFeHT/AXaDwYDdbsdsNjNnzhxqamq4+eab0el0qFQq/umf/oljx45x5513kp+fT1lZGQaDgYSEBJKSknjiiSeIiori+uuvx26309LSwrRp00apwhfGJQvY1q1bKSoqYsmSJWRmZoafcFwRFCDcpusQz/MHCbdzMSg0EHuDeO9phu4dw5OuzPAzgz5/u8vOEAMaJiYmcuutt4b38/Pzyc/PD+/HxsaSmtrnENNfnLRabfjYZcuWXVKxR5JLFrAlS5aQlpbGjh07OHjwIKdOneL++++/MkRsFAb0h5v+ztrecx0oM4CQo/vp9A+pfdmRHVnP4JIFTKvVMmHCBLxeLx0dHezatYuVK1deGQI2DlmBCDrYA3zAyAYgvJLQAPdypgvHmHGkPc8YmCxgF8nBgwdZt24dycnJrFy5ksmTJ8vidZlQ0NcA+6/0I3N+QusHjK1nbKcxRD+wq4FLFrCMjAx++tOfEhcXd8YgYghJEj4qlZWVZGdnh715u7u7qaqqIjIyktzcXLq7uykrK0OpVJKfnz925lOqgZuCr1Zg7zAmbYSYheK9q1KMiQ0HBuA2+hbJ2EHf0m4yfUxHhO9exsAVzccc57PAZAG7ONLS0s57jMfj4U9/+hOZmZmsXbuWf/u3fyMyMpKysjJqa2s5ceIEN998MxaLhUOHDlFQUBB2mOu/6MhlcwBVIrzzIxCLJg4jqghQZYr33jaGbVKjBrFQBYixsD3Dk+wVRxJiClQ242Bxa7kLeQaj8pvZbDZ8Ph8PP/wwzz33HE1NTUyaNIn58+czd+5cHA4Hdrud2NhY3G43+/fvJz8/n5iYGHw+H1u2bKG5uZm2trbRKO65MSDCJIBQhnL6lgC6RDQJIAWXKFI00LeW2CWiRCwL5jzt83bE8l5XG0YgPfh+3Dj89A9oOBiygI0ckiSFu5ZKpZJAQLT4QCDArl27sFqt3HvvvajVaubPn8/OnTvZtGkTjz76KCqVihkzZpCbm0vxrpjRKO65iUP0N0AsCFjFsAmY3iw2KQAqC8MmYCrEqt6nc4CrU8DSgZuD7zsuZ0GGimyBncGoCFhMTAyBQIBPP/0Ui8WCy+WiqKgIh8PBm2++ybe+9S16enro6OjAYrFQXFzM7NmzASF4aWlp+Hw++eHAMBPBmREUurlyBv81iO7h6YyRkdWhca7J3FdxOJ1R0W2dTsc//uM/otfrefLJJ0lLSyMhIYHExETuvPNOenp6sNvtREdHY7fbWbZsGUuXLr3kfLcdhtLagZ/5/fD252B3nvl5eR2cqBaL4EoS1LWIlcB9Q3Rg/aQR6k+bz+MNwBvVYhXv/jj9cMwKx7vEd5IENXY45R+6C0QtYoXu/kiI0MVVp30eQDTu6QjXi4cQzylyGLqAtSOCKp6ebznCSD09305E3DA3fWF0Whm6n3ATZ1qQEnASsYp2GvBwcPsmIr7YTIRzqg+xfksJQ/eX24UIq90fP8Jt5fRuuidYnpJgmUKL3tYj6j8k1GfZNFy1AjYqFphCoSA1NXWA12+IKVOmDNjPzMw8azo2BxwtB48XJmVCZSNMSIe4KDh8CmKjYMZEsNjg6wo4XAq66XCiCiZmQosF9FohUisKob4VyupgShaYYqGoDDbthxd+Au1WeHk9ZCZBYzsUl4mVuydlQlk95GWDzgdFrZCigqkx0OKCUhsc7oTsSCjpgikxUOuAOA183QV3Z0JjL1T3wjVx4PTB191i8dySbphvglcqQBnoW33bjQggaEP4JU0ATiAaxKzgtSlGrObdiYiMGo24O/XftwHHgXiEUBUHj/kc+D+IBv0RYi5lC6Jhxwb39Yi4+CHBSEE02maE1RZ6QBuJEAdfcD8e8fSzLViG6OA5CqACmBvMy4eobzuiW2cMljcqmGZLMI9khCi09jvOEixnaAauBRG2uRPxwNgcLPvXCMHcB3wbMcGiNVieE8HvcoAaxKB+NGI18lggL5jeqeBnhuD1mhBMQx/cvyV4XBXiIYqSPvE6AjyIuNH8lSHGD1MglpM/m8kxhmJ0jSbjqudc2wyvfwRNHfDzv0KPHVZ9AK99BA1tsHEXHCmDFz+Erl44WQ0BCdZ8Kiyu/haZtQdeWQ82O/zlAwgE4O6lYAz2Obp7ITYS5k+DygZ4bzOU18OvX4fuHvjrOnjpE7DmwNteOKWFv5RBrxdO2URjeL0aXAH4uBEagj4MzU5YUwVdXvhTKaRFwANmmGmEXh8UWeGGZFiZAa06+KNOWDG/RazG/S5CcHYjrICPgc8Q1k4loqHsAKoRd/nNwWvnBd5GNO4NiEa6ElhE3xDeDYgGqUaIy2REY80OHl+KEJJmRAMtQTjMWhBiVoYoawdCHEAIUzFChI8jLJR8xCrafoQgT0MIjhuxWEioDi6gKJhPJ6LhNwTTcyAE0hzMPwdhiITiUZoRgtUDvBGs492IaUHOYL55we8bgPcRFt3vgnVYDbwTrO9nwTKsRohqGcKKejdYjv4WbhfwVvC41xAieDdiMQ9HMO2twGKGSnCugGKQ7So2wcaVgCkUMG8a3DQfUhPg1uvA6YaqRritAK6/RlheDifcXgBz8/pW8pYQXcMQDW1Q0QC1LRAfC97T+i9TzDAxA77YJ0Tw+ulwwxxIT4Ll10ObFdq74bYHYMYSKIkEtQKWpwnLKoQkgV/qcwGp7BUWWb0dEnTglYTg7WwTohWQxI02IheU0TDRCEsR3aEFCEvsMGJQfhlCqKoQg9KL6Jv6Egz8Gs7XhRCQRkQjlxCN6V1gOQNDwiQB1wPfRXS3HkFMCW1GCMUEhGh0I6yMLMQfKWQD9Hd3cSOsL1swDwkhIMcRAqIM7n8dLHsSQjCjgq9KhCBOCObTgRCCicEyzQ5+twghjDOD+3kIy7EB8dzFFyzHWoRwqxGW1ZRguWYF00hBXG874gZwE2IlpFC3dFnwmvSva/9nOI0IsW9EWFjeYDpfAHcChxC/2VGgqalpCJFbQpOdtGfZxrwTyIgwrgRMQoFX0tDj1eNHjc0bgVdSExOn45O9CnYeVZKZIkTgkz2w7zj0OkGjgs0HYPdRse/2QFQEJMRBfo7oDvr8cOgk1LfBkVJhoSUaxTEKBXj90OMUx9kcwmJTq+HTvXDwBGQkg00Fn7XAkW5hTUkSbG6BQ53CMnMHwKQFowamx4nuZXUv/OYEzIgDqxvMkeKcLS1gCK64bI+AgBocetF9SgK2A18iQrwkIhrIdkTDi0A8YdyMaOxOhLWTGdzyEI32jyJ5dAhr5hSiO2RF5NMTPK8XIQCJiMZZg2joJoTV1xhMJxYhGPXBfRWi+5cUPDYlWLbdwVdlMP3diC5ZMLTVgFclohtaE0w7FdEdrERYefZg+XchfN0cCNHUBvOdiBApB/AswjJzB9M6EjzfH6xvL33TsHzBMm0G9iOeXPoRUWOLgseqg/keDKbjQQivKZjnJITg/hfCmu1FLMb7UPC7+Pj4AYEEz8/ZxEvL1WqBKfo7ig7CmAke6vP5uOOOZQT8JzGZtLS1uUlL01Nf78Rk0lJb58CgDWCOs9FjF0IUoYUkkxC0+lYw6CDBKLqHqfGim9nUDtEGyEwWFlmvA6IjIScVaprB7oK2TpiXB5ERYLVBcryw4OKixEB/TBRkJIrvmjsgwgOpAXD5odkFESpI1oPFDekR0OGGVrcQsmgNVPSAUgGJOkg3QL0D2lzifHMkZOih0QUpWmhpAYNfWBNe+qJf1yAafBRCSGoRf+sIxF9bj7iHh8QlE2G5+RACEBrLaUA09ikIq68JITyhMazQ+FVW8Nxa+sbHIoL7EcFy+IKf+4LpaoNpViCslgiEMFQH69KBsKKSgvklI7pwcQiR1ATL7QrWIwIhbqp++3HB8icEXxsRQpSM6Popg2VLDZ7jCuY1I3huR7C+jYjxtYbg+ekIAWoK1jcRIWhN/cphC5a9O3gto4NpVATLGIsIPqlEWLCTHn+cF1955bzLEAYCAV544f/y2GNvExt75rGSBG+/DQsWbB8QD+wK4qwDfOPK7szLi+WppxZgMJyl2C4bnNouHKkGIF20FDe2w+/ehN88KQTwgtiJaC1w0T5ip2ywuhqemQ6a4H9W8oJ1CwRO73UM423mMKL4TzG65nkv8AzwfxFiMFp0Iiyzf2dwl4sL4iLGzzsQ1tzQMtEy+K9yekf26mFcCZhWqyAxUUdk5FmKHdBA4q1nfl5zEHraLypPlwf0OkiMExbYBbEMMaDiRzzW6xl6vm0u0YVM1IM2JGA6iL+RMwTLUSrmUQ4HsQiLI4HRFTAtwrKJD+Y9muiC+V6Um7QSYheDaojrXMS6YfuF/p+AvjGws/0qV2fwpHElYOdFqYKIQSaHKEe5mqEwnj6GVQUUClAP0sqU43gNlXGPAtTRoBpiGAuVExRD/m+c62njmBntGVWuLAE7G8mTwZgBfh80HofAMIVWPR9KRFTX0Ij4gZHJRpcBqkhAAvtJCMhB8YcNbTrozhWvQAGKUbmBhLqQZxOwUfpPjzGuDgGLC/4DfW5oPjG6Ahby021DPK4agRulJl5skgTOKlnAhhNNPERMPP9xI0+oC3k2Abs6mvLpXF21ViiFmPm94HVB7yhO5dUhHJdCAbrqGJFxV22yGI+RfOBp5WrtWQwdBWhTxArq/VFd9Mj+cKNA/InO1mSHPDHpiuDqEjCVBiZcJ953t0DpttHLOxaxhDMIx6w19M19GSYUCogKzi3y94LlU+SY0heIQg3R1w59MH50CXnIDcbV1ZRDXJ21BlAqQRN8DCRJ4BvltSwjEb0BP8MuZAAoRLBE6TQBkwIgXZ036z5UoAz6jyolUHhBGXKUG7OExsAuPByF1+uls7MThUJBfHw8TqeTnp4eEhMTUavVuN3u8OrbsbGxA6Ipu1wunE4ncXFx2O32AeeNJcZWaUaTqASYsUK8d/dCyZeD+I+NEHrg/uD7OsSExmFGaQDj8jM/91mha8vw5zee0GdC1Dzx3u8G3VEwzg6K2JjlXAIGgzXllpYWvvzyS1paWpg3bx5er5e33nqLZ599lqysLF599VXcbjetra089dRT4WALPp+PNWvWUFpayrPPPsu2bdt46623+K//+i+ysrJGrIYXw7iaSjSsKJSiS6nSBN0sRvH2G/ovjuAUNoUClJozt9PHeK5KlP2uR/CnV6jHQ0AHzTk2FT6fL7zKNkB6ejpLly4lOTmZ7u5uli9fzuzZswkEAkiSRE9PD1lZWWi1Wrxe4UcmSRJfffUVkZGRRESIHsrtt9/OrFmzwoFIxxJXr4D1R6UGY7pwtTAMKcjJpWNATNibyKjEN1ZoQZcZdL0YN/GULx11nKizLgPUo/wTDw/nnszt9Uq88sorvPDCC+HQ6wqFArfbjd1ux+/3o1Qqw93EQCCAWq0Of+d2i3GF7u5u/vd//xefz0dVVRUtLS0DzhtrXL1dyP5oImBioXjfXgXV+0cv7yT6Bve3I2LFjCDqaIgNxpe2nwD70ZHNb6ygnwCGKec/buwSego5+ORvjSaCJ554gokTJ4bnVra3t6PT6cjLy+PYsWNYrVasVitNTU2YTCaampq47bbbaG9vp7Ozk6NHj5KZmcljjz2GxWJBr9ej1Wrp7Oyks7OTpqYm0tLShjgBfWSRBex0VOq+wX2fhyv5MZ5CDcrTprMoA4z7J/KDDcgrxv0/PWSBnX1hSKVSiUrVN0bgdDrZtWsXERERPPLII5SVlZGQkMCJEyeYMmUKjz/+OAcOHCAvL49Zs2axf/9+srOzmTdvHi6XC61WS0JCAvv27SM5OZmSkhKmTp2KyTR2TNhx/7MOO3EZEBuMHFu1D5obLm95RpCIXNDnDPwspgMRI2ac6rZCC8ZbxOuAz6+Isb9Ql3EwzmzKZrOZRx55JLyfmJjI9ddfH95PSEggPz8/vL94cV+YRb1eHw7rXlhYSGFh4aUVfYSQBex0lErCQ4NDn6w2rlCozmzY476hBwfklWczVMYt/cfABmO8/3AXhyxg5yJjOnjNEFMK6k5GfL7ZbMTUowDw3shmdS70WWDMFTHKQvh7wbaPy+7Zb5gGuvRzHKAIRlm+4uj/6Howrs6mfHXW+kLRx0CkCtQ6RuWBbWxwC3D2oY5RQKkHdQKo+gnYWBEFVbRYAPjq5NxjYFcjsoDJXBBKHURO5wwLzFUD/ouId3Y+FGqImHJmL15tHP68xgehp5Bn87YdI3eYUUYWMJkLQqmHyPwzP/d2jJCAacCQdyWOZV0s8hjYYMgCdkEoICoetD4RycLRNfJZmuhbEWMUg2YMFXWciHxxqWgkUPaAJkqE0FbqxoNn/Ggy9KlEVwNXZ62HilIFExeIGM+9HXBy8/nPuRQUiDXUGhHrpb3LmA15HjlzeNJRekFzCGLnQJwcYfYsaBm4AF5/ZAtM5nyMlkmgOMv7MchwXpJQUrLlNRjnc2S9Opvy1VlrGZlxh4K+1TIH48r2WTwbsoDJyIwb9MhPIQdyRcv2li0tnDzZPeAzvz/AG29UY7cPHHl2u/0cPWrl8OFOHA4fbrefffs62L/fgscztAGojbvEgrf98frg9Y/EquD9cbqhqBSKy8R3kgTtVjhaLs5BjVhVNR2xKuw5frHKXvi0aeBnkgSbmqHMNvDzgATlPbCvQyy06wvAQQsc7YJWF7iHMJXoWBfsbDsz3/UN0OgY+LlfgpPdsL8DuoL1bXHCwU7oHeL0pa86oKjzzHr9by1YT7vO3gAc7xJ17PGKfGvt4vwh/rxsaoHS066nLwBrqsBx2gMNTwCKrXDAArb++VqHmm//LuRg29Vpi4yrWnd3ezl8uBe3O8CUKdFUVPSQmxuN0ajlwAELcXFaZs820tHh5uhRK8XFViIiEjl2rIupU2NoanKg16soLbXh9QaoqbFz6pSNvLwY9HoVJ0/acLv9HDhgYcWKNF5/vYrCwkQ6Oz0cPtyJxxNgSqaf0gOQPwF0Gjh4ElIT4JoJYhHcUzVQdApy04QI5U+AqkYwxcDJGvD5oa4Oqppg+kTweqGyHiw2OFENy66FFz+A2CixJuXBBnBlQUYSdFlBVwl5WtEAXH5YEFwFdl+HWO27ywNVvRCnEZ707W6oc0CsVjTqQ51iBfC8GDhqFc6qGxrg368R4uKXxDH7OsRzg5xIaHGBUQsTooQAAFwbD+6AEKJ6BxjUolGnRYDTLxpydS9MixFrXB6xQqYBsiKF4KkU8Hkz/J+p8PwpmGUMCplFrIM5KRpq7JBhgNQIIQARKphnEkJwqFPkNzkGSrpgQrRY+VyBEOYbkoR4Hu+GiVEQr4OSbiEgO9rg7kz4WyVMjoZGJxzuFNM/p0SL8ydFi2t20CLqPssI7S5R9iIrxKjhmBWmxop8QvX3BkS9S3tE3Y1aUf9OtxD5e7NgVbm4Fp12N4FA4LwrcwtkN4rBuCwWmCRJOBwObDbbgCBpPp+P7u5uXC5XOChbf+rqHLz1Vg1Wq5tf/OI4Xm+Al14q57XXKrFY3Hz+eRNFRZ289FI5bneA8vIeAgF4++0a7HYfO3a0UV4unJY6Oz387W8VuFx+Vq0qx2BQcf/9WcyaZcTt9qPVKomL03L0qJWvv+5iw4YG6usd/Oa3J3F74a/r4aV1QmTe2yzE56W1QqDK64Ul8OZn4vvP9kJj0EJp6hCf253w5/cgJQHuuQmm5YDLDUfL4EQNVDcJS+y5t0Wav3gF2qzwTq2wbPa2izv5B/WwrkE09tpeIR5bW4WI1dnhi2aRrzcAr1ZCtwfW1otGek8WLE4S36sUQgzTI4RovFQhrIr/OCYE47VKeL8Ovu4WovB5M7xVDRYPVPSCxw8fNwqxO9ENu4PrCLv88HKFKNeb1UJk7jdDQYIokwIhTE1OaHPDmzXi2P84LqzAlytEPnV2kebudnilEuw+UQdfAN6rF/U6aBGiDNDjE3Vw+8Xx/gDcnwXzg8Lb44UoNcwICuc7taJsv/xalOulClFnq0dYtcVWeLFcWE3lNiHub9UKod7WChVBXziLR1xnl18IlUIBuVHiukRrhPU51yQEtLu5FqfTeYGtpv9UosE2WcBGjdbWVn7729/y+9//nl27diFJEoFAgA8//JA//vGPPP/88ziXqZw7AAAbVklEQVQcjjPOUyhg3jwTS5Ykk55u4KabUnC5hCV1880pLFgQz4kT3Tidfm65JYXZs40oFOI8SZLw+/tEsbHRQXW1nbo6O6mpenw+iepqOx991Mi992aRlKTn//2/6TzyyAQMBjULFiSwaFEimakall0LHV1g6YKbr4XpuXCyGlQqYUHlT+grsySJxhPKuaoR6tugoQ3SEsHnE+K35yj83RIhVjMnwbdXQHsXZCXDjfMgMxmuz4f0KGGNLE6CW1OFUFX1wvJUuCEZ1ArxVw8tfhS6D7j8ohHWO0RDUipEo19dBXdlgk4prK897aBXwbRYuDEF0gywMFFYI0WdcFMyLEsW1kaDU+S7MDE47Ugh8gv0u/fYvPB1lxAgky7YRXbB6mp4IBu8kijrXJOYtTU9DpYmC0vuhmSR7kkbLEsRdT7RLYRmeSosSBD1CNdX6rvO7S7Rba6zQ5JeXIsmJ/xPLTxoFpbTNXGwtUWcM88ES5KEgC9LEcJUaxfv55tEvu4A3JwCs40iz/75hmhwiJtJnV1Yjv6AsHjnmoQl5pX6Gt1gN+lzcy4BG1edqWFj1AVMkiQOHDjA3Llz+f73v8/WrVuRJAmPx8ORI0d46qmniI6OpqysLHx8IBAIh8H1+QI4HD4CAQm73YffL2Eyadm4sZGdO9uZMCEKpVLBhg0N7N9vwen0ExGh4osvmtmzpwOn04/XGyAuTktSko5Jk6LJzY3GYnHz858fY/LkaLq7vdTW2tm2rZXdu9twOn34fAGcTj9+CRzBRTj0OvhoFxw6CTnp4vOPdkFxqRjbUirgi33ie6dbjGklm0R3cqoZJqRBbTP852qYNkEIYlYKdFjhQAlEBJ05HS4IBEQanoDofnzZLCyx9AixrW8QVpHDB7Ea0V35tFFYMx6/aGgTo8WxU6KFSP26RJRRCXR7RVfzlE00zIAk0pIkcPiFVZJpgI+bxJYdKRrmunrY0iKOiVUL6++LlmC+AVArxbHmSJEvwP93HBJ0olw2r7ByujzgC4q9/bR8UyPgo0ZR59woiNIIq3NnmyhjlFp8t621L1+DGtINots7KUoc9+/HRFl6fX0WWKxG5CEh8gtIYPcLUTJqRb672kU6CmBjI+y3iGP1SmHh7u0I5hs8J1Enuqa5UaJue4PjjE4fmA1i7O7jRohNNYfDNp+fc0dkvVoFTHGeu8Cwxx6QJIl33nmHjIwMrrnmGp577jmeeeYZPB4Pv/jFL/jlL3/J//zP/zB58mQKCwvxeDy8++67VFdXs2HDOqZPT8Fk0tHS4iIjI4K6Ogfx8TqqqnqJilKTnR1JT4+Xmho7BoOalBQ9gQDU1PQSGakmKUlPV5eHtLQIurq81NfbiYnRkJSkp6SkG6VSgcmkJTU1gopgv8DvlzCbI4mMVNPZbiclzkN9CxhjhEVljBGWUqdNWFYGPaQngt3h5+CxZibnZpCaIKy2jCRhWTV1QHyMGOs6VSuEJMkE5hQxltbaKdKJ1Avrq74V0uKhvQmiFNDsFA11crT4kcp6hBUVowGTVuzrVRCpFlaMQSXyqOgVnY0JUXCqRzRenRLyYkV3q6bLRVdXFznpKaRHCFHLMIj8jFphWYAYI/IGRD4GtfguUi26dZEqUQ5vsEH7AuIBgy4oZiU2IRQGFUyNEeN0zU4hGukGSNaLcaUMg7Bo4nViXEmnEuV2+kQ9ItVCLNQKiW0n6smbkEm8ToHdJ6wuu09YQ5EqkW5J8HlOjEakU9Ur6uyXRF5xwfGqUL3jtVBlF0KXHSnEttYu6puiF3WosYtyJOuFWKVFQJdXXKc4LaTqobxX5JsTKdJqcEKrw8/Ua2bwwp/+PCAI4WAEAgFeeOH3PPbY9cTGRg3SpuDttz9nwYJ7mDRp0jC11DHFWT0DL4tsZ2dnc+TIEVQqFSaTiYqKClJSUtBoNJSXl1NTU8OSJUsA0Gg0PPjgg/h84vHOv/zLv1zgoOflp7e3l1deeYUf/ehHYzam+OnU1dWxbdu2AYHwxjqBQIDf/va34+q/4XQ6efHFF4fwv5DD6QzGqNdaoVAwb948mpqaKCkp4aGHHuLYsWMkJiby8MMPs2XLFgoLCzGbzeHjQ3eonJwc1Gr1uPmTarVazGYzarV63AhYZGQkaWlpqFSqcVNmv99PdnY2KpXqvNbMWEGj0ZCZmTnUs5DD6Qxk1LuQF4skSXi9XjQazbhpWOOxzIFAAL/fP65Edzxe56GUWXQhn+exx24lNjZ6kLTg7bc3sGDB7XIXcizhdDqpra0lPj6ehIQEtFotkiTR1NSE3W4nOzsbjWbgHcnr9VJdXR22JBQKBT6fj9raWjweD2azGDhta2vDarWSnZ2NTqejtbVVjP3k5KDVamlpacFms5GTk4NGo6G5uTmcp1qtprGxEafTGd5vaGjA7XaTnZ2NUqmkoaEBr9eL2WxGkiRqa2sJBAKYzWYUCgW1tbUAA76XJAlJklAqlQQCgfBd2uVyUVVVhV6vJycnh56eHurq6jAajaSnp9PV1UVDQwMmk4n09HQ6OztpbGwkPj6etLQ0Ojs7aW5uxmAwkJ2djcVioaOjg+zsbPR6fXhVmtC1sFgsZ1yLnp6e8PVubm6mt7eXnJwcJEmiqqoKgNzcXFQqFY2NjXR1daHRaMjKyqKjowObzYZKpSIrK4v29nZ6e3tRqVSYzWZaW1ux2+2o1WpSU1NpaWkhEAigUqkGzfP0669SqWhtbT3r9VcqldTX1+P3+zGbzXR1ddHU1ERUVNSA69/b24vBYCAjIyOcvlarJTMzk8bGRlwuFzqdjoyMjPDvrdfriY+Pp6VFeC6HrO7T8xzsN29oaECpVJKVlYUkSdTU1KBWq8nMzCQQCFBTU4NOpyMtLY3z+YFJkpKKigoiIyNJTU3F4/FQU1NDbGwsycnJeDweqqurMRqNJCYm0tbWhsViITU1dUwt0jFUxqyABQIBVq9ejdfrpbm5mZ/+9KeYTCZqamp45ZVXiIuLIycnh3vuuSd8B5MkifXr11NdXY3VauX73/8+OTk5OBwOjh49isViYdOmTdx7773893//N+np6RgMBpYvX86f//xnkpOTMRqN3Hjjjbz44ovEx8eTmppKQUHBgDxnzpzJ6tWriYuLY8qUKUycOJF33nmHqKgoZs6cSVpaGh988AF6vZ4FCxZgNBrZuHEjKpWKG264Aa1Wy5dffokkSdxyyy14vV527twZ/oP19PQQGRlJVFQUf/d3f8f69eux2Wx4PB4ef/xxXn75ZVQqFRUVFTz33HM8//zzGAwGKisr+cMf/sCvfvUrjEYj1dXVPPfcc7z55ptUVlbS1dXFG2+8wQsvvEBGRgYqlYqVK1eGr0VERAQrVqzghRdeICkpCaPRyLJly1i1atWAa/HXv/6V+Ph4zGYzdrudjz76CEmSuO+++5gxYwa/+c1vKC0tZfLkyWRkZGCz2di3bx/5+fkYjUZ8Ph9fffUV06dPJzIyEoVCwb59+7jmmmvIzs4OC8x11103aJ6zZs3itddew2g0MnnyZCZPnsxbb71FdHQ0M2bMICMjg/fffx+9Xs+1115LfHw8GzZsQK1Ws2jRIkpLS3nhhRdYuHAhjz76KD6fj/fff5+mpiYiIyNJTk4Ol3n+/PlERkbicDjYv38/1113HWq1Gq/Xy4EDB7j22mvJzs7m1KlT6PV6zGbzGXkuXrwYvV7P559/jkKh4Oabb8bn87F9+3b8fj933HEHNpuNvXv34vF4uPvuu2lububIkSPY7Xa++c1vEghInCucjs8HBw4cYMeOHfzgBz9g+/btdHR00NbWxg9/+EM+++wzent7aWlp4cknn2T//v243W7efvttfvaznxEbOz4XCVX94he/ONf35/xyJPF4PKxdu5Yf//jH4btbZmYm27ZtIzc3l9tvv53169dz0003DRCwd955hx/84AdotVrq6uqYNm0aWq2W6OhoKisrw46zBoOBhx9+mPXr1yNJEunp6Tz44IO89957+P1+JkyYwF133cXatWuRJIlJkyaF8/R6vcyaNYubb76ZDRs20N3dzaJFi7jppptYt24dVquVG2+8kYKCAj7//HPa2tpYvnw5c+bMYdOmTbS0tLBy5UqmTZvG1q1bqaur44EHHuDIkSOkpKTg9/tJS0vj1ltv5eOPP2bjxo1MnTqVQCBAQ0MDu3bt4tVXX+XYsWNUVlZy+PBhVq9ezfbt26mvr6eqqoo///nPfPnll3R0dNDc3Mytt95KaWkpU6ZMQZIkHnvsMTZu3IharSYuLo5vf/vbfPjhhwCkpqbywAMP8MEHH6BQKMjKymLlypWsXbsWlUpFbm4uK1asYO3atWzfvp0f//jHTJkyhU2bNuH3+8OWoMfj4eDBgyxZsoT09HSMRiOVlZXMnj2bnJwc4uPjOXToEEuWLGHChAkYjUbsdjv5+fkkJCTw+OOPn5Hn+vXrcTgczJ07l1tvvZV169Zhs9koLCzkpptuYsOGDXR1dbFkyRIKCgr47LPP6Ozs5JZbbmHOnDl8+eWXBAIB4uPjuemmmzh27Bj19fU8+uijLF68mD179lBcXMzixYuZOHEi8fHxHDlyhDlz5pCfn09iYiI7duxg0aJFTJ06lZSUFJxOJ3FxcSxcuJDly5cPmmdTUxN3330311xzDZs3b6a+vp777ruPqVOnsnPnTiorK3nooYfIysri0KFDlJWV8eijj5KcnExRURGNjQ0sXFiIXh+JsDsGbiUlpdx2253o9XpaWlo4fPgwP/zhD3E4HNTX13P06FH++Z//mY6ODjweDytWrGDy5Mls3bqVOXPmEBUVNaAr6/f7w4vhhtycQIxJX4Zu+i/P9sWYHQ0Pjc0plUrUanX4KaTP50Oj0YQv7OnnhLoeGo0mfA4IwUpNTcVms+F2u9FqteEfIjQWERoA9nq9qNVqVCrVgLGKUJ5erxetVhveD5VJrVYTCATw+Xyo1Wo0Gg1+vz+8r1arw/tarTa87/f7UanE0vBerze8RLxWq8XpdKLT6fjud7+LJEl0dXUhSRIajQadTofD4UClUqFWq8PHh8quUqmw2+2cPHmS9vZ2GhsbOXnyZHh8S6FQ4PF4wnUJ7feve//9QCAw4FqE9rVaLVqtNlzu2bNnk5qaSk1NTXiMR6/Xh8fWACIiIpAkKVyW/v5Qod9tsDz7X/9QGQe73qHfY7D90PmnX//e3l56enqYN28egUCAiIiIcFc+EAgQGRl5RpkVCkU4DYVCMaQ8Q2X2er1n/G9D34esPa/Xx9n9wPrmQobSCw21bN68OeyG9MUXX/Duu+/icDjweDz84Q9/wGKx8Morr2C1WsPXPxAI8MEHH/DMM8/g8/lYt24d//mf/8mqVavCK3iPFcasBaZUKjl8+DAOh4MjR44wd+5cqqurSU1NZfv27XR1daHT6Zg3b15YiBQKBZWVlTQ3N3Ps2DFmzZpFZWUlsbGxVFZWIkkS5eXlLF26lC+++AK/309PTw+LFy9m06ZN2O12PB4PhYWFbN26FZvNhkKhYP78+QPynDVrFtu3b8dqtRIVFUV+fj67du2ipaWF+Ph4Jk2axL59+2hsbCQlJQWz2cyhQ4eoq6sjOzub1NRUioqKqKqqCt/lv/7663AXxuFwoFQqOXr0KIsWLaK6uhqn08nXX3/NPffcQ0VFBZ2dnezcuZPvfOc7FBUVhbs8TzzxBDt27MDpdFJUVMR3v/td2tvbSU5Opqamhu985zvs3r0bSZKwWCwsXbqUzz//HK/Xi81m44YbbhhwLRYuXMiWLVvo7e0NX4tt27Zhs9nQ6XQkJSWxb98+Tpw4wYQJE3C5XNTV1aFQKOju7iYlJQWXy8WePXuIjY3F6XSiUCjYsWMHUVFROJ1OVCoVO3bsICIigri4ONRqNUVFRWGh7p+nVqtlzpw5bN26lc7OTiIjI8nPz2f37t3h6z958mT27dtHU1NT+PofPHiQuro6srKyiIiI4IMPPqC3t5eJEyfS0NBAbW0tL730EsuWLSMxMZHGxka2bdsWtgrVajVbtmwhNjaW3t5eNBoN27ZtIyoqitTUVLq7u8NDF+np6WfkmZGRweHDh6mqqiI3N5f4+HhKSkooLS1l2rRpREVFUVpaSmlpKTNmzECr1VJRUcGJEyeYO3cuFosFkymenh4HFkvXgK2zs4uDBw/T3t4etngtFgsej4fm5mamTp3KqVOnmD17NuXl5dxxxx1s2LCBd999lx/+8IfU19czZcoUjEYjkiRx/PhxKioqsFqtzJs3j3fffZd//dd/Zf/+/SQnJ5OQMOqrqpzVAhuzTyElSaKjo4N9+/aRnZ0dHljNy8vj0KFDdHZ2UlhYSHR09ACTtqenh927d2MymcjPz6esrIyJEyeyZ88eAoEA8+bNIzExMdx1KCgowGg0UlxcTFNTE4WFhcTExHDkyBFaW1tZuHAhUVFRA/KMjIzkwIEDdHd3s3DhQvR6Pfv376e3t5eFCxei1WrZt28fLpeLhQsXolKp+Oqrr/D5fBQWFqJQKNizZw8KhYKCggIkSQqXLxAI9Lvrernllltoampi//79JCUlsWjRImpqajh48CDp6ekUFBRQWVlJUVERWVlZXH/99Zw6dYpjx46RnZ3NtddeS2lpKWVlZZhMJgoKCjh58iTV1dVcf/31xMfHc/z4cerq6s55Ldra2igoKCA6OprDhw9jsVgoLCxEkiS2bNmCUqmkoKCA2tpaXC4X9fX1GI1GrrvuOo4fP05jY2N4TKq8vJzm5mYiIiJYsGABJ0+epLW1FYPBQF5eHsXFxbjdbuLi4li0aNEZeQ7l+hcWFqJWq/nqq6/wer0UFhZSXl7OkSNH0Ol0zJ8/n87OTqxWKy0tLeFBe7vdjsViISYmhrlz51JcXIzVaiU2NpY5c+ZQVFREV1cXRqMRs9nM0aNH8fv9JCYmsmjRogF5Lly4EIVCwd69e5EkKXzd9uzZg0qloqCgAL/fz549e9BqtVx33XX4fD52796NwWBgwYIFHDt2jJMnT561vfj9/rDg33bbbeH8LBZLeOggLi6OTz75hJ/85CdUVFTw6quvMnPmTLq6uvjxj39MZmYmvb29/OpXv2Lx4sVs2LCBp556irfffptf/epXvP766+Tn57NgwYLRkID+nLXPOmYFTEZGpo+hzptUKBT09PTg8/koLy9n8+bN/OhHP+K5557jrrvuwmw28/Of/5yf/exnrF27lhkzZmA2m4mMjGTHjh1YLBY+++wznnnmGVavXs2TTz7J66+/zmOPPRb20RxFZAGTkbnaKC0t5ZNPPkGj0bBixQqqqqr4+OOPSUpK4vHHH6e0tJQDBw5gMpm4//772bRpE4sXL8ZkMuFwOPjkk0+4++67KSoqYsuWLeTl5bFixYrwOOYoIguYjIzMuOWsAjZmn0LK9CFJEp2dnRcRfmXwtLq7u/F6vUM+1+PxYLP1hSL1+/1DKpckSdhsNvz+oYVevdjzZK58ZAG7TNhstrCPWXt7O5988slZhcDv91NdXT0g+OP56Onp4cMPPxz0nDVr1lBTUxNOe9WqVTz77LOsWbPmnAH2ent7aWpqYt++fZw8eRKfz0d1dfUFl8ntdrNmzRpcLtcFnxNi27ZtHD9+fMjnyVzZjFlP/Csdl8vFkSNH+MY3vkFPTw8lJSXMmzePNWvW4PP5ePDBBykpKeHkyZNMmDAh7DKwceNG6uvrufPOO1Eqlezdu5ecnBzuuOMOXn75ZQwGA9HR0eTl5fHiiy/S1dVFQUEBn376KVqtlm9/+9thvyMQPj+1tbU89dRTrFq1ir1793Ls2DHsdjv33HMPNpuNLVu2hJ94njp1iq+++gqLxcKjjz5KaWkpU6dOZfXq1XR2dnLHHXcA8Pnnn+P3+7n99tuZPXs2CoWC8vJyDAYDAM8++yx6vR61Wk1ERATd3d18//vf529/+1s49ltycjL19fV873vfY9asWaxfv54ZM2aMm8n8MiOP/E+4jJw6dYrf/e53vPTSS9jtdr744gumT5/OsmXLWLduHXV1dZjNZpYtW0ZZWRlZWVk89NBDxMXFkZ2dzRdffMETTzxBY2MjpaWlVFVVcf/991NWVkZsbCwLFizgW9/6FkajkYkTJ1JZWcmBAwfOKEdvby9bt26lq6uLkpISMjIyWLlyJe+99x4HDx4kIyODhQsXYrfbaWhoYObMmXzzm99k6tSplJeXc/DgQXQ6HQ888AAffvgh7e3taDQa7r33Xj799NOwWNbX15OUlITP56OyspL77rsvLNxKpZKysjJKS0tZvnw5VquV1NRU0tLSKC4uxmg00tHRMcA5WUZGFrDLyJQpU/jJT37C9773PQwGA263m5iYGGJiYsIe8mazGa1WTOB1Op288cYb3HXXXSQlJaFSqYiKisJgMODxeDAajSQkJKDX65EkKextv3btWux2OyaTiZ6enjPKodFoyM3N5emnnyY5OZno6Giio6Px+/3cd999mEwm/vKXv9DdLSIChjzRQ5aQx+MhOjqaqKgoAoEACoWCzMxM4uPjw17hIGZDhLqPcXFxJCYmkpycTFJSEjExMbhcLmJjY0lKSiIxMZGUlBRMJhN2uz3sbT9eok3IjA5yF/IyoVQqiY+PR6PRhD3Qly5dyurVqwH4+7//eyoqKtDpdCgUCkwmEwcOHKCkpCQ8PSc/P5/f//73GAwGJk+ezFdffQUIcYiJicFgMPDuu++SnJzM8ePHw9EWYmNjB0TxSEtLY/r06URFRbFw4UJefvll9uzZwy233MLhw4c5ceIEiYmJREVFERMTQ25uLuvWrUOv12M0GpkzZw6rVq3ixIkTLFmyJCyoKpWKuLi4sOhMnTqV4uJiJEnCZDKhUCiIi4tDpVIRHR2NTqfDaDSiUqmIiYlBq9ViMBgIBAKUl5eTn59/OR7hy4xhZDeKy0T/OZZiwREx983j8SBJEjqdLjy/TqlU4vV6USqV4bloofmLbrc7POculF7/19BcPo/Hg1KpDM8fVKlUA+YWhkQxNP8xEAiEy9B/rmho3qDb7UatVoe9v71eL36/H51OFw4LpFKpBqTt9/vZuXMn1157LRqNZkBZQ3X1+/3h+YChsobWUZg6deq4Dv0ic9HIfmAyl5/+/7WhdAUv9jyZKwZZwGRkZMYtsiOrjIzMlYcsYDIyMuMWWcBkZGTGLbKAycjIjFtkAZORkRm3yAImIyMzbpEFTEZGZtwiC5iMjMy4RRYwGRmZcYssYDIyMuMWWcBkZGTGLeeLTSLPnJWRkRmzyBaYjIzMuEUWMBkZmXGLLGAyMjLjFlnAZGRkxi2ygMnIyIxbZAGTkZEZt/z/FN9FbOvyiMsAAAAASUVORK5CYII=", + "text/plain": [ + "
" + ] + }, + "metadata": { + "needs_background": "light" + }, + "output_type": "display_data" + } + ], + "source": [ + "import matplotlib.pyplot as plt\n", + "import matplotlib.image as mpimg\n", + "core = mpimg.imread('Results/core_thermal.png')\n", + "\n", + "plt.imshow(core)\n", + "plt.axis('off')\n", + "plt.show()" ] }, { "cell_type": "markdown", "metadata": {}, "source": [ - "#### 5. Thermal Simulation" + "- Cache Die" ] }, { "cell_type": "code", - "execution_count": 38, + "execution_count": 60, "metadata": {}, - "outputs": [], + "outputs": [ + { + "data": { + "image/png": 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h2tramDRpEiUlJVitVtRqNeXl5XzxxRfMmjULQRA4fPgwCxcuHKY9nD59GofDQVVVFceOHeP48eMUFxczf/58Dh48SG1tLSqVyhOQ3drait1uZ//+/Rw5coSFCxdSXl7OzJkzcTqd7Nu3j46ODqZMmcLUqVOpr6/n/PPPRxAEGhsbOXbsGOeddx56vZ6amhp27dqFyWTi0ksvpb6+nr6+PgoKCqisrKSjo4PCwkKKi4txOBzs2bOHc+fOMXXqVE+7IsHdrra2NkpKSpg/fz5qtZrt27fT3t6OIAjMnTuXKVOmcOTIEZqamjzHaGlpwW63M23aNNra2ujv72fGjBlpoYGJosiPH3qIl3/3u6AamGg08snevcM0rnFE0Js0JgJMkiRcLheCIKBSqYYNQQJ9r5A83n33XVpbW7n33nuV652iuAXYa7/7XVANzGk08tEEFGBjMoTs7Ozk6aefRqPR8NBDD3nsRZs2bWLjxo3k5uaybt06JRh4FLj00ktxOp1j3QyFMLhtYMoQcjhjIsDy8/O59dZbefrppz32DofDwT/+8Q8efPBBXnvtNQ4ePMiFF16IKIqcO3cOq9WK0+kcYbBVSAzuiQOF0SMjI4Pi4uKINV8Nsh0sEOFdXMcnYyINNBoNmZmZw26cKIqIokhOTg7FxcX09fUBcjzX7t27aW1t5a233mLx4sWj6HzYCoxmxz4L9Izi8cIhAY1A8FnP9GEyUBB2rdHCbHbicCzhscf+MyIBJiALr2ACbKL6Q42JABNFEYvFgsPhwGaz0dnZSWZmJlqtlvb2dk6dOsXMmTPlBmo0XH311bhcLhoaGiIO30kM24HTo3QsgH3AiVE8XjhE4AiQWt7XsTENqBrrRng4e9bK009HN/ALpYEpAmwUGRgY4IUXXqC7u5v3338flUrlydX+0ksvUV5e7om38s+OoFKpRjHbgUDyH41uYP/Q/2ZC2CtHCRvwOeC2i6VCmxJBA9AS4Pu5wKRRbgsIgrxEvD6KAAvEmAiwnJwcfvSjH434vrS0NOkBwamHHega60b4ICK3xzHWDUkw5qHFH/toNyRm3J74wX6biCgW8RH0Am1D/yfL/uVEti25gLEsfHEO6PD7zoHcrolCC9AX4vdJQPEotSU4AqAluKBSBJjCEL3AoSQfwwUcZezf/p3AgTFuw1hzKszvc0kFAQbeuEd/JJQh5ARnNLxoRttTJ5LjTVTvoWhJxHWKz46ozEIGRhFgAFiBncj2n2S5DAwAXyB3Bonk25isyLOooYaDg0luw3jgBF6TQqwUAfHbdoNpYKAIsAmOC9lwnUx3QBfykG20EIeON5HsWclgkPgFffx+i24NTDHiD2eCCTAX8hvVP3TGQWKHU63ItjRfrIFWjAMzcDLE7w4mrn92qjHASFujE9m5NnIUDWwkE1CANZB8z/JWoDnJxxgEDib5GAqJoZ+R90oClgRYNzDuWchgupyigY07LIz0+3GSWK3Ehaxp+Wtv8QpIaWi/oYKs/TW8UcQupUZ0kQ7Qjwcn28gINoRUZiHHJa3A3iQfww58SmhBEwsSsgE+lH/SGNIDNKfADGYJUDVxBFgoT3xFA0sLRGTbTiQzeIk0XksEFlKxziQG258bkYTa5CQpsbtMFdOaBDiTIEjdEWQplB8tnBFf0cDSgl7gE0AfwbqJFGAuYDMjDfHhBFEw7MBGgjuySiR0jCYBRxM47EsVAdYJ9CRBgGUB01JHeLlRjPgjSTMBJiLbtsbCKdRGYmcSLYyqJ36kims6IZIcYZqC18kdzK24UQwnzQTYaNABHPf7LlqN6Bhybq9guIhJc3NJsu0pFqUvBTtlymIFjrkdjhPMJAHyYtPuoh1ChkoX7y7O4v9duO1810sF0kqASRKIonxx3XURfVPrDAxYOXu2lylTvPUCRVEuya7RqCO88IPE73ndA5yJcx8BkJDt+oowSi5OkjfJmxvbZrG4UbS0tPDaa68xODjIDTfcQHNzM++88w4///nPKS0t5f3332fXrl0YjUbuuececnJykCSJo0eP8vbbb5OVlcUdd9zB1q1b2b59OxkZGdx9993k5eXFdhJJIK0E2PHj7bz//h7WrFnKxo0HUasFLrpoOi6XiMGgRaUS0GrVfPDBPgQBli2bzYYNX/DBB3v55S+/QVlZvs/eggmq7jCtsBBeOEWRANAmRd5ZJGIbMknIgQaKU75MBpAzRsfuH9JuOqWo70eoWEhBkujp6aGrq4vc3FxPRfI777yTbdu2sW3bNtasWcMXX3yBzWZDkiQ+/fRT1qxZwzvvvMPZs2c9Auyvf/0rU6ZMoba2Fr1ez6effsrXvvY1PvzwQ1pbWxUBFis2mwOTyQLAwICF06e7efHFz5g2bTKZmXouu2wen3xSz7lzJlpbe5g8OY9rrlnEwYMtOBz+465+YnOzMAO74zwTHywk3yVBRE4smwq+W6lAMWMnwLqBbkl+oURhCghnA5OcTv7v//6PiooKbrjhBoqKitBoNNTX1/PRRx9x1VVXkZOT46koD3IdzldeeQWz2UxWVhYg16Y4ePAgy5Yt47PPPqOgoICqqiqPJpebG6MKmSTSavLCd9wuSeByiZSU5PKd71zB6dNdDA7aGRiwMXduFStXXsD8+dUYjXrU6rQ6TQWFgLhtYIEWvVbL2rVr+fa3v+2pgm61Wrngggu4/fbb2bVrFw6HA6fTid1uZ3BwkIaGBn7wgx9QV1fH8ePH6eqSE2tOmzbNUxG9q6uLw4cPs379ehYsWEBDQ8OYnHsw0koDy8oycPp0F729ZlpaOikoyMJqtaPRqAGvcFOrVVitdkRRwuFwYLf3YrHsQBTzfOxgNsIbaY8wMgDbPXMYYtuzgClCrSpcGKYdOSopXiUt0eGegThH+BF4OCqRh3jJpA85HVs8TCZuLS6a2xHKBub2xHdXindz4sQJ3nvvPSRJYuXKlWzatImGhgaef/551q1bx7Jly/jjH/+I0Whkzpw5bNiwgcsvv5xbbrmF5557jsLCQi688ELMZjPPPPMMGRkZXH/99XGdc6JJm8rcTqeTW2+9kbNnT2Cx2MnI0DF3biWNjWdZvHgGGzceYM6cShob26mpmcyWLYc5//waurr62b79MCUlaq65pozMzJEyWxQlJEkKoKk1E5M1t5vA2YtjwYEsEFPmToSgl/jrf5QQmZvfKOEUQa0KkM2rAIijtkz/INhyv8Vv/r+nw9Z4EEWRXz30ENLvfochwO8ScNBo5Od+hW3DzSbGyhjMQqZWYdtYycoysGrVFej1ArJRx8VXvzoFcDBnTi0Ay5dPAeArX1k0tFUut92WRSifqy++6Ob48VPcdFOW3y8BjEYOwlc+ywh5OG/a+UgM8u7OHOmz2M3YzVLqid+2NNoOTXkEFZhOEf57G1w9Gyry/X40EleWnF4RjkZZ1ENFdAkNU8ndIVmklQArLMziuuvOJzNTQh7aRdpTQ1ed0etVaLWHuf76gQA33e/R6JfgcJxvNgdyIaJkhFDWkzjtL1r85X86MBUoDPyT3QkbG+CrM6CuNLGHbTdBS5TKveLIOpK0EmDyvLO70Ea86rETb08P0uNtAaa6I5nJsxNaODkJ3XwJ2Zky2lOM1c3Cfx+WOPcxWmiQM1LEg53g+Qrd/sbWoXXUjNnwVomFDEyaCbA+5BhCDfELsC7gn0P/u3u+n/bVIsVmlD5N6OSrkTS9gdgESSKM/YdID5+xycRfq7aJ4BYWd6LeBmQ7ZCEwPci6o4ASCzmSNBNgks8SDYFSMfh+56O2SJL363CHCdaUcE2M9PdITzORUS+xXuKxIBGxkKHMRFKAJRHHi8E0pSQ0DEyaCbBY2Y08x+9LkDFeD3B6qPeGi7V2Inta+D/U4UxzLuBw8CYA0TmdthM69DIaJNJD+wJZy403ZVo1siE/EnqBfXEerwK5xkcMKAkNRzJBBJiFiIvUuog86YTbVhXtW9m9XaKM+A4Sn3I/HXARv7CN5t4l4ngx3nO3J76S0HA441iAncWblz6C6Z5e4GSQnFnuUBz/hy9ckkD3dv4amUjojiANbRdptp04Zx0lCQb7wJXGQeLGXNDEYtBvJ7hbjETiZ3Q7h/ZpJupZW8WIP5JxLMBMhK7a44cZeZQZyD7hDoaOJX1XF7FpR92M6myg3QKONNbi9JkxCrBQjrduTTmR9A8tFqKKOAgXC6kIsLTAjpyvKxKFOYy3qUPyjiqDjS77hw4ZibHYhlw9y5dwmhZD+/c/fox2KEmShZAYg6FZTBe7VxAcVvn8I0GtAW2k7hDh6qsIyClyRmEMp9jARpJmAswEfE68ZdoB2a/n+NAT30rgoWA7kbtRDCBPt8fSjmMxbBesGd3gHMVEr6nCYBTGfEMWaIsjXNmFbIkIpt2pgHkkXYCFm4VMs46cMCbqeSsopB2hjPiKBpZEJEni888/Z+vWrSxatIivfOUrCILA7t272bRpE/39/Vx00UWUlpby3nvvkZuby80330xJSUliG+KSZBcJF8FdHfrxelwEMuBakfMZRlsK0oZsmPcnjLbkcoI5UOnJEOvHgxM4RerU7fBnEvGHWzqsYPL3qvFBrZUnBSJCRL5g0WpgDiDK8CTFiD+SURFgAwMDvPXWW9x33338+c9/pq6ujkmTJjFv3jxmzpzJH//4R3Jycjhz5gxqtZpLL73Uk9MooRH1bmN8qE5uZaTLmC8OZDNctDjD7DcIkgjWCD1AEoGI3MxUNYllE78AcznB5W+v9EGrj0KAQWzRGk6iushuI36wdDqKG0USMZvNZGZmUlVVxaRJk+jq6mLSpElotVrMZjPt7e0sWLCAs2fP4nK5ePPNNzGbzSxduhSXy8Wnn35Ke3s7nZ2h4nNC0C95jfHB5KEF+UEM9GC7DbmR+ogNMFIji8Ax1WEb6coQq3E9WM3wcIQL0xxrBoi8s+qITdiJItjM8iPjcsgztFb7kPE/UD6bUUIZQo5kVASYXq/HZrNhtVoZGBhAp9Nht9vR6XTs3r2bmTNnkpmZSWVlJVVVVeTm5nLo0CGWLl2KSqWisrKS/Px8Pv3UGFsDWqXwHtvdyMb0QPMDItBI5G4UZ4lJ27IOgCXefFpDOJBPJ1WHgrFylsiDDvKA2TEcw+WQh5h25GXAKk8f6TMhd4wEmBLMHZhREWDZ2dlMmzaN3/72txQWFtLT00NjYyMrVqzgwIEDrFy5EoDPP/+c7du309/fz2233QbIVYemTp2K0+kkMzOMABOlwLatQL3YXeQbgtvDHHhdIcKpJb6V0sJoTZIUWLOSopA2vs0PxFhOREoETgCrIq4UWlEjEl7xDaXV+COJgW2MKvXoFPFWYiFHMioCTKPRcNttt2Gz2dDr9UPlzkQEQeA73/kOOp08R7148WIWLVqEWq0eVnwgYmzAIWlkzwkkGPrxuj00EVhANeG1b4QTLn14y0mGWVcSoad1pMCKxtw3gJw0IhRjqX0dY2SWmiJgyii2wQTsCbPODOTkqpFgt0C3/0SMAAVlsuE/mbg1MGUIOZy4BJgkSZhMJnbs2MGxY8fQaDTMnTuXhQsXegSV50AaDRqN93BqtXwrfAWVVqtFq43gSQjW06N1ABX9/rr34ft7KCkg+f0fYl3/JktSZAIr2CqJSv2VLAJdunCRV/ESbPQfimgTbwS6Z1KQ7xON4ok/krgEmMPh4PXXX6ekpIRLLrkEl8vF8ePH6ejo4LrrrvMIqYTjRHZCDdRD4qUXr7tDOIO9E1nViKDQtss5NHU/9KBHOly0DR3Cv38kYpawk8QlsfAn0KXrBQ4m6XjVxJYQtpmRVT4zkRO1RoQEphhmpXsBVwyzkEpG1uHEJcC0Wi233XYbgiDQ2dnJ4OAgF1xwAaWlpWELFcSFhDw+ScZcv4PAM5HB2jFARIJTEsEZQ11GcegQyXjBOxjd7NNOEp9F23ffsRBI0EZrzool8sEJUd9URQMbSVwCTBAEtFotr7/+Onv37iU/Px+dTsedd96JwZCE6RobsiOqnti0LRdyeJCL2Iu82vCqLUGM+1bzSGEViTtENyPDImN1a3Ain2qoyxSpnE4HzhE6Ljsf2YcsEmzIvqkO5PvRChiQ63hEGoGUaGKZhbTb7XR2dqJSqfKWPoIAACAASURBVCgqKmJwcBCTycTkyZPRaDRYrVY6OzsxGo3k5+d7TD4ul4vOzk5EUWTSJLmehO/npI2sYiAhRnyHw8GaNWuorKxEEASMxhjdHcJhR+6VsdYNlIa2j0cNsCM/0aFWGZRdIqKlF7l5icAFtDH+3CiCEc6XVEfkAsyOPKx0K+Nnkd+ZhYydAIPoHVnPnj3LRx99RFtbGwsXLkQURf72t7/x+OOPU1lZyTPPPIPL5aKtrY0HH3yQsrIyJEnio48+or6+nrKyMq6//nq2bdvGnj17mDx5MqtXryYzM456cgkmIQIsOzub3/zmN5SVlWEwGHjooYdSqwT5IF7P52DqjA35FR4ohY3vUDFIihvR5R1KRON86sA7WxfNSMRJ8FoU7n2NtkOqlcjPIYPRdamwElhDi6YdDrzuhBnEX08kGsIlNFQhKxIOhwONRoMgCJSXl/PlL3+Zjz/+GLPZzKpVqzhw4ACiKCJJEoODg1RXV9PZ2YlryCDncrl45ZVXqK6uxmw243Q6efnll6mqqmJwMNQTNzYkRIC1tLTwi1/8gurqaoCUUjEBeTwQzpH1HLKFOdhU1jFC9k67NTZj7gByduloGYxxu2TSgaz1RcI0glYzSwrBHGCnE7kbhQnvJMQ0whXrSzyhbGCiw8EzzzxDRUUF3/zmNz1xxC6Xa6g6vX1Y5W5RFFGpVDid8nDEYrF41jeZTKxZs4aNGzeya9cuzGYzq1ev5rPPPmP37t0sW7Ys2acaMQkRYDqdjscee4zKykoMBgMPPPAAOTnxRqwpKCi4CWcD02u13HfffUyfPt0jpDo6OlCpVNTU1HDo0CG6urro6uri9OnTFBQU0N7ezpVXXsmZM2fo7e1lz549TJs2jTlz5tDe3s7AwACFhYXMnj2b9vZ2+vv7U2r4CAkSYF//+tdZtmwZDocDlUpFRkasRqoE0o83p2GsWTU7kVUdkYB2M1EcykMlgTNMOmY7gbWTcE1zINvF/IeDifS0l5C1p1jnNdxEEwXVRWwzoAUktn5uJ7IWrEJODhHp2KGL0Alzc5AnDhJJODcKlUo1bPbfbrezfft2jEYjd9xxBydOnOC8887j+PHjzJ49m7vvvpudO3cyf/585s+fz65du5AkiXvvvZdNmzZx4YUXMmfOHEpLS/nkk09YsGAB8+bNS/BZxUdCBNi2bdvYuHEjBoMBvV7PAw88EJlDajIxE/l4JhjdhLQOSyJY+iJzYnQbhqPFiXwaybZndRFx2ZOEECZfblAMJFaAuduhRh4SRirAegh/DokUYLHMQlZUVHDrrbd6PhcVFfGlL33J87mwsJCZM2d6Pl988cUA5OTkcMstt3i+LykpGfY5lUiIAGtra+Pee++lsrISGEMbmAtZcEWSyzyCwtzxEoHtP+h2ZuTTSYQxPhJ3tVRNn+OPldDmTAFZwEXrFyUhC3DfDhEqbVw4bIRup4noZ4iDxUIq6XTipKKigl/84hdUVFRgMBhYv3792NjAbMh1GiPp8b7W82AppeNEQrb9xzKCbSRxNT1E4ATxDxFTgTZCK9Ya5AzP0QowEW8oqxsX0Q2LfekkdHH2HqITjkosZGASIsAaGhp4+OGHKS8vRxAEsrISqeSHwbdwRiRZI6LZX6C4N8kbBhRN9ohIcOF9K8dyGu5QUP9t06XQdqIIpE2qib2TuzUxFWOo6QggqIMXzZqoEiwhAsxgMPCXv/yF6upq9Ho9t9566+gJMROyegGJ6aXdyFkoIGBPcNqh18fbNJFBvK14k73G6mt7nMAj4mSF8KQaTgLHW1YQm9uDCziK/FjkE0WMZDII1VsVARY97nTPV111lcc4qFar0el0SJI0LBtF0ggyQxgzUpj9SYnXvNxEEBMelmTGG6YLgc4/1lvm1mqjzACdeNyerMGYoEawuLNRvPTSS1RXV1NWVobL5eLkyZM0NDRw9dVXD0ufkxAsyDm8fFOFRWNIcCFra0nu5a140zmHc3cYwJv8Ilab1znkWURIfB3WcLQQ2xxIGfHnto+Gs3jrs+cSdT0NQDbyHxn6v3RoP6OKmuCR5ooGFj1arZYrrriCrVu3snPnTjQaDbNnz2bp0qXJmYl0Ik/txJDrEJBfw30kXUUZxNtZwuE+pXgINzOXTMwxHnu0YwqteIV7rCFAvqFEoxlFAHgLQyoCbBhxZ6NwB3imPQPIHqMBgrAlSQ7ODpZSGGTtye0XFC5izF35RyQ6jUlEntnyH8okMquEa+gYkQ65Yp3Z7CVyZ1wDifWpGsQ7k5k/tP9ocb8HBeRMs6OS2jiemYhxilLY1o17zBfgDSdJYO4JHaQ9iNf2Hw4X8rAxWkVQHNouVt+kSHAhDwuTbe+Jpr5UAYkVYGa8w149sQmwrqFFhVw8ZHRysxNcA5tI08w+JOS69/X1sW3bNnp7e9FqtVxzzTWpEU7kxorXEptmN9rXCTYRXiK+OBipBaXiJfL1OfZFS/wZIWxD+xaQBVksDrAW5HujGtpHUqau3I5gwRo4UfIm+ZEQAfbyyy9jMBioqKhAo9EkNxtrLJwkcqNUimFDdgtIhlA5h6xtpTom4ECA7ycDVXHu+9TQXzWyA2y0AlHCWxsmE6iLsz0hCZVPJ5lqeQqTEAFmNBopKiqisrIStVqdeul0FBTSHbcbRTDdIF1iwRJMQgRYYWEhO3bsoL6+Hr1ez7e+9a3R9cZPErZBuchpsApCLmTHU3fsYigceO0+4YodJRoJWdvyf8ZHM3g7GQSK11chz3DGEkrUgazg6Ig8R5gv7swhochB1tRiQhFgI0iIAFu6dCn9/f309vayZMmS5KWUHmWsA3KJ+WA4kYcgkTw7drzDldFGRPZNGw+xkL70M1IIa5CFTyy2LHe2kGxiE2CR3ONqYhRg4VKyTlDv5YQYq9544w1UKhWLFi3i5Zdfprc3BQxO7oTmA6Td28ltGDYTu3OriHe2zZ3SbCLgLlhlJnanXpfPPhL96LgnDSzEcE/UIZYUMzuPFgnRwGw2G5WVlRQUFKDRaBDFFOguXcjG+zTlOOH9yULhQK7cnQJ3YlRx4fWWzwVmhlg3GIPIkwZuv+dE4s6mYSbKzhdJUvwJSEJOe9WqVRw5coSXX36Z5cuXk5+f6FyUMRBu2s4d5JZo3wS/Q7iTW0QrSFLNlWGikqz7ENN+NSGWCSrA4o6FPHbsGL29vRiNRoxGIy0tLdhsttS3g/XjzWKRpMqxErI2YGfiaUIKCSZcStYJOvEflwBTqVQUFBRgt9uZNWsWgiBgsVhGJwtFvIh4rdpJ9KGxM/6M5wpjhBZFgPkRl+KpVqvJzs7m73//OyUlJVRXV3PgwAH6+sYqtDi9OYds+zpBbEU7JORQo+NAM4rWN4h8LY4Tux+ziDyzeJzEFR2OCV8NTBlCeojbiL9z504+//xz+vr60Ol0TJ48ObWK2qYRZrxpcWKll6Sl+E87HHivZ6xeiSLe9M8Ssvf/mBGsLJGEIsBiweVyMWvWLH75y19itVpRqVQReeJLkoTD4UAURfR6PYIgeL5zOp2oVCrP91HhxJsSQunFCuOJcLOQAb4XRRGbzYYgCOh0OlwuF06nE71ej0qlwuVyYbfbUavVaLVaT3+TJAmbTTZ86PV6z76cTic6nS6lTERxCTBRFOns7GRwcJAjR44giiI6nY5Zs2ah0wWPKuvs7OSPf/wjDoeDa665hsWLF+NyuXj88cdRq9VUV1fHVsbJjjz+UqbwFMYjUdZVa2lp4e2336anp4crrriCc+fO8corr/DrX/+a8vJyXn75ZZqamrDb7Xz3u9+lsLAQSZLYuXMnH3/8MQUFBaxduxaj0cibb77Jjh07ePTRR0P27dEmLsVTq9VSV1eHVqvluuuuw+l0YrVaQ2pgkiSxfft26urquPvuu/nggw88qantdjsZGRlUVlZ6vhNFkebmZo4cOcKgJVF1emLHncPLimycTwVZ6cTbnolu9wqG+xpZSdO4Z7cGFmSRBJETJ07Q0NCA1Sq78JaXl3PTTTcxe/Zsjh07xuWXX05dXR1OpxNJkjh27BgXX3wxgiB47NaiKPLcc8+h1+spKSlBq9Vy4MABTCYTkiR5+mWqkJCR8/bt2zl58iROpxObzUZPT+iSn319fRQVFZGVlYXdbkeSJNRqNffffz+rVq3i3XffpbW1FZAv6IkTJ9i/fz9m89iPC83AXmAPcpaIVBAY7cD+oWXsRXxq0or3Gp0Os27KosFbHNJvERE5cuQIBw4c8AgwlUrFqVOnqK+vJzc3F71e71EuJEmisLCQ7du309/f70n/7nQ6OXXqFEuXLuXEiRNs27aN5557jrKyMjo7O8P27dEmIQJsxowZvPjii1xyySWeCxWK8vJyjhw5QmNjI7m5ubS0tGC1Wj0l2VQqFU6nHNylVqtZvnw5N910E0VFRYlobly4nVNTqVSZRGq1JxWRSPPrFEYDU+s0XHvttaxatcozidbf38+0adO45pprOHjwIBaLBYvFQn9/P4ODg5w4cYJbb72VKVOmcOrUKZqbmxFFkdraWjIzMzEY5FSPy5Yto6uri76+vpRQInxJSCjRJZdcgt1up7GxkQsuuCDkLKQgCFx00UU0Nzfz6aefcsstt7Bnzx4WL17Mpk2bOHPmDJdeeikVFRWe9T3bJqKxCgrpSrBZSPAY8X37S3t7Oxs2bECn03HLLbfw+eefYzKZ2LBhA3fddRc33ngjL774IoWFhSxcuJCPPvqISy65hG9961ts2LCByZMns3jxYgwGA3a7Ha1WS1VVvBnYEktCBNhbb72F2WymoqKCF154gYcffpi8vLyg62dkZHD77bd7PldWVgLwjW98IxHNUVAYf8RQmnvGjBnMmDHD83nKlCmsWLHC87mkpIRLLrnE8/n6668H5PRYtbW1w/al0+m46aabYm190kjIELK3t5eFCxeyaNEiMjIysNtjccNUUFAIieLIOoK4NTBJkli+fDkvvfQSoihy4YUXUlAQSzYlBQWFoLjLqmmD/D5BQ4niFmD19fU89dRTaLVafvKTn1BSUpJSjm4KCuOGKIeQE4G4BdiuXbu47777aGpq4uDBg0yaNAlAEWIKColE0cACErcAs9vtvP766/T19WGz2aivr+fb3/422dnZiWifgoKCmyg98ScCcQuwW265ZVj2CZVKlVo1IROMATmvOXgL1I61X5FvYdV2YstkMd7JR851D5DimeqCo2RkHUHcAiw3N3dCZZ/QAWVD/9uQPbzHOuV+9tAiIWdfUATYSHIY40wS8eJ2ZA02hByV0uCpR1ynLUlSwPz3KpVqbGxgamR1REKWLkpcjUKcCMjCL5s4yqElilCOrIoGFj12u53f/e53mEwmz3d6vZ7vfe975OTkxN24qNHjreLQBjSNfhMUxhdqYAow5kFs4VJKKwIsenQ6HevWrcPpdGIymXA4HKhUqtTPh6+gkI4EE2BKQsPYEASBnJwcNm/ezPPPP09/fz+SJPGHP/whNSoThSIDcId1dZGUFAUCcB6yjczOyCrS/hQgTxJIQ+vGkvaldGg7J7J9bqwnGMYSA1Ay9H/az4nHkNBwIpAQ0199fT1f+9rXsFgstLe343CkQcYlPXJvB28y+QQjIJe5BzkNTzgBljO0SMj58aO9igJQOPS/beh4E1mA6Ulzw70/yhByBAkRYHPnzqWgoIDnn38etVo9rt0o0gUVcmFX9xRLP6mRuyzZCMjalkDsRnc1cg59CXnWOSVQHFkDkhABNnXqVPLy8njkkUdobm4Omw9MIfloAXceAhdQz8Qo76YGphG8n0eCEajFW5EoZVA0sBEk5LTfe+89BgcHMRqNbN26NTWyNqrxvrFi9OgQVKBSy38D/u5ziES/AN0uP4l4w/i6EI3XF3UCbnfS8H1OfJeod+K2gQVaJqgAS4gGlpeXx4YNG6ipqeHUqVOpoYEVIVvFARqAGEpVZheAlA+SBD2tIPp5rGqBeUP/dyPXDkwUbu3JChwiPluWgNe7xIxcLXy8MRXZfgipJ6RzkLVCX3qJ4XkJ5sgqkXonPUrEJbfdSf6/9rWvUVRUxMmTJ7nzzjtTwzNfhdfxL4kamPsQiXx+Er3fZLUzlUjA7U4agbJBq4mynb4JDf0XJR9YbNjtdvbt20dnZyd79+4F4OzZs3znO99Rgrn9MACzhv53Ao1EFoKkw6s9uYa2c8bRjgyfdvjSjFzJOtUpRQ628Cdez0MVUEN8Qt4dJ+svmBIW5RNBSumJRlzXVqvVMmvWLBoaGli7di0ajYYzZ86gUk3Q10EI1HiHOA4if/v6bueMYrtI9ucmnUYgBka2PxEIyDOP8cw6uq9tUjTAcLOQE7TLxSXAVCoVVquVN954g1WrVpGRkcHmzZuZMmUKmZljHjnmpRB5Tl0EzhLYnyAb2et0ENlAESUZQ5uDXBw8lDajQvZPcteY7I7wGO7t3I6xndE3MyhFRO7saSYmk2LE7QglRBL9VOUj3zv3CC1S8hip9SXd5UKZhRxB3NptU1MTjY2N/POf/8RgMDBr1qzU88KfNPTXgewhGkiA5QIVyFIhBgFmxOvY7yC0AFPjFXa9RCfA3JkwTCROgAl4L1EktJM8ATaJ0fWa953riYYCvE7Ko0KoWMh0UqETTNwC7IILLuCqq67immuuSYm6jclAADR6eRZSEsGVwEADNV6twk7k3ve+zpa+WEi+w6qW5GRmEBgdRUKD7KXv/j+W7eLxM4uZKPOBmc1mjh8/jkajYfr06XR3d9Pa2srs2bMxGAyYTCZOnDhBfn4+lZWVqFQqJEnC6XRy/PhxXC4XtbW1tLe309HRQWVlJUVFRSmVbTluASYIAg6Hg0ceeYTa2loMBgN33HEHWVlZiWhfaiBA7pCK4rBBb7iYoCjIAuqG/m9GHuFGghGYHeD7g8hDvGRSQGxaS6qQj5xhIloCuUOMGuHygQUQbCaTiebmZk6ePMmhQ4coKCjgL3/5C7/61a+orq7mD3/4A2VlZRw4cIAHHnjAU/PxzTffpLOzk6qqKiorK9mxYweiKPLqq6/yyCOPpNQEXUImSK699lrmzZuHXq9Hq9Wmhh9YAvF94ST63RPr/gJtN1pxj6nz/o2dRF73USOUBiZI9PX10dPTQ3Z2NhqNhsmTJ1NRUcHBgwfJyMhg+fLl7N6927OJ0WjEZDIhCAI6nWzBczqdvPXWW8yYMYPBwUEuueQSVq9ezeDgIHv27AmY/28sSYjG3tjYyLPPPsu5c+fYtWtX8sqP65GNQL5LNKqA24h0HsETPBmHfj8P2brrvwsNGPPAmAsZQabD8oHyoV1EY5rIxXtasb5Zihl5iUqjbMd4IdDjUkZgN4xgqJDtctE+aknBrYH5LxpwSk7efvttXn31VXp7vUbcyZMnU1NTQ1vb8GGDw+HAZDIxZ84ccnNzOXfuHCD7dgqCwF133UVhYSH79u3DZrPxt7/9ja985SsppX1BgjSwvXv3ctVVV+FwOOjv78dqtSZityPRMVKwdBO5Fdzfeh7ICp6J18BjYURWV7UGsobmKFxOsPbLnvq+FA4tInKmnkhTTucPLRLyTGa0/l4C3vQxvriQL9FYp74ebQzI8zLxoEK+pvHuJ258vWEDoNFrue2W25g+fbrnu1OnTtHS0oLdbsfpdNLU1ERTUxN79+4lNzcXs9mMw+HA6XQiSRIff/wxixYtYuHChezYsYPTp09z0UUX8cQTT2C32/nSl76Ew+FIqRFW3ALM6XQye/Zs3njjDURRpLy8fHQ98TXIhiR/HKRE9HImchNFonMUNTJSa5KG9hHtUFEY2l8ow7OF9BNwWrxG9UDEmhNFhXy9XCTeWK8f2mc0voBA+FlIlWyP9jWwG41GzGYzVVVVLFq0iKamJi6//HL0ej1qtZoHH3yQ/fv3s3LlSurq6mhoaECv13PPPfewa9cuVq1axfTp07ngggswmUy0t7dTW1sb+8kngbgF2CeffMIXX3zBpZdeSkVFhWeGY9TIJrA1+yyyVXwMEfDGNJqB/VFsWxPgO9fQPmLJEzY9zDqHkVPupBMFeF1XEkkmcrSCE9iW4H2XIfvynUOecImKKBMaFhcXc+WVV3o+19XVUVdX5/mcm5tLaWmp5/Ps2d6OtGLFCs//y5cvj7alo0bcAuzSSy+lrKyMf/7zn+zcuZMjR45w8803j54QC/Ya852TD2R39P09mCVQFWYfDMVJikNakZ9qJPj9rx65SsBdhzolNV5NKVJzarg3vTsjcbwGUYnItUOB+A3iqgTsI1A7or0O0awfV5sVR9YRxC3AdDodU6dOxeFw0NnZyZYtW7jhhhtGVwsLRBFea20jsuenL9nAgqH/DcjGKn+qkI0fInJKCD/VR6WG/CHPUvsg9AfaxxAZPofzpY/IsxKokDUDCVmjOxbhdpFQQ/z+Y61AR4TrVhGdMT0QiZiYqEaePPElGlkgIA8AIrUKxdzhwtjAFAEWIzt37uTNN9+kpKSEG264gRkzZoy98AJvpD4EfuWpCO+V6P7eFXgfgiAb9QGEML3J93CBDhEJAt5wlUSa99xhdvESjUDxdQodS+Jth/uejMq5ROkHNhGIW4CVl5fzwx/+kLy8vBFGRDeSJPuonDhxgurqagoKChAEgb6+PhobG8nMzKSmpoa+vj4aGhpQqVTU1dUlLp7yPOS5cBeyXSyQtboQOQ2nCTlWxhcVsuejO3ixZeTmWj3kDDm7WkzgiHAiNnPosCCb7SKNYsogtF3LgXyqo5kTv4jA8ymBGG0352ICa3zRtCMbbyiXL6PilR9OA1MEWGyUlQW6pcOx2+088cQTVFRU8MYbb/DTn/6UzMxMGhoaaG5u5tChQ1x++eV0dXWxa9culi5disslSxnJx0ch5s7odl1xEjxHcAayVTiQcBOQ/RsgqKVbrfFqY/bByA3tOryFOKKJL9QS2i/JhnyqoynAjMSf1iZZGInfj8v3Xo0JyhByBKNSkNxkMuF0Orn11lv5j//4D1pbW5k+fToXXngh559/PoODg5jNZnJzc7HZbGzfvp26ujpycnJwOp18/PHHtLW10dERqYUliWjxRj67Haz8pITWwIghp+QCWxg/CndFIl+cBDbPhUOFrHVEatfqJbYybmNJBpFrUNG4VLhfDg5kwVeE7As2psFxvgkNA6EIsOTh9u4FOQWPOxxBFEW2bNlCT08Pa9asQaPRcOGFF7J582b+8Y9/cOedd6JWq5k3bx41NTXs3TIG1b79MSDnLwY5+rqHEVInI1tefHHYwguwIkYGCAwSUEaGRYtsoI4ECdmNIt0EWC7JcaNw32IH3iQlgdxaRh1FAxvBqAiwnJwcRFFkw4YNdHV1YbVa+eKLLxgcHORvf/sbt912G/39/XR2dtLV1cXevXtZuHAhIAu8srIynE4nBqNBfrp85whcRNfzDMhqjYgsgPzR4H1d2wnv3ZkxtE6w/Q0hCKAOYCyRxJG59n1RDR0ilABzF7KNBz3pJ8ASYXvSMVKpiXkKymdSJxxqiej8KUIFcyvpdJKLXq9n3bp11NfX88ADD2AwGLBYLFgsFlauXEl/fz9ms5ns7GxOnTrFZZddxrx580buyAjUCcMNLb3A8Qj1EzXefMom4GiAdfLxWnuPETpMSYs3lUSYqh5qLRScN/J7uwX6QqSg0OMtHBKMFuBMmHXCMZX0K4KbiMDqahIX46jRQn4pETXM4ZLdcKI7AIoR349REWCCIFBaWjrM69eNf2hCRUWIqDO316HKNz1EFN3O12sxlLdouHViWDfWFEqJcPiM5Bi+fycSCc9BJkR+r6MPJVIFb2wK5egaTUZFgCUVHYFTY1qAgTDbuY3xrQR0jSAXr/t8F6Et4gaf/ZmQ3S0iQK0BQ4AAf5tZHl5GQhaBg7gD4SDy2Pd0R4d38jgY0fhvqTWgDTEbEOnwMTaGvPWC5lGamCpY+guwTAGmBLirZyUYCKGdZeDNateGXLran5KhxYXs4xDCxkUmXuP+CSIWYBod5PhZ7iVJ9iNzRSjA3NkvImGAiSPAjCTW+K7Rj7xXo4fb3TiYppX+XTkWxu9Zq/FaY+2E9yfQ4jXIB7JmGwicHiKQoNIRet4+2HY+BDL4D9uFBGIMlnv3pECysRLaphbIeJ5oYvaOHzLGawDBJY/c1EIMNquEoyO4AJuY05DjV4AVAgVDN/uYFN5LdBIwFzlH2Em/39xBiP7YgX2MFI7ubIbBcCKnlQghgHLDVNlwWKHXP2IgAjKA+dFvFjX1hE5tXUXynUJjtQppdZBXCnYJDF2QmwMFSS85FA530NLEFFTBGL8CTBB8rNPSyKc5kHogMNxqLvl97487hUOwfQVtW5B9St6mhyWFJwXcHgLhLkHKdsWhhgs+9ynkPYnlgka9TSgBJpH8Ui6pyfgVYL5UCSPv7wBw0it5HE4QRVDlg00Hei0Ip/Bobic6IS8DMnWg08hDOLMLpBrI0IJW7fNMthDa0KRBTmHgL/haibhWmlYX2C0jEJIku2qE8jdLNDMI3aVGW6Ex5oIhQld6X2ElIWtikiSfjxPQ+/zuAuonQd0kECXQqeTnwCWBVQSjOoisshHlRXDbwIKJ/XTz4ksMKfsSTCh6ATL8Fr+H54Pt0NQGLgH+6x1oH4QeK3T0y8Z0o1b23njsQzh6Fho74aG34K/74eQg8tjMHQwYzlYi+K3vXqJ4nQgqeQIgoiWU7TcJCMgmQ//Ti/FUE4JKHfn1Umu9QmxAhJcGZEHW7IS/9EOvC865oE+UTzYnG4464HenoFsNYgZ80AffOwSOYBciQLhZeLTID26gZWLoIv5MzLMGWYBUDz1BJyQsNnC65Ddtvxle+Rjazsja1vJaON0DFcVwoBc2HYPFU+SH3KCFbH/X7WJGVme1Ed7btJDILexW5NnTSBDkPP6RumWMR7QxuteLgDkbpCngtEDHWfjRIMwrrKT/fQAAGMFJREFUgtMm+H45/O9pWFAEu7vhwgKozISTA5CrJYHewe4hZLC3Y7yxGOnJxBVgOsHrt5UnIQjeZ01CHk5e8WUoyIXP9oPBCMbJMKsK1iyQhdYvroZjHfC3nfCjFT77zmVkljwz4QVYNpGXpTYRsQAThMiHTwrDEQRkjakEpH4QzJCtg2/NhicaoCMHbN0wLQsuLIQvT4Kf18O8PPi8C9qsUGlMhJ+pewgZTIBNzK6cZmetR57ei+RpMBN5di3IyIJDrWDIAbtDtoFptaBSeTUzSQJBA31aUOnl31QD4NCDmElox1kV4b0q3UjIAiqUzUoTxf6CEaDq0rhCS+QvhACIImgGoMsGZwbhYB8U6cEypOyokG1d7kkLiwtsLrisBM7Z5PUGnUO2QD9NTBz5VRgE5Oc/WJdNgQo2Y0CaCbBsYAmRNfsY8EVEe5UkcKrg18+B0wpTi6DhFOw4BDotnD4LWg1s3Q/nemHNLqitgqNDCbcW1MK/foicmSIRSMi5mZM9KhhgZKrt8YS7BFCMiBIclsBghes3g0YFi/LhiAl+cQD29UDDADSYYNAFn52DbZ2wIB8coizE/npyeOSbG7MTNJGGT3gYKgIZkDTrygliHJ+1b1oJN8E9SBcuhFtvFRD6pcCJ3cNN8gwwMpOr/6EjnSiSkD37Q3n+++IitppoesZ3AKQRuapvHFwzFJwtgKxy+fSY66qHr/t1P7f/r00hKN022BlV73PbwCJPR+FwOOju7kYQBAoLC7FYLPT391NcXIxGo8Fms9HT04PBYCA3N9eT8koURbq7uxFFkaKiIlwuF11dXWRmZpKVlRUw6/JYMY4FWBWyR6kvduBD/CWDIEBlJSxbBoIkjNTtXcBBKbQACueKM4hcGCQSJKJLD3GayA36vhRFcYx0JZHe8wUkLDapvR/qo6pjF0qAQaCu3N7ezocffkh7ezsXXHABDoeD5557jscff5zKykqeffZZbDYbZ8+eZf369ZSWlnoK3O7du5fS0lJuuOEGXn/9dc6cOYPNZuOhhx4iJycF8vINMY7dKFQErMEeTuVQCXLcyLAl/GbDMmYGWqItdeMuoRXJEutdVIVp83hYEok7J1cilpja5v88+y5qnE6np8o2wHnnncfy5cspKSmhr6+Pq666ioULFyKKIpIk0d/fT2VlJTqdDodDfju7XC5efvllbDYbdrsdq9XKgQMH+P73v09FRQWHDx+OpeFJYxxrYIFQIZdl8FelLIT0IBWQZxVD2aTshI6dUSO/wSPVeMIZ8X1x5/OPlvFuxPfF7XsVD2OeU9rtBzYSh0Pi6aefpry8nLVr11JSUoIgCNhsNsxmM5mZmahUqmHDRI1Gg9lsxuVyYbPJkwAul4ve3l5uvPFGNm7cyM6dOxEEAb1ej9FoxGJJrQdmggkwLXBRgO9bgS0ElS6qIBkvfOmWQidWNBC+PLYbCTmYMNJnpZjAKYXCcYbgRU7GG5OI2x42trhnIQMLMK02g/vuu49p06ahUskq+blz59Dr9cyaNYv9+/fT09NDT08Pra2tFBQU0NraytVXX825c+fo7u5m37591NTUMGfOHDo7OxkcHKS4uBiDwcCOHTs4evQoS5cuHb1TjoAJJsBC4R5iOokpLMM9YvUn1ggPLaE1MHdcSzyoGf2YnrFizDNJxItbAwteGFKlUqFWe0/UYrGwZcsWMjIyuOOOO2hoaKCoqIhDhw5RW1vLt771LXbs2MGsWbNYsGAB27dvx+Vycc899/DJJ5+wYMEC5s+fT3FxMZ988gmXXXZZ6ISjY4AiwDxMQ0450Qzsjn7zXGCen5YmAoek2Fx0ZoT5vZ/AKbGjYRKxaW7pSOpMnMWBO2woECO7clVVFXfccYfnc3FxMUuWLPF8Lioqoq6uzvN52bJlAOTm5nLbbbcN289dd90VX9OThCLAPLjnyGN8VQvCyE2jSXc9bLsImpGI6ZdxPIUz/ghtAxsHKmZMKAJsBKXACr/vXMA2olalBGBaALcMJ3BCis13y00mckaLSJCQC45MzIQF8TGJkbXuEkEPkfpZD+F2o4hcA5sITMyzDol/3TaQe34M6oogyILGH0eA/GTRoibyMBkXirYVKzriCkcKip0Y7kloG9hEJM0EmBF5Ki/YTbQhJ6RPNCpgJiNVGCfQQNTJ5FRAaYAcZb6clRIXSqQCJhOZxudCjigYbw6uecTmBpEyPpvuWchgviCJqJKZfqSZAMtAtm4Hu4kmoJHE9z41ga3qg8hjsygFmFoIPaUvSXJCxEQJMAFZgEWCHTmUahSTH44KuUR+DVISxQYWiDQTYOFQEzg+po/kGIBUQ8dzIWt/CYyMzmTk3ZGQnWWTqR0JyJpKvLnDzHHuQ0C+BomaPUx7d5HoQ4kmAuPsrI3AlwN8v5XQkdaxogeWDf1/eug4CSKQ46wLqA8TkxkvGqA27FrhOYCsoMbTjpkotrth6Ahea0nRwMYBwV7XauQ3l0Ric9T4Hi+BnqzBov0FST4VdzKpZGRYTYTG406OEE+fcj+Z48J/KxGEc2QdZ105QibIWS9C7u124J9EnqcmGiYDV/t9JwIbCR0kGQUqYJbgHUoeS2FL+3TiG+qmdNmiscAdSR5MgE3MizVBBJjbAKIiea90NSPzj7kSezxB8D6/thQWXm5lQSHBBHLxcTMxL3haCTCz2UZHh4kpUwx0dpqGErV5nXS6uvo5fryNmprJCIJAXl4mJ0600909wPTppRQUGBCEAuRhnQPfarfnztmwWFwYDGqam82UlxvRar1vtX37eigu1mOziZSXG3G5JA4d6kMUJWbPziUjQz26id6C+YHFazxXSFGUIWQg0uqsT57s4JNP6vn2t1fw2WdHsNmcVFdPor9/kGnTSsnPzyQ728hzz22mp8fMmjVLaGhoRaVS8X//t5t/+ZfVGI3uWLAO4FPPvjdtOktLyyBTp2bx3//dyI03VmC3i/T3O/jSl4rIytLgdEr89Kf7uP76ci6+uJhz56ycPm1h9+4e7r03QZnuIiUDmBlAYB6SEjZiVUglFDeKQIyJAJMkCYvFgtPpJCsry5P+w+l0Yjab0ev16PX6sBpNe3sP7767i1tvXcYzz3zEzTdfzPvv7yUvz4hWq6akJJc5cyrp6upn587jyHne3Pv0NbqPTHT4j3+043SKFBXp6eqy0d/vpLY2m+xsLWVlGUyapKevz8jevb1UVgZyt3fjfmsmeAIh0LWRUnhYqRAn4UKJFAE2apw9e5Y//OEPAKxYsYJly5YhSRKvv/46R48eRaPRsH79ejIzhwsGtVqFwyF7WDoc/397dxrb1JU2cPxvX984Nllskw2yQwIhEaEUVCoSBiEBhbKoVIS1rZjStF+QQKqqUlVq+2o+tHRKpxq10BZGIkhUoojlRYU2ogEmbwsoDIQhxHE2ErI4pCnZnXi7vu+HTG5J2RlBbHp+kpVEN3aOb64fn3P8POcoSJJETk4yf/pTNqWldvz+oWMxMVEYjQZiY6Pp6nLxj3+U8OKLszCbb/7n24CF//n+3+h0F1GUoQCgqipGo55nnx2LxRLGP//5CyaTRFiYREyMkezsaIxGifHjTUybZqGi4k67H+mBuQyN6XoY+gBBEB6WqIX8vcf+rFVVpaysjBkzZjBjxgx27drFnDlz8Hq9lJeX884777B3715qamqYPn06qqqiqiqBQICxYyO5cqWJEyf+zb/+Vc8zz2TS3d3PwIAHr9fP4KAXr9ePwSBht7cwcWICX399guTkoWrcnp4BDIZb36ncbhg71sixY06mTIlCUVT0eh0eTwC3W8HtVtDrddrX8+dvkJIyhuvXB+ns9DI4qOBy+bn9hP1wPsHwqX7EvaQB/jirrIawAffQrkf3715DSBHAHpu+vj6SkpIwmUz4fD4tSA31fIxEREQwMDCUBenz+di/fz8NDQ3U1bWQljaOv/71DLGxUQwMXKery8NHH/0fLS069u2roqfHzS+/tFJd3cbFiyfp6HBx4UIvP/zQzJQpScjyrQGsq8tFXFwuZ88GKCnxk54+kfZ2BbtdQpJ09PQkIEk6Kisl3O5U/va3AVJSoKVFRZLCmTAhhr/85dbaG0VRaGtrIzExEZ0uHMh71Kd2KID9F5P4breb7u5uEuITQiYHS1VVmpubSU5ODqodc+7G7VHQmcO09evvbbgW8k6JrCKAPTZpaWmUl5cjSRI2m426ujoSEhKQZZna2loaGxuZO3cuALIss27dOvz+ofmjrVu3anNmwa6/v59du3axZcuWkHlhNTU1cerUqREL4QW7QCDARx99FFLXxuDgIDt37nyA60Isp3M7j/1Z63Q6Zs6cidPppLKykvXr13P58mViY2N56aWXKCkpIS8vj9TUVO33h5fJTU9Px2AwhMxFGhYWRmpqKgaDIWQC2JgxYxg/fjyS9JjTQv4LiqKQlpaGJEkjllQOZrIsP8TyzGI5nd/T3aMLGzQfa6mqis/nQ5blkHlhhWKbA4EAiqKEVNANxfP8IG0OBAL8/e+f8uc/P0d09K3Jf6oK+/b9L7NmPU9m5v3uHBNS7niCgrorMzg4iMPhoKOjAxjq0QA4nU5qa2u1veyCSV9fH3a7ne7uoU8mw8LCGBgYoKqqivr6em0oHEw6Ozux2+24XC70ej2yPPQu39rait1u1+Yjg4WqqrS3t1NdXY3H40Gn0yHLsna9XL9+/QHmlh4Pr9dLXV0dTqcTVVW1Nl+/fh273U5nZ+c92nzzJP7tbmIIGVQCgQB79uzB5/PR1tbGW2+9hc1mo7GxkV27dmGxWEhPT2flypVB867r9Xr5/PPPsVgsXL9+na1bt2IymWhvb6eiooKamhqeffZZ5s+fP9pN1fT29vLpp5+SmJiIy+Vi8+bNyLLMpUuX+P7778nIyMBisWA2m0e7qZr29nY+++wzEhISiI6O1ubrvv76a8aMGUNrayuFhYUkJiaOckt/09XVxdGjR+np6eH9999Hp9Ph8/koLS3F6/XicDjYunUrkZF3W/71bsvp/DGHkEHbA/P5fDQ0NLBx40YmTZqEw+EAoLy8nDlz5rBhwwbKy8tHuZUj9fb2Mjg4yGuvvYbJZKKlpQUYmrubMGHCiPm8YNHa2orNZqOwsJCuri56eobKq44ePUpnZyd1dXXapqfBwm63k5uby8aNG6mpqdF64k6nkwULFmA0Grl48YEWnH/k4uLiWLt2LQbDb30GWZZZtWoVK1euRFVVvN67LTJw84qst7vd2hcJBAJ4PB48Hg+qquL3+/F4PAQCgRHHhzMB4Lehrdvtxuv1oqqqtvHtzb8XLIK2BzZ8ovR6PQaDQRt6+f1+ZFlGr9cH3clUFEXb/dhgMGgXCoDVaiUmJoYbN26MYgtvdfN8183ntLe3l2XLliFJEidOnKCwsDBoerq/nzsaHpIVFBRw6NAh2traRmwXFgxud+50Oh1ut5t9+/aRl5eHzXa37dXvlgemcruXcnNzM0eOHKG7u5tFixbR3t7OgQMH+PDDD0lMTOTAgQPU1dWhKAqbNm3S/v62bdtQFIVJkyZRUFDA/v37aWxsRFVVNm3ahMVieZhT8EgEbQALCwvDarVy8uRJHA4Hubm5nD17lsmTJ3Ps2DFu3LihfVIZLKKiovD7/Zw+fZqOjg48Hg8VFRWYzWZ6enowGo24XMFVqJiQkIDT6eT06dPo9XqamppwuVzMnj2bmpoaDAYDcXFxo93METIyMigqKiI8PJyYmBguXrxIRkYGNpuN2bNn09XVxbRp00a7mSN4PB7sdjtOp5Nr167R0tJCdnY2+/btY3BwkLy8PHw+nzbPezOdToeiKNTXNxERcfuF/dvbf6WxsRG9Xk9SUhJGo5GkpCTWrFnDTz/9hMPhoKCggCtXrmg9qaqqKubPn09JSQnd3d1aAPN4PFitVtLS0gBwOBwsXryY4uJient7gyqASR988MHdjt/14KOWlZVFc3Mz+fn5JCcn4/F4yMnJITw8nEAgwJIlS+6rZvJxMRgMZGZm0tTUxOLFi7V/tCzLVFdXEx8fz8KFC7VJ8mBgMplISUnB6XSyfPlyZFnGaDQybdo0XC4XVquVefPmBVWbLRYLVquVvr4+li9fjs/nw2Kx0N/fT0NDAwsWLCA9PT1orgsYShCuqqpi3LhxmEwmTCYTNpsNl8uFyWSir6+PlJSU2wYwAKMxnKoqB62tztvezGYzLpeLjo4OkpOTMZlM6HQ6rly5QmlpKZmZmWRnZ3Pu3DlycnKIjo6mqqqK2tpaurq6yMvLIzo6GoDMzEwyMjL45ptvyMnJ4dq1a9TX19Pd3U1+fv495ukeif+504GQSaMQhD+yB50u0el09PX14ff7qa2t5ccff2TLli1s376dFStWkJqaynvvvcfbb7/NoUOHyM3NJTU1ldjYWHp6epBlme3bt7Nu3Tp2797N1q1b2b9/P7NmzWLWrFmP6Fne+enc8YAIYILwZKqurubYsWPIssySJUu4evUq3333HXFxcbz66qtUV1dTVlaGzWZj9erVnDhxgvz8fIqLi2lrayM7O5vnnnuO0tJSLly4QExMDKtXrx6NT6RFABMEIWSFZiKrMERV1ftIdLz/x+rp6XmoJGCv10tv729bxymK8kDtUlWV3t5eFOXBNp182PsJTz4RwEZJb28vhw4dQlVVOjo6OHbs2B0DgaIoNDQ0jEjLuJe+vj4OHjx42/sUFRXR2NioPfaOHTvYtm0bRUVFDA7eeS2e/v5+nE4n586do6qqCr/fT0NDw323yePxUFRUhNvtvu/7DDt16hQVFRUPfD/hyRa0aRRPOrfbTXl5OcuXL6evr4/KykpmzpxJUVERfr+fdevWUVlZSVVVFRMmTKCzs5MxY8Zw9OhRmpubWbZsGXq9njNnzpCens7SpUv56quvMJvNREZGMmXKFHbu3El3dzezZ8/m+PHjhIWF8corr+Dz+UYkM167do3NmzezY8cOzpw5w+XLl3G5XKxcuZLe3l5KSkpITExk9uzZOBwOzp49y40bN9iwYQPV1dVkZWWxZ88eOjs7Wbp0KQA//PADiqLw/PPPM336dHQ6HbW1tdr8ybZt2wgPD8dgMGAymejp6eH1119n9+7dBAIBVFUlPj6e5uZmCgsLeeqppzhy5Ai5ubkhU8wvPHriShhFDoeDjz/+mC+//BKXy0VxcTFTp05l/vz5HD58mKamJlJTU5k/fz41NTWkpKSwfv16LBYLaWlpFBcX88Ybb9Da2kp1dTVXr15l9erV1NTUEB0dzaxZs3j55ZexWq1kZGRQX19PWVnZLe3o7+/n5MmTdHd3U1lZSVJSEi+88ALffvst58+fJykpifz8fFwuFy0tLUybNo01a9aQlZVFbW0t58+fx2g0snbtWg4ePEhHRweyLFNQUMDx48e1YNnc3ExcXBx+v5/6+npWrVqlBW69Xk9NTQ3V1dUsWrSIrq4uxo0bx/jx47l06RJWq5Vff/01KGtJhdEjAtgomjx5Mm+++SaFhYWYzWY8Hg9RUVFERUXh9Xq15XiGc4MGBwfZu3cvK1asIC4uDkmSiIiIwGw24/V6tWz/8PBwLTtdp9Nx6NAhXC4XNpuNvr6+W9ohyzITJ07k3XffJT4+nsjISCIjI1EUhVWrVmGz2fjiiy+0MqObM/dhaG4sMjKSiIgIAoEAOp2O5ORkxo4dO6L8xGw2a8NHi8VCbGws8fHxxMXFERUVhdvtJjo6mri4OGJjY0lISNBypfx+f0itkCE8HmIIOUr0ej1jx45FlmVMJhMWi4V58+axZ88eAF588UXq6uq0RF2bzUZZWRmVlZVaGU1OTg6ffPIJZrOZSZMmcfbsWWAoOERFRWE2m9m/fz/x8fFUVFTQ39+P2WwmOjp6RGLq+PHjmTp1KhEREeTn5/PVV1/x888/s3DhQi5cuIDdbic2NpaIiAiioqKYOHEihw8fJjw8HKvVytNPP82OHTuw2+3MnTtXC6iSJGGxWLSgk5WVxaVLl1BVFZvN9p+t7yxIkkRkZCRGoxGr1YokSURFRREWFobZbCYQCFBbW0tOTs6IWkJBEGkUo+Tm9aCGC2YNBoNWQGs0GlEURevp+Hw+9Hq9VlgdFham/SzLMgaDQXu8m78GAgFkWcbr9aLX65EkCVVVkSRJq328ubZwuKg4EAhobRg+LkkSijK0mYrH48FgMKCqqva3FEXBaDRqy4NLkjTisRVFobS0lGeeeQZZlke0dfi5KoqCLMv4/X6trcP7KGRlZd2jXlB4Qok8MGH03XytPchQ8GHvJzwxRAATBCFkiURWQRCePCKACYIQskQAEwQhZIkAJghCyBIBTBCEkCUCmCAIIUsEMEEQQpYIYIIghCwRwARBCFkigAmCELJEABMEIWTda20SUTkrCELQEj0wQRBClghggiCELBHABEEIWSKACYIQskQAEwQhZIkAJghCyPp/8a+pFi3GNv4AAAAASUVORK5CYII=", + "text/plain": [ + "
" + ] + }, + "metadata": { + "needs_background": "light" + }, + "output_type": "display_data" + } + ], "source": [ - "!mkdir Thermal_sim" + "import matplotlib.pyplot as plt\n", + "import matplotlib.image as mpimg\n", + "core = mpimg.imread('Results/cache_thermal.png')\n", + "\n", + "plt.imshow(core)\n", + "plt.axis('off')\n", + "plt.show()" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### 7.2 Signal Integrity Analysis\n", + "As data transmission rates soar into the tens of gigabits per second, digital signals exhibit characteristics reminiscent of microwaves, becoming vulnerable to reflections, damping, and crosstalk. An overly ambitious design can easily be compromised by impedance mismatches or interference among copper traces. As a consequence, in the design process of 3D ICs, SI analysis stands as a crucial element.\n", + "\n", + "The key for SI is to extract the s-parameters of the circuits or the chip. We consider studying the transmission performance between the V-cache die and the core die, as shown in the figure:" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "Similarly, when delving into the intricate details of the chip, 3D components such as TSVs also require corresponding modeling. We have investigated a range of existing open-source EDA software and initially considered utilizing OpenEMS, an open electromagnetic field solver that employs the Finite Difference Time Domain (FDTD) method, for this purpose. However, the primary challenge lies in the fact that there are currently no open-source tools that can convert GDSII files into the three-dimensional mesh required by this software. Therefore, we are exploring a compromise approach. Firstly, through circuit modeling and RLC parameter extraction, we abstract the respective metal stacks into electrical circuits. Subsequently, we leaverage an open Python library called SignalIntegrity for S-parameter extraction. Finally, by combining information such as the dimensions, materials, and external environment of the 3D chiplet, we aim to obtain eye diagrams, Smith charts, and other relevant metrics.\n", + "\n", + "As of the submission of this paper, our SI analysis is still ongoing. We are committed to developing a comprehensive 3D IC design flow, which encompasses every aspect of the design process, ensuring a seamless transition from concept to implementation." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## 8. Conclusion" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "In conclusion, we have designed an open-source 3D RISC-V processor for this competition. To realize this architecture, we have developed Open3Dflow, an innovative open source 3D chip EDA Design Platform equipped with TSV and thermal modeling. This platform leverages existing openEDA tools, incorporating appropriate abstractions and modeling techniques tailored for 3D design. Additionally, we have adopted the openPDKs to facilitate future openMPW tape-outs.\n", + "\n", + "Our design mimics AMD's 3D V-cache structure, featuring a cache die stacked onto the logic die. The back-end process incorporates distinct technology processes, sky130A and GF180, for the two tiles respectively. To further enhance its compatibility with advanced packaging, we have incorporated bonding pads for hybrid bonding, along with TSVs for electrical transmission. Furthermore, we have thoroughly validated our design through thermal modeling and SI assessments, ensuring a comprehensive evaluation of its performance.\n", + "\n", + "Looking ahead, our 3D RISC-V CPU design, powered by Open3Dflow, holds immense potential in driving innovation within the semiconductor industry. By enabling the creation of more efficient, reliable, and cost-effective devices, it marks a significant milestone towards the realization of a fully open-source process for designing 3D chips. However, our current design remains a preliminary blueprint, and we eagerly anticipate the development of more realistic and feasible 3D chiplets within a fully open-source toolchain. There is ample room for improvement, such as optimizing the thermal performance of the chip, enhancing multi-objective optimization for 3D interconnects, and gracefully resolving DRC issues arising from chip stacking through the integration of two PDKs. We are committed to continuous progress, employing more comprehensive modeling techniques, developing new tools, and realizing increasingly complex designs to refine our design platform." + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "x6zyRsZi7kL2" + }, + "source": [ + "## Quick Start\n", + "This chapter is a collection of all the codes. If you only want to replicate our simulation flow, a summary is provided here. When running, please do not execute the previous codes." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "#### Prerequisite\n", + "- vnc (https://www.digitalocean.com/community/tutorial-collections/how-to-install-and-configure-vnc)\n", + "- docker （https://docs.docker.com/engine/install; ps. Colab doesn't support docker, you need to use your jupyter notebook to run these codes) " + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "GNVlNZEo7kL2" + }, + "source": [ + "#### 1. Pull the environment" ] }, { "cell_type": "code", - "execution_count": 39, + "execution_count": 1, "metadata": {}, - "outputs": [], + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "latest: Pulling from b224hisl/open3dflow\n", + "Digest: sha256:9c3d749d616d89b7e1b938f5bdd9cd7446bfb51aecb905d1962a49de9aef2942\n", + "Status: Image is up to date for b224hisl/open3dflow:latest\n", + "docker.io/b224hisl/open3dflow:latest\n" + ] + } + ], + "source": [ + "# pull our image:\n", + "!docker pull b224hisl/open3dflow:latest #For it's about 15GB, it may take a while\n", + "!docker tag b224hisl/open3dflow test # rename your environment" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "5GvkCWk47kL2" + }, + "source": [ + "#### 2. Clone our source code\n", + " The codes include: riscv32i RTL, gf180 sram marco file, back-end scripts, Open3DFlow platform, thermal config etc." + ] + }, + { + "cell_type": "code", + "execution_count": 21, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Cloning into 'Open3DFlow'...\n", + "remote: Enumerating objects: 824, done.\u001b[K\n", + "remote: Counting objects: 100% (34/34), done.\u001b[K\n", + "remote: Compressing objects: 100% (27/27), done.\u001b[K\n", + "remote: Total 824 (delta 7), reused 27 (delta 5), pack-reused 790\u001b[K\n", + "Receiving objects: 100% (824/824), 113.77 MiB | 4.14 MiB/s, done.\n", + "Resolving deltas: 100% (197/197), done.\n", + "Updating files: 100% (787/787), done.\n", + "Already up to date.\n" + ] + } + ], + "source": [ + "!git clone https://github.com/b224hisl/Open3DFlow.git\n", + "!cd Open3DFlow\n", + "!git pull\n", + "!cd .." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "#### 3. TSV Modeling\n", + "spice simulation in KiCAD: (This has been integrated into our environment but we cannot open its gui in this notebook, so we just put the codes here and simulation results are in previous section)" + ] + }, + { + "cell_type": "code", + "execution_count": 3, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Writing tsv.spice\n" + ] + } + ], + "source": [ + "%%writefile tsv.spice\n", + "## take frequency of 80Mhz for example\n", + ".title KiCad schematic\n", + ".save all\n", + ".probe alli\n", + ".probe p(C_insulator3)\n", + ".probe p(C_insulator4)\n", + ".probe p(R_TSV3)\n", + ".probe p(L_TSV2)\n", + ".probe p(R_TSV4)\n", + ".probe p(V2)\n", + ".probe p(C_insulator2)\n", + ".probe p(L_TSV1)\n", + ".probe p(R_TSV1)\n", + ".probe p(C_insulator1)\n", + ".probe p(V3)\n", + ".probe p(R_TSV2)\n", + ".probe p(C_IMD1)\n", + ".probe p(C_Si1)\n", + ".probe p(C_RDL1)\n", + ".probe p(R_Si1)\n", + ".tran 31.25p 12.5n 0\n", + "C_insulator3 unconnected-_C_insulator3-Pad1_ Net-_C_IMD1-Pad2_ 164.343f\n", + "C_insulator4 Net-_C_RDL1-Pad2_ Net-_C_insulator4-Pad2_ 164.343f\n", + "R_TSV3 Net-_C_IMD1-Pad2_ unconnected-_R_TSV3-Pad2_ 0.00347282\n", + "L_TSV2 Net-_C_insulator4-Pad2_ Net-_L_TSV2-Pad2_ 6.19242p\n", + "R_TSV4 unconnected-_R_TSV4-Pad1_ GND 0.03\n", + "V2 Net-_C_IMD1-Pad2_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", + "C_insulator2 Net-_C_insulator2-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", + "L_TSV1 Net-_C_insulator2-Pad1_ Net-_L_TSV1-Pad2_ 6.19242p\n", + "R_TSV1 Net-_C_IMD1-Pad1_ Net-_L_TSV1-Pad2_ 0.00347282\n", + "C_insulator1 Net-_C_IMD1-Pad1_ Net-_C_RDL1-Pad1_ 164.343f\n", + "V3 unconnected-_V3-Pad1_ GND PULSE( 0 1.8 0n 0n 0n 6.25n 12.5n )\n", + "R_TSV2 unconnected-_R_TSV2-Pad1_ GND 0.03\n", + "C_IMD1 unconnected-_C_IMD1-Pad1_ Net-_C_IMD1-Pad2_ 4.11862e-16\n", + "C_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 1.27899f\n", + "C_RDL1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 2.79443e-16\n", + "R_Si1 Net-_C_RDL1-Pad1_ Net-_C_RDL1-Pad2_ 27188\n", + ".end" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "zhOlzyTg7kL2" + }, + "source": [ + "#### 4. Chip hardeninng" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "hlB-TWHN7kL2" + }, "source": [ - "!cp -r ./Open3DFlow/thermal ./Thermal_sim" + "i) write the configuration files of the core die and cache die:" ] }, { "cell_type": "code", - "execution_count": 40, + "execution_count": 4, "metadata": {}, "outputs": [ { "name": "stdout", "output_type": "stream", "text": [ - "Overwriting Results/script2.sh\n" + "Writing core_die.mk\n" ] } ], "source": [ - "%%writefile Results/script2.sh\n", - "#!/bin/bash\n", - "cd /Thermal_sim/\n", - "git clone https://github.com/uvahotspot/HotSpot.git\n", - "cd HotSpot && make SUPERLU=1\n", - "mv ../thermal/ ./examples/\n", - "cd examples/thermal\n", - "sh run.sh\n", - "cp outputs/*.png /Work_dir/" - ] - }, - { - "cell_type": "code", - "execution_count": 42, - "metadata": {}, - "outputs": [ - { - "name": "stdout", - "output_type": "stream", - "text": [ - "Cloning into 'HotSpot'...\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotspot.c\n", - "hotspot.c: In function 'read_names':\n", - "hotspot.c:190:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 190 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "hotspot.c: In function 'read_vals':\n", - "hotspot.c:224:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 224 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotspot.c > hotspot.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c microchannel.c\n", - "microchannel.c: In function 'microchannel_build_network':\n", - "microchannel.c:296:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 296 | fgets(line, MAX_LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "microchannel.c:324:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 324 | fgets(line, MAX_LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 microchannel.c > microchannel.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c materials.c\n", - "materials.c: In function 'materials_add_from_file':\n", - "materials.c:31:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 31 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "materials.c:82:5: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 82 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 materials.c > materials.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature.c > temperature.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c RCutil.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 RCutil.c > RCutil.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c package.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 package.c > package.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_block.c\n", - "temperature_block.c: In function 'read_temp_block':\n", - "temperature_block.c:631:4: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 631 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c:659:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 659 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c:677:2: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 677 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_block.c: In function 'read_power_block':\n", - "temperature_block.c:744:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 744 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_block.c > temperature_block.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c temperature_grid.c\n", - "temperature_grid.c: In function 'parse_layer_file':\n", - "temperature_grid.c:631:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 631 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'count_num_layers':\n", - "temperature_grid.c:770:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 770 | fgets(line, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'read_temp_grid':\n", - "temperature_grid.c:1573:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1573 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1605:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1605 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1623:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1623 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c: In function 'read_power_grid':\n", - "temperature_grid.c:1709:17: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1709 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1733:7: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1733 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "temperature_grid.c:1742:11: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1742 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 temperature_grid.c > temperature_grid.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp.c\n", - "flp.c: In function 'flp_count_units':\n", - "flp.c:1015:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1015 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_blks':\n", - "flp.c:1070:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1070 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_connects':\n", - "flp.c:1138:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 1138 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_create_grid':\n", - "flp.c:548:43: warning: '%d' directive writing between 1 and 10 bytes into a region of size between 0 and 511 [-Wformat-overflow=]\n", - " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", - " | ^~\n", - "flp.c:548:39: note: directive argument in the range [0, 2147483647]\n", - " 548 | sprintf(grid->units[count].name, \"%s_%d\", flp->units[i].name, grid_num);\n", - " | ^~~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 3 and 523 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_wrap_rim':\n", - "flp.c:722:38: warning: '%s' directive writing up to 511 bytes into a region of size 503 [-Wformat-overflow=]\n", - " 722 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 10 and 521 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:736:38: warning: '%s' directive writing up to 511 bytes into a region of size 502 [-Wformat-overflow=]\n", - " 736 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 11 and 522 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:752:38: warning: '%s' directive writing up to 511 bytes into a region of size 504 [-Wformat-overflow=]\n", - " 752 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 9 and 520 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:766:38: warning: '%s' directive writing up to 511 bytes into a region of size 501 [-Wformat-overflow=]\n", - " 766 | sprintf(flp->units[n+j].name, \"%s_%s\",\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 12 and 523 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c: In function 'flp_populate_connects':\n", - "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 1156 | x = get_blk_index(flp, name1);\n", - " | ~~~~~\n", - "......\n", - " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp.c:1399:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 1157 | y = get_blk_index(flp, name2);\n", - " | ~~~~~\n", - "......\n", - " 1399 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp.c > flp.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c flp_desc.c\n", - "flp_desc.c: In function 'desc_count_units':\n", - "flp_desc.c:51:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 51 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c: In function 'desc_populate_blks':\n", - "flp_desc.c:103:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 103 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c: In function 'desc_populate_connects':\n", - "flp_desc.c:155:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 155 | fgets(str1, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "......\n", - " 172 | x = desc_get_blk_index(flp_desc, name1);\n", - " | ~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp_desc.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "flp_desc.c:30:22: warning: '%s' directive writing up to 511 bytes into a region of size 506 [-Wformat-overflow=]\n", - " 30 | sprintf(msg, \"block %s not found\\n\", name);\n", - " | ^~\n", - "......\n", - " 173 | y = desc_get_blk_index(flp_desc, name2);\n", - " | ~~~~~\n", - "In file included from /usr/include/stdio.h:867,\n", - " from flp_desc.c:1:\n", - "/usr/include/x86_64-linux-gnu/bits/stdio2.h:36:10: note: '__builtin___sprintf_chk' output between 18 and 529 bytes into a destination of size 512\n", - " 36 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1,\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - " 37 | __bos (__s), __fmt, __va_arg_pack ());\n", - " | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 flp_desc.c > flp_desc.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c npe.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 npe.c > npe.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c shape.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 shape.c > shape.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c util.c\n" + "%%writefile core_die.mk\n", + "export DESIGN_NICKNAME = riscv32i_3d\n", + "export DESIGN_NAME = core_without_dmem\n", + "# top = dmem + core_without_dmem\n", + "export PLATFORM = 130_180 #sky130 & GF180\n", + "export PLACE_DENSITY = 0.5\n", + "\n", + "export SYNTH_HIERARCHICAL = 1\n", + "export RTLMP_FLOW = True\n", + "export MAX_UNGROUP_SIZE ?= 1000\n", + "\n", + "export VERILOG_FILES = $(sort $(wildcard ./designs/src/riscv32i_3d/*.v))\n", + "export SDC_FILE = ./designs/130_180/$(DESIGN_NICKNAME)/constraint.sdc\n", + "\n", + "export DIE_AREA = 0 0 1200 1000\n", + "export CORE_AREA = 20 20 1180 980\n", + "\n", + "export PLACE_DENSITY_LB_ADDON = 0.12\n", + "export MACRO_PLACE_CHANNEL = 6 6\n", + "export TNS_END_PERCENT = 100\n", + "export MIN_ROUTING_LAYER = met1\n", + "export BONDING_LAYER = Metal4\n", + "export MAX_ROUTING_LAYER = $(BONDING_LAYER)\n", + "\n", + "export IO_CONSTRAINTS = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/io.tcl\n", + "export IS_CHIP = 1\n", + "export MOTHER_PIN_GEN = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/pad_gen.tcl\n", + "export TSV_DELAY = $[from_3D_times]\n", + "export PDN_TCL = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl" + ] + }, + { + "cell_type": "code", + "execution_count": 5, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Writing sram_die.mk\n" ] - }, + } + ], + "source": [ + "%%writefile sram_die.mk\n", + "export DESIGN_NICKNAME = fakeram4\n", + "export DESIGN_NAME = dmem\n", + "export PLATFORM = gf180\n", + "export MOTHER_PLATFORM = 130_180 #sky130 & GF180\n", + "export PLACE_DENSITY = 0.7\n", + "\n", + "export VERILOG_FILES = ./designs/src/riscv32i_3d/dmem_real\n", + "export SDC_FILE = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc\n", + "\n", + "export DIE_AREA = 0 0 1200 1000\n", + "export CORE_AREA = 20 20 1180 980\n", + "\n", + "BLOCKS = gf180mcu_fd_ip_sram__sram256x8m8wm1\n", + "\n", + "export MACRO_PLACEMENT_TCL = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/macro.tcl\n", + "\n", + "export MACRO_PLACE_HALO = 1 1\n", + "export MACRO_PLACE_CHANNEL = 0 0\n", + "\n", + "export PDN_TCL = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl\n", + "\n", + "\n", + "export GPL_ROUTABILITY_DRIVEN = 1\n", + "\n", + "export IS_CHIP = 1\n", + "\n", + "export MIN_ROUTING_LAYER = Metal1\n", + "export MAX_ROUTING_LAYER = Metal3\n", + "\n", + "export MOTHER = riscv32i_3d # mother die is logic part\n", + "export MOTHER_PDK = 130_180\n", + "\n", + "export IO_CONSTRAINTS = ./designs/$(MOTHER_PLATFORM)/$(DESIGN_NICKNAME)/pad_placer.tcl" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "xvJ45AS97kL6" + }, + "source": [ + "ii) Write the script executed in the docker environment:" + ] + }, + { + "cell_type": "code", + "execution_count": 22, + "metadata": {}, + "outputs": [], + "source": [ + "!rm -rf Results\n", + "!mkdir Results" + ] + }, + { + "cell_type": "code", + "execution_count": 23, + "metadata": {}, + "outputs": [ { "name": "stdout", "output_type": "stream", "text": [ - "util.c: In function 'read_str_pairs':\n", - "util.c:334:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 334 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "util.c: In function 'count_significant_lines':\n", - "util.c:540:3: warning: ignoring return value of 'fgets', declared with attribute warn_unused_result [-Wunused-result]\n", - " 540 | fgets(str, LINE_SIZE, fp);\n", - " | ^~~~~~~~~~~~~~~~~~~~~~~~~\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 util.c > util.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c wire.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 wire.c > wire.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotspot hotspot.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -c hotfloorplan.c\n", - "gcc -MM -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 hotfloorplan.c > hotfloorplan.d\n", - "gcc -O3 -I/usr/include/superlu/ -DVERBOSE=1 -DMATHACCEL=0 -DSUPERLU=1 -o hotfloorplan hotfloorplan.o microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o -lm -lblas -lsuperlu\n", - "rm -f libhotspot.a\n", - "ar qcv libhotspot.a microchannel.o materials.o temperature.o RCutil.o package.o temperature_block.o temperature_grid.o flp.o flp_desc.o npe.o shape.o util.o wire.o\n", - "a - microchannel.o\n", - "a - materials.o\n", - "a - temperature.o\n", - "a - RCutil.o\n", - "a - package.o\n", - "a - temperature_block.o\n", - "a - temperature_grid.o\n", - "a - flp.o\n", - "a - flp_desc.o\n", - "a - npe.o\n", - "a - shape.o\n", - "a - util.o\n", - "a - wire.o\n", - "ranlib libhotspot.a\n", - "Computing steady-state temperatures...\n", - "Parsing input files...\n", - "Creating thermal circuit...\n", - "Simulation complete.\n", - "Computing steady-state temperatures...\n", - "Parsing input files...\n", - "Creating thermal circuit...\n", - "Computing temperatures for t = 0.000000e+00...\n", - "Simulation complete.\n", - "succeed\n" + "Writing Results/script.sh\n" + ] + } + ], + "source": [ + "%%writefile Results/script.sh\n", + "#!/bin/bash\n", + "source /home/dependency/oss-cad-suite/environment\n", + "export QT_QPA_PLATFORM=offscreen\n", + "cd /Flow\n", + "\n", + "# sub die\n", + "export DESIGN_CONFIG=./designs/130_180/riscv32i_3d/config.mk\n", + "make clean_all\n", + "make\n", + "cp ./results/130_180/riscv32i_3d/80MHz/6_final.gds /Work_dir/core.gds\n", + "cp ./reports/130_180/riscv32i_3d/80MHz/final_routing.webp.png /Work_dir/core.png\n", + "\n", + "# top die\n", + "export DESIGN_CONFIG=./designs/130_180/fakeram4/config.mk\n", + "make clean_all\n", + "make\n", + "cp ./results/gf180/fakeram4/80MHz/6_final.gds /Work_dir/sram.gds\n", + "cp ./reports/gf180/fakeram4/80MHz/final_routing.webp.png /Work_dir/sram.png\n", + "touch /Work_dir/script_completed.txt" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "onjhYLPf7kL6" + }, + "source": [ + "iii) Harden the Design" + ] + }, + { + "cell_type": "code", + "execution_count": 24, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "\n", + "New 'server1:1 (yzhu)' desktop is server1:1\n", + "\n", + "Starting applications specified in /work/stu/yzhu/.vnc/xstartup\n", + "Log file is /work/stu/yzhu/.vnc/server1:1.log\n", + "\n" + ] + } + ], + "source": [ + "!vncserver" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "!docker run --rm --name thermal_sim -e DISPALY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Thermal_sim:/Thermal_sim -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script2.sh && echo succeed\"" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "#### 5. Thermal Simulation" + ] + }, + { + "cell_type": "code", + "execution_count": 38, + "metadata": {}, + "outputs": [], + "source": [ + "!mkdir Thermal_sim" + ] + }, + { + "cell_type": "code", + "execution_count": 39, + "metadata": {}, + "outputs": [], + "source": [ + "!cp -r ./Open3DFlow/thermal ./Thermal_sim" + ] + }, + { + "cell_type": "code", + "execution_count": 40, + "metadata": {}, + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "Overwriting Results/script2.sh\n" ] } ], + "source": [ + "%%writefile Results/script2.sh\n", + "#!/bin/bash\n", + "cd /Thermal_sim/\n", + "git clone https://github.com/uvahotspot/HotSpot.git\n", + "cd HotSpot && make SUPERLU=1\n", + "mv ../thermal/ ./examples/\n", + "cd examples/thermal\n", + "sh run.sh\n", + "cp outputs/*.png /Work_dir/" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], "source": [ "!docker run --rm --name thermal_sim -e DISPALY=$DISPLAY -v /tmp/.X11-unix:/tmp/.X11-unix -v ${HOME}/.Xauthority:/.Xauthority:ro -v $(pwd)/Thermal_sim:/Thermal_sim -v $(pwd)/Results:/Work_dir --network=host --privileged=true --security-opt seccomp=unconfined test:latest /bin/bash -c \"bash /Work_dir/script2.sh && echo succeed\"" ]