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Ensure all FPGA I/O are at a known state on startup #37

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lethalbit opened this issue Nov 7, 2022 · 0 comments
Open

Ensure all FPGA I/O are at a known state on startup #37

lethalbit opened this issue Nov 7, 2022 · 0 comments
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@lethalbit
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Gateware Gateware related ticket
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v0.1.0

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@lethalbit
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Any unconfigured FPGA I/O will end up floating, and may possibly cause problems, such as driving the transceivers or enabling TERMPWR.

As such we need to ensure that all I/O be explicitly set to a known and safe level.
@lethalbit lethalbit added the Gateware Gateware related ticket label Nov 7, 2022
@lethalbit lethalbit self-assigned this Nov 7, 2022
@lethalbit lethalbit added this to the Software - 0.1.0 milestone May 12, 2023
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@lethalbit lethalbit

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Gateware Gateware related ticket
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Status: Todo
Milestone
v0.1.0
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@lethalbit