sinara HW roadmap

[gkasprow]

Here are WUT priorities in Sinara HW development. The higher on the list, the higher the priority.

• [PCB done] 100MHz Wenzel-class reference with configurable outputs / dividers
• [PCB done] new release of HVAMP32 with much lower noise
• [done] CE certification. We have already started with Booster.
• [on a way] DiPHo SW development
• [on a way] ARTIQ support for SilPA and HVSUP
• [testing] water cooled Booster
• [testing] high power, low noise DC DAC (Magneto). The initial spec says 2A, 20Vpp, 100kHz BW. The main application is magnet control
• [on a way] 2-channel HV DAC. The initial spec is 0-2kV, 1ppm, 18bit resolution
• [on a way] 0.5ppm reference module for, i.e. HV DAC with tuning
• [on a way] new release of SilPA HL, currently under SW development
• [produced] new release of STM system board; many bugs in LVDS assignments found
• [PCB done] DIOT version of Kasli (without adapters)
• **[PCB done] Grabber-DIOT done **
• [PCB done] RF Modulator
• RFSOC SAWG
• [on a way] 12G FMC DAC for CERN DIOT peripheral board (in case phase noise of RFSOC is not satisfying). A student's task is phase noise comparison for RFSOC and JESD204B DAC (AD916x)
• ECDL Laser driver based on Kirdy + Zapper
• consolidated Pounder
• nanosecond 50MHz PI3D2 regulator