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Kasli/Urukul clock simplification #61

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sbourdeauducq opened this issue Oct 22, 2020 · 1 comment
Open

Kasli/Urukul clock simplification #61

sbourdeauducq opened this issue Oct 22, 2020 · 1 comment

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@sbourdeauducq
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Once the Si549 and WRPLL are fully supported and debugged on Kasli 2.0, what do you think about these suggestions:

  1. scrap the Si5324 and clock switch on Kasli. We can lock WRPLL (or perhaps a simpler PLL) to the external clock input instead. This will need some work to support various possible input frequencies. The trivial solution would be to use a MMCM and take the clock to 125MHz before it goes into the regular WRPLL.
  2. scrap the internal XO on Urukul. The C grade of the Si549 has +/-20ppm total stability, which is actually better than the +/-25ppm of the CCHD-950-25-100.000. For people who do not want RF interruptions when Kasli is rebooted, either a) develop the Kasli firmware so that there are no Si549 glitches on reboot b) use an external oscillator on the Kasli front panel.
@gkasprow
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  1. sure, once it is fully supported (possible input frequencies), we will scrap the Si5324
  2. we can use a lower-cost oscillator on Urukul

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