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I tried to simulate a few toy programs with forvis aka RISCV-ISA-Spec-exe. But up to now, it did not succeed. Are there any specific configuration settings, or compilation settings to know?
All the RV32 and RV64 tests found in the repo, at:
Test_Programs/riscv-tests/isa/
are copied as-is from the following flow:
$ git clone https://github.com/riscv/riscv-tools.git
... follow the directions in riscv-tools/README,
... which builds into a directory called <PREFIX>/riscv
Copy the tests from:
<PREFIX>/riscv/riscv64-unknown-elf/share/riscv-tests/isa/
So: I didn't explicitly set any compiler/linker flags myself, just
followed the above procedure. You'll have to poke around in their
Makefiles to see what compiler/linker flags they used, and replicate
them for your own compiles.
In the above builds, note that it compiles all the tests into
addresses 0x8000_0000 onwards, which is where you're encountering a
trap. Forvis has a 'boot ROM' at 0x1000 which executes about 5
instructions before jumping to 0x8000_0000; in your case, it looks
like there is not a legal instruction there, and so it traps.
Would you accept a pull request that adds an extra program option, so that we jump to the location of the _start symbol, if found in the elf file, instead of 0x80000000?
hello,
I tried to simulate a few toy programs with
forvis
aka RISCV-ISA-Spec-exe. But up to now, it did not succeed. Are there any specific configuration settings, or compilation settings to know?Thank you,
I am using riscv-gcc for RV32-IM cores:
A simple test program to start with:
Simulation test:
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