From 442b6622528aa6fcebfb15dc6a1fe74516517757 Mon Sep 17 00:00:00 2001
From: Wilfried Chauveau <wilfried.chauveau@ithinuel.me>
Date: Mon, 4 Sep 2023 16:00:05 +0100
Subject: [PATCH] update changelog

---
 rp2040-hal/CHANGELOG.md | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/rp2040-hal/CHANGELOG.md b/rp2040-hal/CHANGELOG.md
index 77a1da894..7aa51cc1a 100644
--- a/rp2040-hal/CHANGELOG.md
+++ b/rp2040-hal/CHANGELOG.md
@@ -5,6 +5,17 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [Unreleased]
+
+## Fixed
+
+- Fixed minimum PLL's VCO frequency according to updated datasheet - @ithinuel
+
+### Added
+
+- Support for GPin0 and GPin1 clock sources - @ithinuel
+- Clock frequency approximation function using the frequency counter - @ithinuel
+
 ## [0.9.0]
 
 ### MSRV