From 1f7ebeb22b87b532e7fd72996cb7536e6602682a Mon Sep 17 00:00:00 2001
From: aurelf <aurelien.francillon@eurecom.fr>
Date: Tue, 19 Mar 2024 01:33:56 +0300
Subject: [PATCH] Basic support for riscv (#42)

* Basic support for riscv
* Add build of SymQEMU for Risc-V in Dockerfile

---------

Co-authored-by: Vlada Logunova <38584695+Antwy@users.noreply.github.com>
---
 Dockerfile         | 2 +-
 target/riscv/cpu.c | 7 +++++++
 target/riscv/cpu.h | 2 ++
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/Dockerfile b/Dockerfile
index d0d4ec9548..df38b8cca9 100644
--- a/Dockerfile
+++ b/Dockerfile
@@ -32,7 +32,7 @@ RUN ./configure                                                       \
           --disable-opengl                                            \
           --disable-virglrenderer                                     \
           --disable-werror                                            \
-          --target-list=x86_64-linux-user                             \
+          --target-list=x86_64-linux-user,riscv64-linux-user          \ 
           --enable-debug                                              \
           --symcc-source=/symcc                                       \
           --symcc-build=/symcc/build
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 83c7c0cf07..d5fa0f3315 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -37,6 +37,9 @@
 #include "tcg/tcg-cpu.h"
 #include "tcg/tcg.h"
 
+#define SymExpr void*
+#include "RuntimeCommon.h"
+
 /* RISC-V CPU definitions */
 static const char riscv_single_letter_exts[] = "IEMAFDQCPVH";
 const uint32_t misa_bits[] = {RVI, RVE, RVM, RVA, RVF, RVD, RVV,
@@ -1213,6 +1216,10 @@ static void riscv_cpu_post_init(Object *obj)
 
 static void riscv_cpu_init(Object *obj)
 {
+    RISCVCPU *cpu = RISCV_CPU(obj);
+    memset(cpu->env_exprs, 0, sizeof(cpu->env_exprs));
+    _sym_register_expression_region(cpu->env_exprs, sizeof(cpu->env_exprs));
+
 #ifndef CONFIG_USER_ONLY
     qdev_init_gpio_in(DEVICE(obj), riscv_cpu_set_irq,
                       IRQ_LOCAL_MAX + IRQ_LOCAL_GUEST_MAX);
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index d74b361be6..cc7fa18c4b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -424,6 +424,8 @@ struct ArchCPU {
     CPUState parent_obj;
 
     CPURISCVState env;
+    /* space for symbolic expressions corresponding to env */
+    void *env_exprs[512 + 1];   /* TCG_MAX_TEMPS + 1 (for NULL) */
 
     char *dyn_csr_xml;
     char *dyn_vreg_xml;