From a7ebeedaabe2164a19beeead1d4b1a56d5f5d7cd Mon Sep 17 00:00:00 2001 From: billow Date: Fri, 2 Feb 2024 15:51:48 +0800 Subject: [PATCH] v850: fix ld --- librz/analysis/arch/v850/v850_il.c | 7 +- test/db/analysis/v850 | 332 +++++++++++++++++++++++++++++ 2 files changed, 336 insertions(+), 3 deletions(-) diff --git a/librz/analysis/arch/v850/v850_il.c b/librz/analysis/arch/v850/v850_il.c index 62f58c492c4..3e66223c6a4 100644 --- a/librz/analysis/arch/v850/v850_il.c +++ b/librz/analysis/arch/v850/v850_il.c @@ -622,10 +622,11 @@ static RzAnalysisLiftedILOp lift_ld(const V850AnalysisContext *ctx) { SETL("_adr", addr), SETG(GR_get(reg_dst), src_val)); } else { - return SEQ3( + return SEQ4( SETL("_adr", addr), - SETG(GR_get(reg_dst), UNSIGNED(32, src_val)), - SETG(GR_get(reg_dst + 1), UNSIGNED(32, shr0(src_val, U32(32))))); + SETL("_src_v", src_val), + SETG(GR_get(reg_dst), UNSIGNED(32, VARL("_src_v"))), + SETG(GR_get(reg_dst + 1), UNSIGNED(32, shr0(VARL("_src_v"), U32(32))))); } err: return NULL; diff --git a/test/db/analysis/v850 b/test/db/analysis/v850 index fd81ca93499..2d57bec6ce6 100644 --- a/test/db/analysis/v850 +++ b/test/db/analysis/v850 @@ -452,6 +452,338 @@ gp = 0 EOF RUN +NAME=v850 plf @@F functions hello-v850e +FILE=bins/v850/hello-v850e +CMDS=< 0x00101336 ld.w 32[sp], r8 ; vfprintf.c:1240 +| ||||||| 0x0010133a ld.w 36[sp], r9 +| ||||||| 0x0010133e st.w r11, 20[sp] +| ||||||| 0x001014b2 ld.w 48[sp], r11 ; vfprintf.c:1330 +| ||||||| 0x001014be cmp 1, r11 ; vfprintf.c:1331 +| ||||||| 0x001014c0 st.w r10, 20[sp] ; vfprintf.c:1330 +| ========< 0x001014c4 ble 0x101bea ; vfprintf.c:1331 +| ||||||| 0x001014c8 ld.w 20[sp], r10 ; vfprintf.c:1332 +| ||||||| 0x001014d4 add r11, r10 ; vfprintf.c:1332 +| ||||||| 0x0010183a ld.dw 33417[sp], r16 +| ||||||| 0x00101870 andi 1, r2, r10 ; vfprintf.c:1337 +| ||||||| 0x00101874 ld.w 40[sp], r12 ; vfprintf.c:1338 +| ||||||| 0x00101880 cmp 0, r10 ; vfprintf.c:1339 +| ||||||| 0x0010195a ld.dw 33417[sp], r16 +| --------> 0x00101978 ld.w 40[sp], r10 ; vfprintf.c:1337 +| ||||||| 0x00101bee cmp 0, r11 ; vfprintf.c:1331 +| |`-> 0x00101f46 mov 0, r9 ; _exit.c:33 +| | || 0x001021d4 ld.w 92[sp], r10 ; dtoa.c:336 +| | || 0x001021dc add r12, r10 ; dtoa.c:336 +| || || 0x0010225a ld.dw 33225[sp], r16 +| || || 0x001022a4 ld.dw 33481[sp], r16 +| || || 0x00102332 ld.dw 28873[sp], r14 +| || || 0x00102338 +| || || 0x0010233e sldh 0[ep] r0 +| | ,===< 0x001024b2 jr 0x112222, r0 ; dtoa.c:330 +| |||||| 0x00102534 ld.w 36[sp], r11 ; dtoa.c:433 +| |||||| 0x00102592 ld.dw 33225[sp], r16 +| ========< 0x001025fc be 0x103366 +| |||||| 0x001026b6 ld.dw 33609[sp], r16 +| |||||| 0x0010272a st.dw 33615[sp], r16 +| |||||| 0x00102748 st.dw 33231[sp], r16 +| |||||| 0x00102790 ld.dw 33225[sp], r16 +| |||||| 0x001027a0 st.dw 33231[sp], r16 +| ========< 0x001027c0 be 0x1033d8 +| |||||| 0x00102854 ld.dw 33097[sp], r16 ; dtoa.c:556 +| |||||| 0x001028b0 ld.dw 25033[sp], r12 +| |||||| 0x00102964 sub r10, r22 ; dtoa.c:633 +| ||||||| 0x00102f48 movea 0x31, r0, r10 ; dtoa.c:833 +| ========< 0x00102f56 be 0x10333a +| ========< 0x00102fec be 0x1033fe +| ||||||| 0x00103000 ld.dw 25033[sp], r12 +| ========< 0x00103038 be 0x103350 +| ========< 0x00103134 be 0x1033ea +| ||||||| 0x00103152 ld.dw 33097[sp], r16 ; dtoa.c:572 +| ========< 0x0010320e be 0x1033ea +| ||||||| 0x0010323c ld.dw 33225[sp], r16 +| ||||||| 0x00103250 st.dw 33615[sp], r16 +| ||||||| 0x0010326a ld.dw 33225[sp], r16 +| ||||||| 0x00103290 ld.dw 33225[sp], r16 +| ||||||| 0x00103300 nop +| ||||||| 0x00103302 st.dw 25039[sp], r12 +| ||||||| 0x00103308 +| ||||||| 0x0010330e sldh 0[ep] r0 +| ========< 0x00103310 bne 0x1001023ba +| ||||||| 0x00103314 movea 0x30, r0, r14 ; dtoa.c:526 +| ||||||| 0x00103318 ld.b -1[r10], r11 +| ||||||| 0x0010331c mov r10, r28 +| ||||||| 0x0010331e add -1, r10 +| ||||||| 0x00103320 cmp r14, r11 +| ========< 0x00103322 be 0x103318 +| ||||||| 0x00103324 addi 1, r18, r10 +| ||||||| 0x00103328 st.w r10, 36[sp] +| ||||||| 0x0010332c mov sym.__Bfree, r10 +| ||||||| 0x00103332 st.w r10, 28[sp] +| ========< 0x00103336 jr 0x112b0e, r0 +| --------> 0x0010333a ld.w 88[sp], r12 ; dtoa.c:601 +| ||||||| 0x0010333e movea 0x36, r0, r10 +| ||||||| 0x00103342 mov r22, r24 ; dtoa.c:592 +| ||||||| 0x00103344 mov r25, r14 ; dtoa.c:601 +| ||||||| 0x00103346 sub r12, r10 +| ||||||| 0x00103348 add r10, r26 +| ||||||| 0x0010334a add r10, r22 +| ========< 0x0010334c jr 0x112928, r0 +| --------> 0x00103350 ld.w 4[sp], r10 +| ||||||| 0x00103354 ld.w 8[sp], r11 +| ||||||| 0x00103358 st.w r10, 12[sp] +| ||||||| 0x0010335c st.w r11, 16[sp] +| ||||||| 0x00103360 mov 2, r10 ; dtoa.c:437 +| ========< 0x00103362 jr 0x1125d4, r0 +| --------> 0x00103366 cmp 0, r28 ; dtoa.c:467 +| ========< 0x00103368 be 0x100102f6a +| ||||||| 0x0010336c ld.w 76[sp], r14 ; dtoa.c:469 +| ||||||| 0x00103370 cmp 0, r14 +| ========< 0x00103372 ble 0x1001023ba +| ||||||| 0x00103376 movhi 16420, r0, r11 ; dtoa.c:471 +| ||||||| 0x0010337a st.w r0, 28[sp] +| ||||||| 0x0010337e st.w r11, 32[sp] +| ||||||| 0x00103382 ld.dw 24777[sp], r12 +| ||||||| 0x00103388 ld.dw 33225[sp], r16 +| ||||||| 0x0010338e movhi 16412, r0, r11 ; dtoa.c:476 +| ||||||| 0x00103392 add 1, r10 ; dtoa.c:474 +| ||||||| 0x00103394 st.w r11, 56[sp] ; dtoa.c:476 +| ||||||| 0x00103398 ; dtoa.c:473 +| ||||||| 0x0010339e +| ||||||| 0x001033a4 nop +| ||||||| 0x001033a6 ; dtoa.c:476 +| ||||||| 0x001033ac sldh 0[ep] r10 +| ||||||| 0x001033ae ld.dw 25417[sp], r12 +| ||||||| 0x001033b4 +| ||||||| 0x001033ba add r15, r10 +| ||||||| 0x001033bc nop +| ||||||| 0x001033be ld.w 36[sp], r11 ; dtoa.c:472 +| ||||||| 0x001033c2 ld.w 32[sp], r10 ; dtoa.c:477 +| ||||||| 0x001033c6 ld.w 28[sp], r15 ; dtoa.c:476 +| ||||||| 0x001033ca addi -1, r11, r18 ; dtoa.c:472 +| ||||||| 0x001033ce movhi 64704, r0, r11 ; dtoa.c:473 +| ||||||| 0x001033d2 add r11, r10 +| ========< 0x001033d4 jr 0x112656, r0 ; dtoa.c:478 +| --------> 0x001033d8 ld.w 36[sp], r11 ; dtoa.c:578 +| ||||||| 0x001033dc movea 0x31, r0, r12 +| ||||||| 0x001033e0 add 1, r11 +| ||||||| 0x001033e2 st.w r11, 36[sp] +| ========< 0x001033e6 jr 0x1127d4, r0 +| --------> 0x001033ea movea 0x39, r0, r10 ; dtoa.c:794 +| ||||||| 0x001033ee mov r29, r27 ; dtoa.c:795 +| ||||||| 0x001033f0 movea 0x39, r0, r12 +| ||||||| 0x001033f4 mov r26, r29 +| ||||||| 0x001033f6 st.b r10, 0[r24] ; dtoa.c:794 +| ========< 0x001033fa jr 0x112ac2, r0 ; dtoa.c:795 +| --------> 0x001033fe mov 0, r25 ; dtoa.c:480 +| ========< 0x00103450 be 0x1033ea +| 0x001036e8 mov 0, r10 ; findfp.c:334 +| 0x001037da cmp 0, r10 ; findfp.c:133 +| ,=< 0x001037de be 0x1037fa ; findfp.c:133 +| 0x00103912 prepare {r25 - r29, lp}, 0 ; mallocr.c:3314 +| 0x00103918 mov obj.___malloc_av, r26 ; mallocr.c:3324 +| 0x0010391e mov r6, r27 ; mallocr.c:3314 +| 0x00103920 jarl sym.___malloc_lock, lp ; mallocr.c:3322 ; __malloc_lock(struct _reent *ptr) +| 0x00103924 ld.w 8[r26], r11 ; mallocr.c:3324 +| 0x00103928 movea 0xfff, r0, r10 ; mallocr.c:3327 +| 0x0010392c ld.w 4[r11], r28 ; mallocr.c:3324 +| 0x00103934 movea 0xfffff000, r0, r11 ; mallocr.c:3325 +| 0x00103942 cmp r10, r29 ; mallocr.c:3327 +| | 0x00103946 mov 0, r7 ; mallocr.c:3336 +| | 0x00103954 ld.w 8[r26], r11 ; mallocr.c:3337 +| |`-> 0x0010395e mov r27, r6 ; mallocr.c:3329 +| | 0x00103964 mov 0, r10 ; mallocr.c:3330 +| | 0x00103966 dispose 0, {r25 - r29, lp}, lp ; mallocr.c:3373 +| `--> 0x0010396a mov r29, r7 ; mallocr.c:3345 +| 0x00103974 cmp -1, r10 ; mallocr.c:3347 +| | 0x00103978 mov obj.___malloc_current_mallinfo, r11 ; mallocr.c:3365 +| | 0x00103982 ld.w 0[r11], r10 ; mallocr.c:3366 +| | 0x00103986 sub r29, r28 ; mallocr.c:3365 +| | 0x0010398c mov r27, r6 ; mallocr.c:3368 +| | 0x0010398e subr r10, r29 ; mallocr.c:3366 +| | 0x00103990 st.w r28, 4[r12] ; mallocr.c:3365 +| | 0x00103994 st.w r29, 0[r11] ; mallocr.c:3366 +| | 0x00103998 jarl sym.___malloc_unlock, lp ; mallocr.c:3367 ; __malloc_unlock(struct _reent *ptr) +| | 0x0010399c mov 1, r10 ; mallocr.c:3369 +| | 0x0010399e dispose 0, {r25 - r29, lp}, lp ; mallocr.c:3373 +| `-> 0x001039a2 mov 0, r7 ; mallocr.c:3350 +| 0x001039aa ld.w 8[r26], r12 ; mallocr.c:3351 +| 0x001039b2 cmp 15, r11 ; mallocr.c:3352 +| | 0x001039b6 mov obj.___malloc_sbrk_base, r13 ; mallocr.c:3354 +| | 0x001039bc ori 1, r11, r11 ; mallocr.c:3355 +| | 0x001039c0 ld.w 0[r13], r13 ; mallocr.c:3354 +| | 0x001039c4 st.w r11, 4[r12] ; mallocr.c:3355 +| | 0x001039c8 mov obj.___malloc_current_mallinfo, r11 ; mallocr.c:3354 +\ |,===< 0x001039d4 br 0x10395e ; mallocr.c:3355 +| 0x00103c72 prepare {r25 - r29, lp}, 0 ; fwalk.c:33 +| 0x00103e62 addi -48, sp, sp ; mallocr.c:2333 +| 0x00103e6e st.w r27, 8[sp] ; mallocr.c:2333 +| 0x00103e74 st.w lp, 44[sp] ; mallocr.c:2333 +| ||| ||| 0x00103f94 cmp 15, r10 ; mallocr.c:2433 +| ========< 0x00103fa4 bge 0x10433a ; mallocr.c:2447 +| |||| || 0x00104330 addi 8, r28, r10 +| |||| || 0x00104334 shr 3, r14 +| ,=======< 0x00104336 jr 0x113eb8, r0 +| --------> 0x0010433a add r29, r15 ; mallocr.c:2449 +| |||| || 0x0010433c mov r27, r6 ; mallocr.c:2451 +| |||| || 0x0010433e ld.w 4[r15], r10 ; mallocr.c:2449 + ; XREFS: UNKNOWN 0x0010332e UNKNOWN 0x0010340e +| 0x001047d8 movhi 65535, r0, r10 ; mprec.c:233 +| 0x001048ee ld.w 16[r7], r27 ; mprec.c:337 +| 0x001048f8 cmp r26, r27 ; mprec.c:337 +| | 0x00104c50 shl 2, r11 ; mprec.c:533 +| | 0x00104c9c shl 2, r11 ; mprec.c:533 +| 0x00104e0e movhi 32752, r0, r11 ; mprec.c:633 +| ,=======< 0x0010531c be 0x10533e +| |,======< 0x00105330 bne 0x10531a +| || | || 0x00105332 st.w r0, 8[r24] ; vfprintf.c:435 +| || | || 0x00105336 st.w r0, 4[r24] ; vfprintf.c:436 +| || | || 0x0010533a dispose 0, {r21 - r29, lp}, lp ; vfprintf.c:437 +| `-------> 0x0010533e ld.w 8[r24], r10 +| |,=====< 0x00105352 br 0x105332 +| || | `-> 0x00105354 jarl dbg.__sfvwrite_r, lp ; vfprintf.c:433 ; int __sfvwrite_r(struct _reent *ptr, FILE *fp, struct __suio *uio) +| | |||| 0x00105470 add 1, r28 ; vfprintf.c:933 +| | |||| 0x00105494 st.b r0, 33[sp] ; vfprintf.c:939 +| | |||| 0x001054c2 st.b r0, 33[sp] ; vfprintf.c:1657 +| --------> 0x001054fe ld.b 33[sp], r17 +| | |||| 0x0010550c addi 33, sp, r10 +| --------> 0x00106260 st.b r6, 33[sp] +| 0x00106332 addi 104, sp, r12 ; vfprintf.c:472 +| 0x00106336 movea 0x400, r0, r11 ; vfprintf.c:473 +| 0x0010633a st.w r10, 100[sp] ; vfprintf.c:466 +| 0x0010633e ld.h 14[r29], r10 ; vfprintf.c:467 +| 0x001065ae ld.w 4[sp], r8 ; fiprintf.c:33 +| | 0x00106c5c cmp 0, r8 ; mbtowc_r.c:33 +| | |`-> 0x00106c7a cmp 0, r8 ; mbtowc_r.c:33 +| |,===< 0x00106c7e bne 0x106c60 ; mbtowc_r.c:33 +| ========< 0x00107330 be 0x1073aa +| | || || 0x00107332 ld.h 12[r29], r10 +| | || || 0x00107336 andi 1, r10, r10 +| | || || 0x0010733a cmp 0, r10 +| ========< 0x0010733c be 0x107342 +| | || || 0x0010733e cmp 10, r28 +| |`--> 0x00107404 movea 0x8a, r0, r11 ; wcrtomb.c:33 +| || 0x001077d6 cmp r11, r13 ; fp-bit.c:533 +0x100332 (seq (set _adr (+ (var sp) (bv 32 0x7c))) (storew 0 (var _adr) (var r10))) +0x100336 (seq (set _adr (+ (var sp) (bv 32 0x78))) (storew 0 (var _adr) (var r17))) +0x10033a (branch (! (|| (^^ (! (is_zero (& (>> (var PSW) (bv 32 0x1) false) (bv 32 0x1)))) (! (is_zero (& (>> (var PSW) (bv 32 0x2) false) (bv 32 0x1))))) (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1)))))) (seq (set _pc (+ (bv 32 0x10033a) (bv 32 0x9a))) (jmp (var _pc))) nop) +0x10033e (seq (set result (+ (var r29) (bv 32 0x8))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r29)) (! (== (var result) (var r29)))) (&& (sle (var result) (bv 32 0x8)) (! (== (var result) (bv 32 0x8))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r29 (var result))) +0x101330 (set r10 (var r16)) +0x101332 (jmp (bv 32 0x110922)) +0x101336 (seq (set _adr (+ (var sp) (bv 32 0x20))) (set r8 (loadw 0 32 (var _adr)))) +0x10133a (seq (set _adr (+ (var sp) (bv 32 0x24))) (set r9 (loadw 0 32 (var _adr)))) +0x10133e (seq (set _adr (+ (var sp) (bv 32 0x14))) (storew 0 (var _adr) (var r11))) +0x101f4e (seq (set lp (+ (bv 32 0x101f4e) (bv 32 0x4))) (set _pc (+ (bv 32 0x101f4e) (bv 32 0x337e))) (jmp (var _pc))) +0x102332 (seq (set _adr (+ (var sp) (bv 32 0xc))) (set _src_v (loadw 0 64 (var _adr))) (set r14 (cast 32 false (var _src_v))) (set r15 (cast 32 false (>> (var _src_v) (bv 32 0x20) false)))) +0x102338 (set r12 (var r14)) +0x10233e (seq (set _adr (+ (var r0) (bv 32 0x0))) (set ep (let _v (cast 32 false (loadw 0 16 (var _adr))) (>> (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) +0x102f5a (seq (set result (+ (var r10) (bv 32 0x433))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r10)) (! (== (var result) (var r10)))) (&& (sle (var result) (bv 32 0x433)) (! (== (var result) (bv 32 0x433))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x103300 nop +0x103302 (seq (set _adr (+ (var sp) (bv 32 0x1c))) (storew 0 (var _adr) (append (var r13) (var r12)))) +0x103308 (set r14 (var r12)) +0x10330e (seq (set _adr (+ (var r0) (bv 32 0x0))) (set ep (let _v (cast 32 false (loadw 0 16 (var _adr))) (>> (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) +0x103310 (branch (! (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1))))) (seq (set _pc (+ (bv 32 0x103310) (bv 32 0xaa))) (jmp (var _pc))) nop) +0x103314 (set r14 (+ (var r0) (bv 32 0x30))) +0x103318 (seq (set _adr (+ (var r10) (bv 32 0xffffffff))) (set r11 (let _v (cast 32 false (loadw 0 8 (var _adr))) (>> (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))) +0x10331c (set r28 (var r10)) +0x10331e (seq (set result (+ (var r10) (bv 32 0xffffffff))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r10)) (! (== (var result) (var r10)))) (&& (sle (var result) (bv 32 0xffffffff)) (! (== (var result) (bv 32 0xffffffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x103320 (seq (set result (- (var r11) (var r14))) (set PSW (| (| (| (<< (ite (&& (sle (var r14) (var r11)) (! (== (var r14) (var r11)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false)))) +0x103322 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set _pc (+ (bv 32 0x103322) (bv 32 0xfffffff6))) (jmp (var _pc))) nop) +0x103324 (seq (set result (+ (var r10) (bv 32 0x1))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r10)) (! (== (var result) (var r10)))) (&& (sle (var result) (bv 32 0x1)) (! (== (var result) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x103328 (seq (set _adr (+ (var sp) (bv 32 0x24))) (storew 0 (var _adr) (var r10))) +0x10332c (set r10 (bv 32 0x104632)) +0x103332 (seq (set _adr (+ (var sp) (bv 32 0x1c))) (storew 0 (var _adr) (var r10))) +0x103336 (jmp (bv 32 0x112b0e)) +0x10333a (seq (set _adr (+ (var sp) (bv 32 0x58))) (set r12 (loadw 0 32 (var _adr)))) +0x10333e (set r10 (+ (var r0) (bv 32 0x36))) +0x103342 (set r24 (var r22)) +0x103344 (set r14 (var r25)) +0x103346 (seq (set result (- (var r10) (var r12))) (set PSW (| (| (| (<< (ite (&& (sle (var r12) (var r10)) (! (== (var r12) (var r10)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! 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(== (var result) (var r10)))) (&& (sle (var result) (var r15)) (! (== (var result) (var r15))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x1033bc nop +0x1033be (seq (set _adr (+ (var sp) (bv 32 0x24))) (set r11 (loadw 0 32 (var _adr)))) +0x1033c2 (seq (set _adr (+ (var sp) (bv 32 0x20))) (set r10 (loadw 0 32 (var _adr)))) +0x1033c6 (seq (set _adr (+ (var sp) (bv 32 0x1c))) (set r15 (loadw 0 32 (var _adr)))) +0x1033ca (seq (set result (+ (var r18) (bv 32 0xffffffff))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r18)) (! (== (var result) (var r18)))) (&& (sle (var result) (bv 32 0xffffffff)) (! (== (var result) (bv 32 0xffffffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r18 (var result))) +0x1033ce (set r11 (+ (var r0) (bv 32 0xfcc00000))) +0x1033d2 (seq (set result (+ (var r10) (var r11))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r10)) (! (== (var result) (var r10)))) (&& (sle (var result) (var r11)) (! (== (var result) (var r11))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x1033d4 (jmp (bv 32 0x112656)) +0x1033d8 (seq (set _adr (+ (var sp) (bv 32 0x24))) (set r11 (loadw 0 32 (var _adr)))) +0x1033dc (set r12 (+ (var r0) (bv 32 0x31))) +0x1033e0 (seq (set result (+ (var r11) (bv 32 0x1))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r11)) (! (== (var result) (var r11)))) (&& (sle (var result) (bv 32 0x1)) (! (== (var result) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r11 (var result))) +0x1033e2 (seq (set _adr (+ (var sp) (bv 32 0x24))) (storew 0 (var _adr) (var r11))) +0x1033e6 (jmp (bv 32 0x1127d4)) +0x1033ea (set r10 (+ (var r0) (bv 32 0x39))) +0x1033ee (set r27 (var r29)) +0x1033f0 (set r12 (+ (var r0) (bv 32 0x39))) +0x1033f4 (set r29 (var r26)) +0x1033f6 (seq (set _adr (+ (var r24) (bv 32 0x0))) (storew 0 (var _adr) (cast 8 false (var r10)))) +0x1033fa (jmp (bv 32 0x112ac2)) +0x1033fe (set r25 (bv 32 0x0)) +0x104330 (seq (set result (+ (var r10) (bv 32 0x8))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r10)) (! (== (var result) (var r10)))) (&& (sle (var result) (bv 32 0x8)) (! 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(== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r14 (var result))) +0x104336 (jmp (bv 32 0x113eb8)) +0x10433a (seq (set result (+ (var r15) (var r29))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r15)) (! (== (var result) (var r15)))) (&& (sle (var result) (var r29)) (! (== (var result) (var r29))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r15 (var result))) +0x10433c (set r6 (var r27)) +0x10433e (seq (set _adr (+ (var r15) (bv 32 0x4))) (set r10 (loadw 0 32 (var _adr)))) +0x105330 (branch (! (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1))))) (seq (set _pc (+ (bv 32 0x105330) (bv 32 0xffffffea))) (jmp (var _pc))) nop) +0x105332 (seq (set _adr (+ (var r24) (bv 32 0x8))) (storew 0 (var _adr) (var r0))) +0x105336 (seq (set _adr (+ (var r24) (bv 32 0x4))) (storew 0 (var _adr) (var r0))) +0x10533a (seq (set _tmp (+ (var sp) (<< (bv 32 0x0) (bv 32 0x2) false))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set lp (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r29 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r28 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r27 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r26 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r25 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r24 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r23 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r22 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set _adr (& (var _tmp) (bv 32 0xfffffffc))) (set r21 (loadw 0 32 (var _adr))) (set _tmp (+ (var _tmp) (bv 32 0x4))) (set sp (var _tmp)) (jmp (var lp))) +0x10533e (seq (set _adr (+ (var r24) (bv 32 0x8))) (set r10 (loadw 0 32 (var _adr)))) +0x106332 (seq (set result (+ (var r12) (bv 32 0x68))) (set PSW (| (| (| (<< (ite (|| (&& (sle (var result) (var r12)) (! (== (var result) (var r12)))) (&& (sle (var result) (bv 32 0x68)) (! (== (var result) (bv 32 0x68))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r12 (var result))) +0x106336 (set r11 (+ (var r0) (bv 32 0x400))) +0x10633a (seq (set _adr (+ (var sp) (bv 32 0x64))) (storew 0 (var _adr) (var r10))) +0x10633e (seq (set _adr (+ (var r29) (bv 32 0xe))) (set r10 (let _v (cast 32 false (loadw 0 16 (var _adr))) (>> (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) +0x107330 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set _pc (+ (bv 32 0x107330) (bv 32 0x7a))) (jmp (var _pc))) nop) +0x107332 (seq (set _adr (+ (var r29) (bv 32 0xc))) (set r10 (let _v (cast 32 false (loadw 0 16 (var _adr))) (>> (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _v) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) +0x107336 (seq (set result (& (var r10) (bv 32 0x1))) (set PSW (| (| (<< (ite false (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false) (<< (ite false (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false))) (set r10 (var result))) +0x10733a (seq (set result (- (var r10) (bv 32 0x0))) (set PSW (| (| (| (<< (ite (&& (sle (bv 32 0x0) (var r10)) (! (== (bv 32 0x0) (var r10)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false)))) +0x10733c (branch (! (is_zero (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set _pc (+ (bv 32 0x10733c) (bv 32 0x6))) (jmp (var _pc))) nop) +0x10733e (seq (set result (- (var r28) (bv 32 0xa))) (set PSW (| (| (| (<< (ite (&& (sle (bv 32 0xa) (var r28)) (! (== (bv 32 0xa) (var r28)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (<< (ite (let _x (var result) (|| (! (sle (var _x) (bv 32 0x7fffffff))) (&& (sle (var _x) (bv 32 0x80000000)) (! (== (var _x) (bv 32 0x80000000)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false)) (<< (ite (&& (sle (var result) (bv 32 0x0)) (! (== (var result) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false)) (<< (ite (is_zero (var result)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x0) false)))) +EOF +RUN + NAME=v850 s main hello-v850e FILE=bins/v850/hello-v850e CMDS=<