From 255f6fdd0f9d0157aa816d1495d4368d0f54adea Mon Sep 17 00:00:00 2001
From: billow <billow.fun@gmail.com>
Date: Mon, 3 Jun 2024 01:36:50 -0700
Subject: [PATCH] tricore: lift remaining floating point instructions (#4514)

* tricore: fix `mfcr` and `mtcr`
* tricore: `ftoi`
* tricore: fix `round_to_integer`
* tricore: tricore_il_fp.inc
* tricore: fix `ftoi` `ftoiz`
* rzil: Add `rz_il_op_new_float_from_rz_float`
* tricore: add `ftoq31`
* tricore: add `ftou`
* tricore: fix `hptof` and `ftohp`
* tricore: set flags and `itof` `q31tof` `utof`
* tricore: add.f sub.f mul.f div.f
* tricore: qseed.f
* tricore: madd.f msub.f
* tricore: add rzil asm tests
* rzil: validate il op when `aoi`
* tricore : add fp emulateme test
---
 librz/arch/isa/tricore/tricore_il.c         |  164 +-
 librz/arch/isa/tricore/tricore_il.h         |   11 +-
 librz/arch/isa/tricore/tricore_il_fp.inc    |  602 ++++
 librz/arch/p/analysis/analysis_tricore_cs.c |   11 +-
 librz/core/cil.c                            |   17 +
 librz/il/definitions/float.c                |    1 +
 librz/il/il_export_string.c                 |    3 +
 librz/il/il_opcodes.c                       |   51 +-
 librz/il/il_validate.c                      |   64 +-
 librz/include/rz_il/rz_il_opbuilder_begin.h |   16 +-
 librz/include/rz_il/rz_il_opbuilder_end.h   |    2 +-
 librz/include/rz_il/rz_il_opcodes.h         |    1 +
 test/db/analysis/tricore                    |    5 +
 test/db/asm/tricore                         | 2984 ++++++++++++++-----
 test/db/rzil/tricore                        |   30 +
 15 files changed, 2941 insertions(+), 1021 deletions(-)
 create mode 100644 librz/arch/isa/tricore/tricore_il_fp.inc

diff --git a/librz/arch/isa/tricore/tricore_il.c b/librz/arch/isa/tricore/tricore_il.c
index 89385239353..69bd4ba50dd 100644
--- a/librz/arch/isa/tricore/tricore_il.c
+++ b/librz/arch/isa/tricore/tricore_il.c
@@ -184,6 +184,11 @@ static const char *TriCoreREGs[] = {
 	"FPU_TRAP_SRC1",
 	"FPU_TRAP_SRC2",
 	"FPU_TRAP_SRC3",
+	"set_FI",
+	"set_FV",
+	"set_FZ",
+	"set_FU",
+	"set_FX",
 	NULL
 };
 
@@ -403,7 +408,7 @@ static const char *CR_Table(unsigned addr_offset) {
 	case 0xA010: return "FPU_TRAP_SRC1";
 	case 0xA014: return "FPU_TRAP_SRC2";
 	case 0xA018: return "FPU_TRAP_SRC3";
-	default: return NULL;
+	default: break;
 	}
 	return NULL;
 }
@@ -807,91 +812,6 @@ static RzILOpPure *sign_32bit(RzILOpPure *val) {
 	return MSB(val);
 }
 
-// static const ut32 ADD_NAN __attribute__((unused)) = 0x7fc00001;
-// static const ut32 DIV_NAN __attribute__((unused)) = 0x7fc00008;
-// static const ut32 MUL_NAN __attribute__((unused)) = 0x7fc00002;
-// static const ut32 SQRT_NAN __attribute__((unused)) = 0x7fc00004;
-//
-// static const ut32 HP_MAX_VALUE __attribute__((unused)) = 65504;
-// static const ut32 HP_MIN_NORMAL __attribute__((unused)) = 1024 * 16;
-
-static const ut32 HP_NEG_INFINITY = 0xfc00;
-static const ut32 HP_POS_INFINITY = 0x7c00;
-
-// static const ut32 NEG_INFINITY __attribute__((unused)) = 0xff800000;
-// static const ut32 POS_INFINITY __attribute__((unused)) = 0x7f800000;
-
-static inline RzILOpPure *denorm_to_zero(RzILOpFloat *x) {
-	return LET("tmp", x,
-		ITE(AND(FLT(VARLP("tmp"), F32(0.0)), FGT(VARLP("tmp"), F32(powf(-2, -126)))), FNEG(F32(0)),
-			ITE(AND(FGT(VARLP("tmp"), F32(0)), FLT(VARLP("tmp"), F32(powf(2, -126)))), F32(0),
-				VARLP("tmp"))));
-}
-
-/**
- * \brief Convert single precision to a half precision
- *
- * Convert the contents of data register D[a] from IEEE-754-2008 32-bit single precision floating point to IEEE-754-2008
- * 16-bit half precision (data interchange) floating point format. The rounded result is put in data register D[c][15:0].
- * D[c][31:16] is set to zero.
- */
-static RzAnalysisLiftedILOp ftohp(RzAsmTriCoreContext *ctx) {
-	const char *a = R(1);
-	const char *c = R(0);
-
-	// if(sign_32bit(D[a])) then {
-	//	D[c][15:0] = HP_NEG_INFINITY;
-	// } else {
-	//	D[c][15:0] = HP_POS_INFINITY;
-	// }
-	RzILOpEffect *inf_eff = BRANCH(sign_32bit(VARG(a)),
-		SETG(c, U32(HP_NEG_INFINITY)),
-		SETG(c, U32(HP_POS_INFINITY)));
-
-	// D[c][15] = sign_32bit(D[a]);
-	// D[c][14:10] = 1FH;
-	// D[c][9:8] = D[a][22:21];
-	// D[c][7:0] = D[a][7:0];
-	// Ensure NaN value is preserved
-	// if ((D[c][9:0] == 0)) then {
-	//	D[c][8] = 1B;
-	// }
-	RzILOpPure *dc = LOGAND(VARG(a), U32(1U << 31));
-	dc = LOGOR(dc, SHL0(U32(0x1f), 10));
-	dc = LOGOR(dc, SHL0(BITS32(VARG(a), 21, 2), 8));
-	dc = LOGOR(dc, BITS32(VARG(a), 0, 8));
-	RzILOpEffect *nan_eff = SEQ2(SETL("D_c", dc),
-		SETG(c, ITE(EQ(BITS32(VARL("D_c"), 0, 10), U32(0)), BITS32_U(VARL("D_c"), 8, 1, U32(1)), VARL("D_c"))));
-
-	// f = denorm_to_zero(D[a]);
-	// f_rounded = ieee754_round_16bit(f, PSW.RM);
-	// Handle overflow & underflow and convert to 16-bit format
-	// D[a][15:0] = ieee754_16bit_format(f_rounded);
-	RzILOpPure *f = denorm_to_zero(FLOATV32(VARG(a)));
-	//	RzILOpPure *f_rounded = FROUND(/*TODO: PSW_RM()*/ 0, f);
-	RzILOpEffect *else_eff = SETG(c,
-		BITS32_U(VARG(a), 0, 16, UNSIGNED(32, F2BV(FCONVERT(RZ_FLOAT_IEEE754_BIN_16, 0, f)))));
-
-	return BRANCH(IS_FINF(FLOATV32(VARG(a))), inf_eff,
-		BRANCH(IS_FNAN(FLOATV32(VARG(a))), nan_eff, else_eff));
-}
-
-static RzILOpPure *f_real(RzILOpFloat *x) {
-	return x;
-}
-
-static RzAnalysisLiftedILOp ftoiz(RzAsmTriCoreContext *ctx) {
-	RzILOpPure *a = VARG(R(1));
-	const char *cname = R(0);
-	return SETG(cname,
-		ITE(IS_FINF(FLOATV32(a)),
-			U32(0),
-			ITE(SGT(f_real(DUP(a)), U32(0x7FFFFFFF)), U32(0x7FFFFFFF),
-				ITE(SLT(f_real(DUP(a)), U32(0x80000000)),
-					U32(0x80000000),
-					F2SINT(32, RZ_FLOAT_RMODE_RTZ, DUP(a))))));
-}
-
 #define Byte_b       8
 #define HalfWord_b   16
 #define Word_b       32
@@ -940,10 +860,6 @@ static RzILOpPure *reverse16(RzILOpPure *x) {
 	return reflect(x, 16);
 }
 
-static RzILOpPure *is_denorm(RzILOpPure *x) {
-	return AND(IS_ZERO(BITS32(x, 23, 8)), NON_ZERO(BITS32(DUP(x), 0, 23)));
-}
-
 static RzAnalysisLiftedILOp f_cons_(RzILOpEffect *x, RzILOpEffect *y) {
 	if (!(x && x->code == RZ_IL_OP_SEQ)) {
 		goto err;
@@ -2717,7 +2633,6 @@ static RzAnalysisLiftedILOp f_madd(
 	RzAnalysisLiftedILOp xs,
 	const char *name1, const char *name2,
 	RzILOpPure *a, RzILOpPure *b, unsigned arg_n, unsigned i1, unsigned i2, unsigned n) {
-	rz_warn_if_fail(arg_n == 1 || arg_n == 0);
 	Mab(madd_a, madd_b);
 
 	f_cons(xs,
@@ -2745,7 +2660,6 @@ static RzAnalysisLiftedILOp f_mul(
 	RzAnalysisLiftedILOp xs,
 	const char *name1, const char *name2,
 	RzILOpPure *a, RzILOpPure *b, unsigned arg_n, unsigned i1, unsigned i2, unsigned n) {
-	rz_warn_if_fail(arg_n == 1 || arg_n == 0);
 	Mab(mul_a, mul_b);
 
 	f_cons(xs,
@@ -2761,7 +2675,6 @@ static RzAnalysisLiftedILOp f_mulr(
 	RzAnalysisLiftedILOp xs,
 	const char *name1, const char *name2,
 	RzILOpPure *a, RzILOpPure *b, unsigned arg_n, unsigned i1, unsigned i2, unsigned n) {
-	rz_warn_if_fail(arg_n == 1 || arg_n == 0);
 	Mab(mulr_a, mulr_b);
 
 	f_cons(xs,
@@ -2778,7 +2691,6 @@ static RzAnalysisLiftedILOp f_maddr(
 	RzAnalysisLiftedILOp xs, RzAsmTriCoreContext *ctx,
 	const char *name1, const char *name2, const char *name3,
 	RzILOpPure *a, RzILOpPure *b, unsigned arg_n, unsigned i1, unsigned i2, unsigned n) {
-	rz_warn_if_fail(arg_n == 1 || arg_n == 0);
 	xs = f_mul(xs, name1, name2, a, b, arg_n, i1, i2, n);
 	return f_cons_(xs,
 		SETL(name3,
@@ -3013,6 +2925,8 @@ static RzAnalysisLiftedILOp population_count(
 	return xs;
 }
 
+#include "tricore_il_fp.inc"
+
 RZ_IPI RzAnalysisLiftedILOp tricore_il_op(RzAsmTriCoreContext *ctx, RzAnalysis *a) {
 	ctx->word = rz_read_le32(ctx->insn->bytes);
 	switch (ctx->insn->id) {
@@ -3025,35 +2939,23 @@ RZ_IPI RzAnalysisLiftedILOp tricore_il_op(RzAsmTriCoreContext *ctx, RzAnalysis *
 	case TRICORE_INS_FRET: return fret();
 	case TRICORE_INS_FTOHP: return ftohp(ctx);
 	case TRICORE_INS_FTOIZ: return ftoiz(ctx);
-	case TRICORE_INS_FTOI:
-	case TRICORE_INS_FTOQ31Z:
-	case TRICORE_INS_FTOQ31:
-	case TRICORE_INS_FTOUZ:
-	case TRICORE_INS_FTOU:
-	case TRICORE_INS_HPTOF:
-	case TRICORE_INS_ITOF:
-	case TRICORE_INS_Q31TOF:
-	case TRICORE_INS_DIV_F:
-	case TRICORE_INS_ADD_F:
-	case TRICORE_INS_MADD_F:
-	case TRICORE_INS_MSUB_F:
-	case TRICORE_INS_SUB_F:
-	case TRICORE_INS_MUL_F:
-	case TRICORE_INS_QSEED_F:
-	case TRICORE_INS_UTOF: NOT_IMPLEMENTED;
-	case TRICORE_INS_CMP_F: {
-		const char *rc = R(0);
-		const char *ra = R(1);
-		const char *rb = R(2);
-		return SETG(rc,
-			f_op2_chain6(rz_il_op_new_log_or,
-				BOOL_TO_BV32(FLT(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))),
-				SHL0(BOOL_TO_BV32(FEQ(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))), 1),
-				SHL0(BOOL_TO_BV32(FGT(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))), 2),
-				SHL0(BOOL_TO_BV32(OR(IS_FNAN(FLOATV32(VARG(ra))), IS_FNAN(FLOATV32(VARG(rb))))), 3),
-				SHL0(BOOL_TO_BV32(is_denorm(VARG(ra))), 4),
-				SHL0(BOOL_TO_BV32(is_denorm(VARG(rb))), 5)));
-	}
+	case TRICORE_INS_FTOI: return ftoi(ctx);
+	case TRICORE_INS_FTOQ31Z: return ftoq31z(ctx);
+	case TRICORE_INS_FTOQ31: return ftoq31(ctx);
+	case TRICORE_INS_FTOUZ: return ftouz(ctx);
+	case TRICORE_INS_FTOU: return ftou(ctx);
+	case TRICORE_INS_HPTOF: return hptof(ctx);
+	case TRICORE_INS_ITOF: return itof(ctx);
+	case TRICORE_INS_Q31TOF: return q31tof(ctx);
+	case TRICORE_INS_UTOF: return utof(ctx);
+	case TRICORE_INS_ADD_F: return add_f(ctx);
+	case TRICORE_INS_SUB_F: return sub_f(ctx);
+	case TRICORE_INS_MUL_F: return mul_f(ctx);
+	case TRICORE_INS_DIV_F: return div_f(ctx);
+	case TRICORE_INS_MADD_F: return madd_f(ctx);
+	case TRICORE_INS_MSUB_F: return msub_f(ctx);
+	case TRICORE_INS_QSEED_F: return qseed_f(ctx);
+	case TRICORE_INS_CMP_F: return cmp_f(ctx);
 	case TRICORE_INS_UPDFL: {
 		RzILOpPure *m = BITS32(VARG(R(0)), 8, 8);
 		RzILOpPure *v = BITS32(VARG(R(0)), 0, 8);
@@ -4066,8 +3968,20 @@ RZ_IPI RzAnalysisLiftedILOp tricore_il_op(RzAsmTriCoreContext *ctx, RzAnalysis *
 		}
 		break;
 	}
-	case TRICORE_INS_MFCR: return SETG(R(0), VARG(CR_Table(I(1))));
-	case TRICORE_INS_MTCR: return SETG(CR_Table(I(0)), VARG(R(1)));
+	case TRICORE_INS_MFCR: {
+		const char *cr = CR_Table(I(1));
+		if (!cr) {
+			return NULL;
+		}
+		return SETG(R(0), VARG(cr));
+	}
+	case TRICORE_INS_MTCR: {
+		const char *cr = CR_Table(I(0));
+		if (!cr) {
+			return NULL;
+		}
+		return SETG(cr, VARG(R(1)));
+	}
 	case TRICORE_INS_BMERGE:
 		return SETG(R(0),
 			APPEND(
diff --git a/librz/arch/isa/tricore/tricore_il.h b/librz/arch/isa/tricore/tricore_il.h
index be5d5ebb2bf..bc88fce1d72 100644
--- a/librz/arch/isa/tricore/tricore_il.h
+++ b/librz/arch/isa/tricore/tricore_il.h
@@ -68,17 +68,17 @@ static inline RzILOpPure *BITS32_U(RzILOpPure *val, ut32 i, ut32 n, RzILOpPure *
 }
 
 // ((value >> start) & (~0ULL >> (0x20 - length)))
-static ut32 extract32(ut32 x, ut32 start, ut32 len) {
+static inline ut32 extract32(ut32 x, ut32 start, ut32 len) {
 	return (x >> start) & (~0U >> (0x20 - len));
 }
 
-static RzILOpPure *SEXT32(RzILOpPure *value, ut32 length) {
+static inline RzILOpPure *SEXT32(RzILOpPure *value, ut32 length) {
 	return LET("_sext_val", SIGNED(32, value), rz_il_sextract32(VARLP("_sext_val"), U32(0), U32(length)));
 }
-static RzILOpPure *SEXT64(RzILOpPure *value, ut32 length) {
+static inline RzILOpPure *SEXT64(RzILOpPure *value, ut32 length) {
 	return LET("_sext_val", SIGNED(32, value), rz_il_sextract64(VARLP("_sext_val"), U32(0), U32(length)));
 }
-static RzILOpPure *ZEXT32(RzILOpPure *value, ut32 length) {
+static inline RzILOpPure *ZEXT32(RzILOpPure *value, ut32 length) {
 	return value;
 }
 static inline RzILOpPure *SHL0(RzILOpPure *value, ut32 length) {
@@ -235,4 +235,7 @@ REG_FIELD(TASK_ASI, ASI, 0, 5);
 #undef REG_FIELD_VERS
 #undef REG_FIELD_VER
 
+RZ_IPI RzAnalysisLiftedILOp tricore_il_op(RzAsmTriCoreContext *ctx, RzAnalysis *a);
+RZ_IPI RzAnalysisILConfig *tricore_il_config(RZ_NONNULL RzAnalysis *analysis);
+
 #endif // RIZIN_TRICORE_IL_H
diff --git a/librz/arch/isa/tricore/tricore_il_fp.inc b/librz/arch/isa/tricore/tricore_il_fp.inc
new file mode 100644
index 00000000000..1cfc53d0edd
--- /dev/null
+++ b/librz/arch/isa/tricore/tricore_il_fp.inc
@@ -0,0 +1,602 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+/// The maximum of IEEE-754-2008 16-bit half precision floating point
+static const ut32 HP_MAX_VALUE = 65504;
+/// The minimum positive normalized number of IEEE-754-2008 16-bit half precision floating point
+static const ut32 HP_MIN_NORMAL = 1024 * 16;
+/// This represents all positive numbers that are too big to be represented accurately as a normalized number.
+static const ut32 HP_NEG_INFINITY = 0xfc00;
+/// This represents all negative numbers with an absolute value that is too big to be represented accurately as a normalized number.
+static const ut32 HP_POS_INFINITY = 0x7c00;
+
+#define F2SINT32(x, m) F2SINT(32, m, x)
+
+#define denorm_to_zere_(T, x) \
+	LET("tmp", x, \
+		ITE(AND(FLT(VARLP("tmp"), T(0.0)), FGT(VARLP("tmp"), T(powf(-2, -126)))), FNEG(T(0)), \
+			ITE(AND(FGT(VARLP("tmp"), T(0)), FLT(VARLP("tmp"), T(powf(2, -126)))), T(0), \
+				VARLP("tmp"))))
+
+#define denorm_to_zere64(x) denorm_to_zere_(F64, x)
+
+#define F6432(x)  FCONVERT(RZ_FLOAT_IEEE754_BIN_32, 0, x)
+#define F3264(x)  FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, x)
+#define _32F64(x) F3264(FLOATV32(x))
+#define i32F32(x) SINT2F(RZ_FLOAT_IEEE754_BIN_32, 0, x)
+#define i32F64(x) F3264(i32F32(x))
+
+static inline RzILOpPure *is_denorm(RzILOpPure *x) {
+	return AND(IS_ZERO(BITS32(x, 23, 8)), NON_ZERO(BITS32(DUP(x), 0, 23)));
+}
+
+/**
+ * \brief Returns the Q31 format value ‘x’ as an infinitely accurate real value.
+ */
+static inline RzILOpFloat *q_real(ut32 x) {
+	float y = x & 0x80000000 ? -1.f : 0.f;
+	for (int i = 0; i < 31; ++i) {
+		ut32 m = 1u << (30 - i);
+		float b = 1.f / (float)(2u << i);
+		if (x & m) {
+			y += b;
+		}
+	}
+	RzFloat *value = rz_float_new_from_f32(y);
+	if (!value) {
+		return NULL;
+	}
+	return rz_il_op_new_float_from_rz_float(value);
+}
+
+static inline RzILOpEffect *q_real_set_v(const char *k, RzILOpPure *x) {
+	return SEQ4(
+		SETL("_x", x),
+		SETL("_i", U32(0)),
+		SETL(k, ITE(MSB(VARL("_x")), F32(-1.), F32(0.f))),
+		REPEAT(
+			ULT(VARL("_i"), U32(31)),
+			SEQ4(
+				SETL("_i", ADD(VARL("_i"), U32(1))),
+				SETL("_m", SHIFTL0(U32(1), SUB(U32(30), VARL("_i")))),
+				SETL("_b", FDIV(RZ_FLOAT_RMODE_RNE, F32(1.f), FLOATV32(SHIFTL0(U32(2), VARL("_i"))))),
+				BRANCH(
+					NON_ZERO(LOGAND(VARL("_x"), VARL("_m"))),
+					SETL(k, FADD(0, VARL(k), VARL("_b"))),
+					NOP()))));
+}
+
+#define FCAST_(f, _1, x, mode, _default) \
+	LET("_mode", UNSIGNED(8, mode), \
+		LET("_x", x, \
+			ITE(EQ(VARLP("_mode"), U8(0)), \
+				f(_1, RZ_FLOAT_RMODE_RNE, VARLP("_x")), \
+				ITE(EQ(VARLP("_mode"), U8(1)), \
+					f(_1, RZ_FLOAT_RMODE_RNA, VARLP("_x")), \
+					ITE(EQ(VARLP("_mode"), U8(2)), \
+						f(_1, RZ_FLOAT_RMODE_RTN, VARLP("_x")), \
+						ITE(EQ(VARLP("_mode"), U8(3)), \
+							f(_1, RZ_FLOAT_RMODE_RTP, VARLP("_x")), \
+							ITE(EQ(VARLP("_mode"), U8(4)), \
+								f(_1, RZ_FLOAT_RMODE_RTZ, VARLP("_x")), \
+								_default)))))))
+
+#define FCAST32(f, _1, x, mode) FCAST_(f, _1, x, mode, F32(0))
+#define FCAST64(f, _1, x, mode) FCAST_(f, _1, x, mode, F64(0))
+#define round_to_integer(x, m)  FCAST_(F2SINT, 32, x, m, U32(UT32_MAX))
+
+static RzILOpPure *minmax(const char *k, st64 min, st64 max, RzILOpPure *x) {
+	return ITE(IS_FNAN(VARL(k)),
+		U32(0),
+		ITE(FGT(VARL(k), F64(max)),
+			U32(max),
+			ITE(FLT(VARL(k), F64(min)),
+				U32(min),
+				x)));
+}
+
+// The maximum of the Q31 format value
+#define Q31_MAX q_real(0x7FFFFFFF)
+// The minimum of the Q31 format value
+#define Q31_MIN F32(-1.f)
+
+static RzILOpPure *minmax_q31(const char *k, RzILOpPure *x) {
+	return ITE(FGT(VARL(k), q_real(0x7FFFFFFF)),
+		U32(0x7FFFFFFF),
+		ITE(FLT(VARL(k), F32(-1.0)),
+			U32(0x80000000),
+			x));
+}
+
+#define not_in(x, min, max) OR(FGT(x, max), FLT(DUP(x), min))
+
+#define not_in_q31(x) not_in(x, Q31_MIN, Q31_MAX)
+#define not_in_u32(x) not_in(x, F64(0.f), F64(UT32_MAX))
+#define not_in_i32(x) not_in(x, F64(ST32_MIN), F64(ST32_MAX))
+
+#define set_FPU_s(k, x) SETG("set_" #k, x)
+
+#define set_FPU(k, x) SEQ2( \
+	SETG("set_" #k, x), \
+	BRANCH(VARG("set_" #k), set_PSW_##k(U32(1)), NOP()))
+
+static RzILOpPure *ieee754_16bit_underflow(RzILOpPure *x) {
+	return AND(FLT(x, FLOATV32(U32(HP_MIN_NORMAL))), FGT(DUP(x), F32(0)));
+}
+
+static RzILOpPure *ieee754_16bit_overflow(RzILOpFloat *x) {
+	return FGT(x, FLOATV32(U32(HP_MAX_VALUE)));
+}
+
+#define set_PSW_FSb(x)        set_PSW_FS(BOOL_TO_BV32(x))
+#define set_FS_or_FI_FV_FU_FX set_PSW_FSb(f_op2_chain4(rz_il_op_new_bool_or, VARG("set_FI"), VARG("set_FV"), VARG("set_FU"), VARG("set_FX")))
+
+/**
+ * \brief Convert single precision to a half precision
+ *
+ * Convert the contents of data register D[a] from IEEE-754-2008 32-bit single precision floating point to IEEE-754-2008
+ * 16-bit half precision (data interchange) floating point format. The rounded result is put in data register D[c][15:0].
+ * D[c][31:16] is set to zero.
+ */
+static RzAnalysisLiftedILOp ftohp(RzAsmTriCoreContext *ctx) {
+	const char *a = R(1);
+	const char *c = R(0);
+
+	// if(sign_32bit(D[a])) then {
+	//	D[c][15:0] = HP_NEG_INFINITY;
+	// } else {
+	//	D[c][15:0] = HP_POS_INFINITY;
+	// }
+	RzILOpEffect *inf_eff = BRANCH(sign_32bit(VARG(a)),
+		SETG(c, U32(HP_NEG_INFINITY)),
+		SETG(c, U32(HP_POS_INFINITY)));
+
+	// D[c][15] = sign_32bit(D[a]);
+	// D[c][14:10] = 1FH;
+	// D[c][9:8] = D[a][22:21];
+	// D[c][7:0] = D[a][7:0];
+	// Ensure NaN value is preserved
+	// if ((D[c][9:0] == 0)) then {
+	//	D[c][8] = 1B;
+	// }
+	RzILOpPure *dc = LOGAND(VARG(a), U32(1U << 31));
+	dc = LOGOR(dc, SHL0(U32(0x1f), 10));
+	dc = LOGOR(dc, SHL0(BITS32(VARG(a), 21, 2), 8));
+	dc = LOGOR(dc, BITS32(VARG(a), 0, 8));
+	RzILOpEffect *nan_eff = SEQ2(SETL("D_c", dc),
+		SETG(c, ITE(EQ(BITS32(VARL("D_c"), 0, 10), U32(0)), BITS32_U(VARL("D_c"), 8, 1, U32(1)), VARL("D_c"))));
+
+	// f = denorm_to_zero(D[a]);
+	// f_rounded = ieee754_round_16bit(f, PSW.RM);
+	// Handle overflow & underflow and convert to 16-bit format
+	// D[a][15:0] = ieee754_16bit_format(f_rounded);
+	RzILOpEffect *else_eff =
+		SEQ3(SETL("_fa", denorm_to_zere64(FLOATV32(VARG(a)))),
+			SETL("_f_rounded", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_16, VARL("_fa"), PSW_RM())),
+			SETG(c, BITS32_U(VARG(c), 0, 16, UNSIGNED(32, VARL("_f_rounded")))));
+
+	RzILOpEffect *set_status = SEQ5(
+		set_FPU(FX, FNE(VARL("_fa"), FLOATV32(UNSIGNED(16, VARG(R(1)))))),
+		set_FPU(FU, AND(ieee754_16bit_underflow(VARL("_fa")), VARG("set_FX"))),
+		set_FPU(FV, ieee754_16bit_overflow(VARL("_fa"))),
+		set_FPU(FI, IS_FNAN(VARG(R(1)))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQ4(
+		SETL("_fa", F32(0)),
+		SETL("_f_rounded", F32(0)),
+		BRANCH(IS_FINF(FLOATV32(VARG(a))), inf_eff,
+			BRANCH(IS_FNAN(FLOATV32(VARG(a))), nan_eff, else_eff)),
+		set_status);
+}
+
+/**
+ * HPTOF D[c], D[a] (RR)
+ * hp = D[a][15:0];
+ * if (is_inf_16bit(hp)) then {
+ *   // Signed Infinity
+ *   if(sign_16bit(hp)) then {
+ *     D[c][31:0] = NEG_INFINITY;
+ *   } else {
+ *     D[c][31:0] = POS_INFINITY;
+ *   }
+ * } else if (is_nan_16bit(hp)) then {
+ *     // Signed NaN
+ *     D[c][31] = sign_16bit(hp);
+ *     D[c][30:23] = FFH;
+ *     D[c][22:21] = D[a][9:8];
+ *     D[c][20:8] = 0;
+ *     D[c][7:0] = D[a][7:0];
+ * } else {
+ *   f = f_real_16bit(hp);
+ *   D[c] = ieee754_32bit_format(f);
+ * }
+ */
+static RzAnalysisLiftedILOp hptof(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_hp", UNSIGNED(16, VARG(R(1)))),
+		SETL("_result", FCONVERT(RZ_FLOAT_IEEE754_BIN_32, RZ_FLOAT_RMODE_RNA, FLOATV16(VARL("_hp")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		SEQ2(set_FPU(FI, IS_FNAN(VARL("_hp"))),
+			set_PSW_FSb((VARG("set_FI")))));
+}
+
+/**
+ * D[c], D[a] (RR)
+ * if(is_nan(D[a])) then result = 0;
+ * else if(f_real(D[a]) > 2^31-1) then result = 7FFFFFFFH;
+ * else if(f_real(D[a]) < -2^31) then result = 80000000H;
+ * else result = round_to_integer(D[a], PSW.RM);
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp ftoi(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_result_i", minmax("_fa", ST32_MAX, ST32_MIN, round_to_integer(VARL("_fa"), PSW_RM()))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ3(set_FPU(FI, OR(not_in_i32(VARL("_fa")), IS_FNAN(VARL("_fa")))),
+			set_FPU(FX, FNE(VARL("_fa"), i32F64(VARL("_result_i")))),
+			set_PSW_FSb(OR(VARG("set_FX"), VARG("set_FI")))));
+}
+
+/**
+ * FTOIZ D[c], D[a] (RR)
+ * if(is_nan(D[a])) then result = 0;
+ * else if(f_real(D[a]) > 2^31-1) then result = 7FFFFFFFH;
+ * else if(f_real(D[a]) < -2^31) then result = 80000000H;
+ * else result = round_to_integer(D[a], 11B);
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp ftoiz(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_result_i", minmax("_fa", ST32_MAX, ST32_MIN, F2SINT32(VARL("_fa"), RZ_FLOAT_RMODE_RTZ))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ3(set_FPU(FI, OR(not_in_u32(VARL("_fa")), IS_FNAN(VARL("_fa")))),
+			set_FPU(FX, FNE(VARL("_fa"), i32F64(VARL("_result_i")))),
+			set_PSW_FSb((OR(VARG("set_FX"), VARG("set_FI"))))));
+}
+
+/**
+ * D[c], D[a] (RR)
+ *
+ * rounded_result = ieee754_round(i_real(D[a]), PSW.RM);
+ * result = ieee754_32bit_format(rounded_result);
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp itof(RzAsmTriCoreContext *ctx) {
+	return SEQ6(
+		SETL("_a", VARG(R(1))),
+		SETL("_result64", FCAST64(SINT2F, RZ_FLOAT_IEEE754_BIN_64, VARL("_a"), PSW_RM())),
+		SETL("_result32", FCAST32(SINT2F, RZ_FLOAT_IEEE754_BIN_32, VARL("_a"), PSW_RM())),
+		SETL("_result32_64", FCAST64(FCONVERT, RZ_FLOAT_IEEE754_BIN_64, VARL("_result32"), PSW_RM())),
+		SETG(R(0), F2BV(VARL("_result32"))),
+		SEQ2(set_FPU(FX, FNE(VARL("_result32_64"), VARL("_result64"))),
+			set_PSW_FSb((VARG("set_FX")))));
+}
+
+static RzAnalysisLiftedILOp ftou(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_result_i", minmax("_fa", UT32_MAX, UT32_MIN, round_to_integer(VARL("_fa"), PSW_RM()))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ3(set_FPU(FI, OR(not_in_u32(VARL("_fa")), IS_FNAN(VARL("_fa")))),
+			set_FPU(FX, FNE(VARL("_fa"), i32F64(VARL("_result_i")))),
+			set_PSW_FSb(OR(VARG("set_FX"), VARG("set_FI")))));
+}
+
+static RzAnalysisLiftedILOp ftouz(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_result_i", minmax("_fa", UT32_MAX, UT32_MIN, F2SINT32(VARL("_fa"), RZ_FLOAT_RMODE_RTZ))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ3(set_FPU(FI, OR(not_in_u32(VARL("_fa")), IS_FNAN(VARL("_fa")))),
+			set_FPU(FX, FNE(VARL("_fa"), i32F64(VARL("_result_i")))),
+			set_PSW_FSb(OR(VARG("set_FX"), VARG("set_FI")))));
+}
+
+static RzAnalysisLiftedILOp utof(RzAsmTriCoreContext *ctx) {
+	return SEQ4(
+		SETL("_a", VARG(R(1))),
+		SETL("_result", FCAST32(INT2F, RZ_FLOAT_IEEE754_BIN_32, VARL("_a"), PSW_RM())),
+		SETG(R(0), F2BV(VARL("_result"))),
+		SEQ2(set_FPU(FX, FNE(i32F32(VARL("_a")), VARL("_result"))),
+			set_PSW_FSb(VARG("set_FX"))));
+}
+
+/**
+ * FTOQ31 D[c], D[a], D[b] (RR)
+ * arg_a = denorm_to_zere64(f_real(D[a]);
+ * if(is_nan(D[a])) then result = 0;
+ * else precise_result = mul(arg_a, 2^-D[b][8:0]);
+ * if(precise_result > q_real(7FFFFFFFH)) then result = 7FFFFFFFH;
+ * else if(precise_result < -1.0) then result = 80000000H;
+ * else result = round_to_q31(precise_result);
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp ftoq31(RzAsmTriCoreContext *ctx) {
+	return SEQ8(
+		SETL("_a", VARG(R(1))),
+		SETL("_arg_a", F32(0)),
+		q_real_set_v("_arg_a", VARL("_a")),
+		SETL("_arg_a", denorm_to_zere_(F32, VARL("_arg_a"))),
+		SETL("_precise_result", FDIV(0, VARL("_arg_a"), FPOW(0, F32(2), FLOATV32(LOGAND(VARG(R(2)), U32(0x1ff)))))),
+		SETL("_result_i",
+			ITE(IS_FNAN(FLOATV32(VARL("_a"))),
+				U32(0),
+				minmax_q31("_precise_result", round_to_integer(VARL("_precise_result"), PSW_RM())))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ5(SETL("_res_q_real", F32(0)),
+			q_real_set_v("_res_q_real", VARL("_result_i")),
+			set_FPU(FI, OR(not_in_q31(VARL("_precise_result")), IS_FNAN(FLOATV32(VARL("_a"))))),
+			set_FPU(FX, FNE(FLOATV32(VARL("_a")), VARL("_res_q_real"))),
+			set_PSW_FSb(OR(VARG("set_FX"), VARG("set_FI")))));
+}
+
+static RzAnalysisLiftedILOp ftoq31z(RzAsmTriCoreContext *ctx) {
+	return SEQ9(
+		SETL("_a", VARG(R(1))),
+		SETL("_fa", FLOATV32(VARL("_a"))),
+		SETL("_arg_a", F32(0)),
+		q_real_set_v("_arg_a", VARL("_a")),
+		SETL("_arg_a", denorm_to_zere_(F32, VARL("_arg_a"))),
+		SETL("_precise_result", FDIV(0, VARL("_arg_a"), FPOW(0, F32(2), FLOATV32(LOGAND(VARG(R(2)), U32(0x1ff)))))),
+		SETL("_result_i",
+			ITE(IS_FNAN(VARL("_fa")),
+				U32(0),
+				minmax_q31("_precise_result", F2SINT32(VARL("_precise_result"), RZ_FLOAT_RMODE_RTZ)))),
+		SETG(R(0), VARL("_result_i")),
+		SEQ5(SETL("_res_q_real", F32(0)),
+			q_real_set_v("_res_q_real", VARL("_result_i")),
+			set_FPU(FI, OR(not_in_q31(VARL("_precise_result")), IS_FNAN(FLOATV32(VARL("_a"))))),
+			set_FPU(FX, FNE(VARL("_fa"), VARL("_res_q_real"))),
+			set_PSW_FSb(OR(VARG("set_FX"), VARG("set_FI")))));
+}
+
+/**
+ * Q31TOF D[c], D[a], D[b] (RR)
+ *
+ * precise_result = mul(q_real(D[a]),2^D[b][8:0]);
+ * rounded_result = ieee754_round(precise_result, PSW.RM);
+ * result = ieee754_32bit_format(rounded_result);
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp q31tof(RzAsmTriCoreContext *ctx) {
+	return SEQ7(
+		SETL("_a", VARG(R(1))),
+		SETL("_qa", F32(0)),
+		q_real_set_v("_qa", VARL("_a")),
+		SETL("_precise_result", FMUL(RZ_FLOAT_RMODE_RNE, VARL("_qa"), FPOW(0, F32(2.), FLOATV32(LOGAND(VARG(R(2)), U32(0x1ff)))))),
+		SETL("_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_precise_result"), PSW_RM())),
+		SETG(R(0), F2BV(VARL("_result"))),
+		SEQ3(set_FPU(FX, FNE(VARL("_precise_result"), VARL("_result"))),
+			set_FPU(FU, FLT(FABS(VARL("_precise_result")), F32(1. / 0x2p126))),
+			set_PSW_FSb(VARG("set_FX"))));
+}
+
+static RzAnalysisLiftedILOp cmp_f(RzAsmTriCoreContext *ctx) {
+	const char *rc = R(0);
+	const char *ra = R(1);
+	const char *rb = R(2);
+	return SETG(rc,
+		f_op2_chain6(rz_il_op_new_log_or,
+			BOOL_TO_BV32(FLT(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))),
+			SHL0(BOOL_TO_BV32(FEQ(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))), 1),
+			SHL0(BOOL_TO_BV32(FGT(FLOATV32(VARG(ra)), FLOATV32(VARG(rb)))), 2),
+			SHL0(BOOL_TO_BV32(OR(IS_FNAN(FLOATV32(VARG(ra))), IS_FNAN(FLOATV32(VARG(rb))))), 3),
+			SHL0(BOOL_TO_BV32(is_denorm(VARG(ra))), 4),
+			SHL0(BOOL_TO_BV32(is_denorm(VARG(rb))), 5)));
+}
+
+#define SEQ10(e0, e1, e2, e3, e4, e5, e6, e7, e8, e9) SEQN(10, e0, e1, e2, e3, e4, e5, e6, e7, e8, e9)
+
+/**
+ * ADD.F D[c], D[d], D[a] (RRR)
+ * arg_a = denorm_to_zere64(f_real(D[a]);
+ * arg_b = denorm_to_zere64(f_real(D[d]);
+ * if(is_nan(D[a]) OR is_nan(D[d])) then result = QUIET_NAN;
+ * else if(is_pos_inf(D[a]) AND is_neg_inf(D[d])) then result = ADD_NAN;
+ * else if(is_neg_inf(D[a]) AND is_pos_inf(D[d])) then result = ADD_NAN;
+ * else {
+ *   precise_result = add(arg_a,arg_b);
+ *   normal_result = denorm_to_zere64(precise_result);
+ *   rounded_result = ieee754_round(normal_result, PSW.RM);
+ *   result = ieee754_32bit_format(rounded_result);
+ * }
+ * D[c] = result[31:0];
+ */
+static RzAnalysisLiftedILOp add_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ6(
+		set_FPU(FI, OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQ10(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_precise_result", FADD(0, VARL("_arg_a"), VARL("_arg_b"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(AND(IS_FINF(VARL("_fa")), IS_FINF(VARL("_fb"))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp sub_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ6(
+		set_FPU(FI, OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQ10(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_precise_result", FADD(0, FNEG(VARL("_arg_a")), VARL("_arg_b"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(AND(IS_FINF(VARL("_fa")), IS_FINF(VARL("_fb"))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp mul_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ6(
+		set_FPU(FI, OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_result")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQ10(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_precise_result", FMUL(0, VARL("_arg_a"), VARL("_arg_b"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(OR(AND(IS_FINF(VARL("_fa")), IS_FZERO(VARL("_fb"))),
+					    AND(IS_FZERO(VARL("_fa")), IS_FINF(VARL("_fb")))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp div_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ7(
+		set_FPU(FI, OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_result")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FZ, AND(IS_FZERO(VARL("_fb")), INV(IS_FINF(VARL("_fa"))))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQ10(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_precise_result", FDIV(0, VARL("_arg_a"), VARL("_arg_b"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(OR(AND(IS_FINF(VARL("_fa")), IS_FINF(VARL("_fb"))),
+					    AND(IS_FZERO(VARL("_fa")), IS_FZERO(VARL("_fb")))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp qseed_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ2(
+		set_FPU(FI, OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_result")))),
+		set_PSW_FSb(VARG("set_FI")));
+
+	return SEQ6(
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_normal_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, FRSQRT(0, VARL("_arg_a")), PSW_RM())),
+		SETL("_result",
+			ITE(IS_FZERO(VARL("_arg_a")),
+				F32(0),
+				ITE(FLT(VARL("_fa"), F64(0)),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_normal_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp madd_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ6(
+		set_FPU(FI, OR(OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_fc"))), IS_FNAN(VARL("_result")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQN(12,
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_fc", _32F64(VARG(R(3)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_arg_c", denorm_to_zere64(VARL("_fc"))),
+		SETL("_precise_mul_result", FMUL(0, VARL("_arg_a"), VARL("_arg_b"))),
+		SETL("_precise_result", FADD(0, VARL("_precise_mul_result"), VARL("_arg_c"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_fc"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(OR(OR(AND(IS_FINF(VARL("_fa")), IS_FZERO(VARL("_fb"))),
+					       AND(IS_FZERO(VARL("_fa")), IS_FINF(VARL("_fb")))),
+					    AND(AND(IS_FINF(VARL("_fa")), IS_FINF(VARL("_fa"))),
+						    IS_FINF(VARL("_fc")))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
+
+static RzAnalysisLiftedILOp msub_f(RzAsmTriCoreContext *ctx) {
+	RzAnalysisLiftedILOp set_status = SEQ6(
+		set_FPU(FI, OR(OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_fc"))), IS_FNAN(VARL("_result")))),
+		set_FPU(FV, FGE(VARL("_rounded_result"), F32(0x2p128))),
+		set_FPU(FU, FLT(FABS(VARL("_precise_result")), F64(0x2p-126))),
+		set_FPU_s(FX, FNE(VARL("_precise_result"), FCONVERT(RZ_FLOAT_IEEE754_BIN_64, 0, VARL("_result")))),
+		set_PSW_FX(BOOL_TO_BV32(AND(VARG("set_FX"), INV(VARG("set_FI"))))),
+		set_FS_or_FI_FV_FU_FX);
+
+	return SEQN(12,
+		SETL("_fa", _32F64(VARG(R(1)))),
+		SETL("_fb", _32F64(VARG(R(2)))),
+		SETL("_fc", _32F64(VARG(R(3)))),
+		SETL("_arg_a", denorm_to_zere64(VARL("_fa"))),
+		SETL("_arg_b", denorm_to_zere64(VARL("_fb"))),
+		SETL("_arg_c", denorm_to_zere64(VARL("_fc"))),
+		SETL("_precise_mul_result", FMUL(0, VARL("_arg_a"), VARL("_arg_b"))),
+		SETL("_precise_result", FADD(0, FNEG(VARL("_precise_mul_result")), VARL("_arg_c"))),
+		SETL("_normal_result", denorm_to_zere64(VARL("_precise_result"))),
+		SETL("_rounded_result", FCAST32(FCONVERT, RZ_FLOAT_IEEE754_BIN_32, VARL("_normal_result"), PSW_RM())),
+		SETL("_result",
+			ITE(OR(OR(IS_FNAN(VARL("_fa")), IS_FNAN(VARL("_fb"))), IS_FNAN(VARL("_fc"))),
+				IL_FQNAN(RZ_FLOAT_IEEE754_BIN_32),
+				ITE(OR(OR(AND(IS_FINF(VARL("_fa")), IS_FZERO(VARL("_fb"))),
+					       AND(IS_FZERO(VARL("_fa")), IS_FINF(VARL("_fb")))),
+					    AND(AND(IS_FINF(VARL("_fa")), IS_FINF(VARL("_fa"))),
+						    IS_FINF(VARL("_fc")))),
+					IL_FSNAN(RZ_FLOAT_IEEE754_BIN_32),
+					VARL("_rounded_result")))),
+		SETG(R(0), F2BV(VARL("_result"))),
+		set_status);
+}
\ No newline at end of file
diff --git a/librz/arch/p/analysis/analysis_tricore_cs.c b/librz/arch/p/analysis/analysis_tricore_cs.c
index c703ca29db5..3e2ceaf4122 100644
--- a/librz/arch/p/analysis/analysis_tricore_cs.c
+++ b/librz/arch/p/analysis/analysis_tricore_cs.c
@@ -8,9 +8,7 @@
 #include <capstone/capstone.h>
 
 #include <tricore/tricore.inc>
-
-RZ_IPI RzAnalysisLiftedILOp tricore_il_op(RzAsmTriCoreContext *ctx, RzAnalysis *a);
-RZ_IPI RzAnalysisILConfig *tricore_il_config(RZ_NONNULL RzAnalysis *analysis);
+#include "tricore/tricore_il.h"
 
 #define TRICORE_REG_SP TRICORE_REG_A10
 
@@ -241,7 +239,12 @@ static char *tricore_reg_profile(RzAnalysis *_) {
 		"drx	FPU_TRAP_OPC	.32	812	0\n"
 		"drx	FPU_TRAP_SRC1	.32	816	0\n"
 		"drx	FPU_TRAP_SRC2	.32	820	0\n"
-		"drx	FPU_TRAP_SRC3	.32	824	0\n";
+		"drx	FPU_TRAP_SRC3	.32	824	0\n"
+		"drx	set_FI	.1	900	0\n"
+		"drx	set_FV	.1	901	0\n"
+		"drx	set_FZ	.1	902	0\n"
+		"drx	set_FU	.1	903	0\n"
+		"drx	set_FX	.1	904	0\n";
 	return strdup(p);
 }
 
diff --git a/librz/core/cil.c b/librz/core/cil.c
index e1e03f6cdba..c81a88237e9 100644
--- a/librz/core/cil.c
+++ b/librz/core/cil.c
@@ -859,6 +859,10 @@ RZ_IPI void rz_core_il_cons_print(RZ_NONNULL RzCore *core, RZ_NONNULL RZ_BORROW
 	const char delim = pretty ? '\n' : ' ';
 	RzStrBuf sb;
 
+	RzAnalysisILVM *vm = rz_analysis_il_vm_new(core->analysis, NULL);
+	RzILValidateGlobalContext *ctx = vm ? rz_il_validate_global_context_new_from_vm(vm->vm)
+					    : NULL;
+
 	RzAnalysisOp *op = NULL;
 	rz_iterator_foreach(iter, op) {
 		if (!op->il_op) {
@@ -868,14 +872,27 @@ RZ_IPI void rz_core_il_cons_print(RZ_NONNULL RzCore *core, RZ_NONNULL RZ_BORROW
 
 		rz_strbuf_init(&sb);
 		rz_il_op_effect_stringify(op->il_op, &sb, pretty);
+
 		il_stmt = rz_strbuf_get(&sb);
 		if (colorize) {
 			core_colorify_il_statement(core->cons->context, il_stmt, delim, op->addr);
 		} else {
 			rz_cons_printf("0x%" PFMT64x "%c%s\n", op->addr, delim, il_stmt);
 		}
+
+		if (ctx) {
+			RzILTypeEffect t;
+			char *report;
+			rz_il_validate_effect(op->il_op, ctx, NULL, &t, &report);
+			if (report) {
+				rz_cons_println(report);
+				free(report);
+			}
+		}
 		rz_strbuf_fini(&sb);
 	}
+	rz_analysis_il_vm_free(vm);
+	rz_il_validate_global_context_free(ctx);
 }
 
 // used to speedup strcmp with rz_config_get in loops
diff --git a/librz/il/definitions/float.c b/librz/il/definitions/float.c
index 2311d91ce87..d89a0f2490e 100644
--- a/librz/il/definitions/float.c
+++ b/librz/il/definitions/float.c
@@ -20,6 +20,7 @@ RZ_API RZ_OWN RzFloat *rz_il_float_new(RZ_NONNULL RzFloatFormat format, RZ_NONNU
 
 	ut32 len = rz_float_get_format_info(format, RZ_FLOAT_INFO_TOTAL_LEN);
 	if (len != bv->len) {
+		RZ_LOG_ERROR("The size of the float :%d does not match the size of the bitvector :%d.\n", len, bv->len);
 		return NULL;
 	}
 
diff --git a/librz/il/il_export_string.c b/librz/il/il_export_string.c
index 5303985d6ac..c88283e3e1f 100644
--- a/librz/il/il_export_string.c
+++ b/librz/il/il_export_string.c
@@ -1025,6 +1025,9 @@ RZ_API void rz_il_op_effect_stringify(RZ_NONNULL RzILOpEffect *op, RZ_NONNULL Rz
  */
 RZ_API char *rz_il_value_stringify(RZ_NONNULL const RzILVal *val) {
 	rz_return_val_if_fail(val, NULL);
+	if (val->type == RZ_IL_TYPE_PURE_FLOAT) {
+		return rz_float_as_string(val->data.f);
+	}
 	RzBitVector *bv = rz_il_value_to_bv(val);
 	if (!bv) {
 		return NULL;
diff --git a/librz/il/il_opcodes.c b/librz/il/il_opcodes.c
index 3a627bcf36a..f9cb2a4e611 100644
--- a/librz/il/il_opcodes.c
+++ b/librz/il/il_opcodes.c
@@ -760,22 +760,27 @@ RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float(RzFloatFormat format, RZ_NONNULL R
 	return ret;
 }
 
+RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_rz_float(RZ_NONNULL RZ_OWN RzFloat *fl) {
+	rz_return_val_if_fail(fl, NULL);
+	RzILOpFloat *ret = NULL;
+	RzFloatFormat r = fl->r;
+	RzILOpBitVector *bv = rz_il_op_new_bitv(fl->s);
+	if (!bv) {
+		goto err;
+	}
+	fl->s = NULL;
+	rz_il_op_new_2(Float, RZ_IL_OP_FLOAT, RzILOpArgsFloat, float_, r, bv);
+err:
+	rz_float_free(fl);
+	return ret;
+}
+
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f32(float f) {
 	RzFloat *value = rz_float_new_from_f32(f);
 	if (!value) {
 		return NULL;
 	}
-	RzILOpFloat *ret = RZ_NEW0(RzILOpFloat);
-	if (!ret) {
-		rz_float_free(value);
-		return NULL;
-	}
-
-	ret->code = RZ_IL_OP_FLOAT;
-	ret->op.float_.bv = rz_il_op_new_bitv(value->s);
-	ret->op.float_.r = value->r;
-	free(value);
-	return ret;
+	return rz_il_op_new_float_from_rz_float(value);
 }
 
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f64(double f) {
@@ -783,17 +788,7 @@ RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f64(double f) {
 	if (!value) {
 		return NULL;
 	}
-	RzILOpFloat *ret = RZ_NEW0(RzILOpFloat);
-	if (!ret) {
-		rz_float_free(value);
-		return NULL;
-	}
-
-	ret->code = RZ_IL_OP_FLOAT;
-	ret->op.float_.bv = rz_il_op_new_bitv(value->s);
-	ret->op.float_.r = value->r;
-	free(value);
-	return ret;
+	return rz_il_op_new_float_from_rz_float(value);
 }
 
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f80(long double f) {
@@ -801,17 +796,7 @@ RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f80(long double f) {
 	if (!value) {
 		return NULL;
 	}
-	RzILOpFloat *ret = RZ_NEW0(RzILOpFloat);
-	if (!ret) {
-		rz_float_free(value);
-		return NULL;
-	}
-
-	ret->code = RZ_IL_OP_FLOAT;
-	ret->op.float_.bv = rz_il_op_new_bitv(value->s);
-	ret->op.float_.r = value->r;
-	free(value);
-	return ret;
+	return rz_il_op_new_float_from_rz_float(value);
 }
 
 RZ_API RZ_OWN RzILOpBitVector *rz_il_op_new_fbits(RZ_NONNULL RzILOpFloat *f) {
diff --git a/librz/il/il_validate.c b/librz/il/il_validate.c
index 7ea8029d93e..67b76bd0d38 100644
--- a/librz/il/il_validate.c
+++ b/librz/il/il_validate.c
@@ -359,15 +359,10 @@ VALIDATOR_PURE(ite) {
 	VALIDATOR_DESCEND(args->x, &sx);
 	RzILSortPure sy;
 	VALIDATOR_DESCEND(args->y, &sy);
-	if (!rz_il_sort_pure_eq(sx, sy)) {
-		char *sxs = rz_il_sort_pure_stringify(sx);
-		char *sys = rz_il_sort_pure_stringify(sy);
-		rz_strbuf_appendf(report_builder, "Types of ite branches do not agree: %s vs. %s.\n",
-			rz_str_get_null(sxs), rz_str_get_null(sys));
-		free(sxs);
-		free(sys);
-		return false;
-	}
+	VALIDATOR_ASSERT(rz_il_sort_pure_eq(sx, sy), "Types of ite branches do not agree: %s vs. %s.\n",
+		rz_il_sort_pure_stringify(sx),
+		rz_il_sort_pure_stringify(sy));
+
 	*sort_out = sx;
 	return true;
 }
@@ -611,16 +606,10 @@ VALIDATOR_PURE(forder) {
 	VALIDATOR_ASSERT(sy.type == RZ_IL_TYPE_PURE_FLOAT, "Right operand of %s op is not a float.\n", rz_il_op_pure_code_stringify(op->code));
 
 	// flatten validator assert
-	if (!(sx.props.f.format == sy.props.f.format)) {
-		char *ssx = rz_il_sort_pure_stringify(sx);
-		char *ssy = rz_il_sort_pure_stringify(sy);
-
-		rz_strbuf_appendf(report_builder, "Op %s formats of left operand (%s) and right operand (%s) do not agree.\n",
-			rz_il_op_pure_code_stringify(op->code), ssx, ssy);
-		free(ssx);
-		free(ssy);
-		return false;
-	}
+	VALIDATOR_ASSERT(sx.props.f.format == sy.props.f.format, "Op %s formats of left operand (%s) and right operand (%s) do not agree.\n",
+		rz_il_op_pure_code_stringify(op->code),
+		rz_il_sort_pure_stringify(sx),
+		rz_il_sort_pure_stringify(sy));
 
 	*sort_out = rz_il_sort_pure_bool();
 	return true;
@@ -652,17 +641,10 @@ VALIDATOR_PURE(float_binop_with_round) {
 	VALIDATOR_ASSERT(sy.type == RZ_IL_TYPE_PURE_FLOAT, "Right operand of %s op is not a float.\n", rz_il_op_pure_code_stringify(op->code));
 
 	// flatten validator assert
-	if (!(sx.props.f.format == sy.props.f.format)) {
-		char *ssx = rz_il_sort_pure_stringify(sx);
-		char *ssy = rz_il_sort_pure_stringify(sy);
-
-		rz_strbuf_appendf(report_builder, "Op %s formats of left operand (%s) and right operand (%s) do not agree.\n",
-			rz_il_op_pure_code_stringify(op->code), ssx, ssy);
-
-		free(ssx);
-		free(ssy);
-		return false;
-	}
+	VALIDATOR_ASSERT(sx.props.f.format == sy.props.f.format, "Op %s formats of left operand (%s) and right operand (%s) do not agree.\n",
+		rz_il_op_pure_code_stringify(op->code),
+		rz_il_sort_pure_stringify(sx),
+		rz_il_sort_pure_stringify(sy));
 
 	*sort_out = sx;
 	return true;
@@ -681,22 +663,12 @@ VALIDATOR_PURE(float_terop_with_round) {
 	VALIDATOR_DESCEND(args->z, &sz);
 	VALIDATOR_ASSERT(sz.type == RZ_IL_TYPE_PURE_FLOAT, "3rd operand of %s op is not a float.\n", rz_il_op_pure_code_stringify(op->code));
 
-	if (!((sx.props.f.format == sy.props.f.format) &&
-		    (sx.props.f.format == sz.props.f.format))) {
-		char *ssx = rz_il_sort_pure_stringify(sx);
-		char *ssy = rz_il_sort_pure_stringify(sy);
-		char *ssz = rz_il_sort_pure_stringify(sz);
-
-		rz_strbuf_appendf(report_builder,
-			"types of operand in op %s do not agree: operand1 (%s) operand2 (%s) operand3 (%s)",
-			rz_il_op_pure_code_stringify(op->code),
-			ssx, ssy, ssz);
-
-		free(ssx);
-		free(ssy);
-		free(ssz);
-		return false;
-	}
+	VALIDATOR_ASSERT((sx.props.f.format == sy.props.f.format) && (sx.props.f.format == sz.props.f.format),
+		"types of operand in op %s do not agree: operand1 (%s) operand2 (%s) operand3 (%s)",
+		rz_il_op_pure_code_stringify(op->code),
+		rz_il_sort_pure_stringify(sx),
+		rz_il_sort_pure_stringify(sy),
+		rz_il_sort_pure_stringify(sz));
 
 	*sort_out = sx;
 	return true;
diff --git a/librz/include/rz_il/rz_il_opbuilder_begin.h b/librz/include/rz_il/rz_il_opbuilder_begin.h
index c0bbc39c259..5951d668371 100644
--- a/librz/include/rz_il/rz_il_opbuilder_begin.h
+++ b/librz/include/rz_il/rz_il_opbuilder_begin.h
@@ -81,6 +81,7 @@
 #define FORDER(flx, fly)           rz_il_op_new_forder(flx, fly)
 #define FROUND(rmode, fl)          rz_il_op_new_fround(rmode, fl)
 #define FSQRT(rmode, fl)           rz_il_op_new_fsqrt(rmode, fl)
+#define FRSQRT(rmode, fl)          rz_il_op_new_frsqrt(rmode, fl)
 #define FADD(rmode, flx, fly)      rz_il_op_new_fadd(rmode, flx, fly)
 #define FSUB(rmode, flx, fly)      rz_il_op_new_fsub(rmode, flx, fly)
 #define FMUL(rmode, flx, fly)      rz_il_op_new_fmul(rmode, flx, fly)
@@ -89,6 +90,9 @@
 #define FPOW(rmode, flx, fly)      rz_il_op_new_fpow(rmode, flx, fly)
 #define FMAD(rmode, flx, fly, flz) rz_il_op_new_fmad(rmode, flx, fly, flz)
 
+#define IL_FQNAN(f) rz_il_op_new_float_from_rz_float(rz_float_new_qnan(f))
+#define IL_FSNAN(f) rz_il_op_new_float_from_rz_float(rz_float_new_snan(f))
+
 // TODO: add `feq` as prime operator in fbasic
 // https://smtlib.cs.uiowa.edu/theories-FloatingPoint.shtml
 
@@ -99,12 +103,12 @@
 #define AND(x, y) rz_il_op_new_bool_and(x, y)
 #define OR(x, y)  rz_il_op_new_bool_or(x, y)
 
-#define FNEQ(flx, fly) rz_il_op_new_fneq(flx, fly)
-#define FEQ(flx, fly)  rz_il_op_new_feq(flx, fly)
-#define FLT(flx, fly)  rz_il_op_new_flt(flx, fly)
-#define FLE(flx, fly)  rz_il_op_new_fle(flx, fly)
-#define FGT(flx, fly)  rz_il_op_new_fgt(flx, fly)
-#define FGE(flx, fly)  rz_il_op_new_fge(flx, fly)
+#define FNE(flx, fly) rz_il_op_new_fneq(flx, fly)
+#define FEQ(flx, fly) rz_il_op_new_feq(flx, fly)
+#define FLT(flx, fly) rz_il_op_new_flt(flx, fly)
+#define FLE(flx, fly) rz_il_op_new_fle(flx, fly)
+#define FGT(flx, fly) rz_il_op_new_fgt(flx, fly)
+#define FGE(flx, fly) rz_il_op_new_fge(flx, fly)
 
 #define UNSIGNED(n, x)    rz_il_op_new_unsigned(n, x)
 #define SIGNED(n, x)      rz_il_op_new_signed(n, x)
diff --git a/librz/include/rz_il/rz_il_opbuilder_end.h b/librz/include/rz_il/rz_il_opbuilder_end.h
index 1241793e8d8..e11e0b48802 100644
--- a/librz/include/rz_il/rz_il_opbuilder_end.h
+++ b/librz/include/rz_il/rz_il_opbuilder_end.h
@@ -55,7 +55,7 @@
 #undef FMOD
 #undef FPOW
 #undef FMAD
-#undef FNEQ
+#undef FNE
 #undef FEQ
 #undef FLT
 #undef FLE
diff --git a/librz/include/rz_il/rz_il_opcodes.h b/librz/include/rz_il/rz_il_opcodes.h
index edbb4da4bb7..a2ecc1802d4 100644
--- a/librz/include/rz_il/rz_il_opcodes.h
+++ b/librz/include/rz_il/rz_il_opcodes.h
@@ -733,6 +733,7 @@ RZ_API RZ_OWN RzILOpBitVector *rz_il_op_new_append(RZ_NONNULL RzILOpBitVector *h
 RZ_API RZ_OWN RzILOpBitVector *rz_il_op_new_load(RzILMemIndex mem, RZ_NONNULL RzILOpBitVector *key);
 RZ_API RZ_OWN RzILOpBitVector *rz_il_op_new_loadw(RzILMemIndex mem, RZ_NONNULL RzILOpBitVector *key, ut32 n_bits);
 
+RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_rz_float(RZ_NONNULL RZ_OWN RzFloat *fl);
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float(RzFloatFormat format, RZ_NONNULL RzILOpBitVector *bv);
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f32(float f);
 RZ_API RZ_OWN RzILOpFloat *rz_il_op_new_float_from_f64(double f);
diff --git a/test/db/analysis/tricore b/test/db/analysis/tricore
index 8f3e15f3777..73ab36c3e0e 100644
--- a/test/db/analysis/tricore
+++ b/test/db/analysis/tricore
@@ -276,6 +276,11 @@ drx	FPU_TRAP_OPC	.32	812	0
 drx	FPU_TRAP_SRC1	.32	816	0
 drx	FPU_TRAP_SRC2	.32	820	0
 drx	FPU_TRAP_SRC3	.32	824	0
+drx	set_FI	.1	900	0
+drx	set_FV	.1	901	0
+drx	set_FZ	.1	902	0
+drx	set_FU	.1	903	0
+drx	set_FX	.1	904	0
 
 EOF
 RUN
diff --git a/test/db/asm/tricore b/test/db/asm/tricore
index a58cbe0700f..10e01f1f193 100644
--- a/test/db/asm/tricore
+++ b/test/db/asm/tricore
@@ -1,802 +1,2182 @@
-d "calla #0" ed000000 0x80001000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x80001004)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
-d "fcall #0x80001000" 61000000 0x80001000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x80001004)) (set a10 (var EA)) (jmp (bv 32 0x80001000)))
-d "calli a0" 2d000000 0x80001000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x80001004)) (branch (== (var new_FCX) (var LCX)) nop (jmp (var a0)))))
-d "call #0" 5c00 0x0 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x2)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
-d "call #0" 6d000000 0x0 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
-d "fret" 0070 0x80001000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
-d "fret" 0d00c000 0x80001000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
-d "ftohp d0, d0" 4b005102 0x80001000 (branch (is_inf (float 0 (var d0) )) (branch (msb (var d0)) (set d0 (bv 32 0xfc00)) (set d0 (bv 32 0x7c00))) (branch (is_nan (float 0 (var d0) )) (seq (set D_c (| (| (| (& (var d0) (bv 32 0x80000000)) (<< (bv 32 0x1f) (bv 32 0xa) false)) (<< (& (>> (var d0) (bv 32 0x15) false) (bv 32 0x3)) (bv 32 0x8) false)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))) (set d0 (ite (== (& (>> (var D_c) (bv 32 0x0) false) (bv 32 0x3ff)) (bv 32 0x0)) (| (& (var D_c) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false)) (var D_c)))) (set d0 (| (& (var d0) (bv 32 0xffff0000)) (<< (& (cast 32 false (fbits (fconvert unk_format rne (let tmp (float 0 (var d0) ) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))))) (bv 32 0xffff)) (bv 32 0x0) false)))))
-d "ld.w d0, #0x3c0" 850000f0 0x80001000 (set d0 (loadw 0 32 (bv 32 0x3c0)))
-d "ld.a a0, #0" 85000008 0x80001000 (set a0 (loadw 0 32 (bv 32 0x0)))
-d "ld.d e0, #0" 85000004 0x80001000 (seq (set temp (loadw 0 64 (bv 32 0x0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.da p0, #0" 8500000c 0x80001000 (seq (set temp (loadw 0 64 (bv 32 0x0))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.w d15, [a15]#0x10" 19ff1000 0x80001000 (seq (set EA (+ (var a15) (bv 32 0x10))) (set d15 (loadw 0 32 (var EA))))
-d "ld.a a2, [a1]#0" 09128009 0x80001000 (seq (set EA (+ (var a1) (bv 32 0x0))) (set a2 (loadw 0 32 (var EA))))
-d "ld.a a2, [a1+]#0" 09128001 0x80001000 (seq (set EA (var a1)) (set a2 (loadw 0 32 (var EA))) (set a1 (+ (var EA) (bv 32 0x0))))
-d "ld.a a2, [+a1]#0" 09128005 0x80001000 (seq (set EA (+ (var a1) (bv 32 0x0))) (set a2 (loadw 0 32 (var EA))) (set a1 (var EA)))
-d "ld.a a2, [a1]#-0x31" 09128ff9 0x80001000 (seq (set EA (+ (var a1) (bv 32 0xffffffcf))) (set a2 (loadw 0 32 (var EA))))
-d "ld.a a2, [a1+]#-0x31" 09128ff1 0x80001000 (seq (set EA (var a1)) (set a2 (loadw 0 32 (var EA))) (set a1 (+ (var EA) (bv 32 0xffffffcf))))
-d "ld.a a2, [+a1]#-0x31" 09128ff5 0x80001000 (seq (set EA (+ (var a1) (bv 32 0xffffffcf))) (set a2 (loadw 0 32 (var EA))) (set a1 (var EA)))
-d "ld.a a0, [a0]#0" 99000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a0 (loadw 0 32 (var EA))))
-d "ld.a a15, [sp]#0" d800 0x0 (seq (set EA (+ (var a10) (bv 32 0x0))) (set a15 (loadw 0 32 (var EA))))
-d "ld.a a0, [a0]" d400 0x0 (seq (set EA (var a0)) (set a0 (loadw 0 32 (var EA))))
-d "ld.a a0, [a0+]" c400 0x0 (seq (set EA (var a0)) (set a0 (loadw 0 32 (var EA))) (set a0 (+ (var a0) (bv 32 0x4))))
-d "ld.a a0, [a15]#0" c800 0x0 (seq (set EA (+ (var a15) (bv 32 0x0))) (set a0 (loadw 0 32 (var EA))))
-d "ld.a a15, [a0]#0" cc00 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a15 (loadw 0 32 (var EA))))
-d "ld.bu d0, [a0]" 1400 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.bu d15, [a0]#0" 0c00 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a15 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.bu d0, [a15]#0" 0800 0x0 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.bu d0, [a0+]" 0400 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (loadw 0 8 (var EA)))) (set a0 (+ (var a0) (bv 32 0x1))))
-d "ld.bu d0, [a0]#0" 39000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.bu d0, [a0+]#0" 09004000 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (loadw 0 8 (var EA)))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.bu d0, [p0+r]" 29004000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (loadw 0 8 (var EA)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.bu d0, #0" 05000004 0x0 (seq (set EA (bv 32 0x0)) (set d0 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.bu d0, [+a0]#0" 09004004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 8 (var EA)))) (set a0 (var EA)))
-d "ld.bu d0, [p0+c]#0" 29004004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (loadw 0 8 (var EA)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.bu d0, [a0]#0" 09004008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 8 (var EA)))))
-d "ld.d e0, [a0+]#0" 09004001 0x0 (seq (set EA (var a0)) (set temp (loadw 0 64 (var EA))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.d e0, [p0+r]" 29004001 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set temp (cast 64 false (loadw 0 64 (var EA)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.d e0, #0" 85000004 0x0 (seq (set temp (loadw 0 64 (bv 32 0x0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.d e0, [+a0]#0" 09004005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set temp (loadw 0 64 (var EA))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set a0 (var EA)))
-d "ld.d e0, [p0+c]#0" 29004005 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set EA2 (+ (var a1) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a1) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a1) (mod (+ (var index) (bv 32 0x6)) (var length)))) (set temp (append (append (loadw 0 16 (var EA6)) (loadw 0 16 (var EA4))) (append (loadw 0 16 (var EA2)) (loadw 0 16 (var EA))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.d e0, [a0]#0" 09004009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set temp (loadw 0 64 (var EA))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.da p0, [a0+]#0" 0900c001 0x0 (seq (set EA (var a0)) (set temp (loadw 0 64 (var EA))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.da p0, [p0+r]" 2900c001 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set temp (loadw 0 64 (var EA))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.da p0, [+a0]#0" 0900c005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set temp (loadw 0 64 (var EA))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set a0 (var EA)))
-d "ld.da p0, [p0+c]#0" 2900c005 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set EA4 (+ (var a1) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set temp (append (loadw 0 32 (var EA4)) (loadw 0 32 (var EA)))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.da p0, [a0]#0" 0900c009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set temp (loadw 0 64 (var EA))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.da p0, #0" 8500000c 0x0 (seq (set temp (loadw 0 64 (bv 32 0x0))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ld.h d0, [a0+]" 8400 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a0 (+ (var a0) (bv 32 0x2))))
-d "ld.h d15, [a0]#0" 8c00 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.h d0, [a15]#0" 8800 0x0 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.h d0, [a0]" 9400 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.h d0, [a0]#0" c9000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.h d0, [a0+]#0" 09008000 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.h d0, [p0+r]" 29008000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.h d0, [+a0]#0" 09008004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a0 (var EA)))
-d "ld.h d0, [p0+c]#0" 29008004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.h d0, #0" 05000008 0x0 (seq (set EA (bv 32 0x0)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.h d0, [a0]#0" 09008008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
-d "ld.hu d0, [a0]#0" b9000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 16 (var EA)))))
-d "ld.hu d0, [a0+]#0" 0900c000 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (loadw 0 16 (var EA)))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.hu d0, [p0+r]" 2900c000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (loadw 0 16 (var EA)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.hu d0, [+a0]#0" 0900c004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 16 (var EA)))) (set a0 (var EA)))
-d "ld.hu d0, [p0+c]#0" 2900c004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.hu d0, [a0]#0" 0900c008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (loadw 0 16 (var EA)))))
-d "ld.hu d0, #0" 0500000c 0x0 (seq (set EA (bv 32 0x0)) (set d0 (cast 32 false (loadw 0 16 (var EA)))))
-d "ld.q d0, #0" 45000000 0x0 (seq (set EA (bv 32 0x0)) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))))
-d "ld.q d0, [a0+]#0" 09000002 0x0 (seq (set EA (var a0)) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.q d0, [p0+r]" 29000002 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.q d0, [+a0]#0" 09000006 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set a0 (var EA)))
-d "ld.q d0, [p0+c]#0" 29000006 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.q d0, [a0]#0" 0900000a 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))))
-d "ld.w d15, [sp]#0" 5800 0x0 (seq (set EA (+ (var d10) (bv 32 0x0))) (set d15 (loadw 0 32 (var EA))))
-d "ld.w d0, [a0]" 5400 0x0 (seq (set EA (var a0)) (set d0 (loadw 0 32 (var EA))))
-d "ld.w d0, [a0+]" 4400 0x0 (seq (set EA (var a0)) (set d0 (loadw 0 32 (var EA))) (set a0 (+ (var a0) (bv 32 0x4))))
-d "ld.w d15, [a0]#0" 4c00 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a15 (loadw 0 32 (var EA))))
-d "ld.w d0, [a15]#0" 4800 0x0 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d0 (loadw 0 32 (var EA))))
-d "ld.w d0, [a0]#0" 19000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (loadw 0 32 (var EA))))
-d "ld.w d0, #0" 85000000 0x0 (set d0 (loadw 0 32 (bv 32 0x0)))
-d "ld.w d0, [a0+]#0" 09000001 0x0 (seq (set EA (var a0)) (set d0 (loadw 0 32 (var EA))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ld.w d0, [p0+r]" 29000001 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d0 (loadw 0 32 (var EA))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ld.w d0, [+a0]#0" 09000005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (loadw 0 32 (var EA))) (set a0 (var EA)))
-d "ld.w d0, [p0+c]#0" 29000005 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set EA4 (+ (var a1) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set d0 (append (loadw 0 16 (var EA4)) (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ld.w d0, [a0]#0" 09000009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d0 (loadw 0 32 (var EA))))
-d "ldlcx #0" 15000008 0x0 (seq (set EA (bv 32 0x0)) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
-d "lducx #0" 1500000c 0x0 (seq (set EA (bv 32 0x0)) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
-d "ldlcx [a0]#0" 49000009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
-d "lducx [a0]#0" 49004009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
-d "lea a0, #0x3c0" c50000f0 0x0 (seq (set EA (bv 32 0x3c0)) (set a0 (var EA)))
-d "lea a0, [a0]#0" d9000000 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a0 (var EA)))
-d "lea a0, [a0]#0" 4900000a 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set a0 (var EA)))
-d "lha a0, #0x3c0" c50000f4 0x0 (seq (set EA (bv 32 0xf00000)) (set a0 (var EA)))
-d "ldmst [a0+]#0, e0" 49004000 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "ldmst [p0+r], e0" 69004000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "ldmst #0, e0" e5000004 0x0 (seq (set EA (bv 32 0x0)) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))))
-d "ldmst [+a0]#0, e0" 49004004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))) (set a0 (var EA)))
-d "ldmst [p0+c]#0, e0" 69004004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "ldmst [a0]#0, e0" 49004008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d1))) (& (var d0) (var d1)))))
-d "swap.w [a0+]#0, d0" 49000000 0x0 (seq (set EA (var a0)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)) (set a0 (+ (var EA) (bv 32 0x0))))
-d "swap.w [p0+r], d0" 69000000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "swap.w #0, d0" e5000000 0x0 (seq (set EA (bv 32 0x0)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)))
-d "swap.w [+a0]#0, d0" 49000004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)) (set a0 (var EA)))
-d "swap.w [p0+c]#0, d0" 69000004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "swap.w [a0]#0, d0" 49000008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)))
-d "swap.w [p0+i], d0" 69000008 0
-d "lt.a d0, a0, a0" 01002004 0x0 (set d0 (ite (&& (ule (var a0) (var a0)) (! (== (var a0) (var a0)))) (bv 32 0x1) (bv 32 0x0)))
-d "ne.a d0, a0, a0" 01001004 0x0 (set d0 (ite (! (== (var a0) (var a0))) (bv 32 0x1) (bv 32 0x0)))
-d "nez.a d0, a0" 01009004 0x0 (set d0 (ite (! (== (var a0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
-d "ge.a d0, a0, a0" 01003004 0x0 (set d0 (ite (|| (! (ule (var a0) (var a0))) (== (var a0) (var a0))) (bv 32 0x1) (bv 32 0x0)))
-d "eq.a d0, a0, a0" 01000004 0x0 (set d0 (ite (== (var a0) (var a0)) (bv 32 0x1) (bv 32 0x0)))
-d "eqz.a d0, a0" 01008004 0x0 (set d0 (ite (== (var a0) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
-d "addsc.a a0, a0, d15, #0" 1000 0x0 (set a0 (+ (var a0) (<< (var d15) (bv 32 0x0) false)))
-d "addsc.a a0, a0, d15, #1" 5000 0x0 (set a0 (+ (var a0) (<< (var d15) (bv 32 0x1) false)))
-d "addsc.a a0, a0, d15, #2" 9000 0x0 (set a0 (+ (var a0) (<< (var d15) (bv 32 0x2) false)))
-d "addsc.a a0, a0, d15, #3" d000 0x0 (set a0 (+ (var a0) (<< (var d15) (bv 32 0x3) false)))
-d "addsc.a a0, a0, d0, #0" 01000006 0x0 (set a0 (+ (var a0) (<< (var d0) (bv 32 0x0) false)))
-d "addsc.at a0, a0, d0" 01002006 0x0 (set a0 (& (+ (var a0) (>> (var d0) (bv 32 0x3) false)) (bv 32 0xfffffffc)))
-d "add.a a0, a0" 3000 0x0 (set a0 (+ (var a0) (var a0)))
-d "add.a a0, #0" b000 0x0 (set a0 (+ (var a0) (bv 32 0x0)))
-d "add.a a0, a0, a0" 01001000 0x0 (set a0 (+ (var a0) (var a0)))
-d "sub.a sp, #0" 2000 0x0 (set a10 (- (var a10) (bv 32 0x0)))
-d "sub.a a0, a0, a0" 01002000 0x0 (set a0 (- (var a0) (var a0)))
-d "mov.a a0, #0" a000 0x0 (set a0 (bv 32 0x0))
-d "mov.a a0, d0" 6000 0x0 (set a0 (var d0))
-d "mov.a a0, d0" 01003006 0x0 (set a0 (var d0))
-d "mov.aa a0, a0" 4000 0x0 (set a0 (var a0))
-d "mov.aa a0, a0" 01000000 0x0 (set a0 (var a0))
-d "mov.d d0, a0" 8000 0x0 (set d0 (var a0))
-d "mov.d d0, a0" 0100c004 0x0 (set d0 (var a0))
-d "abs d0, d0" 0b00c001 0x0 (set d0 (let tmp (var d0) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))))
-d "abs.b d0, d0" 0b00c005 0x0 (set d0 (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x18) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x10) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x8) false)) (cast 32 false (let tmp (cast 8 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))))))))
-d "abs.h d0, d0" 0b00c007 0x0 (set d0 (| (cast 32 false (<< (let tmp (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (bv 32 0x10) false)) (cast 32 false (let tmp (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))))))
-d "absdif d0, d0, d0" 0b00e000 0x0 (set d0 (let a (var d0) (let b (var d0) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
-d "absdif d0, d0, #0" 8b00c001 0x0 (set d0 (let a (var d0) (let b (bv 32 0x0) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
-d "absdif.b d0, d0, d0" 0b00e004 0x0 (set d0 (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x18) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x8) false)) (cast 32 false (let a (cast 8 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))))
-d "absdif.h d0, d0, d0" 0b00e006 0x0 (set d0 (| (cast 32 false (<< (let a (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (cast 32 false (let a (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))
-d "absdifs d0, d0, d0" 0b00f000 0x0 (set d0 (let x (let a (var d0) (let b (var d0) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
-d "absdifs d0, d0, #0" 8b00e001 0x0 (set d0 (let x (let a (var d0) (let b (bv 32 0x0) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
-d "absdifs.h d0, d0, d0" 0b00f006 0x0 (set d0 (| (cast 32 false (<< (let x (let a (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let a (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
-d "abss d0, d0" 0b00d001 0x0 (set d0 (let x (let tmp (var d0) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
-d "abss.h d0, d0" 0b00d007 0x0 (set d0 (| (cast 32 false (<< (let x (let tmp (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let tmp (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
-d "mov d0, d0" 0200 0x0 (set d0 (var d0))
-d "mov d0, #0" 8200 0x0 (set d0 (bv 32 0x0))
-d "mov e0, #0" d200 0x0 (seq (set temp (bv 64 0x0)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "mov d15, #0" da00 0x0 (set d15 (bv 32 0x0))
-d "mov d0, #0" 3b000000 0x0 (set d0 (bv 32 0x0))
-d "mov d0, d0" 0b00f001 0x0 (set d0 (var d0))
-d "mov e0, #0" fb000000 0x0 (seq (set temp (bv 64 0x0)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "mov e0, d0" 0b000008 0x0 (seq (set temp (let _sext_val (cast 32 (msb (cast 64 false (var d0))) (cast 64 false (var d0))) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "mov e0, d0, d0" 0b001008 0x0 (seq (set temp (append (var d0) (var d0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "movh d0, #0" 7b000000 0x0 (set d0 (<< (bv 32 0x0) (bv 32 0x10) false))
-d "movh.a a0, #0" 91000000 0x0 (set a0 (<< (bv 32 0x0) (bv 32 0x10) false))
-d "mov.u d0, #0" bb000000 0x0 (set d0 (bv 32 0x0))
-d "cmov d0, d15, d0" 2a00 0x0 (set d0 (ite (! (is_zero (var d15))) (var d0) (var d0)))
-d "cmov d0, d15, #0" aa00 0x0 (set d0 (ite (! (is_zero (var d15))) (bv 32 0x0) (var d0)))
-d "cmovn d0, d15, d0" 6a00 0x0 (set d0 (ite (is_zero (var d15)) (var d0) (var d0)))
-d "cmovn d0, d15, #0" ea00 0x0 (set d0 (ite (is_zero (var d15)) (bv 32 0x0) (var d0)))
-d "ret" 0090 0x0 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
-d "ret" 0d008001 0x0 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
-d "rfe" 0080 0x0 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
-d "rfe" 0d00c001 0x0 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
-d "rfm" 0d004001 0x0 (seq (branch (! (== (& (>> (var PSW) (bv 32 0xa) false) (bv 32 0x3)) (bv 32 0x2))) nop nop) (branch (! (is_zero (& (>> (var DBGSR) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (var DCX)) (set PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x2)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x1)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (set DBGTCR (| (& (var DBGTCR) (bv 32 0xfffffffe)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x0) false)))) nop))
-d "add d0, d15, d0" 1200 0x0 (seq (set result (+ (var d15) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d0, d15, #0" 9200 0x0 (seq (set result (+ (var d15) (bv 32 0x0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d15, d0, d0" 1a00 0x0 (seq (set result (+ (var d0) (var d0))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d0, d0" 4200 0x0 (seq (set result (+ (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d15, d0, #0" 9a00 0x0 (seq (set result (+ (var d0) (bv 32 0x0))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d0, #0" c200 0x0 (seq (set result (+ (var d0) (bv 32 0x0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d0, d0, d0" 0b000000 0x0 (seq (set result (+ (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add d0, d0, #0" 8b000000 0x0 (seq (set result (+ (var d0) (bv 32 0x0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add.a a0, a0" 3000 0x0 (set a0 (+ (var a0) (var a0)))
-d "add.a a0, #0" b000 0x0 (set a0 (+ (var a0) (bv 32 0x0)))
-d "add.a a0, a0, a0" 01001000 0x0 (set a0 (+ (var a0) (var a0)))
-d "add.b d0, d0, d0" 0b000004 0x0 (seq (set result_byte3 (+ (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (+ (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (+ (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (+ (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "add.h d0, d0, d0" 0b000006 0x0 (seq (set result_hw1 (+ (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (+ (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "addc d0, d0, d0" 0b005000 0x0 (seq (set result (+ (var d0) (+ (var d0) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (var d0)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "addc d0, d0, #0" 8b00a000 0x0 (seq (set result (+ (var d0) (+ (bv 32 0x0) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (bv 32 0x0)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "addi d0, d0, #0" 1b000000 0x0 (set d0 (+ (var d0) (bv 32 0x0)))
-d "addih d0, d0, #0" 9b000000 0x0 (set d0 (+ (var d0) (<< (bv 32 0x0) (bv 32 0x10) false)))
-d "addih.a a0, a0, #0" 11000000 0x0 (set a0 (+ (var a0) (<< (bv 32 0x0) (bv 32 0x10) false)))
-d "adds d0, d0" 2200 0x0 (seq (set result (let x (+ (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds d0, d0, d0" 0b002000 0x0 (seq (set result (let x (+ (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds d0, d0, #0" 8b004000 0x0 (seq (set result (let x (+ (var d0) (bv 32 0x0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds.h d0, d0, d0" 0b002006 0x0 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds.hu d0, d0, d0" 0b003006 0x0 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds.u d0, d0, d0" 0b003000 0x0 (seq (set result (let x (+ (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "adds.u d0, d0, #0" 8b006000 0x0 (seq (set result (let x (+ (var d0) (bv 32 0x0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "addsc.a a0, a0, d15, #0" 1000 0x0 (set a0 (+ (var a0) (<< (var d15) (bv 32 0x0) false)))
-d "addsc.a a0, a0, d0, #0" 01000006 0x0 (set a0 (+ (var a0) (<< (var d0) (bv 32 0x0) false)))
-d "addsc.at a0, a0, d0" 01002006 0x0 (set a0 (& (+ (var a0) (>> (var d0) (bv 32 0x3) false)) (bv 32 0xfffffffc)))
-d "addx d0, d0, d0" 0b004000 0x0 (seq (set result (+ (var d0) (+ (var d0) (bv 32 0x0)))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (var d0)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "addx d0, d0, #0" 8b008000 0x0 (seq (set result (+ (var d0) (+ (bv 32 0x0) (bv 32 0x0)))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (bv 32 0x0)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "cadd d0, d15, #0" 8a00 0x0 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d0) (bv 32 0x0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "cadd d0, d0, d0, d0" 2b000000 0x0 (seq (set condition (! (is_zero (var d0)))) (set result (ite (var condition) (+ (var d0) (var d0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "cadd d0, d0, d0, #0" ab000000 0x0 (seq (set condition (! (is_zero (var d0)))) (set result (ite (var condition) (+ (var d0) (bv 32 0x0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "caddn d0, d15, #0" ca00 0x0 (seq (set condition (is_zero (var d15))) (set result (ite (var condition) (+ (var d0) (bv 32 0x0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "caddn d0, d0, d0, d0" 2b001000 0x0 (seq (set condition (! (is_zero (var d0)))) (set result (ite (var condition) (+ (var d0) (var d0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "caddn d0, d0, d0, #0" ab002000 0x0 (seq (set condition (is_zero (var d0))) (set result (ite (var condition) (+ (var d0) (bv 32 0x0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "lt d15, d0, d0" 7a00 0x0 (set d15 (ite (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt d15, d0, #0" fa00 0x0 (set d15 (ite (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt d0, d0, d0" 0b002001 0x0 (set d0 (ite (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt d0, d0, #0" 8b004002 0x0 (set d0 (ite (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt.a d0, a0, a0" 01002004 0x0 (set d0 (ite (&& (ule (var a0) (var a0)) (! (== (var a0) (var a0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt.b d0, d0, d0" 0b002005 0x0 (seq (set result_byte3 (ite (&& (sle (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (sle (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (sle (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (sle (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "lt.bu d0, d0, d0" 0b003005 0x0 (seq (set result_byte3 (ite (&& (ule (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (ule (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (ule (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (ule (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "lt.h d0, d0, d0" 0b002007 0x0 (seq (set result_hw1 (ite (&& (sle (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (sle (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "lt.hu d0, d0, d0" 0b003007 0x0 (seq (set result_hw1 (ite (&& (ule (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (ule (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "lt.u d0, d0, d0" 0b003001 0x0 (set d0 (ite (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt.u d0, d0, #0" 8b006002 0x0 (set d0 (ite (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)))
-d "lt.w d0, d0, d0" 0b002009 0x0 (set d0 (ite (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0xffffffff) (bv 32 0x0)))
-d "lt.wu d0, d0, d0" 0b003009 0x0 (set d0 (ite (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0xffffffff) (bv 32 0x0)))
-d "ge d0, d0, d0" 0b004001 0x0 (set d0 (ite (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)))
-d "ge d0, d0, #0" 8b008002 0x0 (set d0 (ite (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
-d "ge.u d0, d0, d0" 0b005001 0x0 (set d0 (ite (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)))
-d "ge.u d0, d0, #0" 8b00a002 0x0 (set d0 (ite (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
-d "eq d15, d0, d0" 3a00 0x0 (set d15 (ite (== (var d0) (var d0)) (bv 32 0x1) (bv 32 0x0)))
-d "eq d15, d0, #0" ba00 0x0 (set d15 (ite (== (var d0) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
-d "eq d0, d0, d0" 0b000001 0x0 (set d0 (ite (== (var d0) (var d0)) (bv 32 0x1) (bv 32 0x0)))
-d "eq d0, d0, #0" 8b000002 0x0 (set d0 (ite (== (var d0) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
-d "ne d0, d0, d0" 0b001001 0x0 (set d0 (ite (! (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)))
-d "ne d0, d0, #0" 8b002002 0x0 (set d0 (ite (! (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
-d "eq.b d0, d0, d0" 0b000005 0x0 (seq (set result_byte3 (ite (== (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (== (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (== (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (== (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "eq.h d0, d0, d0" 0b000007 0x0 (seq (set result_hw1 (ite (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "eq.w d0, d0, d0" 0b000009 0x0 (seq (set result (ite (== (var d0) (var d0)) (bv 32 0x0) (bv 32 0x0))) (set d0 (var result)))
-d "eqany.b d0, d0, d0" 0b006005 0x0 (set d0 (ite (|| (|| (== (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
-d "eqany.b d0, d0, #0" 8b00c00a 0x0 (set d0 (ite (|| (|| (== (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0x0) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0x0) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0x0) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
-d "eqany.h d0, d0, d0" 0b006007 0x0 (set d0 (ite (|| (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
-d "eqany.h d0, d0, #0" 8b00c00e 0x0 (set d0 (ite (|| (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
-d "and.eq d0, d0, d0" 0b000002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.eq d0, d0, #0" 8b000004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ge d0, d0, d0" 0b004002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ge d0, d0, #0" 8b008004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ge.u d0, d0, d0" 0b005002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ge.u d0, d0, #0" 8b00a004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.lt d0, d0, d0" 0b002002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.lt d0, d0, #0" 8b004004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.lt.u d0, d0, d0" 0b003002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.lt.u d0, d0, #0" 8b006004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ne d0, d0, d0" 0b001002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.ne d0, d0, #0" 8b002004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.eq d0, d0, d0" 0b007002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.eq d0, d0, #0" 8b00e004 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ge d0, d0, d0" 0b00b002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ge d0, d0, #0" 8b006005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ge.u d0, d0, d0" 0b00c002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ge.u d0, d0, #0" 8b008005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.lt d0, d0, d0" 0b009002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.lt d0, d0, #0" 8b002005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.lt.u d0, d0, d0" 0b00a002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.lt.u d0, d0, #0" 8b004005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ne d0, d0, d0" 0b008002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.ne d0, d0, #0" 8b000005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.eq d0, d0, d0" 0b00f002 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.eq d0, d0, #0" 8b00e005 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ge d0, d0, d0" 0b003003 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ge d0, d0, #0" 8b006006 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ge.u d0, d0, d0" 0b004003 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ge.u d0, d0, #0" 8b008006 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.lt d0, d0, d0" 0b001003 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.lt d0, d0, #0" 8b002006 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.lt.u d0, d0, d0" 0b002003 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.lt.u d0, d0, #0" 8b004006 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ne d0, d0, d0" 0b000003 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "xor.ne d0, d0, #0" 8b000006 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "sh.eq d0, d0, d0" 0b007003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d0) (var d0)) (bv 32 0x1) (bv 32 0x0))))
-d "sh.eq d0, d0, #0" 8b00e006 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d0) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ge d0, d0, d0" 0b00b003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ge d0, d0, #0" 8b006007 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ge.u d0, d0, d0" 0b00c003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ge.u d0, d0, #0" 8b008007 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.lt d0, d0, d0" 0b009003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.lt d0, d0, #0" 8b002007 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.lt.u d0, d0, d0" 0b00a003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0)))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.lt.u d0, d0, #0" 8b004007 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ne d0, d0, d0" 0b008003 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d0) (var d0))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.ne d0, d0, #0" 8b000007 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d0) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0))))
-d "min d0, d0, d0" 0b008001 0x0 (set d0 (ite (&& (sle (var d0) (var d0)) (! (== (var d0) (var d0)))) (var d0) (var d0)))
-d "min d0, d0, #0" 8b000003 0x0 (set d0 (ite (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (var d0) (bv 32 0x0)))
-d "min.b d0, d0, d0" 0b008005 0x0 (seq (set result_byte3 (let a (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "min.bu d0, d0, d0" 0b009005 0x0 (seq (set result_byte3 (let a (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "min.h d0, d0, d0" 0b008007 0x0 (seq (set result_hw1 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "min.hu d0, d0, d0" 0b009007 0x0 (seq (set result_hw1 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "min.u d0, d0, d0" 0b009001 0x0 (set d0 (ite (&& (ule (var d0) (var d0)) (! (== (var d0) (var d0)))) (var d0) (var d0)))
-d "min.u d0, d0, #0" 8b002003 0x0 (set d0 (ite (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (var d0) (bv 32 0x0)))
-d "max d0, d0, d0" 0b00a001 0x0 (set d0 (ite (! (sle (var d0) (var d0))) (var d0) (var d0)))
-d "max d0, d0, #0" 8b004003 0x0 (set d0 (ite (! (sle (var d0) (bv 32 0x0))) (var d0) (bv 32 0x0)))
-d "max.b d0, d0, d0" 0b00a005 0x0 (seq (set result_byte3 (let a (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "max.bu d0, d0, d0" 0b00b005 0x0 (seq (set result_byte3 (let a (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
-d "max.h d0, d0, d0" 0b00a007 0x0 (seq (set result_hw1 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "max.hu d0, d0, d0" 0b00b007 0x0 (seq (set result_hw1 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
-d "max.u d0, d0, d0" 0b00b001 0x0 (set d0 (ite (! (ule (var d0) (var d0))) (var d0) (var d0)))
-d "max.u d0, d0, #0" 8b006003 0x0 (set d0 (ite (! (ule (var d0) (bv 32 0x0))) (var d0) (bv 32 0x0)))
-d "and d0, d0" 2600 0x0 (set d0 (& (var d0) (var d0)))
-d "and d15, #0" 1600 0x0 (set d15 (& (var d15) (bv 32 0x0)))
-d "and d0, d0, d0" 0f008000 0x0 (set d0 (& (var d0) (var d0)))
-d "and d0, d0, #0" 8f000001 0x0 (set d0 (& (var d0) (bv 32 0x0)))
-d "andn d0, d0, d0" 0f00e000 0x0 (set d0 (& (var d0) (~ (var d0))))
-d "andn d0, d0, #0" 8f00c001 0x0 (set d0 (& (var d0) (~ (bv 32 0x0))))
-d "nand d0, d0, d0" 0f009000 0x0 (set d0 (~ (& (var d0) (var d0))))
-d "nand d0, d0, #0" 8f002001 0x0 (set d0 (~ (& (var d0) (bv 32 0x0))))
-d "nor d0, d0, d0" 0f00b000 0x0 (set d0 (~ (| (var d0) (var d0))))
-d "nor d0, d0, #0" 8f006001 0x0 (set d0 (~ (| (var d0) (bv 32 0x0))))
-d "not d0" 4600 0x0 (set d0 (~ (var d0)))
-d "or d0, d0" a600 0x0 (set d0 (| (var d0) (var d0)))
-d "or d15, #0" 9600 0x0 (set d15 (| (var d15) (bv 32 0x0)))
-d "or d0, d0, d0" 0f00a000 0x0 (set d0 (| (var d0) (var d0)))
-d "or d0, d0, #0" 8f004001 0x0 (set d0 (| (var d0) (bv 32 0x0)))
-d "orn d0, d0, d0" 0f00f000 0x0 (set d0 (| (var d0) (~ (var d0))))
-d "orn d0, d0, #0" 8f00e001 0x0 (set d0 (| (var d0) (~ (bv 32 0x0))))
-d "xnor d0, d0, d0" 0f00d000 0x0 (set d0 (~ (^ (var d0) (var d0))))
-d "xnor d0, d0, #0" 8f00a001 0x0 (set d0 (~ (^ (var d0) (bv 32 0x0))))
-d "xor d0, d0" c600 0x0 (set d0 (^ (var d0) (var d0)))
-d "xor d0, d0, d0" 0f00c000 0x0 (set d0 (^ (var d0) (var d0)))
-d "xor d0, d0, #0" 8f008001 0x0 (set d0 (^ (var d0) (bv 32 0x0)))
-d "and.and.t d0, d0, #0, d0, #0" 47000000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.andn.t d0, d0, #0, d0, #0" 47006000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.nor.t d0, d0, #0, d0, #0" 47004000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.or.t d0, d0, #0, d0, #0" 47002000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "and.t d0, d0, #0, d0, #0" 87000000 0x0 (set d0 (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
-d "andn.t d0, d0, #0, d0, #0" 87006000 0x0 (set d0 (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "nand.t d0, d0, #0, d0, #0" 07000000 0x0 (set d0 (ite (! (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "nor.t d0, d0, #0, d0, #0" 87004000 0x0 (set d0 (ite (! (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "or.and.t d0, d0, #0, d0, #0" c7000000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.andn.t d0, d0, #0, d0, #0" c7006000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.nor.t d0, d0, #0, d0, #0" c7004000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.or.t d0, d0, #0, d0, #0" c7002000 0x0 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
-d "or.t d0, d0, #0, d0, #0" 87002000 0x0 (set d0 (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
-d "orn.t d0, d0, #0, d0, #0" 07002000 0x0 (set d0 (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "orn.t d0, d0, #0, d0, #0" 07002000 0x0 (set d0 (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "sh.and.t d0, d0, #0, d0, #0" 27000000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.andn.t d0, d0, #0, d0, #0" 27006000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.nand.t d0, d0, #0, d0, #0" a7000000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.nor.t d0, d0, #0, d0, #0" 27004000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.or.t d0, d0, #0, d0, #0" 27002000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.orn.t d0, d0, #0, d0, #0" a7002000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.xnor.t d0, d0, #0, d0, #0" a7004000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
-d "sh.xor.t d0, d0, #0, d0, #0" a7006000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
-d "xnor.t d0, d0, #0, d0, #0" 07004000 0x0 (set d0 (ite (! (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
-d "xor.t d0, d0, #0, d0, #0" 07006000 0x0 (set d0 (ite (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
-d "ins.t d0, d0, #0, d0, #0" 67000000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x7fffffff)) (bv 32 0x1) false) (| (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x0)) (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false))))
-d "insn.t d0, d0, #0, d0, #0" 67002000 0x0 (set d0 (| (<< (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x7fffffff)) (bv 32 0x1) false) (| (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x0)) (~ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))
-d "pack d0, e0, d0" 6b000000 0x0 (seq (set int_exp (var d1)) (set int_mant (var d0)) (set flag_rnd (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x7) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x0) false) (bv 32 0x7f)))) (! (is_zero (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1)))))))) (set fp_exp (ite (|| (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f))))) (bv 32 0xff) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x17) false) (bv 32 0xff))))))) (set fp_frac (ite (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff)) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f)))) (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0)))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x0) false) (bv 32 0x7fffff))))))) (set d0 (| (<< (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x1f) false) (| (<< (var fp_exp) (bv 32 0x17) false) (var fp_frac)))))
-d "unpack e0, d0" 4b008000 0x0 (seq (set fp_exp (& (>> (var d0) (bv 32 0x17) false) (bv 32 0xff))) (set fp_frac (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x7fffff))) (set int_exp (ite (== (var fp_exp) (bv 32 0xff)) (bv 32 0xff) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0xffffff81) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (bv 32 0xffffff82) (- (var fp_exp) (bv 32 0x7f)))))) (set int_mant (ite (== (var fp_exp) (bv 32 0xff)) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0x0) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (| (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (<< (bv 32 0x1) (bv 32 0x1e) false)))))) (set temp (append (var int_exp) (var int_mant))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "trapsv" 0d004005 0x0 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1d) false) (bv 32 0x1)))) nop nop)
-d "trapv" 0d000005 0x0 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1e) false) (bv 32 0x1)))) nop nop)
-d "syscall #0" ad008000 0x0 nop
-d "rstv" 2f000000 0x0 (seq (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1d) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1b) false))))
-d "dsync" 0d008004 0x0 nop
-d "isync" 0d00c004 0x0 nop
-d "wait" 0d008005 0x0 nop
-d "disable" 0d004003 0x0 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false)))
-d "disable d0" 0d00c003 0x0 (seq (set d0 (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false))))
-d "enable" 0d000003 0x0 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false)))
-d "restore d0" 0d008003 0x0 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false)))
-d "div e0, d0, d0" 4b000102 0x0 (seq (set dividend (var d0)) (set divisor (var d0)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x0) (mod (var dividend) (var divisor))))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (ite (|| (! (sle (var dividend) (bv 32 0x0))) (== (var dividend) (bv 32 0x0))) (bv 32 0x7fffffff) (bv 32 0x80000000)) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x7fffffff) (div (- (var dividend) (var remainder)) (var divisor))))) (set temp (append (var remainder) (var quotient))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "div.u e0, d0, d0" 4b001102 0x0 (seq (set dividend (var d0)) (set divisor (var d0)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (mod (var dividend) (var divisor)))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (bv 32 0xffffffff) (div (- (var dividend) (var remainder)) (var divisor)))) (set temp (append (var remainder) (var quotient))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "dvinit e0, d0, d0" 4b00a001 0x0 (seq (set temp (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d0)) (&& (== (var d0) (bv 32 0xffffffff)) (== (var d0) (bv 32 0x80000000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvinit.b e0, d0, d0" 4b00a005 0x0 (seq (set quotient_sign (! (== (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffff)) (bv 32 0x18) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d0)) (&& (== (var d0) (bv 32 0xffffffff)) (== (var d0) (bv 32 0xffffff80))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvinit.bu e0, d0, d0" 4b00a004 0x0 (seq (set temp (cast 64 false (var d0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvinit.h e0, d0, d0" 4b00a003 0x0 (seq (set quotient_sign (! (== (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffffff)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d0)) (&& (== (var d0) (bv 32 0xffffffff)) (== (var d0) (bv 32 0xffff8000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvinit.hu e0, d0, d0" 4b00a002 0x0 (seq (set temp (cast 64 false (var d0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvinit.u e0, d0, d0" 4b00a000 0x0 (seq (set temp (cast 64 false (var d0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
-d "dvadj e0, e0, d0" 6b00d000 0x0 (seq (set q_sign (^^ (! (is_zero (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)))))) (set x_sign (! (is_zero (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1))))) (set eq_pos (&& (var x_sign) (== (var d1) (var d0)))) (set eq_neg (&& (var x_sign) (== (var d1) (~- (var d0))))) (set quotient (ite (|| (&& (var q_sign) (! (var eq_neg))) (var eq_pos)) (+ (bv 32 0x1) (var d0)) (var d0))) (set remainder (ite (|| (var eq_pos) (var eq_neg)) (bv 32 0x0) (var d1))) (set gt (! (sle (let x (var d1) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d0) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set eq (&& (! (! (is_zero (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1))))) (== (let x (var d1) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d0) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set overflow (|| (var eq) (var gt))) (set temp (ite (var overflow) (bv 64 0x40) (append (var remainder) (var quotient)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "dvstep e0, e0, d0" 6b00f000 0x0 (seq (set dividend_sign (! (is_zero (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1))))) (set divisor_sign (! (is_zero (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1))))) (set quotient_sign (! (let x (var dividend_sign) (let y (var divisor_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))))) (set addend (ite (var quotient_sign) (var d0) (~- (var d0)))) (set dividend_quotient (var d0)) (set remainder (var d1)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "dvstep.u e0, e0, d0" 6b00e000 0x0 (seq (set divisor (var d0)) (set dividend_quotient (var d0)) (set remainder (var d1)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "insert d0, d0, d0, e0" 17000000 0x0 (set d0 (let width (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d0) (~ (var mask))) (& (<< (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
-d "insert d0, d0, d0, #0, #0" 37000000 0x0 (set d0 (let mask (<< (bv 32 0x0) (bv 32 0x0) false) (| (& (var d0) (~ (var mask))) (& (<< (var d0) (bv 32 0x0) false) (var mask)))))
-d "insert d0, d0, d0, d0, #0" 57000000 0x0 (set d0 (let mask (<< (- (<< (bv 32 0x1) (bv 32 0x0) false) (bv 32 0x1)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d0) (~ (var mask))) (& (<< (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
-d "insert d0, d0, #0, e0" 97000000 0x0 (set d0 (let width (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d0) (~ (var mask))) (& (<< (bv 32 0x0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
-d "insert d0, d0, #0, #0, #0" b7000000 0x0 (set d0 (let mask (<< (bv 32 0x0) (bv 32 0x0) false) (| (& (var d0) (~ (var mask))) (& (<< (bv 32 0x0) (bv 32 0x0) false) (var mask)))))
-d "insert d0, d0, #0, d0, #0" d7000000 0x0 (set d0 (let mask (<< (bv 32 0x0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d0) (~ (var mask))) (& (<< (bv 32 0x0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
-d "dextr d0, d0, d0, #0" 77000000 0x0 (set d0 (cast 32 false (>> (append (var d0) (<< (var d0) (bv 32 0x0) false)) (bv 32 0x20) false)))
-d "dextr d0, d0, d0, d0" 17008000 0x0 (set d0 (cast 32 false (>> (append (var d0) (<< (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false)) (bv 32 0x20) false)))
-d "extr d0, d0, e0" 17004000 0x0 (set d0 (let width (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) (>> (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false)) (- (bv 32 0x20) (var width)) (msb (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false))))))
-d "extr d0, d0, #0, #1" 37004100 0x0 (set d0 (let _sext_val (cast 32 (msb (cast 1 false (>> (var d0) (bv 32 0x0) false))) (cast 1 false (>> (var d0) (bv 32 0x0) false))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x1)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x1)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x1)) (bv 32 0x0)) false))))))
-d "extr d0, d0, d0, #0" 57004000 0x0 (set d0 (>> (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x0)) false)) (- (- (bv 32 0x20) (bv 32 0x0)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x0)) (msb (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x0)) false)) (- (- (bv 32 0x20) (bv 32 0x0)) (bv 32 0x0)) false)))))
-d "extr.u d0, d0, e0" 17006000 0x0 (set d0 (let width (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false))))
-d "extr.u d0, d0, #0, #0" 37006000 0x0 (set d0 (& (>> (>> (var d0) (bv 32 0x0) false) (bv 32 0x0) false) (bv 32 0x0)))
-d "extr.u d0, d0, d0, #0" 57006000 0x0 (set d0 (& (>> (>> (var d0) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x0)) false)))
-d "bisr #0" e000 0x0 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x0) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
-d "bisr #0" ad000000 0x0 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x0) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
-d "rslcx" 0d004002 0x0 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (== (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x1)) nop nop) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set d7 (loadw 0 32 (var EA))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d4 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)))
-d "svlcx" 0d000002 0x0 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
-d "clo d0, d0" 0f00c001 0x0 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (! (is_zero (& (>> (var d0) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n (+ (var n) (bv 32 0x1)))) (set d0 (var n)))
-d "clo.h d0, d0" 0f00d007 0x0 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d0 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
-d "cls d0, d0" 0f00d001 0x0 (seq (set n (bv 32 0x1e)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (== (& (>> (var d0) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (var d0) (bv 32 0x1f) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d0 (var n)))
-d "cls.h d0, d0" 0f00e007 0x0 (seq (set n0 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (== (& (>> (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (== (& (>> (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d0 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
-d "clz d0, d0" 0f00b001 0x0 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (is_zero (& (>> (var d0) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d0 (var n)))
-d "clz.h d0, d0" 0f00c007 0x0 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d0 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
-d "cachea.i [a0+]#0" 89008003 0x0 nop
-d "cachea.i [p0+r]" a9008003 0x0 nop
-d "cachea.i [+a0]#0" 89008007 0x0 nop
-d "cachea.i [p0+c]#0" a9008007 0x0 nop
-d "cachea.i [a0]#0" 8900800b 0x0 nop
-d "cachea.w [a0+]#0" 89000003 0x0 nop
-d "cachea.w [p0+r]" a9000003 0x0 nop
-d "cachea.w [+a0]#0" 89000007 0x0 nop
-d "cachea.w [p0+c]#0" a9000007 0x0 nop
-d "cachea.w [a0]#0" 8900000b 0x0 nop
-d "cachea.wi [a0+]#0" 89004003 0x0 nop
-d "cachea.wi [p0+r]" a9004003 0x0 nop
-d "cachea.wi [+a0]#0" 89004007 0x0 nop
-d "cachea.wi [p0+c]#0" a9004007 0x0 nop
-d "cachea.wi [a0]#0" 8900400b 0x0 nop
-d "cachei.i [a0+]#0" 89008002 0x0 nop
-d "cachei.i [+a0]#0" 89008006 0x0 nop
-d "cachei.i [a0]#0" 8900800a 0x0 nop
-d "cachei.w [a0+]#0" 8900c002 0x0 nop
-d "cachei.w [+a0]#0" 8900c006 0x0 nop
-d "cachei.w [a0]#0" 8900c00a 0x0 nop
-d "cachei.wi [a0+]#0" 8900c003 0x0 nop
-d "cachei.wi [+a0]#0" 8900c007 0x0 nop
-d "cachei.wi [a0]#0" 8900c00b 0x0 nop
-d "crc32.b d0, d0, d0" 4b006000 0x0 (seq (set A (let tmp (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (<< (var A) (bv 32 0x18) false) (~ (let tmp (var d0) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d0 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x8))) (bv 32 0x20) (bv 32 0x8)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
-d "crc32b.w d0, d0, d0" 4b003000 0x0 (seq (set A (let tmp (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set B (let tmp (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set C (let tmp (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set D (let tmp (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (| (<< (var A) (bv 32 0x18) false) (| (<< (var B) (bv 32 0x10) false) (| (<< (var C) (bv 32 0x8) false) (var D)))) (~ (let tmp (var d0) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d0 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x20))) (bv 32 0x20) (bv 32 0x20)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
-d "crc32l.w d0, d0, d0" 4b007000 0x0 (seq (set A (let tmp (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set B (let tmp (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set C (let tmp (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set D (let tmp (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (| (<< (var A) (bv 32 0x18) false) (| (<< (var B) (bv 32 0x10) false) (| (<< (var C) (bv 32 0x8) false) (var D)))) (~ (let tmp (var d0) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d0 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x20))) (bv 32 0x20) (bv 32 0x20)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
-d "crcn d0, d0, d0, d0" 6b001000 0x0 (seq (set N (+ (& (>> (var d0) (bv 32 0xc) false) (bv 32 0xf)) (bv 32 0x1))) (set GEN (& (>> (var d0) (bv 32 0x10) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (+ (bv 32 0x10) (var N)) (bv 32 0x1))) false))) (set INV (! (is_zero (& (>> (var d0) (bv 32 0x9) false) (bv 32 0x1))))) (set LITTLE_E (! (is_zero (& (>> (var d0) (bv 32 0x8) false) (bv 32 0x1))))) (set M (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x7)) (bv 32 0x1))) (set data (& (>> (var d0) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (var M) (bv 32 0x1))) false))) (branch (var LITTLE_E) (seq (set data (var data)) (set reverseV_i (bv 32 0x0)) (repeat (&& (ule (var reverseV_i) (var M)) (! (== (var reverseV_i) (var M)))) (seq (set data (let swap_bit_i_x (var data) (let swap_bit_i_ia (var reverseV_i) (let swap_bit_i_ib (- (bv 32 0x1f) (var reverseV_i)) (let swap_bit_i_a (& (>> (var swap_bit_i_x) (var swap_bit_i_ia) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (let swap_bit_i_b (& (>> (var swap_bit_i_x) (var swap_bit_i_ib) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (let swap_bit_i_1 (| (& (var swap_bit_i_x) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false) (var swap_bit_i_ia) false))) (& (<< (var swap_bit_i_b) (var swap_bit_i_ia) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false) (var swap_bit_i_ia) false))) (| (& (var swap_bit_i_1) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false) (var swap_bit_i_ib) false))) (& (<< (var swap_bit_i_a) (var swap_bit_i_ib) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false) (var swap_bit_i_ib) false)))))))))) (set reverseV_i (+ (var reverseV_i) (bv 32 0x1)))))) nop) (set seed (& (>> (var d0) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (var N) (bv 32 0x1))) false))) (branch (var INV) (set seed (~ (var seed))) nop) (set crc_in (ite (ule (var N) (var M)) (& (>> (^ (var data) (<< (var seed) (- (var M) (var N)) false)) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (var M) (bv 32 0x1))) false)) (& (>> (^ (var seed) (<< (var data) (- (var N) (var M)) false)) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (var M) (bv 32 0x1))) false)))) (set result (let shift (ite (! (ule (var N) (var M))) (var N) (var M)) (mod (<< (var crc_in) (var shift) false) (| (var GEN) (<< (bv 32 0x1) (var N) false))))) (branch (var INV) (set result (~ (var result))) nop) (set d0 (& (>> (var result) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (- (var N) (bv 32 0x1))) false))))
-d "ixmax e0, e0, d0" 6b00a000 0x0 (seq (set Ec15_0 (mod (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ixmax.u e0, e0, d0" 6b00b000 0x0 (seq (set Ec15_0 (mod (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ixmin e0, e0, d0" 6b008000 0x0 (seq (set Ec15_0 (mod (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "ixmin.u e0, e0, d0" 6b009000 0x0 (seq (set Ec15_0 (mod (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "j #0" 1d000000 0x0 (jmp (bv 32 0x0))
-d "ja #0" 9d000000 0x0 (jmp (bv 32 0x0))
-d "jla #0" dd000000 0x0 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0x0)))
-d "jlez d0, #0" 8e00 0x0 (branch (sle (var d0) (bv 32 0x0)) (jmp (bv 32 0x0)) nop)
-d "jli a0" 2d002000 0x0 (seq (set a11 (bv 32 0x4)) (jmp (& (var a0) (bv 32 0xfffffffe))))
-d "jlt d0, d0, #0" 3f000000 0x0 (branch (sle (var d0) (var d0)) (jmp (bv 32 0x0)) nop)
-d "jlt d0, #0, #0" bf000000 0x0 (branch (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (jmp (bv 32 0x0)) nop)
-d "jlt.u d0, d0, #0" 3f000080 0x0 (branch (ule (var d0) (var d0)) (jmp (bv 32 0x0)) nop)
-d "jlt.u d0, #0, #0" bf000080 0x0 (branch (&& (ule (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (jmp (bv 32 0x0)) nop)
-d "jltz d0, #0" 0e00 0x0 (branch (&& (sle (var d0) (bv 32 0x0)) (! (== (var d0) (bv 32 0x0)))) (jmp (bv 32 0x0)) nop)
-d "jne d15, d0, #0x20" fe00 0x0 (branch (! (== (var d15) (var d0))) (jmp (bv 32 0x20)) nop)
-d "jne d15, #0, #0x20" de00 0x0 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0x20)) nop)
-d "jne d15, d0, #0" 7e00 0x0 (branch (! (== (var d15) (var d0))) (jmp (bv 32 0x0)) nop)
-d "jne d15, #0, #0" 5e00 0x0 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jne d0, d0, #0" 5f000080 0x0 (branch (! (== (var d0) (var d0))) (jmp (bv 32 0x0)) nop)
-d "jne d0, #0, #0" df000080 0x0 (branch (! (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jne.a a0, a0, #0" 7d000080 0x0 (branch (! (== (var a0) (var a0))) (jmp (bv 32 0x0)) nop)
-d "jned d0, d0, #0" 1f000080 0x0 (seq (set PC (ite (! (== (var d0) (var d0))) (bv 32 0x0) (bv 32 0x4))) (set d0 (- (var d0) (bv 32 0x1))) (jmp (var PC)))
-d "jned d0, #0, #0" 9f000080 0x0 (seq (set PC (ite (! (== (var d0) (bv 32 0x0))) (bv 32 0x0) (bv 32 0x4))) (set d0 (- (var d0) (bv 32 0x1))) (jmp (var PC)))
-d "jnei d0, d0, #0" 1f000000 0x0 (seq (set PC (ite (! (== (var d0) (var d0))) (bv 32 0x0) (bv 32 0x4))) (set d0 (+ (var d0) (bv 32 0x1))) (jmp (var PC)))
-d "jnei d0, #0, #0" 9f000000 0x0 (seq (set PC (ite (! (== (var d0) (bv 32 0x0))) (bv 32 0x0) (bv 32 0x4))) (set d0 (+ (var d0) (bv 32 0x1))) (jmp (var PC)))
-d "jnz d15, #0" ee00 0x0 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jnz d0, #0" f600 0x0 (branch (! (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jnz.a a0, #0" 7c00 0x0 (branch (! (== (var a0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jnz.a a0, #0" bd000080 0x0 (branch (! (== (var a0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jnz.t d15, #0, #0" ae00 0x0 (branch (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (jmp (bv 32 0x0)) nop)
-d "jnz.t d0, #0, #0" 6f000080 0x0 (branch (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (jmp (bv 32 0x0)) nop)
-d "ji a0" dc00 0x0 (jmp (& (var a0) (bv 32 0xfffffffe)))
-d "ji a0" 2d003000 0x0 (jmp (& (var a0) (bv 32 0xfffffffe)))
-d "jl #0" 5d000000 0x0 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0x0)))
-d "jeq d15, d0, #0x20" be00 0x0 (branch (== (var d15) (var d0)) (jmp (bv 32 0x20)) nop)
-d "jeq d15, #0, #0x20" 9e00 0x0 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0x20)) nop)
-d "jeq d15, d0, #0" 3e00 0x0 (branch (== (var d15) (var d0)) (jmp (bv 32 0x0)) nop)
-d "jeq d15, #0, #0" 1e00 0x0 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0x0)) nop)
-d "jeq d0, d0, #0" 5f000000 0x0 (branch (== (var d0) (var d0)) (jmp (bv 32 0x0)) nop)
-d "jeq d0, #0, #0" df000000 0x0 (branch (== (var d0) (bv 32 0x0)) (jmp (bv 32 0x0)) nop)
-d "jeq.a a0, a0, #0" 7d000000 0x0 (branch (== (var a0) (var a0)) (jmp (bv 32 0x0)) nop)
-d "jge d0, d0, #0" 7f000000 0x0 (branch (|| (! (sle (var d0) (var d0))) (== (var d0) (var d0))) (jmp (bv 32 0x0)) nop)
-d "jge d0, #0, #0" ff000000 0x0 (branch (|| (! (sle (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jge.u d0, d0, #0" 7f000080 0x0 (branch (|| (! (ule (var d0) (var d0))) (== (var d0) (var d0))) (jmp (bv 32 0x0)) nop)
-d "jge.u d0, #0, #0" ff000080 0x0 (branch (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jgez d0, #0" ce00 0x0 (branch (|| (! (ule (var d0) (bv 32 0x0))) (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jgtz d0, #0" 4e00 0x0 (branch (! (ule (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
-d "jz d15, #0" 6e00 0x0 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0x0)) nop)
-d "jz d0, #0" 7600 0x0 (branch (is_zero (var d0)) (jmp (bv 32 0x0)) nop)
-d "jz.a a0, #0" bc00 0x0 (branch (is_zero (var a0)) (jmp (bv 32 0x0)) nop)
-d "jz.a a0, #0" bd000000 0x0 (branch (== (var a0) (bv 32 0x0)) (jmp (bv 32 0x0)) nop)
-d "jz.t d15, #0, #0" 2e00 0x0 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1))))) (jmp (bv 32 0x0)) nop)
-d "jz.t d0, #0, #0" 6f000000 0x0 (branch (! (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1))))) (jmp (bv 32 0x0)) nop)
-d "jz.t d15, #0x14, #0x10" ef4f0800 0x0 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x14) false) (bv 32 0x1))))) (jmp (bv 32 0x10)) nop)
-d "loop a0, #0xffffffe0" fc00 0x0 (seq (set PC (ite (! (is_zero (var a0))) (bv 32 0xffffffe0) (bv 32 0x2))) (set a0 (- (var a0) (bv 32 0x1))) (jmp (var PC)))
-d "loop a0, #0" fd000000 0x0 (seq (set PC (ite (! (is_zero (var a0))) (bv 32 0x0) (bv 32 0x4))) (set a0 (- (var a0) (bv 32 0x1))) (jmp (var PC)))
-d "loopu #0" fd000080 0x0 (jmp (bv 32 0x0))
-d "cmpswap.w [a0]#0, e0" 4900c008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)))
-d "cmpswap.w [p0+r], e0" 6900c000 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (| (<< (var incr) (bv 32 0x10) false) (& (>> (var new_index) (bv 32 0x0) false) (bv 32 0xffff)))))
-d "cmpswap.w [p0+c]#0, e0" 6900c004 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (&& (sle (var new_index) (bv 32 0x0)) (! (== (var new_index) (bv 32 0x0)))) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (| (<< (var length) (bv 32 0x10) false) (& (>> (var new_index) (bv 32 0x0) false) (bv 32 0xffff)))))
-d "cmpswap.w [a0+]#0, e0" 4900c000 0x0 (seq (set EA (var a0)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)) (set a0 (var EA)))
-d "cmpswap.w [+a0]#0, e0" 4900c004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)) (set a0 (var EA)))
-d "madd d0, d0, d0, d0" 03000a00 0x0 (seq (set result (+ (var d0) (* (var d0) (var d0)))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madd d0, d0, d0, #0" 13002000 0x0 (seq (set result (+ (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madd e0, e0, d0, #0" 13006000 0x0 (seq (set result (+ (append (var d1) (var d0)) (cast 64 false (* (var d0) (bv 32 0x0))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madd e0, e0, d0, d0" 03006a00 0x0 (seq (set result (+ (append (var d1) (var d0)) (cast 64 false (* (var d0) (var d0))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madds d0, d0, d0, d0" 03008a00 0x0 (seq (set result (+ (var d0) (* (var d0) (var d0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madds d0, d0, d0, #0" 1300a000 0x0 (seq (set result (+ (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madds e0, e0, d0, #0" 1300e000 0x0 (seq (set result (+ (append (var d1) (var d0)) (cast 64 false (* (var d0) (bv 32 0x0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "madds e0, e0, d0, d0" 0300ea00 0x0 (seq (set result (+ (append (var d1) (var d0)) (cast 64 false (* (var d0) (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddm.h e0, e0, d0, d0ul, #0" 83007000 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddm.h e0, e0, d0, d0lu, #0" 83007400 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddm.h e0, e0, d0, d0ll, #0" 83007800 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddm.h e0, e0, d0, d0uu, #0" 83007c00 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddms.h e0, e0, d0, d0ul, #0" 8300f000 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddms.h e0, e0, d0, d0lu, #0" 8300f400 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddms.h e0, e0, d0, d0ll, #0" 8300f800 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddms.h e0, e0, d0, d0uu, #0" 8300fc00 0x0 (seq (set madd_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.h d0, e0, d0, d0ul, #0" 43007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (var d1) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (var d0) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.h d0, d0, d0, d0ul, #0" 83003000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.h d0, d0, d0, d0lu, #0" 83003400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.h d0, d0, d0, d0ll, #0" 83003800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.h d0, d0, d0, d0uu, #0" 83003c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.q d0, d0, d0u, d0u, #0" 43001800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddr.q d0, d0, d0l, d0l, #0" 43001c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.h d0, e0, d0, d0ul, #0" 4300f800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (var d1) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (var d0) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.h d0, d0, d0, d0ul, #0" 8300b000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.h d0, d0, d0, d0lu, #0" 8300b400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.h d0, d0, d0, d0ll, #0" 8300b800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.h d0, d0, d0, d0uu, #0" 8300bc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.q d0, d0, d0u, d0u, #0" 43009800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddrs.q d0, d0, d0l, d0l, #0" 43009c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsu.h e0, e0, d0, d0ul, #0" c3006000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsu.h e0, e0, d0, d0lu, #0" c3006400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsu.h e0, e0, d0, d0ll, #0" c3006800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsu.h e0, e0, d0, d0uu, #0" c3006c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsum.h e0, e0, d0, d0ul, #0" c3007000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsum.h e0, e0, d0, d0lu, #0" c3007400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsum.h e0, e0, d0, d0ll, #0" c3007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsum.h e0, e0, d0, d0uu, #0" c3007c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsums.h e0, e0, d0, d0ul, #0" c300f000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsums.h e0, e0, d0, d0lu, #0" c300f400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsums.h e0, e0, d0, d0ll, #0" c300f800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsums.h e0, e0, d0, d0uu, #0" c300fc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsur.h d0, d0, d0, d0ul, #0" c3003000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsur.h d0, d0, d0, d0lu, #0" c3003400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsur.h d0, d0, d0, d0ll, #0" c3003800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsur.h d0, d0, d0, d0uu, #0" c3003c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsurs.h d0, d0, d0, d0ul, #0" c300b000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsurs.h d0, d0, d0, d0lu, #0" c300b400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsurs.h d0, d0, d0, d0ll, #0" c300b800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsurs.h d0, d0, d0, d0uu, #0" c300bc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsus.h e0, e0, d0, d0ul, #0" c300e000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsus.h e0, e0, d0, d0lu, #0" c300e400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsus.h e0, e0, d0, d0ll, #0" c300e800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "maddsus.h e0, e0, d0, d0uu, #0" c300ec00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub d0, d0, d0, d0" 23000a00 0x0 (seq (set result (- (var d0) (* (var d0) (var d0)))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub d0, d0, d0, #0" 33002000 0x0 (seq (set result (- (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub e0, e0, d0, #0" 33006000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (bv 64 0x0)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub e0, e0, d0, d0" 23006a00 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs d0, d0, d0, d0" 23008a00 0x0 (seq (set result (- (var d0) (* (var d0) (var d0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs d0, d0, d0, #0" 3300a000 0x0 (seq (set result (- (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs e0, e0, d0, #0" 3300e000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (bv 64 0x0)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs e0, e0, d0, d0" 2300ea00 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0ul, #0" a300e000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0lu, #0" a300e400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0ll, #0" a300e800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0uu, #0" a300ec00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0u, d0u, #0" 63009000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0u, #0" 63008000 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0l, #0" 63008400 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0, #0" 63008800 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x20) false) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false)) (bv 32 0x20) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0l, d0l, #0" 63009400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0u, #0" 6300e000 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0l, #0" 6300e400 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0, #0" 6300ec00 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0u, d0u, #0" 6300f000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0l, d0l, #0" 6300f400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u d0, d0, d0, #0" 33008000 0x0 (seq (set result (- (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u d0, d0, d0, d0" 23008800 0x0 (seq (set result (- (var d0) (* (var d0) (var d0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u e0, e0, d0, #0" 3300c000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (bv 64 0x0)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u e0, e0, d0, d0" 2300e800 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (cast 64 false (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.h e0, e0, d0, d0ul, #0" a3006000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.h e0, e0, d0, d0lu, #0" a3006400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.h e0, e0, d0, d0ll, #0" a3006800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.h e0, e0, d0, d0uu, #0" a3006c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q d0, d0, d0u, d0u, #0" 63001000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q d0, d0, d0, d0u, #0" 63000000 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q d0, d0, d0, d0l, #0" 63000400 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q d0, d0, d0, d0, #0" 63000800 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x20) false) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false)) (bv 32 0x20) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q d0, d0, d0l, d0l, #0" 63001400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q e0, e0, d0, d0u, #0" 63006000 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q e0, e0, d0, d0l, #0" 63006400 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q e0, e0, d0, d0, #0" 63006c00 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q e0, e0, d0u, d0u, #0" 63007000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.q e0, e0, d0l, d0l, #0" 63007400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.u e0, e0, d0, #0" 33004000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (bv 64 0x0)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msub.u e0, e0, d0, d0" 23006800 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (cast 64 false (var d0))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubad.h e0, e0, d0, d0ul, #0" e3006000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubad.h e0, e0, d0, d0lu, #0" e3006400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubad.h e0, e0, d0, d0ll, #0" e3006800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubad.h e0, e0, d0, d0uu, #0" e3006c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadm.h e0, e0, d0, d0ul, #0" e3007000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadm.h e0, e0, d0, d0lu, #0" e3007400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadm.h e0, e0, d0, d0ll, #0" e3007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadm.h e0, e0, d0, d0uu, #0" e3007c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadms.h e0, e0, d0, d0ul, #0" e300f000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadms.h e0, e0, d0, d0lu, #0" e300f400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadms.h e0, e0, d0, d0ll, #0" e300f800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadms.h e0, e0, d0, d0uu, #0" e300fc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadr.h d0, d0, d0, d0ul, #0" e3003000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadr.h d0, d0, d0, d0lu, #0" e3003400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadr.h d0, d0, d0, d0ll, #0" e3003800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadr.h d0, d0, d0, d0uu, #0" e3003c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadrs.h d0, d0, d0, d0ul, #0" e300b000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadrs.h d0, d0, d0, d0lu, #0" e300b400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadrs.h d0, d0, d0, d0ll, #0" e300b800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubadrs.h d0, d0, d0, d0uu, #0" e300bc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubads.h e0, e0, d0, d0ul, #0" e300e000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubads.h e0, e0, d0, d0lu, #0" e300e400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubads.h e0, e0, d0, d0ll, #0" e300e800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubads.h e0, e0, d0, d0uu, #0" e300ec00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubm.h e0, e0, d0, d0ul, #0" a3007000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubm.h e0, e0, d0, d0lu, #0" a3007400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubm.h e0, e0, d0, d0ll, #0" a3007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubm.h e0, e0, d0, d0uu, #0" a3007c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubms.h e0, e0, d0, d0ul, #0" a300f000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubms.h e0, e0, d0, d0lu, #0" a300f400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubms.h e0, e0, d0, d0ll, #0" a300f800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubms.h e0, e0, d0, d0uu, #0" a300fc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.h d0, e0, d0, d0ul, #0" 63007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (var d1) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d0) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.h d0, d0, d0, d0ul, #0" a3003000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.h d0, d0, d0, d0lu, #0" a3003400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.h d0, d0, d0, d0ll, #0" a3003800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.h d0, d0, d0, d0uu, #0" a3003c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.q d0, d0, d0u, d0u, #0" 63001800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (- (var d0) (var mul_res)) (bv 32 0x8000))) (set d0 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubr.q d0, d0, d0l, d0l, #0" 63001c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (- (var d0) (var mul_res)) (bv 32 0x8000))) (set d0 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.h d0, e0, d0, d0ul, #0" 6300f800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (var d1) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d0) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.h d0, d0, d0, d0ul, #0" a300b000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.h d0, d0, d0, d0lu, #0" a300b400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.h d0, d0, d0, d0ll, #0" a300b800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.h d0, d0, d0, d0uu, #0" a300bc00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.q d0, d0, d0u, d0u, #0" 63009800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (- (var d0) (var mul_res)) (bv 32 0x8000))) (set d0 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubrs.q d0, d0, d0l, d0l, #0" 63009c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (- (var d0) (var mul_res)) (bv 32 0x8000))) (set d0 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs d0, d0, d0, d0" 23008a00 0x0 (seq (set result (- (var d0) (* (var d0) (var d0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs d0, d0, d0, #0" 3300a000 0x0 (seq (set result (- (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs e0, e0, d0, #0" 3300e000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (bv 64 0x0)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs e0, e0, d0, d0" 2300ea00 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0ul, #0" a300e000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0lu, #0" a300e400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0ll, #0" a300e800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.h e0, e0, d0, d0uu, #0" a300ec00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0u, d0u, #0" 63009000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0u, #0" 63008000 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0l, #0" 63008400 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0, d0, #0" 63008800 0x0 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x20) false) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false)) (bv 32 0x20) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q d0, d0, d0l, d0l, #0" 63009400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d0) (var mul_res))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0u, #0" 6300e000 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0l, #0" 6300e400 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0, d0, #0" 6300ec00 0x0 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d0)) (cast 64 false (var d0))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0u, d0u, #0" 6300f000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.q e0, e0, d0l, d0l, #0" 6300f400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u d0, d0, d0, #0" 33008000 0x0 (seq (set result (- (var d0) (* (var d0) (bv 32 0x0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u d0, d0, d0, d0" 23008800 0x0 (seq (set result (- (var d0) (* (var d0) (var d0)))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u e0, e0, d0, #0" 3300c000 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (bv 64 0x0)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "msubs.u e0, e0, d0, d0" 2300e800 0x0 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d0)) (cast 64 false (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub d0, d15, d0" 5200 0x0 (seq (set result (- (var d15) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub d15, d0, d0" 5a00 0x0 (seq (set result (- (var d0) (var d0))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub d0, d0" a200 0x0 (seq (set result (- (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub d0, d0, d0" 0b008000 0x0 (seq (set result (- (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub.a sp, #0" 2000 0x0 (set a10 (- (var a10) (bv 32 0x0)))
-d "sub.a a0, a0, a0" 01002000 0x0 (set a0 (- (var a0) (var a0)))
-d "sub.h d0, d0, d0" 0b008006 0x0 (seq (set result_hw1 (- (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (- (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subc d0, d0, d0" 0b00d000 0x0 (seq (set result (- (+ (var d0) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (+ (var d0) (bv 32 0x1)))) (set d0 (var result)) (set carry_out (& (>> (+ (+ (var d0) (~- (var d0))) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "subs d0, d0" 6200 0x0 (seq (set result (let x (- (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subs d0, d0, d0" 0b00a000 0x0 (seq (set result (let x (- (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subs.h d0, d0, d0" 0b00a006 0x0 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subs.hu d0, d0, d0" 0b00b006 0x0 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subs.u d0, d0, d0" 0b00b000 0x0 (seq (set result (let x (- (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "subx d0, d0, d0" 0b00c000 0x0 (seq (set result (- (var d0) (var d0))) (set d0 (var result)) (set carry_out (& (>> (+ (+ (var d0) (~- (var d0))) (bv 32 0x1)) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
-d "sub.b d0, d0, d0" 0b008004 0x0 (seq (set result_byte3 (- (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (- (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (- (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (- (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sub.h d0, d0, d0" 0b008006 0x0 (seq (set result_hw1 (- (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (- (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "csub d0, d0, d0, d0" 2b002000 0x0 (seq (set condition (! (is_zero (var d0)))) (set result (ite (var condition) (- (var d0) (var d0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "csubn d0, d0, d0, d0" 2b003000 0x0 (seq (set condition (is_zero (var d0))) (set result (ite (var condition) (- (var d0) (var d0)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul d0, d0" e200 0x0 (seq (set result (* (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul d0, d0, #0" 53002000 0x0 (seq (set result (* (var d0) (bv 32 0x0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul d0, d0, d0" 73000a00 0x0 (seq (set result (* (var d0) (var d0))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul e0, d0, #0" 53006000 0x0 (seq (set result (* (cast 64 (msb (var d0)) (var d0)) (bv 64 0x0))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul e0, d0, d0" 73006a00 0x0 (seq (set result (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.h e0, d0, d0ul, #0" b3006000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.h e0, d0, d0lu, #0" b3006400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.h e0, d0, d0ll, #0" b3006800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.h e0, d0, d0uu, #0" b3006c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q d0, d0, d0u, #0" 93000000 0x0 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false) (bv 32 0x10) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q d0, d0, d0l, #0" 93000400 0x0 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false) (bv 32 0x10) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q d0, d0, d0, #0" 93000800 0x0 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0))) (bv 32 0x0) false) (bv 32 0x20) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q d0, d0u, d0u, #0" 93001000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q d0, d0l, d0l, #0" 93001400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q e0, d0, d0u, #0" 93006000 0x0 (seq (set result (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q e0, d0, d0l, #0" 93006400 0x0 (seq (set result (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.q e0, d0, d0, #0" 93006c00 0x0 (seq (set result (<< (* (cast 64 (msb (var d0)) (var d0)) (cast 64 (msb (var d0)) (var d0))) (bv 32 0x0) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.u e0, d0, #0" 53004000 0x0 (seq (set result (* (cast 64 false (var d0)) (bv 64 0x0))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mul.u e0, d0, d0" 73006800 0x0 (seq (set result (* (cast 64 false (var d0)) (cast 64 false (var d0)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "muls d0, d0, #0" 5300a000 0x0 (seq (set result (let x (* (var d0) (bv 32 0x0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "muls d0, d0, d0" 73008a00 0x0 (seq (set result (let x (* (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "muls.u d0, d0, #0" 53008000 0x0 (seq (set result (let x (* (var d0) (bv 32 0x0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "muls.u d0, d0, d0" 73008800 0x0 (seq (set result (let x (* (var d0) (var d0)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulm.h e0, d0, d0ul, #0" b3007000 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulm.h e0, d0, d0lu, #0" b3007400 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulm.h e0, d0, d0ll, #0" b3007800 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulm.h e0, d0, d0uu, #0" b3007c00 0x0 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulr.h d0, d0, d0ul, #0" b3003000 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulr.h d0, d0, d0lu, #0" b3003400 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulr.h d0, d0, d0ll, #0" b3003800 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulr.h d0, d0, d0uu, #0" b3003c00 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "mulr.q d0, d0u, d0u, #0" 93001800 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
-d "mulr.q d0, d0l, d0l, #0" 93001c00 0x0 (seq (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
-d "parity d0, d0" 4b002000 0x0 (set d0 (let _31_24 (ite (^^ (^^ (! (is_zero (& (>> (var d0) (bv 32 0x18) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x19) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x1a) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x1b) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x1c) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x1d) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _23_16 (ite (^^ (^^ (! (is_zero (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x11) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x12) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x13) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x14) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x15) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x17) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _15_8 (ite (^^ (^^ (! (is_zero (& (>> (var d0) (bv 32 0x8) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x9) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0xa) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0xb) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0xc) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0xd) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0xe) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0xf) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _7_0 (ite (^^ (^^ (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x3) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x4) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x5) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d0) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x7) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (append (append (var _31_24) (var _23_16)) (append (var _15_8) (var _7_0))))))))
-d "popcnt.w d0, d0" 4b002002 0x0 (seq (set cnt (bv 32 0x0)) (set _index (bv 32 0x0)) (repeat (&& (ule (var _index) (bv 32 0x20)) (! (== (var _index) (bv 32 0x20)))) (set name (ite (! (is_zero (& (>> (var d0) (var _index) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (+ (var cnt) (bv 32 0x1)) (var cnt)))) (set d0 (var cnt)))
-d "sat.b d0" 3200 0x0 (set d0 (let sat_neg (ite (&& (sle (var d0) (bv 32 0xffffff80)) (! (== (var d0) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d0)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
-d "sat.b d0, d0" 0b00e005 0x0 (set d0 (let sat_neg (ite (&& (sle (var d0) (bv 32 0xffffff80)) (! (== (var d0) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d0)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
-d "sat.bu d0" 3210 0x0 (set d0 (ite (! (sle (var d0) (bv 32 0xff))) (bv 32 0xff) (var d0)))
-d "sat.bu d0, d0" 0b00f005 0x0 (set d0 (ite (! (sle (var d0) (bv 32 0xff))) (bv 32 0xff) (var d0)))
-d "sat.h d0" 3220 0x0 (set d0 (let sat_neg (ite (&& (sle (var d0) (bv 32 0xffff8000)) (! (== (var d0) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d0)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
-d "sat.h d0, d0" 0b00e007 0x0 (set d0 (let sat_neg (ite (&& (sle (var d0) (bv 32 0xffff8000)) (! (== (var d0) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d0)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
-d "sat.hu d0" 3230 0x0 (set d0 (ite (! (sle (var d0) (bv 32 0xffff))) (bv 32 0xffff) (var d0)))
-d "sat.hu d0, d0" 0b00f007 0x0 (set d0 (ite (! (sle (var d0) (bv 32 0xffff))) (bv 32 0xffff) (var d0)))
-d "sel d0, d0, d0, d0" 2b004000 0x0 (set d0 (ite (! (is_zero (var d0))) (var d0) (var d0)))
-d "sel d0, d0, d0, #0" ab008000 0x0 (set d0 (ite (! (is_zero (var d0))) (var d0) (bv 32 0x0)))
-d "seln d0, d0, d0, d0" 2b005000 0x0 (set d0 (ite (is_zero (var d0)) (var d0) (var d0)))
-d "seln d0, d0, d0, #0" ab00a000 0x0 (set d0 (ite (is_zero (var d0)) (var d0) (bv 32 0x0)))
-d "mfcr d0, #0xfe04" 4d40e00f 0x0 (set d0 (var PSW))
-d "mtcr #-0x1fc, d0" cd40e00f 0x0 (set PSW (var d0))
-d "bmerge d0, d0, d0" 4b001000 0x0 (set d0 (append (append (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x0) false))))))) (append (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))
-d "bsplit e0, d0" 4b009000 0x0 (seq (set temp (| (<< (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0x1d) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0x1b) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x19) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x17) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x13) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x11) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x0) false)))))))) (bv 32 0x20) false) (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0x1e) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0x1c) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0x1a) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x18) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x16) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x12) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d0) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d0) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d0) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d0) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d0) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d0) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d0) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
-d "shuffle d0, d0, #0" 8f00e000 0x0 (set d0 (let A (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (let B (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (let C (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (let D (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (append (var A) (append (var B) (append (var C) (var D)))))))))
-d "sha d0, #0" 8600 0x0 (seq (set carry_out (let shift_count (bv 32 0x0) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d0) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0x0) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sha d0, d0, d0" 0f001000 0x0 (seq (set carry_out (let shift_count (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d0) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sha d0, d0, #0" 8f002000 0x0 (seq (set carry_out (let shift_count (bv 32 0x0) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d0) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0x0) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sha.h d0, d0, d0" 0f001004 0x0 (set d0 (let shift_count (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
-d "sha.h d0, d0, #0" 8f002008 0x0 (set d0 (let shift_count (bv 32 0x0) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
-d "shas d0, d0, d0" 0f002000 0x0 (seq (set result (let x (let sh_c (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "shas d0, d0, #0" 8f004000 0x0 (seq (set result (let x (let sh_c (bv 32 0x0) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
-d "sh d0, #0" 0600 0x0 (set d0 (let sh_c (bv 32 0x0) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
-d "sh d0, d0, d0" 0f000000 0x0 (set d0 (let sh_c (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
-d "sh d0, d0, #0" 8f000000 0x0 (set d0 (let sh_c (bv 32 0x0) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
-d "sh.h d0, d0, d0" 0f000004 0x0 (set d0 (let shift_count (let _sext_val (cast 32 (msb (var d0)) (var d0)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
-d "sh.h d0, d0, #0" 8f000008 0x0 (set d0 (let shift_count (bv 32 0x0) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
-d "st.a [sp]#0, a15" f800 0x0 (storew 0 (+ (var a10) (bv 32 0x0)) (cast 32 false (var a15)))
-d "st.a [a0]#0, a15" ec00 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 32 false (var a15)))
-d "st.a [a15]#0, a0" e800 0x0 (storew 0 (+ (var a15) (bv 32 0x0)) (cast 32 false (var a0)))
-d "st.a [a0+], a0" e400 0x0 (seq (storew 0 (var a0) (cast 32 false (var a0))) (set a0 (+ (var a0) (bv 32 0x4))))
-d "st.a [a0], a0" f400 0x0 (storew 0 (var a0) (cast 32 false (var a0)))
-d "st.a [a0]#0, a0" b5000000 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 32 false (var a0)))
-d "st.a [a0+]#0, a0" 89008001 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (var a0)) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.a [p0+r], a0" a9008001 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (var a0)) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.a [+a0]#0, a0" 89008005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (var a0)) (set a0 (var EA)))
-d "st.a [p0+c]#0, a0" a9008005 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (var a0)) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.a #0, a0" a5000008 0x0 (storew 0 (bv 32 0x0) (var a0))
-d "st.a [a0]#0, a0" 89008009 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (var a0))
-d "st.b [a0], d0" 3400 0x0 (storew 0 (var a0) (cast 8 false (var d0)))
-d "st.b [a15]#0, d0" 2800 0x0 (storew 0 (+ (var a15) (bv 32 0x0)) (cast 8 false (var d0)))
-d "st.b [a0]#0, d15" 2c00 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 8 false (var a15)))
-d "st.b [a0+], d0" 2400 0x0 (seq (storew 0 (var a0) (cast 8 false (var d0))) (set a0 (+ (var a0) (bv 32 0x1))))
-d "st.b [a0]#0, d0" e9000000 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 8 false (var d0)))
-d "st.b #0, d0" 25000000 0x0 (storew 0 (bv 32 0x0) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))))
-d "st.b [a0+]#0, d0" 89000000 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.b [p0+r], d0" a9000000 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 8 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.b [+a0]#0, d0" 89000004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff))) (set a0 (var EA)))
-d "st.b [p0+c]#0, d0" a9000004 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 8 false (var d0))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.b [a0]#0, d0" 89000008 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)))
-d "st.d [a0+]#0, e0" 89004001 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (append (var d1) (var d0))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.d [p0+r], e0" a9004001 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 8 false (& (>> (append (var d1) (var d0)) (bv 64 0x0) false) (bv 64 0xff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.d #0, e0" a5000004 0x0 (storew 0 (bv 32 0x0) (append (var d1) (var d0)))
-d "st.d [+a0]#0, e0" 89004005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (append (var d1) (var d0))) (set a0 (var EA)))
-d "st.d [p0+c]#0, e0" a9004005 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a0) (var index))) (set EA2 (+ (var a0) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a0) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a0) (mod (+ (var index) (bv 32 0x6)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d0))) (storew 0 (var EA2) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (storew 0 (var EA4) (cast 16 false (var d1))) (storew 0 (var EA6) (cast 16 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.d [a0]#0, e0" 89004009 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (append (var d1) (var d0)))
-d "st.da [a0+]#0, p0" 8900c001 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (append (var a1) (var a0))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.da [p0+r], p0" a900c001 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (append (var a1) (var a0))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.da [+a0]#0, p0" 8900c005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (append (var a1) (var a0))) (set a0 (var EA)))
-d "st.da [p0+c]#0, p0" a900c005 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a0) (var index))) (set EA4 (+ (var a0) (mod (+ (var index) (bv 32 0x4)) (var length)))) (storew 0 (var EA0) (var a0)) (storew 0 (var EA4) (var a1)) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.da [a0]#0, p0" 8900c009 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (append (var a1) (var a0)))
-d "st.da #0, p0" a500000c 0x0 (storew 0 (bv 32 0x0) (append (var a1) (var a0)))
-d "st.h [a0+], d0" a400 0x0 (seq (storew 0 (var a0) (cast 32 false (var d0))) (set a0 (+ (var a0) (bv 32 0x4))))
-d "st.h [a15]#0, d0" a800 0x0 (storew 0 (+ (var a15) (bv 32 0x0)) (cast 32 false (var d0)))
-d "st.h [a0]#0, d15" ac00 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 32 false (var a15)))
-d "st.h [a0], d0" b400 0x0 (storew 0 (var a0) (cast 32 false (var d0)))
-d "st.h [a0]#0, d0" f9000000 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 16 false (var d0)))
-d "st.h [a0+]#0, d0" 89008000 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.h [p0+r], d0" a9008000 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.h [+a0]#0, d0" 89008004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set a0 (var EA)))
-d "st.h [p0+c]#0, d0" a9008004 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 16 false (var d0))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.h #0, d0" 25000008 0x0 (storew 0 (bv 32 0x0) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))))
-d "st.h [a0]#0, d0" 89008008 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))
-d "st.q #0, d0" 65000000 0x0 (storew 0 (bv 32 0x0) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))))
-d "st.q [a0+]#0, d0" 89000002 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.q [p0+r], d0" a9000002 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.q [+a0]#0, d0" 89000006 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set a0 (var EA)))
-d "st.q [p0+c]#0, d0" a9000006 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (cast 16 false (>> (var d0) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.q [a0]#0, d0" 8900000a 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))
-d "st.t #0, #0, #0" d5000000 0x0 (store 0 (bv 32 0x0) (| (& (load 0 (bv 32 0x0)) (bv 8 0xfe)) (bv 8 0x0)))
-d "st.w [sp]#0, d15" 7800 0x0 (storew 0 (+ (var a10) (bv 32 0x0)) (cast 32 false (var d15)))
-d "st.w [a0], d0" 7400 0x0 (storew 0 (var a0) (cast 32 false (var d0)))
-d "st.w [a0+], d0" 6400 0x0 (seq (storew 0 (var a0) (cast 32 false (var d0))) (set a0 (+ (var a0) (bv 32 0x4))))
-d "st.w [a15]#0, d0" 6800 0x0 (storew 0 (+ (var a15) (bv 32 0x0)) (cast 32 false (var d0)))
-d "st.w [a0]#0, d15" 6c00 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 32 false (var a15)))
-d "st.w [a0]#0, d0" 59000000 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (cast 32 false (var d0)))
-d "st.w #0, d0" a5000000 0x0 (storew 0 (bv 32 0x0) (var d0))
-d "st.w [a0+]#0, d0" 89000001 0x0 (seq (set EA (var a0)) (storew 0 (var EA) (var d0)) (set a0 (+ (var EA) (bv 32 0x0))))
-d "st.w [p0+r], d0" a9000001 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (storew 0 (var EA) (var d0)) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a1 (append (cast 16 false (var incr)) (cast 16 false (var new_index)))))
-d "st.w [+a0]#0, d0" 89000005 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (var d0)) (set a0 (var EA)))
-d "st.w [p0+c]#0, d0" a9000005 0x0 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a0) (var index))) (set EA2 (+ (var a0) (mod (+ (var index) (bv 32 0x2)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d0))) (storew 0 (var EA2) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "st.w [a0]#0, d0" 89000009 0x0 (storew 0 (+ (var a0) (bv 32 0x0)) (var d0))
-d "stlcx #0" 15000000 0x0 (seq (set EA (bv 32 0x0)) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
-d "stlcx [a0]#0" 49008009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
-d "stucx #0" 15000004 0x0 (seq (set EA (bv 32 0x0)) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
-d "stucx [a0]#0" 4900c009 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
-d "swapmsk.w [a0+]#0, e0" 49008000 0x0 (seq (set EA (var a0)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d1))) (& (var d0) (var d1)))) (set d0 (var tmp)) (set a0 (+ (var EA) (bv 32 0x0))))
-d "swapmsk.w [p0+r], e0" 69008000 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set incr (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d1))) (& (var d0) (var d1)))) (set d0 (var tmp)) (set new_index (let tmp (+ (let tmp (var index) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (let tmp (var incr) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false)))) (set a0 (| (<< (var incr) (bv 32 0x10) false) (var new_index))))
-d "swapmsk.w [+a0]#0, e0" 49008004 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d1))) (& (var d0) (var d1)))) (set d0 (var tmp)) (set a0 (var EA)))
-d "swapmsk.w [p0+c]#0, e0" 69008004 0x0 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d1))) (& (var d0) (var d1)))) (set d0 (var tmp)) (set new_index (+ (var index) (bv 32 0x0))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
-d "swapmsk.w [a0]#0, e0" 49008008 0x0 (seq (set EA (+ (var a0) (bv 32 0x0))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d1))) (& (var d0) (var d1)))) (set d0 (var tmp)))
-d "swapmsk.w [p0+i], e0" 69008008
-d "updfl d0" 4b00c100 0x0 (set PSW (| (& (var PSW) (bv 32 0xffffff)) (<< (& (| (& (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0xff)) (~ (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (& (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff)) (bv 32 0x18) false)))
-d "cmp.f d0, d0, d0" 4b000000 0x0 (set d0 (| (ite (&& (! (|| (is_nan (float 0 (var d0) )) (is_nan (float 0 (var d0) )))) (<. (float 0 (var d0) ) (float 0 (var d0) ))) (bv 32 0x1) (bv 32 0x0)) (| (<< (ite (! (|| (|| (is_nan (float 0 (var d0) )) (is_nan (float 0 (var d0) ))) (|| (<. (float 0 (var d0) ) (float 0 (var d0) )) (<. (float 0 (var d0) ) (float 0 (var d0) ))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false) (| (<< (ite (&& (! (|| (is_nan (float 0 (var d0) )) (is_nan (float 0 (var d0) )))) (<. (float 0 (var d0) ) (float 0 (var d0) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false) (| (<< (ite (|| (is_nan (float 0 (var d0) )) (is_nan (float 0 (var d0) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (| (<< (ite (&& (is_zero (& (>> (var d0) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x4) false) (<< (ite (&& (is_zero (& (>> (var d0) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x5) false)))))))
+d "abs d8, d2" 0b20c081 0x000000 (set d8 (let tmp (var d2) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))))
+d "abs d7, d7" 0b70c071 0x000000 (set d7 (let tmp (var d7) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))))
+d "abs d5, d14" 0be0c051 0x000000 (set d5 (let tmp (var d14) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))))
+d "abs.b d10, d14" 0be0c0a5 0x000000 (set d10 (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x18) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x10) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x8) false)) (cast 32 false (let tmp (cast 8 (msb (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))))))))
+d "abs.b d6, d10" 0ba0c065 0x000000 (set d6 (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x18) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x10) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x8) false)) (cast 32 false (let tmp (cast 8 (msb (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))))))))
+d "abs.b d14, d2" 0b20c0e5 0x000000 (set d14 (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x18) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x10) false)) (| (cast 32 false (<< (let tmp (cast 8 (msb (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))) (bv 32 0x8) false)) (cast 32 false (let tmp (cast 8 (msb (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff))) (ite (|| (! (sle (var tmp) (bv 8 0x0))) (== (var tmp) (bv 8 0x0))) (var tmp) (- (bv 8 0x0) (var tmp)))))))))
+d "abs.h d12, d5" 0b50c0c7 0x000000 (set d12 (| (cast 32 false (<< (let tmp (cast 16 (msb (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (bv 32 0x10) false)) (cast 32 false (let tmp (cast 16 (msb (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))))))
+d "abs.h d4, d4" 0b40c047 0x000000 (set d4 (| (cast 32 false (<< (let tmp (cast 16 (msb (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (bv 32 0x10) false)) (cast 32 false (let tmp (cast 16 (msb (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))))))
+d "abs.h d2, d9" 0b90c027 0x000000 (set d2 (| (cast 32 false (<< (let tmp (cast 16 (msb (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (bv 32 0x10) false)) (cast 32 false (let tmp (cast 16 (msb (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))))))
+d "absdif d14, d1, d6" 0b61e0e0 0x000000 (set d14 (let a (var d1) (let b (var d6) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif d13, d14, d9" 0b9ee0d0 0x000000 (set d13 (let a (var d14) (let b (var d9) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif d2, d15, d6" 0b6fe020 0x000000 (set d2 (let a (var d15) (let b (var d6) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif d13, d4, #0xee" 8be4ced1 0x000000 (set d13 (let a (var d4) (let b (bv 32 0xee) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif d13, d10, #0x4c" 8bcac4d1 0x000000 (set d13 (let a (var d10) (let b (bv 32 0x4c) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif d7, d11, #0xfa" 8babcf71 0x000000 (set d7 (let a (var d11) (let b (bv 32 0xfa) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))
+d "absdif.b d10, d7, d6" 0b67e0a4 0x000000 (set d10 (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x18) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x8) false)) (cast 32 false (let a (cast 8 (msb (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))))
+d "absdif.b d0, d9, d3" 0b39e004 0x000000 (set d0 (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d3) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d3) (bv 32 0x18) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x18) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d3) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d3) (bv 32 0x8) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x8) false)) (cast 32 false (let a (cast 8 (msb (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))))
+d "absdif.b d11, d11, d6" 0b6be0b4 0x000000 (set d11 (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x18) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (| (cast 32 false (<< (let a (cast 8 (msb (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x8) false)) (cast 32 false (let a (cast 8 (msb (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff))) (let b (cast 8 (msb (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))))
+d "absdif.h d13, d5, d15" 0bf5e0d6 0x000000 (set d13 (| (cast 32 false (<< (let a (cast 16 (msb (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (cast 32 false (let a (cast 16 (msb (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))
+d "absdif.h d15, d15, d14" 0befe0f6 0x000000 (set d15 (| (cast 32 false (<< (let a (cast 16 (msb (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (cast 32 false (let a (cast 16 (msb (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))
+d "absdif.h d2, d10, d1" 0b1ae026 0x000000 (set d2 (| (cast 32 false (<< (let a (cast 16 (msb (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (bv 32 0x10) false)) (cast 32 false (let a (cast 16 (msb (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))))))
+d "absdifs d4, d4, d7" 0b74f040 0x000000 (set d4 (let x (let a (var d4) (let b (var d7) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs d3, d9, d7" 0b79f030 0x000000 (set d3 (let x (let a (var d9) (let b (var d7) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs d9, d11, d7" 0b7bf090 0x000000 (set d9 (let x (let a (var d11) (let b (var d7) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs d15, d6, #0x164" 8b46f6f1 0x000000 (set d15 (let x (let a (var d6) (let b (bv 32 0xffffff64) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs d1, d12, #0x1c0" 8b0cfc11 0x000000 (set d1 (let x (let a (var d12) (let b (bv 32 0xffffffc0) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs d14, d10, #0x13d" 8bdaf3e1 0x000000 (set d14 (let x (let a (var d10) (let b (bv 32 0xffffff3d) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "absdifs.h d7, d5, d15" 0bf5f076 0x000000 (set d7 (| (cast 32 false (<< (let x (let a (cast 16 (msb (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let a (cast 16 (msb (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "absdifs.h d5, d3, d0" 0b03f056 0x000000 (set d5 (| (cast 32 false (<< (let x (let a (cast 16 (msb (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let a (cast 16 (msb (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "absdifs.h d12, d2, d7" 0b72f0c6 0x000000 (set d12 (| (cast 32 false (<< (let x (let a (cast 16 (msb (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let a (cast 16 (msb (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (let b (cast 16 (msb (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (ite (! (sle (var a) (var b))) (- (var a) (var b)) (- (var b) (var a))))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "abss d5, d1" 0b10d051 0x000000 (set d5 (let x (let tmp (var d1) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "abss d12, d1" 0b10d0c1 0x000000 (set d12 (let x (let tmp (var d1) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "abss d9, d6" 0b60d091 0x000000 (set d9 (let x (let tmp (var d6) (ite (|| (! (sle (var tmp) (bv 32 0x0))) (== (var tmp) (bv 32 0x0))) (var tmp) (- (bv 32 0x0) (var tmp)))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "abss.h d5, d7" 0b70d057 0x000000 (set d5 (| (cast 32 false (<< (let x (let tmp (cast 16 (msb (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let tmp (cast 16 (msb (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "abss.h d8, d14" 0be0d087 0x000000 (set d8 (| (cast 32 false (<< (let x (let tmp (cast 16 (msb (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let tmp (cast 16 (msb (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "abss.h d2, d7" 0b70d027 0x000000 (set d2 (| (cast 32 false (<< (let x (let tmp (cast 16 (msb (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false)) (cast 32 false (let x (let tmp (cast 16 (msb (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (ite (|| (! (sle (var tmp) (bv 16 0x0))) (== (var tmp) (bv 16 0x0))) (var tmp) (- (bv 16 0x0) (var tmp)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))))
+d "add d11, d15, d12" 12cb 0x000000 (seq (set result (+ (var d15) (var d12))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d1, d15, d9" 1291 0x000000 (seq (set result (+ (var d15) (var d9))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d0, d15, d4" 1240 0x000000 (seq (set result (+ (var d15) (var d4))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d10, d15, #-2" 92ea 0x000000 (seq (set result (+ (var d15) (bv 32 0xfffffffe))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d10, d15, #-8" 928a 0x000000 (seq (set result (+ (var d15) (bv 32 0xfffffff8))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d3, d15, #6" 9263 0x000000 (seq (set result (+ (var d15) (bv 32 0x6))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d3, d10" 1aa3 0x000000 (seq (set result (+ (var d3) (var d10))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d13, d0" 1a0d 0x000000 (seq (set result (+ (var d13) (var d0))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d9, d3" 1a39 0x000000 (seq (set result (+ (var d9) (var d3))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d14, d15" 42fe 0x000000 (seq (set result (+ (var d14) (var d15))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d6, d9" 4296 0x000000 (seq (set result (+ (var d6) (var d9))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d2, d4" 4242 0x000000 (seq (set result (+ (var d2) (var d4))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d7, #6" 9a67 0x000000 (seq (set result (+ (var d7) (bv 32 0x6))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d11, #1" 9a1b 0x000000 (seq (set result (+ (var d11) (bv 32 0x1))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d4, #6" 9a64 0x000000 (seq (set result (+ (var d4) (bv 32 0x6))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d4, #4" c244 0x000000 (seq (set result (+ (var d4) (bv 32 0x4))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d6, #6" c266 0x000000 (seq (set result (+ (var d6) (bv 32 0x6))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d8, #-3" c2d8 0x000000 (seq (set result (+ (var d8) (bv 32 0xfffffffd))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d10, d3, d11" 0bb300a0 0x000000 (seq (set result (+ (var d3) (var d11))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d14, d15, d10" 0baf00e0 0x000000 (seq (set result (+ (var d15) (var d10))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d4, d9, d14" 0be90040 0x000000 (seq (set result (+ (var d9) (var d14))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d8, d7, #-0xe2" 8be71180 0x000000 (seq (set result (+ (var d7) (bv 32 0xffffff1e))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d11, d4, #-0xd2" 8be412b0 0x000000 (seq (set result (+ (var d4) (bv 32 0xffffff2e))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d1, d0, #-0xd2" 8be01210 0x000000 (seq (set result (+ (var d0) (bv 32 0xffffff2e))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d0, d15, #7" 9270 0x000000 (seq (set result (+ (var d15) (bv 32 0x7))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d10, d1" 1a1a 0x000000 (seq (set result (+ (var d10) (var d1))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d4, d15, d14" 12e4 0x000000 (seq (set result (+ (var d15) (var d14))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d4" 424f 0x000000 (seq (set result (+ (var d15) (var d4))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d14, #-8" 9a8e 0x000000 (seq (set result (+ (var d14) (bv 32 0xfffffff8))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d14, d15, #-6" 92ae 0x000000 (seq (set result (+ (var d15) (bv 32 0xfffffffa))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d15, d9, d8" 1a89 0x000000 (seq (set result (+ (var d9) (var d8))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d2, #6" c262 0x000000 (seq (set result (+ (var d2) (bv 32 0x6))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d7, d15, #3" 9237 0x000000 (seq (set result (+ (var d15) (bv 32 0x3))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add d1, d15, d3" 1231 0x000000 (seq (set result (+ (var d15) (var d3))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.a a6, a1" 3016 0x000000 (set a6 (+ (var a6) (var a1)))
+d "add.a a0, a13" 30d0 0x000000 (set a0 (+ (var a0) (var a13)))
+d "add.a a12, sp" 30ac 0x000000 (set a12 (+ (var a12) (var a10)))
+d "add.a a2, #-7" b092 0x000000 (set a2 (+ (var a2) (bv 32 0xfffffff9)))
+d "add.a a6, #-1" b0f6 0x000000 (set a6 (+ (var a6) (bv 32 0xffffffff)))
+d "add.a a4, #5" b054 0x000000 (set a4 (+ (var a4) (bv 32 0x5)))
+d "add.a a7, a8, a1" 01181070 0x000000 (set a7 (+ (var a8) (var a1)))
+d "add.a a14, a13, a8" 018d10e0 0x000000 (set a14 (+ (var a13) (var a8)))
+d "add.a a0, a1, a2" 01211000 0x000000 (set a0 (+ (var a1) (var a2)))
+d "add.a a4, #5" b054 0x000000 (set a4 (+ (var a4) (bv 32 0x5)))
+d "add.a a2, #-1" b0f2 0x000000 (set a2 (+ (var a2) (bv 32 0xffffffff)))
+d "add.a a4, a12" 30c4 0x000000 (set a4 (+ (var a4) (var a12)))
+d "add.b d2, d3, d14" 0be30024 0x000000 (seq (set result_byte3 (+ (cast 8 false (& (>> (var d3) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (+ (cast 8 false (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (+ (cast 8 false (& (>> (var d3) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (+ (cast 8 false (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d2 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.b d8, d4, d11" 0bb40084 0x000000 (seq (set result_byte3 (+ (cast 8 false (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (+ (cast 8 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (+ (cast 8 false (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (+ (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d8 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.b d10, d7, d13" 0bd700a4 0x000000 (seq (set result_byte3 (+ (cast 8 false (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (+ (cast 8 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (+ (cast 8 false (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (+ (cast 8 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d10 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.f d13, d3, d7" 6b0721d3 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d13 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "add.f d8, d13, d9" 6b09218d 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d13) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d9) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d8 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "add.f d1, d7, d12" 6b0c2117 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d12) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d1 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "add.h d15, d10, d8" 0b8a00f6 0x000000 (seq (set result_hw1 (+ (cast 16 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (+ (cast 16 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d15 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.h d6, d5, d9" 0b950066 0x000000 (seq (set result_hw1 (+ (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (+ (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d6 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "add.h d15, d9, d12" 0bc900f6 0x000000 (seq (set result_hw1 (+ (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (+ (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d15 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "addc d3, d14, d4" 0b4e5030 0x000000 (seq (set result (+ (var d14) (+ (var d4) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d3 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d14) (var d4)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addc d0, d2, d7" 0b725000 0x000000 (seq (set result (+ (var d2) (+ (var d7) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d2) (var d7)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addc d2, d5, d12" 0bc55020 0x000000 (seq (set result (+ (var d5) (+ (var d12) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d2 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d5) (var d12)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addc d15, d1, #-0x1f" 8b11bef0 0x000000 (seq (set result (+ (var d1) (+ (bv 32 0xffffffe1) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d1) (bv 32 0xffffffe1)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addc d0, d15, #0x2b" 8bbfa200 0x000000 (seq (set result (+ (var d15) (+ (bv 32 0x2b) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d15) (bv 32 0x2b)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addc d7, d9, #0xfb" 8bb9af70 0x000000 (seq (set result (+ (var d9) (+ (bv 32 0xfb) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d9) (bv 32 0xfb)) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addi d5, d13, #-0x5bf7" 1b9d405a 0x000000 (set d5 (+ (var d13) (bv 32 0xffffa409)))
+d "addi d4, d3, #-0x6bfb" 1b534049 0x000000 (set d4 (+ (var d3) (bv 32 0xffff9405)))
+d "addi d2, d12, #-0x191e" 1b2c6e2e 0x000000 (set d2 (+ (var d12) (bv 32 0xffffe6e2)))
+d "addih d13, d10, #0x9a1" 9b1a9ad0 0x000000 (set d13 (+ (var d10) (<< (bv 32 0x9a1) (bv 32 0x10) false)))
+d "addih d11, d12, #0x1c76" 9b6cc7b1 0x000000 (set d11 (+ (var d12) (<< (bv 32 0x1c76) (bv 32 0x10) false)))
+d "addih d10, d2, #0xb082" 9b2208ab 0x000000 (set d10 (+ (var d2) (<< (bv 32 0xb082) (bv 32 0x10) false)))
+d "addih.a a1, a11, #0xe4c9" 119b4c1e 0x000000 (set a1 (+ (var a11) (<< (bv 32 0xe4c9) (bv 32 0x10) false)))
+d "addih.a a11, a0, #0xde72" 1120e7bd 0x000000 (set a11 (+ (var a0) (<< (bv 32 0xde72) (bv 32 0x10) false)))
+d "addih.a a1, a3, #0x7859" 11938517 0x000000 (set a1 (+ (var a3) (<< (bv 32 0x7859) (bv 32 0x10) false)))
+d "adds d13, d2" 222d 0x000000 (seq (set result (let x (+ (var d13) (var d2)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d13 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d8, d13" 22d8 0x000000 (seq (set result (let x (+ (var d8) (var d13)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d15, d1" 221f 0x000000 (seq (set result (let x (+ (var d15) (var d1)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d4, d15, d15" 0bff2040 0x000000 (seq (set result (let x (+ (var d15) (var d15)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d7, d6, d7" 0b762070 0x000000 (seq (set result (let x (+ (var d6) (var d7)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d3, d4, d8" 0b842030 0x000000 (seq (set result (let x (+ (var d4) (var d8)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d11, d15, #0x8f" 8bff48b0 0x000000 (seq (set result (let x (+ (var d15) (bv 32 0x8f)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d7, d4, #-0xc" 8b445f70 0x000000 (seq (set result (let x (+ (var d4) (bv 32 0xfffffff4)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds d15, d0, #-0xd9" 8b7052f0 0x000000 (seq (set result (let x (+ (var d0) (bv 32 0xffffff27)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.h d9, d6, d15" 0bf62096 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d9 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.h d11, d7, d8" 0b8720b6 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d11 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.h d4, d1, d6" 0b612046 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.hu d4, d5, d9" 0b953046 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.hu d6, d2, d8" 0b823066 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d6 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.hu d14, d3, d11" 0bb330e6 0x000000 (seq (set result_hw1 (let x (+ (cast 16 false (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (+ (cast 16 false (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d14 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d1, d7, d9" 0b973010 0x000000 (seq (set result (let x (+ (var d7) (var d9)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d5, d12, d6" 0b6c3050 0x000000 (seq (set result (let x (+ (var d12) (var d6)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d5 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d2, d13, d6" 0b6d3020 0x000000 (seq (set result (let x (+ (var d13) (var d6)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d4, d7, #0xed" 8bd76e40 0x000000 (seq (set result (let x (+ (var d7) (bv 32 0xed)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d2, d8, #0x66" 8b686620 0x000000 (seq (set result (let x (+ (var d8) (bv 32 0x66)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "adds.u d4, d2, #0xc7" 8b726c40 0x000000 (seq (set result (let x (+ (var d2) (bv 32 0xc7)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "addsc.a a15, a15, d15, #3" d0ff 0x000000 (set a15 (+ (var a15) (<< (var d15) (bv 32 0x3) false)))
+d "addsc.a a6, a15, d15, #1" 50f6 0x000000 (set a6 (+ (var a15) (<< (var d15) (bv 32 0x1) false)))
+d "addsc.a a15, a13, d15, #3" d0df 0x000000 (set a15 (+ (var a13) (<< (var d15) (bv 32 0x3) false)))
+d "addsc.a a1, sp, d12, #3" 01ac0316 0x000000 (set a1 (+ (var a10) (<< (var d12) (bv 32 0x3) false)))
+d "addsc.a a15, a7, d5, #1" 017501f6 0x000000 (set a15 (+ (var a7) (<< (var d5) (bv 32 0x1) false)))
+d "addsc.a a3, a0, d11, #3" 010b0336 0x000000 (set a3 (+ (var a0) (<< (var d11) (bv 32 0x3) false)))
+d "addsc.a a7, a9, d15, #2" 9097 0x000000 (set a7 (+ (var a9) (<< (var d15) (bv 32 0x2) false)))
+d "addsc.a a5, a4, d15, #2" 9045 0x000000 (set a5 (+ (var a4) (<< (var d15) (bv 32 0x2) false)))
+d "addsc.a a3, a12, d15, #1" 50c3 0x000000 (set a3 (+ (var a12) (<< (var d15) (bv 32 0x1) false)))
+d "addsc.a a0, a15, d15, #1" 50f0 0x000000 (set a0 (+ (var a15) (<< (var d15) (bv 32 0x1) false)))
+d "addsc.a a5, a15, d15, #3" d0f5 0x000000 (set a5 (+ (var a15) (<< (var d15) (bv 32 0x3) false)))
+d "addsc.a a5, a12, d15, #3" d0c5 0x000000 (set a5 (+ (var a12) (<< (var d15) (bv 32 0x3) false)))
+d "addsc.a a9, a7, d15, #0" 1079 0x000000 (set a9 (+ (var a7) (<< (var d15) (bv 32 0x0) false)))
+d "addsc.a a15, a8, d15, #0" 108f 0x000000 (set a15 (+ (var a8) (<< (var d15) (bv 32 0x0) false)))
+d "addsc.a a13, a8, d15, #3" d08d 0x000000 (set a13 (+ (var a8) (<< (var d15) (bv 32 0x3) false)))
+d "addsc.at a14, a11, d5" 01b520e6 0x000000 (set a14 (& (+ (var a11) (>> (var d5) (bv 32 0x3) false)) (bv 32 0xfffffffc)))
+d "addsc.at a0, a5, d15" 015f2006 0x000000 (set a0 (& (+ (var a5) (>> (var d15) (bv 32 0x3) false)) (bv 32 0xfffffffc)))
+d "addsc.at a8, a11, d1" 01b12086 0x000000 (set a8 (& (+ (var a11) (>> (var d1) (bv 32 0x3) false)) (bv 32 0xfffffffc)))
+d "addx d1, d0, d13" 0bd04010 0x000000 (seq (set result (+ (var d0) (+ (var d13) (bv 32 0x0)))) (set d1 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (var d13)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addx d7, d14, d6" 0b6e4070 0x000000 (seq (set result (+ (var d14) (+ (var d6) (bv 32 0x0)))) (set d7 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d14) (var d6)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addx d8, d1, d4" 0b414080 0x000000 (seq (set result (+ (var d1) (+ (var d4) (bv 32 0x0)))) (set d8 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d1) (var d4)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addx d11, d0, #-0x21" 8bf09db0 0x000000 (seq (set result (+ (var d0) (+ (bv 32 0xffffffdf) (bv 32 0x0)))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d0) (bv 32 0xffffffdf)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addx d12, d11, #-0xbe" 8b2b94c0 0x000000 (seq (set result (+ (var d11) (+ (bv 32 0xffffff42) (bv 32 0x0)))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d11) (bv 32 0xffffff42)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "addx d6, d10, #-0xad" 8b3a9560 0x000000 (seq (set result (+ (var d10) (+ (bv 32 0xffffff53) (bv 32 0x0)))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (& (>> (+ (+ (var d10) (bv 32 0xffffff53)) (bv 32 0x0)) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "and d5, d7" 2675 0x000000 (set d5 (& (var d5) (var d7)))
+d "and d4, d4" 2644 0x000000 (set d4 (& (var d4) (var d4)))
+d "and d1, d6" 2661 0x000000 (set d1 (& (var d1) (var d6)))
+d "and d15, #0x4f" 164f 0x000000 (set d15 (& (var d15) (bv 32 0x4f)))
+d "and d15, #0xcb" 16cb 0x000000 (set d15 (& (var d15) (bv 32 0xcb)))
+d "and d15, #0xf4" 16f4 0x000000 (set d15 (& (var d15) (bv 32 0xf4)))
+d "and d13, d15, d9" 0f9f80d0 0x000000 (set d13 (& (var d15) (var d9)))
+d "and d13, d2, d12" 0fc280d0 0x000000 (set d13 (& (var d2) (var d12)))
+d "and d8, d6, d1" 0f168080 0x000000 (set d8 (& (var d6) (var d1)))
+d "and d11, d3, #-0x1b" 8f531eb1 0x000000 (set d11 (& (var d3) (bv 32 0xffffffe5)))
+d "and d14, d13, #-0x53" 8fdd1ae1 0x000000 (set d14 (& (var d13) (bv 32 0xffffffad)))
+d "and d10, d12, #-0xa3" 8fdc15a1 0x000000 (set d10 (& (var d12) (bv 32 0xffffff5d)))
+d "and d15, #2" 1602 0x000000 (set d15 (& (var d15) (bv 32 0x2)))
+d "and.and.t d7, d15, #0x14, d3, #0x1f" 473f947f 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d15) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.and.t d4, d13, #0x12, d15, #0x10" 47fd1248 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d13) (bv 32 0x12) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d15) (bv 32 0x10) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.and.t d11, d1, #9, d9, #1" 479189b0 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d1) (bv 32 0x9) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d9) (bv 32 0x1) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.andn.t d3, d8, #7, d14, #0x15" 47e8e73a 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d8) (bv 32 0x7) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d14) (bv 32 0x15) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.andn.t d2, d11, #0xe, d2, #0x14" 472b6e2a 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d11) (bv 32 0xe) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d2) (bv 32 0x14) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.andn.t d2, d8, #0x11, d13, #4" 47d87122 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d8) (bv 32 0x11) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d13) (bv 32 0x4) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d15, d5, d4" 0b4500f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d5) (var d4))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d15, d3, d15" 0bf300f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d3) (var d15))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d13, d6, d0" 0b0600d2 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d6) (var d0))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d7, d1, #-0x12" 8be11e74 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d1) (bv 32 0xffffffee))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d7, d4, #0xfb" 8bb40f74 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d4) (bv 32 0xfb))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.eq d3, d14, #-0x82" 8bee1734 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d14) (bv 32 0xffffff7e))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d7, d9, d0" 0b094072 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d9) (var d0))) (== (var d9) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d15, d7, d13" 0bd740f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d7) (var d13))) (== (var d7) (var d13)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d2, d12, d14" 0bec4022 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d12) (var d14))) (== (var d12) (var d14)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d6, d5, #-0xac" 8b459564 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d5) (bv 32 0xffffff54))) (== (var d5) (bv 32 0xffffff54)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d4, d14, #0xf2" 8b2e8f44 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d14) (bv 32 0xf2))) (== (var d14) (bv 32 0xf2)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge d15, d0, #0xee" 8be08ef4 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (bv 32 0xee))) (== (var d0) (bv 32 0xee)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d6, d10, d13" 0bda5062 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d10) (var d13))) (== (var d10) (var d13)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d11, d8, d3" 0b3850b2 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d8) (var d3))) (== (var d8) (var d3)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d9, d11, d14" 0beb5092 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d11) (var d14))) (== (var d11) (var d14)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d3, d14, #-0x5a" 8b6eba34 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d14) (bv 32 0xffffffa6))) (== (var d14) (bv 32 0xffffffa6)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d9, d15, #0x3a" 8bafa394 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d15) (bv 32 0x3a))) (== (var d15) (bv 32 0x3a)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ge.u d14, d12, #0xe7" 8b7caee4 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d12) (bv 32 0xe7))) (== (var d12) (bv 32 0xe7)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d1, d6, d15" 0bf62012 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d6) (var d15)) (! (== (var d6) (var d15))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d15, d10, d2" 0b2a20f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d10) (var d2)) (! (== (var d10) (var d2))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d14, d8, d1" 0b1820e2 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d8) (var d1)) (! (== (var d8) (var d1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d5, d8, #-0x3a" 8b685c54 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d8) (bv 32 0xffffffc6)) (! (== (var d8) (bv 32 0xffffffc6))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d12, d2, #-0x4c" 8b425bc4 0x000000 (set d12 (| (& (var d12) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d2) (bv 32 0xffffffb4)) (! (== (var d2) (bv 32 0xffffffb4))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt d4, d9, #-0x7c" 8b495844 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d9) (bv 32 0xffffff84)) (! (== (var d9) (bv 32 0xffffff84))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d5, d8, d15" 0bf83052 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (var d15)) (! (== (var d8) (var d15))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d9, d1, d0" 0b013092 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d1) (var d0)) (! (== (var d1) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d2, d7, d1" 0b173022 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d7) (var d1)) (! (== (var d7) (var d1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d5, d8, #0xd9" 8b986d54 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (bv 32 0xd9)) (! (== (var d8) (bv 32 0xd9))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d3, d11, #-0x72" 8beb7834 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d11) (bv 32 0xffffff8e)) (! (== (var d11) (bv 32 0xffffff8e))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.lt.u d9, d2, #-0xc9" 8b727394 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d2) (bv 32 0xffffff37)) (! (== (var d2) (bv 32 0xffffff37))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d7, d4, d0" 0b041072 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d4) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d12, d10, d8" 0b8a10c2 0x000000 (set d12 (| (& (var d12) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d10) (var d8)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d5, d2, d12" 0bc21052 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d2) (var d12)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d8, d14, #-0x72" 8bee3884 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d14) (bv 32 0xffffff8e)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d10, d1, #-0x60" 8b013aa4 0x000000 (set d10 (| (& (var d10) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d1) (bv 32 0xffffffa0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.ne d1, d8, #-0x22" 8be83d14 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d8) (bv 32 0xffffffde)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.nor.t d8, d2, #0xb, d8, #0x13" 4782cb89 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d2) (bv 32 0xb) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0x13) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.nor.t d0, d10, #0x14, d0, #0x11" 470ad408 0x000000 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d10) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x11) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.nor.t d2, d9, #2, d5, #4" 47594222 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d9) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d5) (bv 32 0x4) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.or.t d3, d5, #5, d6, #9" 4765a534 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d5) (bv 32 0x5) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d6) (bv 32 0x9) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.or.t d15, d15, #0x16, d7, #0x1d" 477fb6fe 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d15) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d7) (bv 32 0x1d) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.or.t d15, d13, #6, d9, #9" 479da6f4 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d13) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d9) (bv 32 0x9) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "and.t d12, d3, #0, d9, #0xf" 879380c7 0x000000 (set d12 (ite (&& (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d9) (bv 32 0xf) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "and.t d10, d4, #5, d9, #0" 879405a0 0x000000 (set d10 (ite (&& (! (is_zero (& (>> (var d4) (bv 32 0x5) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "and.t d15, d0, #0x1f, d8, #0xb" 87809ff5 0x000000 (set d15 (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0xb) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "and.t d7, d0, #4, d9, #0x1d" 8790847e 0x000000 (set d7 (ite (&& (! (is_zero (& (>> (var d0) (bv 32 0x4) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d9) (bv 32 0x1d) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "andn d12, d9, d0" 0f09e0c0 0x000000 (set d12 (& (var d9) (~ (var d0))))
+d "andn d5, d3, d15" 0ff3e050 0x000000 (set d5 (& (var d3) (~ (var d15))))
+d "andn d11, d8, d9" 0f98e0b0 0x000000 (set d11 (& (var d8) (~ (var d9))))
+d "andn d9, d11, #-0x8a" 8f6bd791 0x000000 (set d9 (& (var d11) (~ (bv 32 0xffffff76))))
+d "andn d5, d12, #-0x2a" 8f6cdd51 0x000000 (set d5 (& (var d12) (~ (bv 32 0xffffffd6))))
+d "andn d7, d5, #-0x62" 8fe5d971 0x000000 (set d7 (& (var d5) (~ (bv 32 0xffffff9e))))
+d "andn.t d9, d15, #7, d6, #9" 876fe794 0x000000 (set d9 (ite (&& (! (is_zero (& (>> (var d15) (bv 32 0x7) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d6) (bv 32 0x9) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "andn.t d3, d12, #0xc, d8, #8" 878c6c34 0x000000 (set d3 (ite (&& (! (is_zero (& (>> (var d12) (bv 32 0xc) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d8) (bv 32 0x8) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "andn.t d14, d2, #0xe, d9, #8" 87926ee4 0x000000 (set d14 (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0xe) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d9) (bv 32 0x8) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "bisr #0x98" e098 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x98) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #0xa" e00a 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0xa) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #2" e002 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x2) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #-0x58" ad801a00 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0xffffffa8) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #0xa3" ad300a00 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0xa3) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #0x7f" adf00700 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x7f) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bisr #0x1a" e01a 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (bv 32 0x1a) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "bmerge d11, d14, d7" 4b7e10b0 0x000000 (set d11 (append (append (cast 8 false (| (| (<< (& (>> (var d14) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d7) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d14) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d7) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d14) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d7) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d14) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d7) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d14) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d7) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d14) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d7) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d14) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d7) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d14) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d7) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x0) false))))))) (append (cast 8 false (| (| (<< (& (>> (var d14) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d7) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d14) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d7) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d14) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d7) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d14) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d7) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d14) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d7) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d14) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d7) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d14) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d7) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))
+d "bmerge d1, d1, d2" 4b211010 0x000000 (set d1 (append (append (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d2) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d2) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d2) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d2) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d2) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d2) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d2) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d2) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x0) false))))))) (append (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d2) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d2) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d2) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d2) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d2) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d2) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d2) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))
+d "bmerge d9, d12, d11" 4bbc1090 0x000000 (set d9 (append (append (cast 8 false (| (| (<< (& (>> (var d12) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d11) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d12) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d11) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d12) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d11) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d12) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d11) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d12) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d11) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d12) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d11) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d12) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d11) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d12) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d11) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x0) false))))))) (append (cast 8 false (| (| (<< (& (>> (var d12) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d11) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d12) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d11) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d12) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d11) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d12) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d11) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d12) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d11) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d12) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d11) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d12) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d11) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))
+d "bsplit e8, d1" 4b019090 0x000000 (seq (set temp (| (<< (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d1) (bv 32 0x1d) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0x1b) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d1) (bv 32 0x19) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x17) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d1) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x13) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d1) (bv 32 0x11) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d1) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d1) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d1) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d1) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x0) false)))))))) (bv 32 0x20) false) (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0x1e) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d1) (bv 32 0x1c) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0x1a) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d1) (bv 32 0x18) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x16) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d1) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x12) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d1) (bv 32 0x10) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d1) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d1) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d1) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d1) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d1) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d1) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d1) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "bsplit e8, d9" 4b099080 0x000000 (seq (set temp (| (<< (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d9) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d9) (bv 32 0x1d) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d9) (bv 32 0x1b) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d9) (bv 32 0x19) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d9) (bv 32 0x17) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d9) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d9) (bv 32 0x13) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d9) (bv 32 0x11) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d9) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d9) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d9) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d9) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d9) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d9) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d9) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d9) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x0) false)))))))) (bv 32 0x20) false) (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d9) (bv 32 0x1e) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d9) (bv 32 0x1c) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d9) (bv 32 0x1a) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d9) (bv 32 0x18) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d9) (bv 32 0x16) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d9) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d9) (bv 32 0x12) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d9) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d9) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d9) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d9) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d9) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d9) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d9) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "bsplit e4, d5" 4b059040 0x000000 (seq (set temp (| (<< (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d5) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d5) (bv 32 0x1d) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d5) (bv 32 0x1b) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d5) (bv 32 0x19) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d5) (bv 32 0x17) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d5) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d5) (bv 32 0x13) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d5) (bv 32 0x11) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d5) (bv 32 0xf) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d5) (bv 32 0xd) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d5) (bv 32 0xb) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d5) (bv 32 0x9) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d5) (bv 32 0x7) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d5) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d5) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d5) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x0) false)))))))) (bv 32 0x20) false) (cast 64 false (append (cast 8 false (| (| (<< (& (>> (var d5) (bv 32 0x1e) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d5) (bv 32 0x1c) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d5) (bv 32 0x1a) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d5) (bv 32 0x18) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d5) (bv 32 0x16) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d5) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d5) (bv 32 0x12) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0x1)) (bv 32 0x0) false)))))) (cast 8 false (| (| (<< (& (>> (var d5) (bv 32 0xe) false) (bv 32 0x1)) (bv 32 0x7) false) (| (<< (& (>> (var d5) (bv 32 0xc) false) (bv 32 0x1)) (bv 32 0x6) false) (| (<< (& (>> (var d5) (bv 32 0xa) false) (bv 32 0x1)) (bv 32 0x5) false) (<< (& (>> (var d5) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x4) false)))) (| (<< (& (>> (var d5) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x3) false) (| (<< (& (>> (var d5) (bv 32 0x4) false) (bv 32 0x1)) (bv 32 0x2) false) (| (<< (& (>> (var d5) (bv 32 0x2) false) (bv 32 0x1)) (bv 32 0x1) false) (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0) false)))))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "cachea.i [p12+c]#0xe4" a9d0a437 0x000000 nop
+d "cachea.i [p12+c]#-0xaa" a9d096d7 0x000000 nop
+d "cachea.i [p4+c]#-0xd1" a940afc7 0x000000 nop
+d "cachea.w [p4+c]#-0x1db" a9402587 0x000000 nop
+d "cachea.w [p12+c]#-0x20" a9c020f7 0x000000 nop
+d "cachea.w [p8+c]#0x195" a9801567 0x000000 nop
+d "cachea.wi [p12+c]#-0x182" a9d07e97 0x000000 nop
+d "cachea.wi [p6+c]#-0xa6" a9705ad7 0x000000 nop
+d "cachea.wi [p8+c]#0x160" a9806057 0x000000 nop
+d "cadd d0, d15, #5" 8a50 0x000000 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d0) (bv 32 0x5)) (var d0))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d11, d15, #4" 8a4b 0x000000 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d11) (bv 32 0x4)) (var d11))) (set d11 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d2, d15, #4" 8a42 0x000000 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d2) (bv 32 0x4)) (var d2))) (set d2 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d9, d15, #0" 8a09 0x000000 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d9) (bv 32 0x0)) (var d9))) (set d9 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d2, d5, d7, d2" 2b270025 0x000000 (seq (set condition (! (is_zero (var d5)))) (set result (ite (var condition) (+ (var d7) (var d2)) (var d7))) (set d2 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d1, d13, d2, d8" 2b82001d 0x000000 (seq (set condition (! (is_zero (var d13)))) (set result (ite (var condition) (+ (var d2) (var d8)) (var d2))) (set d1 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d2, d11, d2, d1" 2b12002b 0x000000 (seq (set condition (! (is_zero (var d11)))) (set result (ite (var condition) (+ (var d2) (var d1)) (var d2))) (set d2 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d13, d14, d8, #-0x3e" ab281cde 0x000000 (seq (set condition (! (is_zero (var d14)))) (set result (ite (var condition) (+ (var d8) (bv 32 0xffffffc2)) (var d8))) (set d13 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d6, d7, d0, #-0xc0" ab001467 0x000000 (seq (set condition (! (is_zero (var d7)))) (set result (ite (var condition) (+ (var d0) (bv 32 0xffffff40)) (var d0))) (set d6 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "cadd d8, d15, d5, #-0x41" abf51b8f 0x000000 (seq (set condition (! (is_zero (var d15)))) (set result (ite (var condition) (+ (var d5) (bv 32 0xffffffbf)) (var d5))) (set d8 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d10, d15, #7" ca7a 0x000000 (seq (set condition (is_zero (var d15))) (set result (ite (var condition) (+ (var d10) (bv 32 0x7)) (var d10))) (set d10 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d10, d15, #5" ca5a 0x000000 (seq (set condition (is_zero (var d15))) (set result (ite (var condition) (+ (var d10) (bv 32 0x5)) (var d10))) (set d10 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d3, d15, #7" ca73 0x000000 (seq (set condition (is_zero (var d15))) (set result (ite (var condition) (+ (var d3) (bv 32 0x7)) (var d3))) (set d3 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d2, d10, d6, d11" 2bb6102a 0x000000 (seq (set condition (! (is_zero (var d10)))) (set result (ite (var condition) (+ (var d6) (var d11)) (var d6))) (set d2 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d0, d5, d7, d1" 2b171005 0x000000 (seq (set condition (! (is_zero (var d5)))) (set result (ite (var condition) (+ (var d7) (var d1)) (var d7))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d14, d7, d5, d8" 2b8510e7 0x000000 (seq (set condition (! (is_zero (var d7)))) (set result (ite (var condition) (+ (var d5) (var d8)) (var d5))) (set d14 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d1, d8, d4, #0xf0" ab042f18 0x000000 (seq (set condition (is_zero (var d8))) (set result (ite (var condition) (+ (var d4) (bv 32 0xf0)) (var d4))) (set d1 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d15, d14, d4, #-0x59" ab743afe 0x000000 (seq (set condition (is_zero (var d14))) (set result (ite (var condition) (+ (var d4) (bv 32 0xffffffa7)) (var d4))) (set d15 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d10, d12, d0, #0x26" ab6022ac 0x000000 (seq (set condition (is_zero (var d12))) (set result (ite (var condition) (+ (var d0) (bv 32 0x26)) (var d0))) (set d10 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "caddn d10, d15, #6" ca6a 0x000000 (seq (set condition (is_zero (var d15))) (set result (ite (var condition) (+ (var d10) (bv 32 0x6)) (var d10))) (set d10 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "call #0" 5ccd 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x2)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
+d "call #0" 5c97 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x2)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
+d "call #0" 5cc4 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x2)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
+d "call #0xffca2984" 6d65c214 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0xffca2984)))))
+d "call #0x6f75c0" 6db7e0ba 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x6f75c0)))))
+d "call #0x211d4e" 6d90a78e 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x211d4e)))))
+d "call #0" 5c56 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x2)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x0)))))
+d "calla #0x3ee66" eda133f7 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x3ee66)))))
+d "calla #0x66fee" ed23f737 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x66fee)))))
+d "calla #0x1963c6" edece3b1 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (bv 32 0x1963c6)))))
+d "calli a7" 2d070000 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (var a7)))))
+d "calli a5" 2d050000 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (var a5)))))
+d "calli a8" 2d080000 0x000000 (branch (is_zero (var FCX)) nop (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (seq (set _psw_cdc (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (branch (== (var _psw_cdc) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (+ (var _psw_cdc) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (- (<< (bv 32 0x1) (var CDC_i) false) (bv 32 0x1))) nop nop)) nop)) nop) (set PSW (| (& (var PSW) (bv 32 0xffffff7f)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x7) false))) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1c) false) (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d14)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d13)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d12)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a14)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a13)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a12)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d10)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d9)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d8)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a10)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (bv 32 0x1) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set a11 (bv 32 0x4)) (branch (== (var new_FCX) (var LCX)) nop (jmp (var a8)))))
+d "clo d0, d15" 0f0fc001 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (! (is_zero (& (>> (var d15) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n (+ (var n) (bv 32 0x1)))) (set d0 (var n)))
+d "clo d0, d10" 0f0ac001 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (! (is_zero (& (>> (var d10) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n (+ (var n) (bv 32 0x1)))) (set d0 (var n)))
+d "clo d14, d6" 0f06c0e1 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (! (is_zero (& (>> (var d6) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n (+ (var n) (bv 32 0x1)))) (set d14 (var n)))
+d "clo.h d4, d2" 0f02d047 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d4 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "clo.h d13, d11" 0f0bd0d7 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d13 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "clo.h d10, d9" 0f09d0a7 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (! (is_zero (& (>> (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false))))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d10 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "cls d9, d11" 0f0bd091 0x000000 (seq (set n (bv 32 0x1e)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (== (& (>> (var d11) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (var d11) (bv 32 0x1f) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d9 (var n)))
+d "cls d6, d3" 0f03d061 0x000000 (seq (set n (bv 32 0x1e)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (== (& (>> (var d3) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (var d3) (bv 32 0x1f) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d6 (var n)))
+d "cls d13, d4" 0f04d0d1 0x000000 (seq (set n (bv 32 0x1e)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (== (& (>> (var d4) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (var d4) (bv 32 0x1f) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d13 (var n)))
+d "cls.h d5, d12" 0f0ce057 0x000000 (seq (set n0 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (== (& (>> (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (== (& (>> (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d5 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "cls.h d13, d5" 0f05e0d7 0x000000 (seq (set n0 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (== (& (>> (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (== (& (>> (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d13 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "cls.h d2, d4" 0f04e027 0x000000 (seq (set n0 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (== (& (>> (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xe)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (== (& (>> (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)) (& (>> (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0xf) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d2 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "clz d5, d6" 0f06b051 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (is_zero (& (>> (var d6) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d5 (var n)))
+d "clz d4, d1" 0f01b041 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (is_zero (& (>> (var d1) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d4 (var n)))
+d "clz d10, d9" 0f09b0a1 0x000000 (seq (set n (bv 32 0x1f)) (repeat (&& (&& (&& (ule (var n) (bv 32 0x20)) (! (== (var n) (bv 32 0x20)))) (|| (! (ule (var n) (bv 32 0x0))) (== (var n) (bv 32 0x0)))) (is_zero (& (>> (var d9) (var n) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n (+ (var n) (bv 32 0x1)))) (set d10 (var n)))
+d "clz.h d13, d7" 0f07c0d7 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d13 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "clz.h d12, d1" 0f01c0c7 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d12 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "clz.h d6, d9" 0f09c067 0x000000 (seq (set n0 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n0) (bv 32 0x10)) (! (== (var n0) (bv 32 0x10)))) (|| (! (ule (var n0) (bv 32 0x0))) (== (var n0) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (var n0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n0 (+ (var n0) (bv 32 0x1)))) (set n1 (bv 32 0xf)) (repeat (&& (&& (&& (ule (var n1) (bv 32 0x10)) (! (== (var n1) (bv 32 0x10)))) (|| (! (ule (var n1) (bv 32 0x0))) (== (var n1) (bv 32 0x0)))) (is_zero (& (>> (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (var n1) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1)) false)))) (set n1 (+ (var n1) (bv 32 0x1)))) (set d6 (| (cast 32 false (<< (var n1) (bv 32 0x10) false)) (cast 32 false (var n0)))))
+d "cmov d0, d15, #7" aa70 0x000000 (set d0 (ite (! (is_zero (var d15))) (bv 32 0x7) (var d0)))
+d "cmov d11, d15, d14" 2aeb 0x000000 (set d11 (ite (! (is_zero (var d15))) (var d14) (var d11)))
+d "cmov d0, d15, d14" 2ae0 0x000000 (set d0 (ite (! (is_zero (var d15))) (var d14) (var d0)))
+d "cmov d9, d15, d12" 2ac9 0x000000 (set d9 (ite (! (is_zero (var d15))) (var d12) (var d9)))
+d "cmov d10, d15, #6" aa6a 0x000000 (set d10 (ite (! (is_zero (var d15))) (bv 32 0x6) (var d10)))
+d "cmov d12, d15, #4" aa4c 0x000000 (set d12 (ite (! (is_zero (var d15))) (bv 32 0x4) (var d12)))
+d "cmov d14, d15, #-2" aaee 0x000000 (set d14 (ite (! (is_zero (var d15))) (bv 32 0xfffffffe) (var d14)))
+d "cmov d5, d15, #4" aa45 0x000000 (set d5 (ite (! (is_zero (var d15))) (bv 32 0x4) (var d5)))
+d "cmov d13, d15, #7" aa7d 0x000000 (set d13 (ite (! (is_zero (var d15))) (bv 32 0x7) (var d13)))
+d "cmov d0, d15, d2" 2a20 0x000000 (set d0 (ite (! (is_zero (var d15))) (var d2) (var d0)))
+d "cmov d5, d15, #2" aa25 0x000000 (set d5 (ite (! (is_zero (var d15))) (bv 32 0x2) (var d5)))
+d "cmov d9, d15, #-7" aa99 0x000000 (set d9 (ite (! (is_zero (var d15))) (bv 32 0xfffffff9) (var d9)))
+d "cmovn d8, d15, d14" 6ae8 0x000000 (set d8 (ite (is_zero (var d15)) (var d14) (var d8)))
+d "cmovn d4, d15, d1" 6a14 0x000000 (set d4 (ite (is_zero (var d15)) (var d1) (var d4)))
+d "cmovn d9, d15, d3" 6a39 0x000000 (set d9 (ite (is_zero (var d15)) (var d3) (var d9)))
+d "cmovn d6, d15, #-6" eaa6 0x000000 (set d6 (ite (is_zero (var d15)) (bv 32 0xfffffffa) (var d6)))
+d "cmovn d9, d15, #-8" ea89 0x000000 (set d9 (ite (is_zero (var d15)) (bv 32 0xfffffff8) (var d9)))
+d "cmovn d14, d15, #-7" ea9e 0x000000 (set d14 (ite (is_zero (var d15)) (bv 32 0xfffffff9) (var d14)))
+d "cmovn d8, d15, #4" ea48 0x000000 (set d8 (ite (is_zero (var d15)) (bv 32 0x4) (var d8)))
+d "cmp.f d15, d7, d12" 4bc701f0 0x000000 (set d15 (| (ite (&& (! (|| (is_nan (float 0 (var d7) )) (is_nan (float 0 (var d12) )))) (<. (float 0 (var d7) ) (float 0 (var d12) ))) (bv 32 0x1) (bv 32 0x0)) (| (<< (ite (! (|| (|| (is_nan (float 0 (var d7) )) (is_nan (float 0 (var d12) ))) (|| (<. (float 0 (var d7) ) (float 0 (var d12) )) (<. (float 0 (var d12) ) (float 0 (var d7) ))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false) (| (<< (ite (&& (! (|| (is_nan (float 0 (var d7) )) (is_nan (float 0 (var d12) )))) (<. (float 0 (var d12) ) (float 0 (var d7) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false) (| (<< (ite (|| (is_nan (float 0 (var d7) )) (is_nan (float 0 (var d12) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (| (<< (ite (&& (is_zero (& (>> (var d7) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x4) false) (<< (ite (&& (is_zero (& (>> (var d12) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x5) false)))))))
+d "cmp.f d7, d15, d14" 4bef0170 0x000000 (set d7 (| (ite (&& (! (|| (is_nan (float 0 (var d15) )) (is_nan (float 0 (var d14) )))) (<. (float 0 (var d15) ) (float 0 (var d14) ))) (bv 32 0x1) (bv 32 0x0)) (| (<< (ite (! (|| (|| (is_nan (float 0 (var d15) )) (is_nan (float 0 (var d14) ))) (|| (<. (float 0 (var d15) ) (float 0 (var d14) )) (<. (float 0 (var d14) ) (float 0 (var d15) ))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false) (| (<< (ite (&& (! (|| (is_nan (float 0 (var d15) )) (is_nan (float 0 (var d14) )))) (<. (float 0 (var d14) ) (float 0 (var d15) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false) (| (<< (ite (|| (is_nan (float 0 (var d15) )) (is_nan (float 0 (var d14) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (| (<< (ite (&& (is_zero (& (>> (var d15) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x4) false) (<< (ite (&& (is_zero (& (>> (var d14) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x5) false)))))))
+d "cmp.f d10, d9, d5" 4b5901a0 0x000000 (set d10 (| (ite (&& (! (|| (is_nan (float 0 (var d9) )) (is_nan (float 0 (var d5) )))) (<. (float 0 (var d9) ) (float 0 (var d5) ))) (bv 32 0x1) (bv 32 0x0)) (| (<< (ite (! (|| (|| (is_nan (float 0 (var d9) )) (is_nan (float 0 (var d5) ))) (|| (<. (float 0 (var d9) ) (float 0 (var d5) )) (<. (float 0 (var d5) ) (float 0 (var d9) ))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1) false) (| (<< (ite (&& (! (|| (is_nan (float 0 (var d9) )) (is_nan (float 0 (var d5) )))) (<. (float 0 (var d5) ) (float 0 (var d9) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x2) false) (| (<< (ite (|| (is_nan (float 0 (var d9) )) (is_nan (float 0 (var d5) ))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x3) false) (| (<< (ite (&& (is_zero (& (>> (var d9) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x4) false) (<< (ite (&& (is_zero (& (>> (var d5) (bv 32 0x17) false) (bv 32 0xff))) (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x7fffff))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x5) false)))))))
+d "cmpswap.w [p6+c]#-0x62, e0" 6971dee4 0x000000 (seq (set index (& (>> (var a7) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a7) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a6) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d1)) (var d0) (var tmp))) (set d0 (var tmp)) (set new_index (+ (var index) (bv 32 0xffffff9e))) (set new_index (ite (&& (sle (var new_index) (bv 32 0x0)) (! (== (var new_index) (bv 32 0x0)))) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a7 (| (<< (var length) (bv 32 0x10) false) (& (>> (var new_index) (bv 32 0x0) false) (bv 32 0xffff)))))
+d "cmpswap.w [p8+c]#-0x1c3, e4" 6985fd84 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a8) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d5)) (var d4) (var tmp))) (set d4 (var tmp)) (set new_index (+ (var index) (bv 32 0xfffffe3d))) (set new_index (ite (&& (sle (var new_index) (bv 32 0x0)) (! (== (var new_index) (bv 32 0x0)))) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (| (<< (var length) (bv 32 0x10) false) (& (>> (var new_index) (bv 32 0x0) false) (bv 32 0xffff)))))
+d "cmpswap.w [p0+c]#-0x49, e12" 691df7e4 0x000000 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (ite (== (var tmp) (var d13)) (var d12) (var tmp))) (set d12 (var tmp)) (set new_index (+ (var index) (bv 32 0xffffffb7))) (set new_index (ite (&& (sle (var new_index) (bv 32 0x0)) (! (== (var new_index) (bv 32 0x0)))) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (| (<< (var length) (bv 32 0x10) false) (& (>> (var new_index) (bv 32 0x0) false) (bv 32 0xffff)))))
+d "crc32b.w d0, d0, d13" 4b0d3000 0x000000 (seq (set A (let tmp (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set B (let tmp (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set C (let tmp (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set D (let tmp (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (| (<< (var A) (bv 32 0x18) false) (| (<< (var B) (bv 32 0x10) false) (| (<< (var C) (bv 32 0x8) false) (var D)))) (~ (let tmp (var d0) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d0 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x20))) (bv 32 0x20) (bv 32 0x20)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
+d "crc32b.w d7, d0, d2" 4b023070 0x000000 (seq (set A (let tmp (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set B (let tmp (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set C (let tmp (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set D (let tmp (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (| (<< (var A) (bv 32 0x18) false) (| (<< (var B) (bv 32 0x10) false) (| (<< (var C) (bv 32 0x8) false) (var D)))) (~ (let tmp (var d0) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d7 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x20))) (bv 32 0x20) (bv 32 0x20)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
+d "crc32b.w d5, d9, d14" 4b9e3050 0x000000 (seq (set A (let tmp (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set B (let tmp (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set C (let tmp (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set D (let tmp (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false)))) (set crc_in (^ (| (<< (var A) (bv 32 0x18) false) (| (<< (var B) (bv 32 0x10) false) (| (<< (var C) (bv 32 0x8) false) (var D)))) (~ (let tmp (var d9) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false)))))) (set d5 (~ (let tmp (let shift (ite (! (ule (bv 32 0x20) (bv 32 0x20))) (bv 32 0x20) (bv 32 0x20)) (mod (<< (var crc_in) (var shift) false) (| (bv 32 0xedb88320) (<< (bv 32 0x1) (bv 32 0x20) false)))) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x10) false) (bv 32 0xffff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x8) false) (bv 32 0xff)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x4) false) (bv 32 0xf)) (| (let tmp (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (<< (let tmp (& (>> (var tmp) (bv 32 0x2) false) (bv 32 0x3)) (| (& (>> (var tmp) (bv 32 0x0) false) (bv 32 0x1)) (<< (& (>> (var tmp) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x1) false))) (bv 32 0x2) false))) (bv 32 0x4) false))) (bv 32 0x8) false))) (bv 32 0x10) false))))))
+d "csub d14, d6, d1, d0" 2b0120e6 0x000000 (seq (set condition (! (is_zero (var d0)))) (set result (ite (var condition) (- (var d6) (var d1)) (var d6))) (set d14 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "csub d8, d14, d0, d5" 2b50208e 0x000000 (seq (set condition (! (is_zero (var d5)))) (set result (ite (var condition) (- (var d14) (var d0)) (var d14))) (set d8 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "csub d7, d2, d12, d4" 2b4c2072 0x000000 (seq (set condition (! (is_zero (var d4)))) (set result (ite (var condition) (- (var d2) (var d12)) (var d2))) (set d7 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "csubn d13, d13, d7, d6" 2b6730dd 0x000000 (seq (set condition (is_zero (var d6))) (set result (ite (var condition) (- (var d13) (var d7)) (var d13))) (set d13 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "csubn d2, d8, d2, d3" 2b323028 0x000000 (seq (set condition (is_zero (var d3))) (set result (ite (var condition) (- (var d8) (var d2)) (var d8))) (set d2 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "csubn d0, d4, d13, d11" 2bbd3004 0x000000 (seq (set condition (is_zero (var d11))) (set result (ite (var condition) (- (var d4) (var d13)) (var d4))) (set d0 (var result)) (set overflow (|| (! (sle (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0xfb3b4c00)) (! (== (var result) (bv 32 0xfb3b4c00)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (branch (&& (var condition) (var overflow)) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))))) (branch (var condition) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (branch (&& (var condition) (var advanced_overflow)) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "debug" 00a0 0x000000 nop
+d "debug" 00a0 0x000000 nop
+d "debug" 00a0 0x000000 nop
+d "debug" 0d000001 0x000000 nop
+d "debug" 0d000001 0x000000 nop
+d "debug" 0d000001 0x000000 nop
+d "debug" 00ae 0x000000 nop
+d "dextr d14, d9, d6, #0xc" 776900e6 0x000000 (set d14 (cast 32 false (>> (append (var d9) (<< (var d6) (bv 32 0xc) false)) (bv 32 0x20) false)))
+d "dextr d10, d10, d9, d5" 179a80a5 0x000000 (set d10 (cast 32 false (>> (append (var d10) (<< (var d9) (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1f)) false)) (bv 32 0x20) false)))
+d "dextr d6, d9, d4, d12" 1749806c 0x000000 (set d6 (cast 32 false (>> (append (var d9) (<< (var d4) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false)) (bv 32 0x20) false)))
+d "dextr d8, d9, d13, d13" 17d9808d 0x000000 (set d8 (cast 32 false (>> (append (var d9) (<< (var d13) (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) false)) (bv 32 0x20) false)))
+d "disable" 0d004003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false)))
+d "disable" 0d004003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false)))
+d "disable" 0d004003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false)))
+d "disable d3" 0d03c003 0x000000 (seq (set d3 (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false))))
+d "disable d7" 0d07c003 0x000000 (seq (set d7 (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false))))
+d "disable d4" 0d04c003 0x000000 (seq (set d4 (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x8) false))))
+d "div e10, d4, d15" 4bf401a2 0x000000 (seq (set dividend (var d4)) (set divisor (var d15)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x0) (mod (var dividend) (var divisor))))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (ite (|| (! (sle (var dividend) (bv 32 0x0))) (== (var dividend) (bv 32 0x0))) (bv 32 0x7fffffff) (bv 32 0x80000000)) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x7fffffff) (div (- (var dividend) (var remainder)) (var divisor))))) (set temp (append (var remainder) (var quotient))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "div e8, d9, d8" 4b890192 0x000000 (seq (set dividend (var d9)) (set divisor (var d8)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x0) (mod (var dividend) (var divisor))))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (ite (|| (! (sle (var dividend) (bv 32 0x0))) (== (var dividend) (bv 32 0x0))) (bv 32 0x7fffffff) (bv 32 0x80000000)) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x7fffffff) (div (- (var dividend) (var remainder)) (var divisor))))) (set temp (append (var remainder) (var quotient))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "div e8, d15, d8" 4b8f0192 0x000000 (seq (set dividend (var d15)) (set divisor (var d8)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x0) (mod (var dividend) (var divisor))))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (ite (|| (! (sle (var dividend) (bv 32 0x0))) (== (var dividend) (bv 32 0x0))) (bv 32 0x7fffffff) (bv 32 0x80000000)) (ite (&& (== (var divisor) (bv 32 0xffffffff)) (== (var dividend) (bv 32 0x80000000))) (bv 32 0x7fffffff) (div (- (var dividend) (var remainder)) (var divisor))))) (set temp (append (var remainder) (var quotient))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "div.f d5, d1, d12" 4bc15150 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d12) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_inf (var _fb))) (&& (is_fzero (var _fa)) (is_fzero (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d5 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FZ (&& (is_fzero (var _fb)) (! (is_inf (var _fa))))) (branch (var set_FZ) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "div.f d8, d8, d8" 4b885180 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_inf (var _fb))) (&& (is_fzero (var _fa)) (is_fzero (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d8 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FZ (&& (is_fzero (var _fb)) (! (is_inf (var _fa))))) (branch (var set_FZ) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "div.f d8, d7, d15" 4bf75180 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d15) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_inf (var _fb))) (&& (is_fzero (var _fa)) (is_fzero (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d8 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FZ (&& (is_fzero (var _fb)) (! (is_inf (var _fa))))) (branch (var set_FZ) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1c) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "div.u e2, d12, d13" 4bdc1132 0x000000 (seq (set dividend (var d12)) (set divisor (var d13)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (mod (var dividend) (var divisor)))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (bv 32 0xffffffff) (div (- (var dividend) (var remainder)) (var divisor)))) (set temp (append (var remainder) (var quotient))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "div.u e4, d11, d1" 4b1b1152 0x000000 (seq (set dividend (var d11)) (set divisor (var d1)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (mod (var dividend) (var divisor)))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (bv 32 0xffffffff) (div (- (var dividend) (var remainder)) (var divisor)))) (set temp (append (var remainder) (var quotient))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "div.u e2, d9, d8" 4b891132 0x000000 (seq (set dividend (var d9)) (set divisor (var d8)) (set remainder (ite (== (var divisor) (bv 32 0x0)) (bv 32 0x0) (mod (var dividend) (var divisor)))) (set quotient (ite (== (var divisor) (bv 32 0x0)) (bv 32 0xffffffff) (div (- (var dividend) (var remainder)) (var divisor)))) (set temp (append (var remainder) (var quotient))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dsync" 0d008004 0x000000 nop
+d "dsync" 0d008004 0x000000 nop
+d "dsync" 0d008004 0x000000 nop
+d "dvadj e14, e12, d13" 6bd0d0ec 0x000000 (seq (set q_sign (^^ (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1)))))) (set x_sign (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1))))) (set eq_pos (&& (var x_sign) (== (var d13) (var d13)))) (set eq_neg (&& (var x_sign) (== (var d13) (~- (var d13))))) (set quotient (ite (|| (&& (var q_sign) (! (var eq_neg))) (var eq_pos)) (+ (bv 32 0x1) (var d12)) (var d12))) (set remainder (ite (|| (var eq_pos) (var eq_neg)) (bv 32 0x0) (var d13))) (set gt (! (sle (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set eq (&& (! (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1))))) (== (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set overflow (|| (var eq) (var gt))) (set temp (ite (var overflow) (bv 64 0x40) (append (var remainder) (var quotient)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvadj e10, e12, d12" 6bc0d0bc 0x000000 (seq (set q_sign (^^ (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x1f) false) (bv 32 0x1)))))) (set x_sign (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1))))) (set eq_pos (&& (var x_sign) (== (var d13) (var d12)))) (set eq_neg (&& (var x_sign) (== (var d13) (~- (var d12))))) (set quotient (ite (|| (&& (var q_sign) (! (var eq_neg))) (var eq_pos)) (+ (bv 32 0x1) (var d12)) (var d12))) (set remainder (ite (|| (var eq_pos) (var eq_neg)) (bv 32 0x0) (var d13))) (set gt (! (sle (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d12) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set eq (&& (! (! (is_zero (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1))))) (== (let x (var d13) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d12) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set overflow (|| (var eq) (var gt))) (set temp (ite (var overflow) (bv 64 0x40) (append (var remainder) (var quotient)))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvadj e2, e10, d2" 6b20d02a 0x000000 (seq (set q_sign (^^ (! (is_zero (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d2) (bv 32 0x1f) false) (bv 32 0x1)))))) (set x_sign (! (is_zero (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1))))) (set eq_pos (&& (var x_sign) (== (var d11) (var d2)))) (set eq_neg (&& (var x_sign) (== (var d11) (~- (var d2))))) (set quotient (ite (|| (&& (var q_sign) (! (var eq_neg))) (var eq_pos)) (+ (bv 32 0x1) (var d10)) (var d10))) (set remainder (ite (|| (var eq_pos) (var eq_neg)) (bv 32 0x0) (var d11))) (set gt (! (sle (let x (var d11) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d2) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set eq (&& (! (! (is_zero (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1))))) (== (let x (var d11) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x)))) (let x (var d2) (ite (! (sle (var x) (bv 32 0x0))) (var x) (~- (var x))))))) (set overflow (|| (var eq) (var gt))) (set temp (ite (var overflow) (bv 64 0x40) (append (var remainder) (var quotient)))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvinit e2, d13, d11" 4bbda031 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (var d13)) (var d13)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d11)) (&& (== (var d11) (bv 32 0xffffffff)) (== (var d13) (bv 32 0x80000000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit e0, d15, d15" 4bffa011 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (var d15)) (var d15)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d15)) (&& (== (var d15) (bv 32 0xffffffff)) (== (var d15) (bv 32 0x80000000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit e4, d11, d1" 4b1ba051 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (var d11)) (var d11)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d1)) (&& (== (var d1) (bv 32 0xffffffff)) (== (var d11) (bv 32 0x80000000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.b e0, d6, d7" 4b76a015 0x000000 (seq (set quotient_sign (! (== (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d7) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d6)) (var d6)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffff)) (bv 32 0x18) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d7)) (&& (== (var d7) (bv 32 0xffffffff)) (== (var d6) (bv 32 0xffffff80))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.b e4, d3, d9" 4b93a045 0x000000 (seq (set quotient_sign (! (== (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d9) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d3)) (var d3)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffff)) (bv 32 0x18) false))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d9)) (&& (== (var d9) (bv 32 0xffffffff)) (== (var d3) (bv 32 0xffffff80))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.b e0, d6, d10" 4ba6a005 0x000000 (seq (set quotient_sign (! (== (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d10) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d6)) (var d6)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffff)) (bv 32 0x18) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d10)) (&& (== (var d10) (bv 32 0xffffffff)) (== (var d6) (bv 32 0xffffff80))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.bu e8, d1, d2" 4b21a094 0x000000 (seq (set temp (cast 64 false (var d1))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d2))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.bu e0, d8, d7" 4b78a014 0x000000 (seq (set temp (cast 64 false (var d8))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d7))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.bu e8, d3, d11" 4bb3a084 0x000000 (seq (set temp (cast 64 false (var d3))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d11))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.h e0, d6, d3" 4b36a003 0x000000 (seq (set quotient_sign (! (== (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d6)) (var d6)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffffff)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d3)) (&& (== (var d3) (bv 32 0xffffffff)) (== (var d6) (bv 32 0xffff8000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.h e14, d13, d11" 4bbda0f3 0x000000 (seq (set quotient_sign (! (== (& (>> (var d13) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d13)) (var d13)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffffff)) (bv 32 0x10) false))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d11)) (&& (== (var d11) (bv 32 0xffffffff)) (== (var d13) (bv 32 0xffff8000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.h e12, d3, d12" 4bc3a0d3 0x000000 (seq (set quotient_sign (! (== (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1)) (& (>> (var d12) (bv 32 0x1f) false) (bv 32 0x1))))) (set temp (| (ite (var quotient_sign) (bv 64 0xffff) (bv 64 0x0)) (<< (& (>> (let _sext_val (cast 32 (msb (var d3)) (var d3)) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false))))) (bv 64 0x0) false) (bv 64 0xffffffffffff)) (bv 32 0x10) false))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (is_zero (var d12)) (&& (== (var d12) (bv 32 0xffffffff)) (== (var d3) (bv 32 0xffff8000))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.hu e14, d2, d5" 4b52a0e2 0x000000 (seq (set temp (cast 64 false (var d2))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d5))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.hu e8, d10, d12" 4bcaa082 0x000000 (seq (set temp (cast 64 false (var d10))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d12))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.hu e2, d11, d13" 4bdba022 0x000000 (seq (set temp (cast 64 false (var d11))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d13))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.u e8, d3, d12" 4bc3a080 0x000000 (seq (set temp (cast 64 false (var d3))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d12))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.u e12, d6, d10" 4ba6a0d0 0x000000 (seq (set temp (cast 64 false (var d6))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d10))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvinit.u e2, d0, d11" 4bb0a030 0x000000 (seq (set temp (cast 64 false (var d0))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (is_zero (var d11))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))))
+d "dvstep e4, e8, d12" 6bc0f059 0x000000 (seq (set dividend_sign (! (is_zero (& (>> (var d9) (bv 32 0x1f) false) (bv 32 0x1))))) (set divisor_sign (! (is_zero (& (>> (var d12) (bv 32 0x1f) false) (bv 32 0x1))))) (set quotient_sign (! (let x (var dividend_sign) (let y (var divisor_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))))) (set addend (ite (var quotient_sign) (var d12) (~- (var d12)))) (set dividend_quotient (var d8)) (set remainder (var d9)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep e14, e8, d11" 6bb0f0f8 0x000000 (seq (set dividend_sign (! (is_zero (& (>> (var d9) (bv 32 0x1f) false) (bv 32 0x1))))) (set divisor_sign (! (is_zero (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1))))) (set quotient_sign (! (let x (var dividend_sign) (let y (var divisor_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))))) (set addend (ite (var quotient_sign) (var d11) (~- (var d11)))) (set dividend_quotient (var d8)) (set remainder (var d9)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep e12, e2, d3" 6b30f0d2 0x000000 (seq (set dividend_sign (! (is_zero (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1))))) (set divisor_sign (! (is_zero (& (>> (var d3) (bv 32 0x1f) false) (bv 32 0x1))))) (set quotient_sign (! (let x (var dividend_sign) (let y (var divisor_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))))) (set addend (ite (var quotient_sign) (var d3) (~- (var d3)))) (set dividend_quotient (var d2)) (set remainder (var d3)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var addend))) (set remainder (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (var _temp) (var remainder))) (set dividend_quotient (| (var dividend_quotient) (ite (ite (let x (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (let y (var dividend_sign) (|| (&& (var x) (var y)) (&& (! (var x)) (! (var y)))))) (! (var quotient_sign)) (var quotient_sign)) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep.u e2, e10, d10" 6ba1e33b 0x000000 (seq (set divisor (var d10)) (set dividend_quotient (var d10)) (set remainder (var d11)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep.u e2, e4, d3" 6b3be134 0x000000 (seq (set divisor (var d3)) (set dividend_quotient (var d4)) (set remainder (var d5)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep.u e8, e0, d13" 6bd0e080 0x000000 (seq (set divisor (var d13)) (set dividend_quotient (var d0)) (set remainder (var d1)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep.u e2, e6, d6" 6b60e027 0x000000 (seq (set divisor (var d6)) (set dividend_quotient (var d6)) (set remainder (var d7)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "dvstep.u e0, e4, d13" 6bd0e004 0x000000 (seq (set divisor (var d13)) (set dividend_quotient (var d4)) (set remainder (var d5)) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set remainder (| (<< (var remainder) (bv 32 0x1) false) (& (>> (var dividend_quotient) (bv 32 0x1f) false) (bv 32 0x1)))) (set dividend_quotient (<< (var dividend_quotient) (bv 32 0x1) false)) (set _temp (+ (var remainder) (var divisor))) (set remainder (ite (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0)))) (var remainder) (var _temp))) (set dividend_quotient (| (var dividend_quotient) (ite (! (&& (sle (var _temp) (bv 32 0x0)) (! (== (var _temp) (bv 32 0x0))))) (bv 32 0x1) (bv 32 0x0)))) (set temp (append (var remainder) (var dividend_quotient))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "enable" 0d000003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false)))
+d "enable" 0d000003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false)))
+d "enable" 0d000003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x8) false)))
+d "eq d15, d8, d7" 3a78 0x000000 (set d15 (ite (== (var d8) (var d7)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d4, d13" 3ad4 0x000000 (set d15 (ite (== (var d4) (var d13)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d0, d7" 3a70 0x000000 (set d15 (ite (== (var d0) (var d7)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d11, #-6" baab 0x000000 (set d15 (ite (== (var d11) (bv 32 0xfffffffa)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d5, #4" ba45 0x000000 (set d15 (ite (== (var d5) (bv 32 0x4)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d5, #-7" ba95 0x000000 (set d15 (ite (== (var d5) (bv 32 0xfffffff9)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d1, d2, d2" 0b220011 0x000000 (set d1 (ite (== (var d2) (var d2)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d7, d0, d15" 0bf00071 0x000000 (set d7 (ite (== (var d0) (var d15)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d12, d8, d12" 0bc800c1 0x000000 (set d12 (ite (== (var d8) (var d12)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d9, d13, #-0x8a" 8b6d1792 0x000000 (set d9 (ite (== (var d13) (bv 32 0xffffff76)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d10, d9, #-0x5d" 8b391aa2 0x000000 (set d10 (ite (== (var d9) (bv 32 0xffffffa3)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d14, d4, #0x40" 8b0404e2 0x000000 (set d14 (ite (== (var d4) (bv 32 0x40)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d0, #2" ba20 0x000000 (set d15 (ite (== (var d0) (bv 32 0x2)) (bv 32 0x1) (bv 32 0x0)))
+d "eq d15, d3, #3" ba33 0x000000 (set d15 (ite (== (var d3) (bv 32 0x3)) (bv 32 0x1) (bv 32 0x0)))
+d "eq.a d12, a4, a9" 019400c4 0x000000 (set d12 (ite (== (var a4) (var a9)) (bv 32 0x1) (bv 32 0x0)))
+d "eq.a d12, sp, a15" 01fa00c4 0x000000 (set d12 (ite (== (var a10) (var a15)) (bv 32 0x1) (bv 32 0x0)))
+d "eq.a d12, a11, a11" 01bb00c4 0x000000 (set d12 (ite (== (var a11) (var a11)) (bv 32 0x1) (bv 32 0x0)))
+d "eq.b d9, d10, d5" 0b5a0095 0x000000 (seq (set result_byte3 (ite (== (cast 8 false (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (== (cast 8 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (== (cast 8 false (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (== (cast 8 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d9 (var result)))
+d "eq.b d6, d8, d14" 0be80065 0x000000 (seq (set result_byte3 (ite (== (cast 8 false (& (>> (var d8) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (== (cast 8 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (== (cast 8 false (& (>> (var d8) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (== (cast 8 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d6 (var result)))
+d "eq.b d3, d11, d5" 0b5b0035 0x000000 (seq (set result_byte3 (ite (== (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (== (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (== (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (== (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff)))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d3 (var result)))
+d "eq.h d4, d7, d0" 0b070047 0x000000 (seq (set result_hw1 (ite (== (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (== (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)))
+d "eq.h d11, d14, d7" 0b7e00b7 0x000000 (seq (set result_hw1 (ite (== (cast 16 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (== (cast 16 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d11 (var result)))
+d "eq.h d4, d15, d15" 0bff0047 0x000000 (seq (set result_hw1 (ite (== (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (== (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)))
+d "eq.w d10, d1, d15" 0bf100a9 0x000000 (seq (set result (ite (== (var d1) (var d15)) (bv 32 0x0) (bv 32 0x0))) (set d10 (var result)))
+d "eq.w d4, d5, d11" 0bb50049 0x000000 (seq (set result (ite (== (var d5) (var d11)) (bv 32 0x0) (bv 32 0x0))) (set d4 (var result)))
+d "eq.w d6, d12, d5" 0b5c0069 0x000000 (seq (set result (ite (== (var d12) (var d5)) (bv 32 0x0) (bv 32 0x0))) (set d6 (var result)))
+d "eqany.b d14, d12, d9" 0b9c60e5 0x000000 (set d14 (ite (|| (|| (== (cast 8 false (& (>> (var d12) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d12) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.b d3, d3, d6" 0b636035 0x000000 (set d3 (ite (|| (|| (== (cast 8 false (& (>> (var d3) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d3) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.b d15, d8, d10" 0ba860f5 0x000000 (set d15 (ite (|| (|| (== (cast 8 false (& (>> (var d8) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d8) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.b d6, d5, #-0xcf" 8b15d36a 0x000000 (set d6 (ite (|| (|| (== (cast 8 false (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff31) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff31) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff31) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff31) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.b d0, d10, #0xd" 8bdac00a 0x000000 (set d0 (ite (|| (|| (== (cast 8 false (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xd) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xd) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xd) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xd) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.b d3, d7, #-0xe1" 8bf7d13a 0x000000 (set d3 (ite (|| (|| (== (cast 8 false (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff1f) (bv 32 0x18) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff1f) (bv 32 0x10) false) (bv 32 0xff))))) (|| (== (cast 8 false (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff1f) (bv 32 0x8) false) (bv 32 0xff)))) (== (cast 8 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (bv 32 0xffffff1f) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d11, d7, d8" 0b8760b7 0x000000 (set d11 (ite (|| (== (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d3, d15, d9" 0b9f6037 0x000000 (set d3 (ite (|| (== (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d1, d4, d2" 0b246017 0x000000 (set d1 (ite (|| (== (cast 16 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d3, d0, #-0x29" 8b70dd3e 0x000000 (set d3 (ite (|| (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0xffffffd7) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0xffffffd7) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d1, d10, #-0x25" 8bbadd1e 0x000000 (set d1 (ite (|| (== (cast 16 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0xffffffdb) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0xffffffdb) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqany.h d14, d0, #0x79" 8b90c7ee 0x000000 (set d14 (ite (|| (== (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0x79) (bv 32 0x10) false) (bv 32 0xffff)))) (== (cast 16 false (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (bv 32 0x79) (bv 32 0x0) false) (bv 32 0xffff))))) (bv 32 0x1) (bv 32 0x0)))
+d "eqz.a d14, a5" 010580e4 0x000000 (set d14 (ite (== (var a5) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
+d "eqz.a d9, a15" 010f8094 0x000000 (set d9 (ite (== (var a15) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
+d "eqz.a d6, a0" 01008064 0x000000 (set d6 (ite (== (var a0) (bv 32 0x0)) (bv 32 0x1) (bv 32 0x0)))
+d "extr d10, d13, e12" 170d40ad 0x000000 (set d10 (let width (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) (>> (cast 32 false (<< (& (>> (>> (var d13) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false)) (- (bv 32 0x20) (var width)) (msb (cast 32 false (<< (& (>> (>> (var d13) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false))))))
+d "extr d4, d10, e14" 170a404e 0x000000 (set d4 (let width (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) (>> (cast 32 false (<< (& (>> (>> (var d10) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false)) (- (bv 32 0x20) (var width)) (msb (cast 32 false (<< (& (>> (>> (var d10) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false))))))
+d "extr d10, d7, e2" 170740a2 0x000000 (set d10 (let width (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1f)) (>> (cast 32 false (<< (& (>> (>> (var d7) (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false)) (- (bv 32 0x20) (var width)) (msb (cast 32 false (<< (& (>> (>> (var d7) (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false)) (- (- (bv 32 0x20) (var width)) (bv 32 0x0)) false))))))
+d "extr d10, d15, #0x1d, #0x12" 370fd2ae 0x000000 (set d10 (let _sext_val (cast 32 (msb (cast 18 false (>> (var d15) (bv 32 0x1d) false))) (cast 18 false (>> (var d15) (bv 32 0x1d) false))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x12)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x12)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x12)) (bv 32 0x0)) false))))))
+d "extr d9, d10, #0x1c, #0x13" 370a539e 0x000000 (set d9 (let _sext_val (cast 32 (msb (cast 19 false (>> (var d10) (bv 32 0x1c) false))) (cast 19 false (>> (var d10) (bv 32 0x1c) false))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x13)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x13)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x13)) (bv 32 0x0)) false))))))
+d "extr d7, d4, #0x17, #5" 3704c57b 0x000000 (set d7 (let _sext_val (cast 32 (msb (cast 5 false (>> (var d4) (bv 32 0x17) false))) (cast 5 false (>> (var d4) (bv 32 0x17) false))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x5)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x5)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x5)) (bv 32 0x0)) false))))))
+d "extr d3, d2, d0, #6" 57024630 0x000000 (set d3 (>> (cast 32 false (<< (& (>> (>> (var d2) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x6)) false)) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (& (>> (>> (var d2) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x6)) false)) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)))))
+d "extr d10, d0, d3, #0x13" 570053a3 0x000000 (set d10 (>> (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x13)) false)) (- (- (bv 32 0x20) (bv 32 0x13)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x13)) (msb (cast 32 false (<< (& (>> (>> (var d0) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x13)) false)) (- (- (bv 32 0x20) (bv 32 0x13)) (bv 32 0x0)) false)))))
+d "extr d10, d8, d15, #0x1c" 57085caf 0x000000 (set d10 (>> (cast 32 false (<< (& (>> (>> (var d8) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1c)) false)) (- (- (bv 32 0x20) (bv 32 0x1c)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x1c)) (msb (cast 32 false (<< (& (>> (>> (var d8) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x1c)) false)) (- (- (bv 32 0x20) (bv 32 0x1c)) (bv 32 0x0)) false)))))
+d "extr.u d3, d15, e4" 170f6034 0x000000 (set d3 (let width (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1f)) (& (>> (>> (var d15) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false))))
+d "extr.u d10, d10, e4" 170a60a4 0x000000 (set d10 (let width (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1f)) (& (>> (>> (var d10) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false))))
+d "extr.u d8, d6, e4" 17066085 0x000000 (set d8 (let width (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1f)) (& (>> (>> (var d6) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var width)) false))))
+d "extr.u d1, d7, #0xf, #0x1a" 3707fa17 0x000000 (set d1 (& (>> (>> (var d7) (bv 32 0xf) false) (bv 32 0x0) false) (bv 32 0x3ffffff)))
+d "extr.u d8, d5, #8, #0xd" 37056d84 0x000000 (set d8 (& (>> (>> (var d5) (bv 32 0x8) false) (bv 32 0x0) false) (bv 32 0x1fff)))
+d "extr.u d2, d3, #5, #0xf" 3703ef22 0x000000 (set d2 (& (>> (>> (var d3) (bv 32 0x5) false) (bv 32 0x0) false) (bv 32 0x7fff)))
+d "extr.u d11, d0, d1, #0x19" 570079b1 0x000000 (set d11 (& (>> (>> (var d0) (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x19)) false)))
+d "extr.u d5, d10, d0, #0xf" 570a6f50 0x000000 (set d5 (& (>> (>> (var d10) (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0xf)) false)))
+d "extr.u d7, d6, d4, #6" 57066674 0x000000 (set d7 (& (>> (>> (var d6) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (bv 32 0x6)) false)))
+d "extr.u d6, d15, #0x18, #0x17" 37bf776c 0x000000 (set d6 (& (>> (>> (var d15) (bv 32 0x18) false) (bv 32 0x0) false) (bv 32 0x7fffff)))
+d "fcall #0xffa5b39e" 6152cfd9 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0xffa5b39e)))
+d "fcall #0x484984" 6124c224 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0x484984)))
+d "fcall #0xff9d43ba" 614edda1 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0xff9d43ba)))
+d "fcalla #0x1b1386" e10dc389 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0x1b1386)))
+d "fcalla #0xb8ff0" e145f8c7 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0xb8ff0)))
+d "fcalla #0x293e0" e1b1f049 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (bv 32 0x293e0)))
+d "fcalli a3" 2d031000 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (var a3)))
+d "fcalli a11" 2d0b1000 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (var a11)))
+d "fcalli a9" 2d091000 0x000000 (seq (set EA (- (var a10) (bv 32 0x4))) (storew 0 (var EA) (var a11)) (set a11 (bv 32 0x4)) (set a10 (var EA)) (jmp (var a9)))
+d "fret" 0070 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "fret" 0070 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "fret" 0070 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "fret" 0d00c000 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "fret" 0d00c000 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "fret" 0d00c000 0x000000 (seq (set a11_tmp (var a11)) (set EA (var a10)) (set a11 (loadw 0 32 (var EA))) (set a10 (+ (var a10) (bv 32 0x4))) (jmp (& (var a11_tmp) (bv 32 0xfffffffe))))
+d "ftoi d12, d3" 4b0301c1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d12 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (float 1 (bv 64 0x41dfffffffc00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (var _fa) (float 1 (bv 64 0xc1e0000000000000) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoi d4, d3" 4b030141 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d4 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (float 1 (bv 64 0x41dfffffffc00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (var _fa) (float 1 (bv 64 0xc1e0000000000000) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoi d13, d7" 4b0701d1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d13 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (float 1 (bv 64 0x41dfffffffc00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (var _fa) (float 1 (bv 64 0xc1e0000000000000) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoiz d10, d8" 4b0831a1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (fcast_sint 32 rtz (var _fa)))))) (set d10 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoiz d9, d14" 4b0e3191 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d14) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (fcast_sint 32 rtz (var _fa)))))) (set d9 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoiz d15, d10" 4b0a31f1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d10) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0xc1e0000000000000) )))) (<. (float 1 (bv 64 0xc1e0000000000000) ) (var _fa))) (bv 32 0x80000000) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41dfffffffc00000) )))) (<. (var _fa) (float 1 (bv 64 0x41dfffffffc00000) ))) (bv 32 0x7fffffff) (fcast_sint 32 rtz (var _fa)))))) (set d15 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31 d13, d5, d8" 4b8511d1 0x000000 (seq (set _a (var d5)) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d8) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (float 0 (var _a) )) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d13 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (float 0 (var _a) )) (is_nan (var _res_q_real))) (|| (<. (float 0 (var _a) ) (var _res_q_real)) (<. (var _res_q_real) (float 0 (var _a) ))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31 d6, d15, d13" 4bdf1161 0x000000 (seq (set _a (var d15)) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d13) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (float 0 (var _a) )) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d6 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (float 0 (var _a) )) (is_nan (var _res_q_real))) (|| (<. (float 0 (var _a) ) (var _res_q_real)) (<. (var _res_q_real) (float 0 (var _a) ))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31 d10, d13, d10" 4bad11a1 0x000000 (seq (set _a (var d13)) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d10) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (float 0 (var _a) )) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d10 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (float 0 (var _a) )) (is_nan (var _res_q_real))) (|| (<. (float 0 (var _a) ) (var _res_q_real)) (<. (var _res_q_real) (float 0 (var _a) ))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31z d9, d2, d12" 4bc28191 0x000000 (seq (set _a (var d2)) (set _fa (float 0 (var _a) )) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d12) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (fcast_sint 32 rtz (var _precise_result)))))) (set d9 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (var _res_q_real))) (|| (<. (var _fa) (var _res_q_real)) (<. (var _res_q_real) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31z d5, d2, d6" 4b628151 0x000000 (seq (set _a (var d2)) (set _fa (float 0 (var _a) )) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d6) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (fcast_sint 32 rtz (var _precise_result)))))) (set d5 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (var _res_q_real))) (|| (<. (var _fa) (var _res_q_real)) (<. (var _res_q_real) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftoq31z d3, d12, d9" 4b9c8131 0x000000 (seq (set _a (var d12)) (set _fa (float 0 (var _a) )) (set _arg_a (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _arg_a (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _arg_a (+. rne (var _arg_a) (var _b))) nop))) (set _arg_a (let tmp (var _arg_a) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (var tmp) (float 0 (bv 32 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (float 0 (bv 32 0x800000) ) (var tmp)))) (fneg (float 0 (bv 32 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x0) )))) (<. (float 0 (bv 32 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 0 (bv 32 0x800000) )))) (<. (var tmp) (float 0 (bv 32 0x800000) )))) (float 0 (bv 32 0x0) ) (var tmp))))) (set _precise_result (/. rne (var _arg_a) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d9) (bv 32 0x1ff)) )))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (bv 32 0x7fffffff) (ite (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) ))) (bv 32 0x80000000) (fcast_sint 32 rtz (var _precise_result)))))) (set d3 (var _result_i)) (set _res_q_real (float 0 (bv 32 0x0) )) (set _x (var _result_i)) (set _i (bv 32 0x0)) (set _res_q_real (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _res_q_real (+. rne (var _res_q_real) (var _b))) nop))) (set set_FI (|| (|| (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0x3f800000) )))) (<. (float 0 (bv 32 0x3f800000) ) (var _precise_result))) (&& (! (|| (is_nan (var _precise_result)) (is_nan (float 0 (bv 32 0xbf800000) )))) (<. (var _precise_result) (float 0 (bv 32 0xbf800000) )))) (is_nan (float 0 (var _a) )))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (var _res_q_real))) (|| (<. (var _fa) (var _res_q_real)) (<. (var _res_q_real) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftou d1, d8" 4b082111 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d1 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftou d10, d9" 4b0921a1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d9) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d10 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftou d8, d1" 4b012181 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _fa) (ite (== (var _mode) (bv 8 0x0)) (fcast_sint 32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sint 32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sint 32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sint 32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sint 32 rtz (var _x)) (bv 32 0xffffffff)))))))))))) (set d8 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftouz d11, d3" 4b0371b1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (fcast_sint 32 rtz (var _fa)))))) (set d11 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftouz d3, d3" 4b037131 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (fcast_sint 32 rtz (var _fa)))))) (set d3 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ftouz d11, d3" 4b0371b1 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _result_i (ite (is_nan (var _fa)) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var _fa))) (bv 32 0x0) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (var _fa) (float 1 (bv 64 0x41efffffffe00000) ))) (bv 32 0xffffffff) (fcast_sint 32 rtz (var _fa)))))) (set d11 (var _result_i)) (set set_FI (|| (|| (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x41efffffffe00000) )))) (<. (float 1 (bv 64 0x41efffffffe00000) ) (var _fa))) (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) )))) (is_nan (var _fa)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FX (|| (|| (is_nan (var _fa)) (is_nan (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))))) (|| (<. (var _fa) (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i)))) (<. (fconvert ieee754-bin64 rne (fcast_sfloat ieee754-bin32 rne (var _result_i))) (var _fa))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FX) (var set_FI)) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ge d5, d8, d1" 0b184051 0x000000 (set d5 (ite (|| (! (sle (var d8) (var d1))) (== (var d8) (var d1))) (bv 32 0x1) (bv 32 0x0)))
+d "ge d6, d4, d2" 0b244061 0x000000 (set d6 (ite (|| (! (sle (var d4) (var d2))) (== (var d4) (var d2))) (bv 32 0x1) (bv 32 0x0)))
+d "ge d2, d6, d11" 0bb64021 0x000000 (set d2 (ite (|| (! (sle (var d6) (var d11))) (== (var d6) (var d11))) (bv 32 0x1) (bv 32 0x0)))
+d "ge d5, d12, #0x80" 8b0c8852 0x000000 (set d5 (ite (|| (! (sle (var d12) (bv 32 0x80))) (== (var d12) (bv 32 0x80))) (bv 32 0x1) (bv 32 0x0)))
+d "ge d10, d8, #-0xa4" 8bc895a2 0x000000 (set d10 (ite (|| (! (sle (var d8) (bv 32 0xffffff5c))) (== (var d8) (bv 32 0xffffff5c))) (bv 32 0x1) (bv 32 0x0)))
+d "ge d11, d1, #-0x7f" 8b1198b2 0x000000 (set d11 (ite (|| (! (sle (var d1) (bv 32 0xffffff81))) (== (var d1) (bv 32 0xffffff81))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.a d8, a7, a12" 01c73084 0x000000 (set d8 (ite (|| (! (ule (var a7) (var a12))) (== (var a7) (var a12))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.a d4, a9, a15" 01f93044 0x000000 (set d4 (ite (|| (! (ule (var a9) (var a15))) (== (var a9) (var a15))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.a d0, a14, a2" 012e3004 0x000000 (set d0 (ite (|| (! (ule (var a14) (var a2))) (== (var a14) (var a2))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d5, d15, d11" 0bbf5051 0x000000 (set d5 (ite (|| (! (ule (var d15) (var d11))) (== (var d15) (var d11))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d9, d14, d4" 0b4e5091 0x000000 (set d9 (ite (|| (! (ule (var d14) (var d4))) (== (var d14) (var d4))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d6, d0, d15" 0bf05061 0x000000 (set d6 (ite (|| (! (ule (var d0) (var d15))) (== (var d0) (var d15))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d11, d15, #0x48" 8b8fa4b2 0x000000 (set d11 (ite (|| (! (ule (var d15) (bv 32 0x48))) (== (var d15) (bv 32 0x48))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d13, d2, #0x23" 8b32a2d2 0x000000 (set d13 (ite (|| (! (ule (var d2) (bv 32 0x23))) (== (var d2) (bv 32 0x23))) (bv 32 0x1) (bv 32 0x0)))
+d "ge.u d4, d13, #0xd5" 8b5dad42 0x000000 (set d4 (ite (|| (! (ule (var d13) (bv 32 0xd5))) (== (var d13) (bv 32 0xd5))) (bv 32 0x1) (bv 32 0x0)))
+d "imask e4, d1, #3, #0x11" 3710b151 0x000000 (seq (set temp (append (<< (bv 32 0x1ffff) (bv 32 0x3) false) (<< (var d1) (bv 32 0x3) false))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e2, d15, #0x1f, #8" 37f0a83f 0x000000 (seq (set temp (append (<< (bv 32 0xff) (bv 32 0x1f) false) (<< (var d15) (bv 32 0x1f) false))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e6, d9, #6, #0x1b" 37903b63 0x000000 (seq (set temp (append (<< (bv 32 0x7ffffff) (bv 32 0x6) false) (<< (var d9) (bv 32 0x6) false))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e12, d3, d10, #5" 573025da 0x000000 (seq (set temp (append (<< (bv 32 0x1f) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (var d3) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e2, d14, d11, #0x15" 57e0353b 0x000000 (seq (set temp (append (<< (bv 32 0x1fffff) (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (var d14) (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e8, d14, d15, #0xe" 57e02e8f 0x000000 (seq (set temp (append (<< (bv 32 0x3fff) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (var d14) (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e2, #1, #0x1c, #0x18" b710382e 0x000000 (seq (set temp (append (<< (bv 32 0xffffff) (bv 32 0x1c) false) (<< (bv 32 0x1) (bv 32 0x1c) false))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e2, #2, #0x18, #5" b720253c 0x000000 (seq (set temp (append (<< (bv 32 0x1f) (bv 32 0x18) false) (<< (bv 32 0x2) (bv 32 0x18) false))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e0, #5, #7, #0xb" b750ab03 0x000000 (seq (set temp (append (<< (bv 32 0x7ff) (bv 32 0x7) false) (<< (bv 32 0x5) (bv 32 0x7) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e10, #8, d8, #0x13" d78033b8 0x000000 (seq (set temp (append (<< (bv 32 0x7ffff) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (bv 32 0x8) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e14, #5, d3, #0x12" d75032f3 0x000000 (seq (set temp (append (<< (bv 32 0x3ffff) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (bv 32 0x5) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e8, #6, d13, #0x10" d760309d 0x000000 (seq (set temp (append (<< (bv 32 0xffff) (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) false) (<< (bv 32 0x6) (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) false))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "imask e8, d13, #9, #0x1e" 37d6be94 0x000000 (seq (set temp (append (<< (bv 32 0x3fffffff) (bv 32 0x9) false) (<< (var d13) (bv 32 0x9) false))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ins.t d15, d3, #0x11, d4, #3" 674391f1 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x12) false) (bv 32 0x3fff)) (bv 32 0x12) false) (| (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1ffff)) (<< (& (>> (var d4) (bv 32 0x3) false) (bv 32 0x1)) (bv 32 0x11) false))))
+d "ins.t d1, d6, #9, d6, #0x14" 6766091a 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0xa) false) (bv 32 0x3fffff)) (bv 32 0xa) false) (| (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1ff)) (<< (& (>> (var d6) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x9) false))))
+d "ins.t d2, d7, #0x19, d14, #0x15" 67e7992a 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x1a) false) (bv 32 0x3f)) (bv 32 0x1a) false) (| (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1ffffff)) (<< (& (>> (var d14) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x19) false))))
+d "insert d1, d2, d13, e8" 17d20019 0x000000 (set d1 (let width (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d2) (~ (var mask))) (& (<< (var d13) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d0, d3, d9, e14" 1793000f 0x000000 (set d0 (let width (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d3) (~ (var mask))) (& (<< (var d9) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d11, d15, d14, e14" 17ef00be 0x000000 (set d11 (let width (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d15) (~ (var mask))) (& (<< (var d14) (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d15, d11, d12, #0x15, #0x14" 37cb94fa 0x000000 (set d15 (let mask (<< (bv 32 0xfffff) (bv 32 0x15) false) (| (& (var d11) (~ (var mask))) (& (<< (var d12) (bv 32 0x15) false) (var mask)))))
+d "insert d5, d0, d7, #0x17, #0x1b" 37709b5b 0x000000 (set d5 (let mask (<< (bv 32 0x7ffffff) (bv 32 0x17) false) (| (& (var d0) (~ (var mask))) (& (<< (var d7) (bv 32 0x17) false) (var mask)))))
+d "insert d12, d4, d14, #0x1d, #7" 37e487ce 0x000000 (set d12 (let mask (<< (bv 32 0x7f) (bv 32 0x1d) false) (| (& (var d4) (~ (var mask))) (& (<< (var d14) (bv 32 0x1d) false) (var mask)))))
+d "insert d1, d10, d13, d8, #0x1d" 57da1d18 0x000000 (set d1 (let mask (<< (- (<< (bv 32 0x1) (bv 32 0x1d) false) (bv 32 0x1)) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d10) (~ (var mask))) (& (<< (var d13) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d0, d3, d15, d1, #0x17" 57f31701 0x000000 (set d0 (let mask (<< (- (<< (bv 32 0x1) (bv 32 0x17) false) (bv 32 0x1)) (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d3) (~ (var mask))) (& (<< (var d15) (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d14, d4, d4, d4, #7" 574407e4 0x000000 (set d14 (let mask (<< (- (<< (bv 32 0x1) (bv 32 0x7) false) (bv 32 0x1)) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d4) (~ (var mask))) (& (<< (var d4) (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d9, d10, #3, e12" 973a009c 0x000000 (set d9 (let width (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d10) (~ (var mask))) (& (<< (bv 32 0x3) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d12, d4, #0xe, e12" 97e400cd 0x000000 (set d12 (let width (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d4) (~ (var mask))) (& (<< (bv 32 0xe) (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d9, d4, #8, e10" 9784009a 0x000000 (set d9 (let width (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1f)) (let mask (<< (- (<< (bv 32 0x1) (var width) false) (bv 32 0x1)) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d4) (~ (var mask))) (& (<< (bv 32 0x8) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask))))))
+d "insert d11, d7, #0xb, #1, #0xc" b7b78cb0 0x000000 (set d11 (let mask (<< (bv 32 0xfff) (bv 32 0x1) false) (| (& (var d7) (~ (var mask))) (& (<< (bv 32 0xb) (bv 32 0x1) false) (var mask)))))
+d "insert d2, d3, #4, #0x18, #0x1a" b7431a2c 0x000000 (set d2 (let mask (<< (bv 32 0x3ffffff) (bv 32 0x18) false) (| (& (var d3) (~ (var mask))) (& (<< (bv 32 0x4) (bv 32 0x18) false) (var mask)))))
+d "insert d4, d2, #6, #0x14, #0x15" b762154a 0x000000 (set d4 (let mask (<< (bv 32 0x1fffff) (bv 32 0x14) false) (| (& (var d2) (~ (var mask))) (& (<< (bv 32 0x6) (bv 32 0x14) false) (var mask)))))
+d "insert d4, d8, #0xd, d7, #0xb" d7d80b47 0x000000 (set d4 (let mask (<< (bv 32 0x7ff) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d8) (~ (var mask))) (& (<< (bv 32 0xd) (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d9, d8, #8, d8, #0x1d" d7881d98 0x000000 (set d9 (let mask (<< (bv 32 0x1fffffff) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d8) (~ (var mask))) (& (<< (bv 32 0x8) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d2, d1, #7, d10, #8" d771082a 0x000000 (set d2 (let mask (<< (bv 32 0xff) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false) (| (& (var d1) (~ (var mask))) (& (<< (bv 32 0x7) (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1f)) false) (var mask)))))
+d "insert d11, d14, #0xa, #0x18, #8" b7ae08bc 0x000000 (set d11 (let mask (<< (bv 32 0xff) (bv 32 0x18) false) (| (& (var d14) (~ (var mask))) (& (<< (bv 32 0xa) (bv 32 0x18) false) (var mask)))))
+d "insn.t d1, d4, #5, d14, #0x14" 67e4251a 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x6) false) (bv 32 0x3ffffff)) (bv 32 0x6) false) (| (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1f)) (~ (<< (& (>> (var d14) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x5) false)))))
+d "insn.t d7, d14, #8, d8, #5" 678ea872 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x9) false) (bv 32 0x7fffff)) (bv 32 0x9) false) (| (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)) (~ (<< (& (>> (var d8) (bv 32 0x5) false) (bv 32 0x1)) (bv 32 0x8) false)))))
+d "insn.t d15, d4, #4, d11, #1" 67b4a4f0 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x5) false) (bv 32 0x7ffffff)) (bv 32 0x5) false) (| (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xf)) (~ (<< (& (>> (var d11) (bv 32 0x1) false) (bv 32 0x1)) (bv 32 0x4) false)))))
+d "isync" 0d00c004 0x000000 nop
+d "isync" 0d00c004 0x000000 nop
+d "isync" 0d00c004 0x000000 nop
+d "itof d11, d5" 4b0541b1 0x000000 (seq (set _a (var d5)) (set _result64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set _result32 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result32_64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _result32) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set d11 (fbits (var _result32))) (set set_FX (|| (|| (is_nan (var _result32_64)) (is_nan (var _result64))) (|| (<. (var _result32_64) (var _result64)) (<. (var _result64) (var _result32_64))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "itof d13, d6" 4b0641d1 0x000000 (seq (set _a (var d6)) (set _result64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set _result32 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result32_64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _result32) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set d13 (fbits (var _result32))) (set set_FX (|| (|| (is_nan (var _result32_64)) (is_nan (var _result64))) (|| (<. (var _result32_64) (var _result64)) (<. (var _result64) (var _result32_64))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "itof d1, d11" 4b0b4111 0x000000 (seq (set _a (var d11)) (set _result64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set _result32 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_sfloat ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_sfloat ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_sfloat ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_sfloat ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_sfloat ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result32_64 (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _result32) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin64 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin64 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin64 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin64 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin64 rtz (var _x)) (float 1 (bv 64 0x0) ))))))))) (set d1 (fbits (var _result32))) (set set_FX (|| (|| (is_nan (var _result32_64)) (is_nan (var _result64))) (|| (<. (var _result32_64) (var _result64)) (<. (var _result64) (var _result32_64))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "ixmax e10, e4, d14" 6be0a0a5 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmax e4, e2, d13" 6bd0a043 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmax e6, e10, d5" 6b50a07a 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmax.u e14, e10, d9" 6b90b0eb 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmax.u e0, e2, d0" 6b00b003 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmax.u e14, e12, d10" 6ba0b0fd 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (|| (! (ule (var Db15_0) (var Db31_16))) (== (var Db15_0) (var Db31_16))) (! (ule (var Db15_0) (var Ed47_32)))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (! (ule (var Db31_16) (var Db15_0))) (! (ule (var Db31_16) (var Ed47_32)))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin e4, e2, d7" 6b708053 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin e8, e6, d0" 6b008086 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin e14, e0, d10" 6ba080e0 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin.u e2, e12, d0" 6b00902c 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin.u e12, e4, d4" 6b4090c4 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ixmin.u e4, e14, d6" 6b60905e 0x000000 (seq (set Ec15_0 (mod (+ (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x2)) (bv 32 0xffff))) (set Ec63_48 (bv 32 0x0)) (set Ec47_32 (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set Ec31_16 (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set Db31_16 (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set Db15_0 (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed47_32 (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set Ed31_16 (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set Ed15_0 (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (branch (&& (ule (var Db15_0) (var Db31_16)) (&& (ule (var Db15_0) (var Ed47_32)) (! (== (var Db15_0) (var Ed47_32))))) (seq (set Ec47_32 (var Db15_0)) (set Ec31_16 (var Ed15_0))) (branch (&& (&& (ule (var Db31_16) (var Db15_0)) (! (== (var Db31_16) (var Db15_0)))) (&& (ule (var Db31_16) (var Ed47_32)) (! (== (var Db31_16) (var Ed47_32))))) (seq (set Ec47_32 (var Db31_16)) (set Ec31_16 (mod (+ (var Ed15_0) (bv 32 0x1)) (bv 32 0xffff)))) (seq (set Ec47_32 (var Ed47_32)) (set Ec31_16 (var Ed31_16))))) (set temp (append (| (cast 32 false (<< (var Ec63_48) (bv 32 0x10) false)) (cast 32 false (var Ec47_32))) (| (cast 32 false (<< (var Ec31_16) (bv 32 0x10) false)) (cast 32 false (var Ec15_0))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "j #0xffffff90" 3cc8 0x000000 (jmp (bv 32 0xffffff90))
+d "j #0xffffff22" 3c91 0x000000 (jmp (bv 32 0xffffff22))
+d "j #0x2e" 3c17 0x000000 (jmp (bv 32 0x2e))
+d "j #0xffc331e2" 1de1f198 0x000000 (jmp (bv 32 0xffc331e2))
+d "j #0xff9ae1aa" 1dcdd570 0x000000 (jmp (bv 32 0xff9ae1aa))
+d "j #0xff8a2c4c" 1dc52616 0x000000 (jmp (bv 32 0xff8a2c4c))
+d "j #0xb2" 3c59 0x000000 (jmp (bv 32 0xb2))
+d "j #0x86" 3c43 0x000000 (jmp (bv 32 0x86))
+d "ja #0x1c06e2" 9dce7103 0x000000 (jmp (bv 32 0x180dc4))
+d "ja #0xc099c" 9d56ce04 0x000000 (jmp (bv 32 0x181338))
+d "ja #0x168402" 9dcb0142 0x000000 (jmp (bv 32 0xd0804))
+d "jeq d15, d11, #0x38" bebc 0x000000 (branch (== (var d15) (var d11)) (jmp (bv 32 0x38)) nop)
+d "jeq d15, d12, #0x32" bec9 0x000000 (branch (== (var d15) (var d12)) (jmp (bv 32 0x32)) nop)
+d "jeq d15, d0, #0x38" be0c 0x000000 (branch (== (var d15) (var d0)) (jmp (bv 32 0x38)) nop)
+d "jeq d15, #1, #0x32" 9e19 0x000000 (branch (== (var d15) (bv 32 0x1)) (jmp (bv 32 0x32)) nop)
+d "jeq d15, #2, #0x2e" 9e27 0x000000 (branch (== (var d15) (bv 32 0x2)) (jmp (bv 32 0x2e)) nop)
+d "jeq d15, #-8, #0x24" 9e82 0x000000 (branch (== (var d15) (bv 32 0xfffffff8)) (jmp (bv 32 0x24)) nop)
+d "jeq d15, d13, #0x1a" 3edd 0x000000 (branch (== (var d15) (var d13)) (jmp (bv 32 0x1a)) nop)
+d "jeq d15, d14, #0x14" 3eea 0x000000 (branch (== (var d15) (var d14)) (jmp (bv 32 0x14)) nop)
+d "jeq d15, d5, #0x10" 3e58 0x000000 (branch (== (var d15) (var d5)) (jmp (bv 32 0x10)) nop)
+d "jeq d15, #0, #0x16" 1e0b 0x000000 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0x16)) nop)
+d "jeq d15, #1, #0x1a" 1e1d 0x000000 (branch (== (var d15) (bv 32 0x1)) (jmp (bv 32 0x1a)) nop)
+d "jeq d15, #-1, #4" 1ef2 0x000000 (branch (== (var d15) (bv 32 0xffffffff)) (jmp (bv 32 0x4)) nop)
+d "jeq d10, d0, #0xffff8ba8" 5f0ad445 0x000000 (branch (== (var d10) (var d0)) (jmp (bv 32 0xffff8ba8)) nop)
+d "jeq d6, d9, #0xffffd94e" 5f96a76c 0x000000 (branch (== (var d6) (var d9)) (jmp (bv 32 0xffffd94e)) nop)
+d "jeq d10, d6, #0x1204" 5f6a0209 0x000000 (branch (== (var d10) (var d6)) (jmp (bv 32 0x1204)) nop)
+d "jeq d13, #4, #0x7e8" df4df403 0x000000 (branch (== (var d13) (bv 32 0x4)) (jmp (bv 32 0x7e8)) nop)
+d "jeq d11, #-2, #0x7672" dfeb393b 0x000000 (branch (== (var d11) (bv 32 0xfffffffe)) (jmp (bv 32 0x7672)) nop)
+d "jeq d6, #6, #0x6e96" df664b37 0x000000 (branch (== (var d6) (bv 32 0x6)) (jmp (bv 32 0x6e96)) nop)
+d "jeq d15, d8, #0x18" 3e8c 0x000000 (branch (== (var d15) (var d8)) (jmp (bv 32 0x18)) nop)
+d "jeq d15, d11, #0x2c" beb6 0x000000 (branch (== (var d15) (var d11)) (jmp (bv 32 0x2c)) nop)
+d "jeq d15, #-3, #0x20" 9ed0 0x000000 (branch (== (var d15) (bv 32 0xfffffffd)) (jmp (bv 32 0x20)) nop)
+d "jeq d15, #-3, #0x34" 9eda 0x000000 (branch (== (var d15) (bv 32 0xfffffffd)) (jmp (bv 32 0x34)) nop)
+d "jeq.a a7, a6, #0xffffe268" 7d673471 0x000000 (branch (== (var a7) (var a6)) (jmp (bv 32 0xffffe268)) nop)
+d "jeq.a a7, sp, #0x65c4" 7da7e232 0x000000 (branch (== (var a7) (var a10)) (jmp (bv 32 0x65c4)) nop)
+d "jeq.a a15, a13, #0x3244" 7ddf2219 0x000000 (branch (== (var a15) (var a13)) (jmp (bv 32 0x3244)) nop)
+d "jeq.a a11, a0, #0xffffe89e" 7d0b4f74 0x000000 (branch (== (var a11) (var a0)) (jmp (bv 32 0xffffe89e)) nop)
+d "jeq.a a13, a7, #0xffffd80a" 7d7d056c 0x000000 (branch (== (var a13) (var a7)) (jmp (bv 32 0xffffd80a)) nop)
+d "jge d8, d9, #0xffffac52" 7f982956 0x000000 (branch (|| (! (sle (var d8) (var d9))) (== (var d8) (var d9))) (jmp (bv 32 0xffffac52)) nop)
+d "jge d1, d15, #0x65c4" 7ff1e232 0x000000 (branch (|| (! (sle (var d1) (var d15))) (== (var d1) (var d15))) (jmp (bv 32 0x65c4)) nop)
+d "jge d0, d10, #0x2f44" 7fa0a217 0x000000 (branch (|| (! (sle (var d0) (var d10))) (== (var d0) (var d10))) (jmp (bv 32 0x2f44)) nop)
+d "jge d13, #0, #0xffffaa50" ff0d2855 0x000000 (branch (|| (! (sle (var d13) (bv 32 0x0))) (== (var d13) (bv 32 0x0))) (jmp (bv 32 0xffffaa50)) nop)
+d "jge d3, #-6, #0xffff8aa2" ffa35145 0x000000 (branch (|| (! (sle (var d3) (bv 32 0xfffffffa))) (== (var d3) (bv 32 0xfffffffa))) (jmp (bv 32 0xffff8aa2)) nop)
+d "jge d13, #1, #0xffffd208" ff1d0469 0x000000 (branch (|| (! (sle (var d13) (bv 32 0x1))) (== (var d13) (bv 32 0x1))) (jmp (bv 32 0xffffd208)) nop)
+d "jge.u d14, d13, #0xffff83b0" 7fded8c1 0x000000 (branch (|| (! (ule (var d14) (var d13))) (== (var d14) (var d13))) (jmp (bv 32 0xffff83b0)) nop)
+d "jge.u d0, d8, #0x64a4" 7f8052b2 0x000000 (branch (|| (! (ule (var d0) (var d8))) (== (var d0) (var d8))) (jmp (bv 32 0x64a4)) nop)
+d "jge.u d10, d10, #0x1d2" 7faae980 0x000000 (branch (|| (! (ule (var d10) (var d10))) (== (var d10) (var d10))) (jmp (bv 32 0x1d2)) nop)
+d "jge.u d14, #6, #0xffff8d42" ff6ea1c6 0x000000 (branch (|| (! (ule (var d14) (bv 32 0x6))) (== (var d14) (bv 32 0x6))) (jmp (bv 32 0xffff8d42)) nop)
+d "jge.u d11, #3, #0x41c2" ff3be1a0 0x000000 (branch (|| (! (ule (var d11) (bv 32 0x3))) (== (var d11) (bv 32 0x3))) (jmp (bv 32 0x41c2)) nop)
+d "jge.u d2, #1, #0x3b2e" ff12979d 0x000000 (branch (|| (! (ule (var d2) (bv 32 0x1))) (== (var d2) (bv 32 0x1))) (jmp (bv 32 0x3b2e)) nop)
+d "jgez d2, #0x18" ce2c 0x000000 (branch (|| (! (ule (var d2) (bv 32 0x0))) (== (var d2) (bv 32 0x0))) (jmp (bv 32 0x18)) nop)
+d "jgez d5, #0xc" ce56 0x000000 (branch (|| (! (ule (var d5) (bv 32 0x0))) (== (var d5) (bv 32 0x0))) (jmp (bv 32 0xc)) nop)
+d "jgez d15, #0x1e" ceff 0x000000 (branch (|| (! (ule (var d15) (bv 32 0x0))) (== (var d15) (bv 32 0x0))) (jmp (bv 32 0x1e)) nop)
+d "jgtz d0, #0x14" 4e0a 0x000000 (branch (! (ule (var d0) (bv 32 0x0))) (jmp (bv 32 0x14)) nop)
+d "jgtz d12, #0xa" 4ec5 0x000000 (branch (! (ule (var d12) (bv 32 0x0))) (jmp (bv 32 0xa)) nop)
+d "jgtz d4, #8" 4e44 0x000000 (branch (! (ule (var d4) (bv 32 0x0))) (jmp (bv 32 0x8)) nop)
+d "jgtz d9, #0x16" 4e9b 0x000000 (branch (! (ule (var d9) (bv 32 0x0))) (jmp (bv 32 0x16)) nop)
+d "jgtz d7, #0x18" 4e7c 0x000000 (branch (! (ule (var d7) (bv 32 0x0))) (jmp (bv 32 0x18)) nop)
+d "ji a2" dc02 0x000000 (jmp (& (var a2) (bv 32 0xfffffffe)))
+d "ji sp" dc0a 0x000000 (jmp (& (var a10) (bv 32 0xfffffffe)))
+d "ji sp" dc0a 0x000000 (jmp (& (var a10) (bv 32 0xfffffffe)))
+d "ji a11" dc0b 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "ji a11" dc0b 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "ji a11" dc0b 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "ji a13" 2d0d3000 0x000000 (jmp (& (var a13) (bv 32 0xfffffffe)))
+d "ji a14" 2d0e3000 0x000000 (jmp (& (var a14) (bv 32 0xfffffffe)))
+d "ji sp" 2d0a3000 0x000000 (jmp (& (var a10) (bv 32 0xfffffffe)))
+d "ji a11" 2d0b3000 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "ji a11" 2d0b3000 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "ji a11" 2d0b3000 0x000000 (jmp (& (var a11) (bv 32 0xfffffffe)))
+d "jl #0xff5172aa" 5da855b9 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0xff5172aa)))
+d "jl #0xaac39c" 5d55ce61 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0xaac39c)))
+d "jl #0xd88610" 5d6c0843 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0xd88610)))
+d "jla #0xd0a9a" ddd64d85 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0x1a1534)))
+d "jla #0xf287c" dd973e94 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0x1e50f8)))
+d "jla #0x14a656" dd8a2b53 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (bv 32 0x94cac)))
+d "jlez d11, #2" 8eb1 0x000000 (branch (sle (var d11) (bv 32 0x0)) (jmp (bv 32 0x2)) nop)
+d "jlez d13, #0x1a" 8edd 0x000000 (branch (sle (var d13) (bv 32 0x0)) (jmp (bv 32 0x1a)) nop)
+d "jlez d10, #2" 8ea1 0x000000 (branch (sle (var d10) (bv 32 0x0)) (jmp (bv 32 0x2)) nop)
+d "jlez d7, #0x14" 8e7a 0x000000 (branch (sle (var d7) (bv 32 0x0)) (jmp (bv 32 0x14)) nop)
+d "jlez d5, #8" 8e54 0x000000 (branch (sle (var d5) (bv 32 0x0)) (jmp (bv 32 0x8)) nop)
+d "jli a13" 2d0d2000 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (& (var a13) (bv 32 0xfffffffe))))
+d "jli a8" 2d082000 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (& (var a8) (bv 32 0xfffffffe))))
+d "jli sp" 2d0a2000 0x000000 (seq (set a11 (bv 32 0x4)) (jmp (& (var a10) (bv 32 0xfffffffe))))
+d "jlt d8, d12, #0x360e" 3fc8071b 0x000000 (branch (sle (var d8) (var d12)) (jmp (bv 32 0x360e)) nop)
+d "jlt d11, d12, #0xffffdd52" 3fcba96e 0x000000 (branch (sle (var d11) (var d12)) (jmp (bv 32 0xffffdd52)) nop)
+d "jlt d5, d9, #0x628c" 3f954631 0x000000 (branch (sle (var d5) (var d9)) (jmp (bv 32 0x628c)) nop)
+d "jlt d6, #0xb, #0x610" bfb60803 0x000000 (branch (&& (sle (var d6) (bv 32 0xfffffffb)) (! (== (var d6) (bv 32 0xfffffffb)))) (jmp (bv 32 0x610)) nop)
+d "jlt d5, #5, #0xffffd154" bf55aa68 0x000000 (branch (&& (sle (var d5) (bv 32 0x5)) (! (== (var d5) (bv 32 0x5)))) (jmp (bv 32 0xffffd154)) nop)
+d "jlt d11, #0, #0xffffa76e" bf0bb753 0x000000 (branch (&& (sle (var d11) (bv 32 0x0)) (! (== (var d11) (bv 32 0x0)))) (jmp (bv 32 0xffffa76e)) nop)
+d "jlt d11, d14, #0x31e6" 3febf318 0x000000 (branch (sle (var d11) (var d14)) (jmp (bv 32 0x31e6)) nop)
+d "jlt.u d1, d9, #0x258a" 3f91c592 0x000000 (branch (ule (var d1) (var d9)) (jmp (bv 32 0x258a)) nop)
+d "jlt.u d0, d5, #0xffffe6c6" 3f5063f3 0x000000 (branch (ule (var d0) (var d5)) (jmp (bv 32 0xffffe6c6)) nop)
+d "jlt.u d0, d9, #0x3832" 3f90199c 0x000000 (branch (ule (var d0) (var d9)) (jmp (bv 32 0x3832)) nop)
+d "jlt.u d9, #5, #0xffffe00e" bf5907f0 0x000000 (branch (&& (ule (var d9) (bv 32 0x5)) (! (== (var d9) (bv 32 0x5)))) (jmp (bv 32 0xffffe00e)) nop)
+d "jlt.u d3, #2, #0xffffb1c0" bf23e0d8 0x000000 (branch (&& (ule (var d3) (bv 32 0x2)) (! (== (var d3) (bv 32 0x2)))) (jmp (bv 32 0xffffb1c0)) nop)
+d "jlt.u d9, #0xa, #0x5dee" bfa9f7ae 0x000000 (branch (&& (ule (var d9) (bv 32 0xa)) (! (== (var d9) (bv 32 0xa)))) (jmp (bv 32 0x5dee)) nop)
+d "jltz d1, #0xe" 0e17 0x000000 (branch (&& (sle (var d1) (bv 32 0x0)) (! (== (var d1) (bv 32 0x0)))) (jmp (bv 32 0xe)) nop)
+d "jltz d11, #0x1c" 0ebe 0x000000 (branch (&& (sle (var d11) (bv 32 0x0)) (! (== (var d11) (bv 32 0x0)))) (jmp (bv 32 0x1c)) nop)
+d "jltz d13, #0xe" 0ed7 0x000000 (branch (&& (sle (var d13) (bv 32 0x0)) (! (== (var d13) (bv 32 0x0)))) (jmp (bv 32 0xe)) nop)
+d "jltz d3, #0x1c" 0e3e 0x000000 (branch (&& (sle (var d3) (bv 32 0x0)) (! (== (var d3) (bv 32 0x0)))) (jmp (bv 32 0x1c)) nop)
+d "jne d15, d12, #0x3c" fece 0x000000 (branch (! (== (var d15) (var d12))) (jmp (bv 32 0x3c)) nop)
+d "jne d15, d5, #0x30" fe58 0x000000 (branch (! (== (var d15) (var d5))) (jmp (bv 32 0x30)) nop)
+d "jne d15, d0, #0x32" fe09 0x000000 (branch (! (== (var d15) (var d0))) (jmp (bv 32 0x32)) nop)
+d "jne d15, #0, #0x20" de00 0x000000 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0x20)) nop)
+d "jne d15, #-1, #0x2a" def5 0x000000 (branch (! (== (var d15) (bv 32 0xffffffff))) (jmp (bv 32 0x2a)) nop)
+d "jne d15, #1, #0x22" de11 0x000000 (branch (! (== (var d15) (bv 32 0x1))) (jmp (bv 32 0x22)) nop)
+d "jne d15, d15, #0x10" 7ef8 0x000000 (branch (! (== (var d15) (var d15))) (jmp (bv 32 0x10)) nop)
+d "jne d15, d5, #0x1e" 7e5f 0x000000 (branch (! (== (var d15) (var d5))) (jmp (bv 32 0x1e)) nop)
+d "jne d15, d0, #0x1c" 7e0e 0x000000 (branch (! (== (var d15) (var d0))) (jmp (bv 32 0x1c)) nop)
+d "jne d15, #-4, #2" 5ec1 0x000000 (branch (! (== (var d15) (bv 32 0xfffffffc))) (jmp (bv 32 0x2)) nop)
+d "jne d15, #-1, #0xc" 5ef6 0x000000 (branch (! (== (var d15) (bv 32 0xffffffff))) (jmp (bv 32 0xc)) nop)
+d "jne d15, #1, #0x1e" 5e1f 0x000000 (branch (! (== (var d15) (bv 32 0x1))) (jmp (bv 32 0x1e)) nop)
+d "jne d3, d6, #0x52ae" 5f6357a9 0x000000 (branch (! (== (var d3) (var d6))) (jmp (bv 32 0x52ae)) nop)
+d "jne d7, d0, #0xffff9084" 5f0742c8 0x000000 (branch (! (== (var d7) (var d0))) (jmp (bv 32 0xffff9084)) nop)
+d "jne d14, d9, #0xffffbf38" 5f9e9cdf 0x000000 (branch (! (== (var d14) (var d9))) (jmp (bv 32 0xffffbf38)) nop)
+d "jne d0, #6, #0x6912" df6089b4 0x000000 (branch (! (== (var d0) (bv 32 0x6))) (jmp (bv 32 0x6912)) nop)
+d "jne d3, #-1, #0x7a1e" dff30fbd 0x000000 (branch (! (== (var d3) (bv 32 0xffffffff))) (jmp (bv 32 0x7a1e)) nop)
+d "jne d12, #-2, #0xffffbe18" dfec0cdf 0x000000 (branch (! (== (var d12) (bv 32 0xfffffffe))) (jmp (bv 32 0xffffbe18)) nop)
+d "jne d15, d10, #2" 7ea1 0x000000 (branch (! (== (var d15) (var d10))) (jmp (bv 32 0x2)) nop)
+d "jne d15, #-2, #0x18" 5eec 0x000000 (branch (! (== (var d15) (bv 32 0xfffffffe))) (jmp (bv 32 0x18)) nop)
+d "jne.a a14, a9, #0xffffba52" 7d9e29dd 0x000000 (branch (! (== (var a14) (var a9))) (jmp (bv 32 0xffffba52)) nop)
+d "jne.a sp, a3, #0x675e" 7d3aafb3 0x000000 (branch (! (== (var a10) (var a3))) (jmp (bv 32 0x675e)) nop)
+d "jne.a a0, a2, #0x7906" 7d2083bc 0x000000 (branch (! (== (var a0) (var a2))) (jmp (bv 32 0x7906)) nop)
+d "jned d14, d2, #0xffffa652" 1f2e29d3 0x000000 (seq (set PC (ite (! (== (var d14) (var d2))) (bv 32 0xffffa652) (bv 32 0x4))) (set d14 (- (var d14) (bv 32 0x1))) (jmp (var PC)))
+d "jned d0, d5, #0xffffe296" 1f504bf1 0x000000 (seq (set PC (ite (! (== (var d0) (var d5))) (bv 32 0xffffe296) (bv 32 0x4))) (set d0 (- (var d0) (bv 32 0x1))) (jmp (var PC)))
+d "jned d0, d11, #0x3e5c" 1fb02e9f 0x000000 (seq (set PC (ite (! (== (var d0) (var d11))) (bv 32 0x3e5c) (bv 32 0x4))) (set d0 (- (var d0) (bv 32 0x1))) (jmp (var PC)))
+d "jned d11, #0xb, #0x31cc" 9fbbe698 0x000000 (seq (set PC (ite (! (== (var d11) (bv 32 0xfffffffb))) (bv 32 0x31cc) (bv 32 0x4))) (set d11 (- (var d11) (bv 32 0x1))) (jmp (var PC)))
+d "jned d8, #8, #0xffff9606" 9f8803cb 0x000000 (seq (set PC (ite (! (== (var d8) (bv 32 0xfffffff8))) (bv 32 0xffff9606) (bv 32 0x4))) (set d8 (- (var d8) (bv 32 0x1))) (jmp (var PC)))
+d "jned d2, #1, #0xffffae2a" 9f1215d7 0x000000 (seq (set PC (ite (! (== (var d2) (bv 32 0x1))) (bv 32 0xffffae2a) (bv 32 0x4))) (set d2 (- (var d2) (bv 32 0x1))) (jmp (var PC)))
+d "jned d5, d4, #0xfffff346" 1f45a3f9 0x000000 (seq (set PC (ite (! (== (var d5) (var d4))) (bv 32 0xfffff346) (bv 32 0x4))) (set d5 (- (var d5) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d13, d15, #0x5900" 1ffd802c 0x000000 (seq (set PC (ite (! (== (var d13) (var d15))) (bv 32 0x5900) (bv 32 0x4))) (set d13 (+ (var d13) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d6, d7, #0x7b26" 1f76933d 0x000000 (seq (set PC (ite (! (== (var d6) (var d7))) (bv 32 0x7b26) (bv 32 0x4))) (set d6 (+ (var d6) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d6, d8, #0xfffffb4a" 1f86a57d 0x000000 (seq (set PC (ite (! (== (var d6) (var d8))) (bv 32 0xfffffb4a) (bv 32 0x4))) (set d6 (+ (var d6) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d0, #6, #0x4fe4" 9f60f227 0x000000 (seq (set PC (ite (! (== (var d0) (bv 32 0x6))) (bv 32 0x4fe4) (bv 32 0x4))) (set d0 (+ (var d0) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d13, #7, #0x5b1e" 9f7d8f2d 0x000000 (seq (set PC (ite (! (== (var d13) (bv 32 0x7))) (bv 32 0x5b1e) (bv 32 0x4))) (set d13 (+ (var d13) (bv 32 0x1))) (jmp (var PC)))
+d "jnei d0, #8, #0xffffc1d4" 9f80ea60 0x000000 (seq (set PC (ite (! (== (var d0) (bv 32 0xfffffff8))) (bv 32 0xffffc1d4) (bv 32 0x4))) (set d0 (+ (var d0) (bv 32 0x1))) (jmp (var PC)))
+d "jnz d15, #0xffffff52" eea9 0x000000 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0xffffff52)) nop)
+d "jnz d15, #0xdc" ee6e 0x000000 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0xdc)) nop)
+d "jnz d15, #0xb2" ee59 0x000000 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0xb2)) nop)
+d "jnz d12, #0x10" f6c8 0x000000 (branch (! (== (var d12) (bv 32 0x0))) (jmp (bv 32 0x10)) nop)
+d "jnz d13, #0x1e" f6df 0x000000 (branch (! (== (var d13) (bv 32 0x0))) (jmp (bv 32 0x1e)) nop)
+d "jnz d0, #0" f600 0x000000 (branch (! (== (var d0) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
+d "jnz d4, #0x1a" f64d 0x000000 (branch (! (== (var d4) (bv 32 0x0))) (jmp (bv 32 0x1a)) nop)
+d "jnz d15, #0xde" ee6f 0x000000 (branch (! (== (var d15) (bv 32 0x0))) (jmp (bv 32 0xde)) nop)
+d "jnz d8, #4" f682 0x000000 (branch (! (== (var d8) (bv 32 0x0))) (jmp (bv 32 0x4)) nop)
+d "jnz d8, #4" f682 0x000000 (branch (! (== (var d8) (bv 32 0x0))) (jmp (bv 32 0x4)) nop)
+d "jnz.a a0, #0xc" 7c06 0x000000 (branch (! (== (var a0) (bv 32 0x0))) (jmp (bv 32 0xc)) nop)
+d "jnz.a a12, #0xe" 7cc7 0x000000 (branch (! (== (var a12) (bv 32 0x0))) (jmp (bv 32 0xe)) nop)
+d "jnz.a a12, #0" 7cc0 0x000000 (branch (! (== (var a12) (bv 32 0x0))) (jmp (bv 32 0x0)) nop)
+d "jnz.a a3, #0x75de" bd03efba 0x000000 (branch (! (== (var a3) (bv 32 0x0))) (jmp (bv 32 0x75de)) nop)
+d "jnz.a a8, #0x2f5a" bd08ad97 0x000000 (branch (! (== (var a8) (bv 32 0x0))) (jmp (bv 32 0x2f5a)) nop)
+d "jnz.a sp, #0xffffa72c" bd0a96d3 0x000000 (branch (! (== (var a10) (bv 32 0x0))) (jmp (bv 32 0xffffa72c)) nop)
+d "jnz.t d15, #0, #0x1e" ae0f 0x000000 (branch (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (jmp (bv 32 0x1e)) nop)
+d "jnz.t d15, #0xc, #0x14" aeca 0x000000 (branch (! (is_zero (& (>> (var d15) (bv 32 0xc) false) (bv 32 0x1)))) (jmp (bv 32 0x14)) nop)
+d "jnz.t d15, #1, #0x14" ae1a 0x000000 (branch (! (is_zero (& (>> (var d15) (bv 32 0x1) false) (bv 32 0x1)))) (jmp (bv 32 0x14)) nop)
+d "jnz.t d7, #0xb, #0x5ea0" 6fb750af 0x000000 (branch (! (is_zero (& (>> (var d7) (bv 32 0xb) false) (bv 32 0x1)))) (jmp (bv 32 0x5ea0)) nop)
+d "jnz.t d9, #4, #0x67d6" 6f49ebb3 0x000000 (branch (! (is_zero (& (>> (var d9) (bv 32 0x4) false) (bv 32 0x1)))) (jmp (bv 32 0x67d6)) nop)
+d "jnz.t d7, #0xe, #0xffff96e0" 6fe770cb 0x000000 (branch (! (is_zero (& (>> (var d7) (bv 32 0xe) false) (bv 32 0x1)))) (jmp (bv 32 0xffff96e0)) nop)
+d "jnz.t d15, #2, #0x1c" ae2e 0x000000 (branch (! (is_zero (& (>> (var d15) (bv 32 0x2) false) (bv 32 0x1)))) (jmp (bv 32 0x1c)) nop)
+d "jz d15, #0xffffff6c" 6eb6 0x000000 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0xffffff6c)) nop)
+d "jz d15, #0xb0" 6e58 0x000000 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0xb0)) nop)
+d "jz d15, #0x82" 6e41 0x000000 (branch (== (var d15) (bv 32 0x0)) (jmp (bv 32 0x82)) nop)
+d "jz d13, #0xc" 76d6 0x000000 (branch (is_zero (var d13)) (jmp (bv 32 0xc)) nop)
+d "jz d13, #0" 76d0 0x000000 (branch (is_zero (var d13)) (jmp (bv 32 0x0)) nop)
+d "jz d0, #0x1c" 760e 0x000000 (branch (is_zero (var d0)) (jmp (bv 32 0x1c)) nop)
+d "jz.a a0, #0x10" bc08 0x000000 (branch (is_zero (var a0)) (jmp (bv 32 0x10)) nop)
+d "jz.a a15, #0x1c" bcfe 0x000000 (branch (is_zero (var a15)) (jmp (bv 32 0x1c)) nop)
+d "jz.a a6, #0x12" bc69 0x000000 (branch (is_zero (var a6)) (jmp (bv 32 0x12)) nop)
+d "jz.a a15, #0x38ce" bd0f671c 0x000000 (branch (== (var a15) (bv 32 0x0)) (jmp (bv 32 0x38ce)) nop)
+d "jz.a a12, #0xffffa5dc" bd0cee52 0x000000 (branch (== (var a12) (bv 32 0x0)) (jmp (bv 32 0xffffa5dc)) nop)
+d "jz.a a3, #0x738a" bd03c539 0x000000 (branch (== (var a3) (bv 32 0x0)) (jmp (bv 32 0x738a)) nop)
+d "jz.a a5, #0x10" bc58 0x000000 (branch (is_zero (var a5)) (jmp (bv 32 0x10)) nop)
+d "jz.t d15, #2, #0x12" 2e29 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x2) false) (bv 32 0x1))))) (jmp (bv 32 0x12)) nop)
+d "jz.t d15, #0xe, #0" 2ee0 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0xe) false) (bv 32 0x1))))) (jmp (bv 32 0x0)) nop)
+d "jz.t d15, #0xa, #0x10" 2ea8 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0xa) false) (bv 32 0x1))))) (jmp (bv 32 0x10)) nop)
+d "jz.t d9, #0xd, #0xffffc710" 6fd98863 0x000000 (branch (! (! (is_zero (& (>> (var d9) (bv 32 0xd) false) (bv 32 0x1))))) (jmp (bv 32 0xffffc710)) nop)
+d "jz.t d15, #9, #0xffffbe38" 6f9f1c5f 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x9) false) (bv 32 0x1))))) (jmp (bv 32 0xffffbe38)) nop)
+d "jz.t d8, #0x14, #0x65ea" ef48f532 0x000000 (branch (! (! (is_zero (& (>> (var d8) (bv 32 0x14) false) (bv 32 0x1))))) (jmp (bv 32 0x65ea)) nop)
+d "jz.t d15, #0xa, #0x1e" 2eaf 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0xa) false) (bv 32 0x1))))) (jmp (bv 32 0x1e)) nop)
+d "jz.t d15, #0xe, #0x1a" 2eed 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0xe) false) (bv 32 0x1))))) (jmp (bv 32 0x1a)) nop)
+d "jz.t d15, #4, #2" 2e41 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x4) false) (bv 32 0x1))))) (jmp (bv 32 0x2)) nop)
+d "jz.t d15, #7, #2" 2e71 0x000000 (branch (! (! (is_zero (& (>> (var d15) (bv 32 0x7) false) (bv 32 0x1))))) (jmp (bv 32 0x2)) nop)
+d "ld.a a0, #0xa0002e21" 85a0e18a 0x000000 (set a0 (loadw 0 32 (bv 32 0xa0002e21)))
+d "ld.a a15, [sp]#0x48" d812 0x000000 (seq (set EA (+ (var a10) (bv 32 0x120))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a15, [sp]#0x250" d894 0x000000 (seq (set EA (+ (var a10) (bv 32 0x940))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a15, [sp]#0x2f4" d8bd 0x000000 (seq (set EA (+ (var a10) (bv 32 0xbd0))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a8, [a15]#8" c828 0x000000 (seq (set EA (+ (var a15) (bv 32 0x20))) (set a8 (loadw 0 32 (var EA))))
+d "ld.a sp, [a15]#0x30" c8ca 0x000000 (seq (set EA (+ (var a15) (bv 32 0xc0))) (set a10 (loadw 0 32 (var EA))))
+d "ld.a a8, [a15]#0x38" c8e8 0x000000 (seq (set EA (+ (var a15) (bv 32 0xe0))) (set a8 (loadw 0 32 (var EA))))
+d "ld.a a15, [a1]#8" cc12 0x000000 (seq (set EA (+ (var a1) (bv 32 0x20))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a15, [a9]#0x14" cc95 0x000000 (seq (set EA (+ (var a9) (bv 32 0x50))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a15, [sp]#0x1c" cca7 0x000000 (seq (set EA (+ (var a10) (bv 32 0x70))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a15, [sp]#0x2dc" d8b7 0x000000 (seq (set EA (+ (var a10) (bv 32 0xb70))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a9, [a15]#-0x63a9" 99f9d719 0x000000 (seq (set EA (+ (var a15) (bv 32 0xffff9c57))) (set a9 (loadw 0 32 (var EA))))
+d "ld.a a0, [a9]#-0x64db" 9990a5c9 0x000000 (seq (set EA (+ (var a9) (bv 32 0xffff9b25))) (set a0 (loadw 0 32 (var EA))))
+d "ld.a a8, [sp]#0x6fb9" 99a8f9e6 0x000000 (seq (set EA (+ (var a10) (bv 32 0x6fb9))) (set a8 (loadw 0 32 (var EA))))
+d "ld.a a3, [p2+c]#-0x1db" 2923a585 0x000000 (seq (set index (& (>> (var a2) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a2) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a3) (var index))) (set a3 (loadw 0 32 (var EA))) (set new_index (+ (var index) (bv 32 0xfffffe25))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a2 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.a a12, [p8+c]#0x1b4" 299cb465 0x000000 (seq (set index (& (>> (var a8) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a8) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a9) (var index))) (set a12 (loadw 0 32 (var EA))) (set new_index (+ (var index) (bv 32 0x1b4))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a8 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.a a13, [p4+c]#0x1ca" 295d8a75 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set a13 (loadw 0 32 (var EA))) (set new_index (+ (var index) (bv 32 0x1ca))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.a a2, #0xd00019f1" 85d2b179 0x000000 (set a2 (loadw 0 32 (bv 32 0xd00019f1)))
+d "ld.a a1, #0xc00003bf" 85c13fe8 0x000000 (set a1 (loadw 0 32 (bv 32 0xc00003bf)))
+d "ld.a a13, #0x959" 850d9958 0x000000 (set a13 (loadw 0 32 (bv 32 0x959)))
+d "ld.a a2, [a9]#0x2347" 999207d2 0x000000 (seq (set EA (+ (var a9) (bv 32 0x2347))) (set a2 (loadw 0 32 (var EA))))
+d "ld.a a2, [a11+]" c4b2 0x000000 (seq (set EA (var a11)) (set a2 (loadw 0 32 (var EA))) (set a11 (+ (var a11) (bv 32 0x4))))
+d "ld.a a15, [a9]#0x24" cc99 0x000000 (seq (set EA (+ (var a9) (bv 32 0x90))) (set a15 (loadw 0 32 (var EA))))
+d "ld.a a14, [a6]" d46e 0x000000 (seq (set EA (var a6)) (set a14 (loadw 0 32 (var EA))))
+d "ld.b d0, #0x20003255" 05201593 0x000000 (seq (set EA (bv 32 0x20003255)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d9, #0x90003db9" 0599f963 0x000000 (seq (set EA (bv 32 0x90003db9)) (set d9 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d0, #0x60002882" 05608222 0x000000 (seq (set EA (bv 32 0x60002882)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d13, [p2+c]#-0x1aa" 292d1694 0x000000 (seq (set index (& (>> (var a2) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a2) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a3) (var index))) (set d13 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0xfffffe56))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a2 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.b d10, [p8+c]#0x31" 298a3104 0x000000 (seq (set index (& (>> (var a8) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a8) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a9) (var index))) (set d10 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0x31))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a8 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.b d7, [p10+c]#0x43" 29b70314 0x000000 (seq (set index (& (>> (var a10) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a10) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a11) (var index))) (set d7 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0x43))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a10 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.b d7, [a12]#-0x3acc" 79c7744c 0x000000 (seq (set EA (+ (var a12) (bv 32 0xffffc534))) (set d7 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d3, [a5]#0x48ee" 7953ae34 0x000000 (seq (set EA (+ (var a5) (bv 32 0x48ee))) (set d3 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d15, [a9]#-0x1e68" 799f186e 0x000000 (seq (set EA (+ (var a9) (bv 32 0xffffe198))) (set d15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.b d13, #0x80002003" 058d0302 0x000000 (seq (set EA (bv 32 0x80002003)) (set d13 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 8 (var EA))) (loadw 0 8 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x8)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x8)) (bv 32 0x0)) false))))))))
+d "ld.bu d13, [a15]#8" 088d 0x000000 (seq (set EA (+ (var a15) (bv 32 0x20))) (set d13 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d14, [a1]#-0x3ed8" 391e284c 0x000000 (seq (set EA (+ (var a1) (bv 32 0xffffc128))) (set d14 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, [a11]#0x332" 39bf32c0 0x000000 (seq (set EA (+ (var a11) (bv 32 0x332))) (set d15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d7, [a14]#0x3fe0" 39e7e0f3 0x000000 (seq (set EA (+ (var a14) (bv 32 0x3fe0))) (set d7 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d8, [a7]#0x6916" 39789646 0x000000 (seq (set EA (+ (var a7) (bv 32 0x6916))) (set d8 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, [sp]#7" 0ca7 0x000000 (seq (set EA (+ (var a10) (bv 32 0x1c))) (set a15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, [sp]#2" 0ca2 0x000000 (seq (set EA (+ (var a10) (bv 32 0x8))) (set a15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, [sp]#0xf" 0caf 0x000000 (seq (set EA (+ (var a10) (bv 32 0x3c))) (set a15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d13, [a15]#1" 081d 0x000000 (seq (set EA (+ (var a15) (bv 32 0x4))) (set d13 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d13, [a15]#4" 084d 0x000000 (seq (set EA (+ (var a15) (bv 32 0x10))) (set d13 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d8, [a15]#0" 0808 0x000000 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d8 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d9, #0xd0001207" 05d90785 0x000000 (seq (set EA (bv 32 0xd0001207)) (set d9 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, #0x10002fea" 051feaf6 0x000000 (seq (set EA (bv 32 0x10002fea)) (set d15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d14, #0xe00018c4" 05ee8435 0x000000 (seq (set EA (bv 32 0xe00018c4)) (set d14 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d8, [p0+c]#-0x12d" 290853b4 0x000000 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set d8 (cast 32 false (loadw 0 8 (var EA)))) (set new_index (+ (var index) (bv 32 0xfffffed3))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.bu d5, [p12+c]#0x122" 29d56244 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a13) (var index))) (set d5 (cast 32 false (loadw 0 8 (var EA)))) (set new_index (+ (var index) (bv 32 0x122))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.bu d13, [p14+c]#0xd5" 29fd5534 0x000000 (seq (set index (& (>> (var a14) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a14) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a15) (var index))) (set d13 (cast 32 false (loadw 0 8 (var EA)))) (set new_index (+ (var index) (bv 32 0xd5))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a14 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.bu d10, [a15]#0xa" 08aa 0x000000 (seq (set EA (+ (var a15) (bv 32 0x28))) (set d10 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d6, [a13]#0x4fb2" 39d6f2e4 0x000000 (seq (set EA (+ (var a13) (bv 32 0x4fb2))) (set d6 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d15, [a6]#4" 0c64 0x000000 (seq (set EA (+ (var a6) (bv 32 0x10))) (set a15 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.bu d9, [a8+]" 0489 0x000000 (seq (set EA (var a8)) (set d9 (cast 32 false (loadw 0 8 (var EA)))) (set a8 (+ (var a8) (bv 32 0x1))))
+d "ld.bu d1, [a7]" 1471 0x000000 (seq (set EA (var a7)) (set d1 (cast 32 false (loadw 0 8 (var EA)))))
+d "ld.d e4, #0xe0002d32" 85e5f246 0x000000 (seq (set temp (loadw 0 64 (bv 32 0xe0002d32))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.d e8, #0x1000383f" 8519bf07 0x000000 (seq (set temp (loadw 0 64 (bv 32 0x1000383f))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.d e6, #0x50002c3f" 8556ff06 0x000000 (seq (set temp (loadw 0 64 (bv 32 0x50002c3f))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.d e4, [p10+c]#-0x97" 29b469d5 0x000000 (seq (set index (& (>> (var a10) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a10) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a11) (var index))) (set EA2 (+ (var a11) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a11) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a11) (mod (+ (var index) (bv 32 0x6)) (var length)))) (set temp (append (append (loadw 0 16 (var EA6)) (loadw 0 16 (var EA4))) (append (loadw 0 16 (var EA2)) (loadw 0 16 (var EA))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0xffffff69))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a10 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.d e10, [p8+c]#0x28" 299a6805 0x000000 (seq (set index (& (>> (var a8) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a8) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a9) (var index))) (set EA2 (+ (var a9) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a9) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a9) (mod (+ (var index) (bv 32 0x6)) (var length)))) (set temp (append (append (loadw 0 16 (var EA6)) (loadw 0 16 (var EA4))) (append (loadw 0 16 (var EA2)) (loadw 0 16 (var EA))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0x28))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a8 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.d e8, [p6+c]#0x10f" 29684f45 0x000000 (seq (set index (& (>> (var a6) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a6) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a7) (var index))) (set EA2 (+ (var a7) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a7) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a7) (mod (+ (var index) (bv 32 0x6)) (var length)))) (set temp (append (append (loadw 0 16 (var EA6)) (loadw 0 16 (var EA4))) (append (loadw 0 16 (var EA2)) (loadw 0 16 (var EA))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0x10f))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a6 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.da p2, [p12+c]#-0x85" 29d2fbd5 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a13) (var index))) (set EA4 (+ (var a13) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set temp (append (loadw 0 32 (var EA4)) (loadw 0 32 (var EA)))) (set a2 (cast 32 false (var temp))) (set a3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0xffffff7b))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.da p12, [p4+c]#0x18b" 294dcb65 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set EA4 (+ (var a5) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set temp (append (loadw 0 32 (var EA4)) (loadw 0 32 (var EA)))) (set a12 (cast 32 false (var temp))) (set a13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0x18b))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.da p4, [p12+c]#0xc4" 29c4c435 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a13) (var index))) (set EA4 (+ (var a13) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set temp (append (loadw 0 32 (var EA4)) (loadw 0 32 (var EA)))) (set a4 (cast 32 false (var temp))) (set a5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set new_index (+ (var index) (bv 32 0xc4))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.da p6, #0x50001802" 8556820d 0x000000 (seq (set temp (loadw 0 64 (bv 32 0x50001802))) (set a6 (cast 32 false (var temp))) (set a7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.da p12, #0xa0003de5" 85ace57f 0x000000 (seq (set temp (loadw 0 64 (bv 32 0xa0003de5))) (set a12 (cast 32 false (var temp))) (set a13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.da p0, #0x10003713" 851153cf 0x000000 (seq (set temp (loadw 0 64 (bv 32 0x10003713))) (set a0 (cast 32 false (var temp))) (set a1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "ld.h d0, [a1]" 9410 0x000000 (seq (set EA (var a1)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d0, [a15]#0" 8800 0x000000 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d0, [a0+]" 8400 0x000000 (seq (set EA (var a0)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a0 (+ (var a0) (bv 32 0x2))))
+d "ld.h d15, [a7]#0" 8c70 0x000000 (seq (set EA (+ (var a7) (bv 32 0x0))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d0, [a1+]" 8410 0x000000 (seq (set EA (var a1)) (set d0 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a1 (+ (var a1) (bv 32 0x2))))
+d "ld.h d15, [a12]#8" 8cc4 0x000000 (seq (set EA (+ (var a12) (bv 32 0x20))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d15, [a14]#0x1c" 8cee 0x000000 (seq (set EA (+ (var a14) (bv 32 0x70))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d15, [a12]#0x14" 8cca 0x000000 (seq (set EA (+ (var a12) (bv 32 0x50))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d11, [a15]#0x14" 88ab 0x000000 (seq (set EA (+ (var a15) (bv 32 0x50))) (set d11 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d2, [a15]#0x18" 88c2 0x000000 (seq (set EA (+ (var a15) (bv 32 0x60))) (set d2 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d8, [a15]#0" 8808 0x000000 (seq (set EA (+ (var a15) (bv 32 0x0))) (set d8 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d13, [a1]#0x7006" c91d0607 0x000000 (seq (set EA (+ (var a1) (bv 32 0x7006))) (set d13 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d13, [a7]#-0x16e9" c97d974e 0x000000 (seq (set EA (+ (var a7) (bv 32 0xffffe917))) (set d13 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d6, [a15]#0x3baf" c9f6afe3 0x000000 (seq (set EA (+ (var a15) (bv 32 0x3baf))) (set d6 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d10, [p4+c]#-0x1ac" 294a9494 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set d10 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0xfffffe54))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.h d4, [p4+c]#-0x1b9" 29448794 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set d4 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0xfffffe47))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.h d15, [p8+c]#-0x13d" 298f83b4 0x000000 (seq (set index (& (>> (var a8) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a8) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a9) (var index))) (set d15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set new_index (+ (var index) (bv 32 0xfffffec3))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a8 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.h d11, #0x80000f13" 058bd3c8 0x000000 (seq (set EA (bv 32 0x80000f13)) (set d11 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d10, #0xf0000bf0" 05fab0f8 0x000000 (seq (set EA (bv 32 0xf0000bf0)) (set d10 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d2, #0x50001362" 055222d9 0x000000 (seq (set EA (bv 32 0x50001362)) (set d2 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d15, [a5]#0xc" 8c56 0x000000 (seq (set EA (+ (var a5) (bv 32 0x30))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d8, [a1+]" 8418 0x000000 (seq (set EA (var a1)) (set d8 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))) (set a1 (+ (var a1) (bv 32 0x2))))
+d "ld.h d15, [a9]#0xc" 8c96 0x000000 (seq (set EA (+ (var a9) (bv 32 0x30))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d1, [a15]#0x18" 88c1 0x000000 (seq (set EA (+ (var a15) (bv 32 0x60))) (set d1 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d1, [a15]#2" 8811 0x000000 (seq (set EA (+ (var a15) (bv 32 0x8))) (set d1 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d7, [a15]#2" 8817 0x000000 (seq (set EA (+ (var a15) (bv 32 0x8))) (set d7 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d15, [a1]#0" 8c10 0x000000 (seq (set EA (+ (var a1) (bv 32 0x0))) (set a15 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.h d7, [a14]" 94e7 0x000000 (seq (set EA (var a14)) (set d7 (cast 32 false (let _sext_val (cast 32 (msb (loadw 0 16 (var EA))) (loadw 0 16 (var EA))) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x10)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x10)) (bv 32 0x0)) false))))))))
+d "ld.hu d7, [p4+c]#0x1a4" 2947e464 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set d7 (cast 32 false (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0x1a4))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.hu d1, [p4+c]#0x141" 2941c154 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set d1 (cast 32 false (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0x141))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.hu d15, [p14+c]#-0x1ce" 29fff284 0x000000 (seq (set index (& (>> (var a14) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a14) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a15) (var index))) (set d15 (cast 32 false (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0xfffffe32))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a14 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.hu d15, #0x60003afc" 056fbcbf 0x000000 (seq (set EA (bv 32 0x60003afc)) (set d15 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d0, #0xd00023da" 05d01afe 0x000000 (seq (set EA (bv 32 0xd00023da)) (set d0 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d9, #0x60003669" 0569699f 0x000000 (seq (set EA (bv 32 0x60003669)) (set d9 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d2, [a2]#0xbd7" b92297f0 0x000000 (seq (set EA (+ (var a2) (bv 32 0xbd7))) (set d2 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d2, [a7]#-0x48b" b972b5df 0x000000 (seq (set EA (+ (var a7) (bv 32 0xfffffb75))) (set d2 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d12, [a2]#-0x64f8" b92c88c9 0x000000 (seq (set EA (+ (var a2) (bv 32 0xffff9b08))) (set d12 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.hu d4, [a12]#-0x2de9" b9c4178d 0x000000 (seq (set EA (+ (var a12) (bv 32 0xffffd217))) (set d4 (cast 32 false (loadw 0 16 (var EA)))))
+d "ld.q d1, #0x700026ad" 45716da2 0x000000 (seq (set EA (bv 32 0x700026ad)) (set d1 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))))
+d "ld.q d13, #0x70000fbf" 457dffe0 0x000000 (seq (set EA (bv 32 0x70000fbf)) (set d13 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))))
+d "ld.q d13, #0x40001e28" 454de881 0x000000 (seq (set EA (bv 32 0x40001e28)) (set d13 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))))
+d "ld.q d6, [p10+c]#0x74" 29a63416 0x000000 (seq (set index (& (>> (var a10) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a10) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a11) (var index))) (set d6 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x74))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a10 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.q d6, [p12+c]#0x14b" 29c60b56 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a13) (var index))) (set d6 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x14b))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.q d7, [p4+c]#0x36" 29473606 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a5) (var index))) (set d7 (cast 32 false (<< (loadw 0 16 (var EA)) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x36))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.w d15, [sp]#0x158" 5856 0x000000 (seq (set EA (+ (var d10) (bv 32 0x560))) (set d15 (loadw 0 32 (var EA))))
+d "ld.w d15, [sp]#0x210" 5884 0x000000 (seq (set EA (+ (var d10) (bv 32 0x840))) (set d15 (loadw 0 32 (var EA))))
+d "ld.w d15, [sp]#0xf0" 583c 0x000000 (seq (set EA (+ (var d10) (bv 32 0x3c0))) (set d15 (loadw 0 32 (var EA))))
+d "ld.w d15, [a12]#0x38" 4cce 0x000000 (seq (set EA (+ (var a12) (bv 32 0xe0))) (set a15 (loadw 0 32 (var EA))))
+d "ld.w d15, [a5]#0x38" 4c5e 0x000000 (seq (set EA (+ (var a5) (bv 32 0xe0))) (set a15 (loadw 0 32 (var EA))))
+d "ld.w d15, [a7]#0x14" 4c75 0x000000 (seq (set EA (+ (var a7) (bv 32 0x50))) (set a15 (loadw 0 32 (var EA))))
+d "ld.w d0, [a15]#0xc" 4830 0x000000 (seq (set EA (+ (var a15) (bv 32 0x30))) (set d0 (loadw 0 32 (var EA))))
+d "ld.w d6, [a15]#0x28" 48a6 0x000000 (seq (set EA (+ (var a15) (bv 32 0xa0))) (set d6 (loadw 0 32 (var EA))))
+d "ld.w d14, [a15]#0x1c" 487e 0x000000 (seq (set EA (+ (var a15) (bv 32 0x70))) (set d14 (loadw 0 32 (var EA))))
+d "ld.w d3, [a5]#0x645d" 19535d16 0x000000 (seq (set EA (+ (var a5) (bv 32 0x645d))) (set d3 (loadw 0 32 (var EA))))
+d "ld.w d3, [a5]#-0xeca" 1953364f 0x000000 (seq (set EA (+ (var a5) (bv 32 0xfffff136))) (set d3 (loadw 0 32 (var EA))))
+d "ld.w d14, [sp]#-0x355f" 19aea1ac 0x000000 (seq (set EA (+ (var a10) (bv 32 0xffffcaa1))) (set d14 (loadw 0 32 (var EA))))
+d "ld.w d5, #0xa00023e6" 85a526f2 0x000000 (set d5 (loadw 0 32 (bv 32 0xa00023e6)))
+d "ld.w d15, #0xf0003e49" 85ffc993 0x000000 (set d15 (loadw 0 32 (bv 32 0xf0003e49)))
+d "ld.w d7, #0x10003334" 851734c3 0x000000 (set d7 (loadw 0 32 (bv 32 0x10003334)))
+d "ld.w d15, [p0+c]#0x17a" 291f3a55 0x000000 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a1) (var index))) (set EA4 (+ (var a1) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set d15 (append (loadw 0 16 (var EA4)) (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0x17a))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.w d11, [p12+c]#-0x75" 29cb0be5 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a13) (var index))) (set EA4 (+ (var a13) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set d11 (append (loadw 0 16 (var EA4)) (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0xffffff8b))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.w d2, [p2+c]#0xf9" 29323935 0x000000 (seq (set index (& (>> (var a2) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a2) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a3) (var index))) (set EA4 (+ (var a3) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set d2 (append (loadw 0 16 (var EA4)) (loadw 0 16 (var EA)))) (set new_index (+ (var index) (bv 32 0xf9))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a2 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ld.w d7, [a9]" 5497 0x000000 (seq (set EA (var a9)) (set d7 (loadw 0 32 (var EA))))
+d "ld.w d15, [sp]#0x300" 58c0 0x000000 (seq (set EA (+ (var d10) (bv 32 0xc00))) (set d15 (loadw 0 32 (var EA))))
+d "ld.w d10, [a8+]" 448a 0x000000 (seq (set EA (var a8)) (set d10 (loadw 0 32 (var EA))) (set a8 (+ (var a8) (bv 32 0x4))))
+d "ld.w d8, [a15]#0x20" 4888 0x000000 (seq (set EA (+ (var a15) (bv 32 0x80))) (set d8 (loadw 0 32 (var EA))))
+d "ld.w d15, [sp]#0xd4" 5835 0x000000 (seq (set EA (+ (var d10) (bv 32 0x350))) (set d15 (loadw 0 32 (var EA))))
+d "ldlcx #0xb0000450" 15b05018 0x000000 (seq (set EA (bv 32 0xb0000450)) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldlcx #0x10003931" 1510b14b 0x000000 (seq (set EA (bv 32 0x10003931)) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldlcx #0xa0003984" 15a0846b 0x000000 (seq (set EA (bv 32 0xa0003984)) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldlcx [a0]#0x1b9" 49003969 0x000000 (seq (set EA (+ (var a0) (bv 32 0x1b9))) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldlcx [a6]#-0x116" 49602ab9 0x000000 (seq (set EA (+ (var a6) (bv 32 0xfffffeea))) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldlcx [sp]#0x121" 49a02149 0x000000 (seq (set EA (+ (var a10) (bv 32 0x121))) (set d4 (loadw 0 32 (var EA))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d7 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "ldmst #0x40003ab6, e8" e548b6a7 0x000000 (seq (set EA (bv 32 0x40003ab6)) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d9))) (& (var d8) (var d9)))))
+d "ldmst #0xc0001706, e10" e5ca46c5 0x000000 (seq (set EA (bv 32 0xc0001706)) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d11))) (& (var d10) (var d11)))))
+d "ldmst #0x800018d5, e2" e5829535 0x000000 (seq (set EA (bv 32 0x800018d5)) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d3))) (& (var d2) (var d3)))))
+d "ldmst [p4+c]#-0xd8, e6" 695768c4 0x000000 (seq (set index (& (>> (var a4) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a4) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a4) (var index))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d7))) (& (var d6) (var d7)))) (set new_index (+ (var index) (bv 32 0xffffff28))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a4 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ldmst [p2+c]#-0x128, e12" 692d58b4 0x000000 (seq (set index (& (>> (var a2) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a2) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a2) (var index))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d13))) (& (var d12) (var d13)))) (set new_index (+ (var index) (bv 32 0xfffffed8))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a2 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "ldmst [p6+c]#0xbf, e8" 69797f24 0x000000 (seq (set index (& (>> (var a6) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a6) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a6) (var index))) (storew 0 (var EA) (| (& (loadw 0 32 (var EA)) (~- (var d9))) (& (var d8) (var d9)))) (set new_index (+ (var index) (bv 32 0xbf))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a6 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "lducx [a0]#-0x50" 490070e9 0x000000 (seq (set EA (+ (var a0) (bv 32 0xffffffb0))) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lducx [a7]#-0x12a" 497056b9 0x000000 (seq (set EA (+ (var a7) (bv 32 0xfffffed6))) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lducx [a11]#0x1b2" 49b07269 0x000000 (seq (set EA (+ (var a11) (bv 32 0x1b2))) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lducx #0xd00017df" 15d05ffd 0x000000 (seq (set EA (bv 32 0xd00017df)) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lducx #0x5000026b" 15502b9c 0x000000 (seq (set EA (bv 32 0x5000026b)) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lducx #0xb000219e" 15b01e6e 0x000000 (seq (set EA (bv 32 0xb000219e)) (set d12 (loadw 0 32 (var EA))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x34)))))
+d "lea sp, #0xc0000028" c5ca2800 0x000000 (seq (set EA (bv 32 0xc0000028)) (set a10 (var EA)))
+d "lea a13, #0xa0000ca3" c5ade320 0x000000 (seq (set EA (bv 32 0xa0000ca3)) (set a13 (var EA)))
+d "lea a9, #0xa0001d56" c5a9d651 0x000000 (seq (set EA (bv 32 0xa0001d56)) (set a9 (var EA)))
+d "lea a8, [a15]#-0x133c" d9f8c43e 0x000000 (seq (set EA (+ (var a15) (bv 32 0xffffecc4))) (set a8 (var EA)))
+d "lea a11, [a1]#-0x4378" d91bc82b 0x000000 (seq (set EA (+ (var a1) (bv 32 0xffffbc88))) (set a11 (var EA)))
+d "lea a9, [a0]#0x4ccd" d909cd34 0x000000 (seq (set EA (+ (var a0) (bv 32 0x4ccd))) (set a9 (var EA)))
+d "lea a7, [a5]#0x18" 4957180a 0x000000 (seq (set EA (+ (var a5) (bv 32 0x18))) (set a7 (var EA)))
+d "lea a15, [a9]#0x9c" 499f1c2a 0x000000 (seq (set EA (+ (var a9) (bv 32 0x9c))) (set a15 (var EA)))
+d "lea a13, [a1]#-0xa8" 491d18da 0x000000 (seq (set EA (+ (var a1) (bv 32 0xffffff58))) (set a13 (var EA)))
+d "loop a0, #0xfffffffc" fc0e 0x000000 (seq (set PC (ite (! (is_zero (var a0))) (bv 32 0xfffffffc) (bv 32 0x2))) (set a0 (- (var a0) (bv 32 0x1))) (jmp (var PC)))
+d "loop a7, #0xffffffe8" fc74 0x000000 (seq (set PC (ite (! (is_zero (var a7))) (bv 32 0xffffffe8) (bv 32 0x2))) (set a7 (- (var a7) (bv 32 0x1))) (jmp (var PC)))
+d "loop a5, #0xfffffff8" fc5c 0x000000 (seq (set PC (ite (! (is_zero (var a5))) (bv 32 0xfffffff8) (bv 32 0x2))) (set a5 (- (var a5) (bv 32 0x1))) (jmp (var PC)))
+d "loop a0, #0xfffff0ea" fd007538 0x000000 (seq (set PC (ite (! (is_zero (var a0))) (bv 32 0xfffff0ea) (bv 32 0x4))) (set a0 (- (var a0) (bv 32 0x1))) (jmp (var PC)))
+d "loop a5, #0xffffd610" fd50082b 0x000000 (seq (set PC (ite (! (is_zero (var a5))) (bv 32 0xffffd610) (bv 32 0x4))) (set a5 (- (var a5) (bv 32 0x1))) (jmp (var PC)))
+d "loop a12, #0x11c4" fdc0e248 0x000000 (seq (set PC (ite (! (is_zero (var a12))) (bv 32 0x11c4) (bv 32 0x4))) (set a12 (- (var a12) (bv 32 0x1))) (jmp (var PC)))
+d "loop a4, #0xfffffff8" fc4c 0x000000 (seq (set PC (ite (! (is_zero (var a4))) (bv 32 0xfffffff8) (bv 32 0x2))) (set a4 (- (var a4) (bv 32 0x1))) (jmp (var PC)))
+d "loop a4, #0xffffffe6" fc43 0x000000 (seq (set PC (ite (! (is_zero (var a4))) (bv 32 0xffffffe6) (bv 32 0x2))) (set a4 (- (var a4) (bv 32 0x1))) (jmp (var PC)))
+d "loopu #0xffffcbe8" fd00f4e5 0x000000 (jmp (bv 32 0xffffcbe8))
+d "loopu #0xf0a" fd0085c7 0x000000 (jmp (bv 32 0xf0a))
+d "loopu #0xfffff714" fd008abb 0x000000 (jmp (bv 32 0xfffff714))
+d "lt d15, d12, d11" 7abc 0x000000 (set d15 (ite (&& (sle (var d12) (var d11)) (! (== (var d12) (var d11)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d1, d1" 7a11 0x000000 (set d15 (ite (&& (sle (var d1) (var d1)) (! (== (var d1) (var d1)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d7, d7" 7a77 0x000000 (set d15 (ite (&& (sle (var d7) (var d7)) (! (== (var d7) (var d7)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d7, #3" fa37 0x000000 (set d15 (ite (&& (sle (var d7) (bv 32 0x3)) (! (== (var d7) (bv 32 0x3)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d3, #-4" fac3 0x000000 (set d15 (ite (&& (sle (var d3) (bv 32 0xfffffffc)) (! (== (var d3) (bv 32 0xfffffffc)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d6, #-4" fac6 0x000000 (set d15 (ite (&& (sle (var d6) (bv 32 0xfffffffc)) (! (== (var d6) (bv 32 0xfffffffc)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d6, d4, d0" 0b042061 0x000000 (set d6 (ite (&& (sle (var d4) (var d0)) (! (== (var d4) (var d0)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d12, d5, d5" 0b5520c1 0x000000 (set d12 (ite (&& (sle (var d5) (var d5)) (! (== (var d5) (var d5)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d4, d14, d4" 0b4e2041 0x000000 (set d4 (ite (&& (sle (var d14) (var d4)) (! (== (var d14) (var d4)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d12, d10, #0xc8" 8b8a4cc2 0x000000 (set d12 (ite (&& (sle (var d10) (bv 32 0xc8)) (! (== (var d10) (bv 32 0xc8)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d13, d9, #0x58" 8b8945d2 0x000000 (set d13 (ite (&& (sle (var d9) (bv 32 0x58)) (! (== (var d9) (bv 32 0x58)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d1, d1, #0x68" 8b814612 0x000000 (set d1 (ite (&& (sle (var d1) (bv 32 0x68)) (! (== (var d1) (bv 32 0x68)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt d15, d0, #6" fa60 0x000000 (set d15 (ite (&& (sle (var d0) (bv 32 0x6)) (! (== (var d0) (bv 32 0x6)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.a d1, a12, a3" 013c2014 0x000000 (set d1 (ite (&& (ule (var a12) (var a3)) (! (== (var a12) (var a3)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.a d13, a4, a1" 011420d4 0x000000 (set d13 (ite (&& (ule (var a4) (var a1)) (! (== (var a4) (var a1)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.a d14, a11, a1" 011b20e4 0x000000 (set d14 (ite (&& (ule (var a11) (var a1)) (! (== (var a11) (var a1)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.b d14, d1, d11" 0bb120e5 0x000000 (seq (set result_byte3 (ite (&& (sle (cast 8 false (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (sle (cast 8 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (sle (cast 8 false (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (sle (cast 8 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "lt.b d14, d6, d13" 0bd620e5 0x000000 (seq (set result_byte3 (ite (&& (sle (cast 8 false (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (sle (cast 8 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (sle (cast 8 false (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (sle (cast 8 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "lt.b d15, d2, d4" 0b4220f5 0x000000 (seq (set result_byte3 (ite (&& (sle (cast 8 false (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (sle (cast 8 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (sle (cast 8 false (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (sle (cast 8 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d15 (var result)))
+d "lt.bu d11, d9, d11" 0bb930b5 0x000000 (seq (set result_byte3 (ite (&& (ule (cast 8 false (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (ule (cast 8 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (ule (cast 8 false (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (ule (cast 8 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d11 (var result)))
+d "lt.bu d0, d4, d14" 0be43005 0x000000 (seq (set result_byte3 (ite (&& (ule (cast 8 false (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (ule (cast 8 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (ule (cast 8 false (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (ule (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
+d "lt.bu d9, d14, d12" 0bce3095 0x000000 (seq (set result_byte3 (ite (&& (ule (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x18) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x18) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte2 (ite (&& (ule (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte1 (ite (&& (ule (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x8) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x8) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result_byte0 (ite (&& (ule (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xff)))) (! (== (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xff)))))) (bv 32 0xff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d9 (var result)))
+d "lt.h d10, d7, d8" 0b8720a7 0x000000 (seq (set result_hw1 (ite (&& (sle (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (sle (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d10 (var result)))
+d "lt.h d4, d13, d5" 0b5d2047 0x000000 (seq (set result_hw1 (ite (&& (sle (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (sle (cast 16 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)))
+d "lt.h d13, d13, d15" 0bfd20d7 0x000000 (seq (set result_hw1 (ite (&& (sle (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (sle (cast 16 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d13 (var result)))
+d "lt.hu d0, d7, d5" 0b573007 0x000000 (seq (set result_hw1 (ite (&& (ule (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (ule (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
+d "lt.hu d9, d12, d15" 0bfc3097 0x000000 (seq (set result_hw1 (ite (&& (ule (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (ule (cast 16 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d9 (var result)))
+d "lt.hu d1, d5, d11" 0bb53017 0x000000 (seq (set result_hw1 (ite (&& (ule (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result_hw0 (ite (&& (ule (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)))) (! (== (cast 16 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)))))) (bv 32 0xffff) (bv 32 0x0))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d1 (var result)))
+d "lt.u d11, d7, d9" 0b9730b1 0x000000 (set d11 (ite (&& (ule (var d7) (var d9)) (! (== (var d7) (var d9)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.u d10, d0, d9" 0b9030a1 0x000000 (set d10 (ite (&& (ule (var d0) (var d9)) (! (== (var d0) (var d9)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.u d8, d9, d8" 0b893081 0x000000 (set d8 (ite (&& (ule (var d9) (var d8)) (! (== (var d9) (var d8)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.u d14, d1, #-0xb8" 8b8174e2 0x000000 (set d14 (ite (&& (ule (var d1) (bv 32 0xffffff48)) (! (== (var d1) (bv 32 0xffffff48)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.u d7, d7, #-0xf2" 8be77072 0x000000 (set d7 (ite (&& (ule (var d7) (bv 32 0xffffff0e)) (! (== (var d7) (bv 32 0xffffff0e)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.u d6, d10, #0xc3" 8b3a6c62 0x000000 (set d6 (ite (&& (ule (var d10) (bv 32 0xc3)) (! (== (var d10) (bv 32 0xc3)))) (bv 32 0x1) (bv 32 0x0)))
+d "lt.w d15, d11, d8" 0b8b20f9 0x000000 (set d15 (ite (&& (sle (var d11) (var d8)) (! (== (var d11) (var d8)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "lt.w d3, d4, d5" 0b542039 0x000000 (set d3 (ite (&& (sle (var d4) (var d5)) (! (== (var d4) (var d5)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "lt.w d4, d12, d13" 0bdc2049 0x000000 (set d4 (ite (&& (sle (var d12) (var d13)) (! (== (var d12) (var d13)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "lt.wu d13, d13, d5" 0b5d30d9 0x000000 (set d13 (ite (&& (ule (var d13) (var d5)) (! (== (var d13) (var d5)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "lt.wu d7, d13, d0" 0b0d3079 0x000000 (set d7 (ite (&& (ule (var d13) (var d0)) (! (== (var d13) (var d0)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "lt.wu d2, d3, d8" 0b833029 0x000000 (set d2 (ite (&& (ule (var d3) (var d8)) (! (== (var d3) (var d8)))) (bv 32 0xffffffff) (bv 32 0x0)))
+d "madd d9, d13, d1, #0x5e" 13e1259d 0x000000 (seq (set result (+ (var d13) (* (var d1) (bv 32 0x5e)))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d15, d6, d14, d7" 037e0af6 0x000000 (seq (set result (+ (var d6) (* (var d14) (var d7)))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d8, d8, d8, d11" 03b80a88 0x000000 (seq (set result (+ (var d8) (* (var d8) (var d11)))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d14, d15, d3, d5" 03530aef 0x000000 (seq (set result (+ (var d15) (* (var d3) (var d5)))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d7, d13, d3, #0x16" 1363217d 0x000000 (seq (set result (+ (var d13) (* (var d3) (bv 32 0x16)))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d14, d7, d3, #-0x8a" 136337e7 0x000000 (seq (set result (+ (var d7) (* (var d3) (bv 32 0xffffff76)))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd d15, d4, d5, #0xa4" 13452af4 0x000000 (seq (set result (+ (var d4) (* (var d5) (bv 32 0xa4)))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e0, e8, d11, #0x3a" 13ab6319 0x000000 (seq (set result (+ (append (var d9) (var d8)) (cast 64 false (* (var d11) (bv 32 0x3a))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e0, e14, d3, #0x85" 1353681f 0x000000 (seq (set result (+ (append (var d15) (var d14)) (cast 64 false (* (var d3) (bv 32 0x85))))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e6, e6, d7, #0xf4" 13476f77 0x000000 (seq (set result (+ (append (var d7) (var d6)) (cast 64 false (* (var d7) (bv 32 0xf4))))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e14, e10, d3, d7" 03736afb 0x000000 (seq (set result (+ (append (var d11) (var d10)) (cast 64 false (* (var d3) (var d7))))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e4, e6, d0, d10" 03a06a46 0x000000 (seq (set result (+ (append (var d7) (var d6)) (cast 64 false (* (var d0) (var d10))))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd e12, e2, d11, d14" 03eb6ad3 0x000000 (seq (set result (+ (append (var d3) (var d2)) (cast 64 false (* (var d11) (var d14))))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madd.f d2, d13, d12, d8" 6b8c612d 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d13) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d12) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (var _precise_mul_result) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d2 (fbits (var _result))))
+d "madd.f d13, d10, d6, d2" 6b2661da 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d10) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d6) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d2) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (var _precise_mul_result) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d13 (fbits (var _result))))
+d "madd.f d6, d1, d7, d5" 6b576161 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d5) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (var _precise_mul_result) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d6 (fbits (var _result))))
+d "maddm.h e4, e4, d8, d3ul, #0" 83387045 0x000000 (seq (set madd_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d5) (var d4)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e14, e2, d15, d9ul, #3" 839f73e2 0x000000 (seq (set madd_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d3) (var d2)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e12, e14, d12, d5ul, #3" 835c73de 0x000000 (seq (set madd_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d15) (var d14)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e12, e6, d2, d2lu, #2" 832276c7 0x000000 (seq (set madd_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set madd_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set result (+ (append (var d7) (var d6)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e4, e8, d14, d0lu, #1" 830e7558 0x000000 (seq (set madd_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e6, e8, d11, d0lu, #0" 830b7468 0x000000 (seq (set madd_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e8, e0, d7, d12ll, #0" 83c77881 0x000000 (seq (set madd_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e12, e14, d4, d10ll, #3" 83a47bdf 0x000000 (seq (set madd_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d15) (var d14)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e6, e12, d8, d10ll, #3" 83a87b6d 0x000000 (seq (set madd_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d13) (var d12)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e8, e14, d9, d2uu, #1" 83297d8f 0x000000 (seq (set madd_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d15) (var d14)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e14, e8, d14, d1uu, #1" 831e7df8 0x000000 (seq (set madd_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddm.h e2, e12, d8, d2uu, #1" 83287d3d 0x000000 (seq (set madd_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d13) (var d12)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e10, e2, d7, d8ul, #2" 8387f2a3 0x000000 (seq (set madd_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set madd_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set result (+ (append (var d3) (var d2)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e2, e6, d6, d11ul, #2" 83b6f236 0x000000 (seq (set madd_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set madd_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set result (+ (append (var d7) (var d6)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e8, e8, d13, d1ul, #2" 831df289 0x000000 (seq (set madd_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set madd_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e4, e0, d13, d14lu, #3" 83edf750 0x000000 (seq (set madd_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e0, e6, d10, d14lu, #1" 83eaf516 0x000000 (seq (set madd_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d7) (var d6)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e0, e8, d13, d5lu, #2" 835df618 0x000000 (seq (set madd_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set madd_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x2) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e14, e8, d14, d0ll, #1" 830ef9f9 0x000000 (seq (set madd_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d9) (var d8)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e4, e6, d13, d1ll, #1" 831df947 0x000000 (seq (set madd_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d7) (var d6)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e8, e2, d2, d5ll, #0" 8352f893 0x000000 (seq (set madd_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d3) (var d2)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e12, e4, d14, d13uu, #3" 83deffc5 0x000000 (seq (set madd_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set madd_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x3) false))) (set result (+ (append (var d5) (var d4)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e2, e10, d2, d2uu, #0" 8322fc3b 0x000000 (seq (set madd_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set madd_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x0) false))) (set result (+ (append (var d11) (var d10)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddms.h e2, e0, d9, d7uu, #1" 8379fd21 0x000000 (seq (set madd_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set madd_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set madd_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set madd_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var madd_a) (bv 32 0x8000)) (&& (== (var madd_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var madd_a) (var madd_b)) (bv 32 0x1) false))) (set result (+ (append (var d1) (var d0)) (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d7, e8, d3, d13ul, #0" 43d37878 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (var d9) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (var d8) (+ (var mul_res0) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d9, e8, d14, d13ul, #1" 43de7998 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (var d9) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (var d8) (+ (var mul_res0) (bv 32 0x8000)))) (set d9 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d1, e2, d1, d5ul, #0" 43517812 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (var d3) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (var d2) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d4, d2, d15, d6ul, #1" 836f3142 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d12, d4, d13, d2ul, #0" 832d30c4 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d12 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d0, d1, d0, d9ul, #2" 83903201 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d12, d9, d10, d14lu, #1" 83ea35c9 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d12 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d11, d12, d7, d12lu, #2" 83c736bc 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d11 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d10, d7, d8, d5lu, #3" 835837a7 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d10 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d2, d8, d5, d11ll, #3" 83b53b28 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d2 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d4, d5, d6, d1ll, #2" 83163a45 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d1, d10, d3, d2ll, #2" 83233a1a 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d4, d0, d9, d1uu, #0" 83193c40 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d8, d5, d12, d15uu, #0" 83fc3c85 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d8 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.h d14, d1, d2, d12uu, #2" 83c23ee1 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d7, d1, d0u, d9u, #0" 43901871 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d15, d8, d11u, d9u, #2" 439b1af8 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (<< (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d15 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d8, d4, d7u, d15u, #1" 43f71984 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d8 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d14, d4, d15l, d6l, #2" 436f1ee4 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d14 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d7, d6, d7l, d11l, #3" 43b71f76 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (+ (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddr.q d7, d5, d12l, d0l, #2" 430c1e75 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d1, e2, d10, d8ul, #1" 438af912 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (var d3) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (var d2) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d4, e12, d7, d3ul, #2" 4337fa4c 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (var d13) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (var d12) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d14, e6, d3, d0ul, #1" 4303f9e6 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (var d7) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (var d6) (+ (var mul_res0) (bv 32 0x8000)))) (set d14 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d3, d14, d5, d9ul, #3" 8395b33e 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d3 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d11, d2, d5, d0ul, #1" 8305b1b2 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d11 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d2, d9, d8, d8ul, #1" 8388b129 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d2 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d5, d13, d4, d3lu, #2" 8334b65d 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d5 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d4, d5, d14, d3lu, #1" 833eb545 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d12, d5, d12, d5lu, #3" 835cb7c5 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d12 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d0, d4, d7, d13ll, #0" 83d7b804 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d8, d8, d13, d10ll, #0" 83adb888 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d8 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d1, d2, d9, d4ll, #0" 8349b812 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d1, d4, d11, d13uu, #1" 83dbbd14 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d9, d4, d0, d11uu, #3" 83b0bf94 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d9 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.h d1, d12, d10, d10uu, #2" 83aabe1c 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d5, d15, d3u, d7u, #0" 4373985f 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d5 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d0, d2, d13u, d12u, #2" 43cd9a02 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d3, d12, d13u, d2u, #1" 432d993c 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (<< (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d3 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d12, d9, d13l, d10l, #2" 43ad9ec9 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d12 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d8, d6, d0l, d8l, #1" 43809d86 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d8 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddrs.q d2, d13, d10l, d1l, #0" 431a9c2d 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res) (bv 32 0x8000)))) (set d2 (let _a (cast 16 false (& (>> (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (bv 32 0x0) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d5, d15, d13, d15" 03fd8a5f 0x000000 (seq (set result (+ (var d15) (* (var d13) (var d15)))) (set d5 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d4, d6, d4, d4" 03448a46 0x000000 (seq (set result (+ (var d6) (* (var d4) (var d4)))) (set d4 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d12, d5, d0, d5" 03508ac5 0x000000 (seq (set result (+ (var d5) (* (var d0) (var d5)))) (set d12 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d12, d4, d1, #0x1a" 13a1a1c4 0x000000 (seq (set result (+ (var d4) (* (var d1) (bv 32 0x1a)))) (set d12 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d11, d15, d5, #0x3a" 13a5a3bf 0x000000 (seq (set result (+ (var d15) (* (var d5) (bv 32 0x3a)))) (set d11 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds d10, d7, d3, #0x80" 1303a8a7 0x000000 (seq (set result (+ (var d7) (* (var d3) (bv 32 0x80)))) (set d10 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e8, e4, d4, #0x92" 1324e984 0x000000 (seq (set result (+ (append (var d5) (var d4)) (cast 64 false (* (var d4) (bv 32 0x92))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e6, e6, d12, #0xfb" 13bcef77 0x000000 (seq (set result (+ (append (var d7) (var d6)) (cast 64 false (* (var d12) (bv 32 0xfb))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e8, e6, d14, #-0xfc" 134ef086 0x000000 (seq (set result (+ (append (var d7) (var d6)) (cast 64 false (* (var d14) (bv 32 0xffffff04))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e6, e2, d6, d12" 03c6ea63 0x000000 (seq (set result (+ (append (var d3) (var d2)) (cast 64 false (* (var d6) (var d12))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e2, e12, d6, d0" 0306ea3d 0x000000 (seq (set result (+ (append (var d13) (var d12)) (cast 64 false (* (var d6) (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "madds e4, e8, d9, d9" 0399ea58 0x000000 (seq (set result (+ (append (var d9) (var d8)) (cast 64 false (* (var d9) (var d9))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e2, e10, d12, d0ul, #0" c30c603b 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d11) (var mul_res1))) (set result_word0 (+ (var d10) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e12, e14, d10, d6ul, #3" c36a63df 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e14, e8, d14, d9ul, #3" c39e63f8 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e4, e10, d9, d5lu, #3" c359674a 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d11) (var mul_res1))) (set result_word0 (+ (var d10) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e14, e4, d9, d3lu, #2" c33966f5 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e4, e6, d0, d1lu, #0" c3106456 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d7) (var mul_res1))) (set result_word0 (+ (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e6, e4, d5, d15ll, #3" c3f56b65 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e14, e2, d14, d11ll, #0" c3be68f3 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e2, e4, d13, d3ll, #2" c33d6a24 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e14, e0, d13, d2uu, #2" c32d6ef0 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e10, e14, d11, d3uu, #0" c33b6cbe 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsu.h e6, e6, d1, d12uu, #3" c3c16f76 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d7) (var mul_res1))) (set result_word0 (+ (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e6, e8, d13, d8ul, #2" c38d7268 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d9) (var d8)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e2, e12, d14, d12ul, #0" c3ce703c 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d13) (var d12)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e2, e10, d2, d4ul, #0" c342703b 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d11) (var d10)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e4, e4, d15, d12lu, #1" c3cf7555 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d5) (var d4)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e10, e2, d9, d10lu, #0" c3a974b3 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d3) (var d2)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e12, e8, d14, d3lu, #1" c33e75c8 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d9) (var d8)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e14, e6, d4, d5ll, #1" c35479f7 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d7) (var d6)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e14, e8, d9, d0ll, #3" c3097bf9 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (+ (append (var d9) (var d8)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e2, e14, d12, d6ll, #1" c36c792f 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d15) (var d14)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e12, e10, d0, d13uu, #2" c3d07ecb 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d11) (var d10)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e6, e6, d0, d7uu, #2" c3707e67 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d7) (var d6)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsum.h e4, e8, d4, d8uu, #2" c3847e58 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d9) (var d8)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e2, e8, d8, d14ul, #1" c3e8f128 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d9) (var d8)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e6, e10, d4, d0ul, #1" c304f16b 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d11) (var d10)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e8, e14, d4, d1ul, #0" c314f09f 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d15) (var d14)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e8, e4, d2, d4lu, #2" c342f695 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d5) (var d4)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e12, e12, d0, d1lu, #1" c310f5cd 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d13) (var d12)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e4, e6, d2, d3lu, #0" c332f456 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d7) (var d6)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e12, e0, d3, d1ll, #0" c313f8c0 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d1) (var d0)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e4, e6, d10, d8ll, #3" c38afb57 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (+ (append (var d7) (var d6)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e10, e4, d5, d0ll, #2" c305faa5 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (append (var d5) (var d4)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e8, e12, d13, d13uu, #1" c3ddfd8d 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d13) (var d12)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e6, e4, d5, d2uu, #0" c325fc65 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (append (var d5) (var d4)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsums.h e6, e14, d0, d3uu, #1" c330fd6f 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (append (var d15) (var d14)) (<< (cast 64 false (- (var result_word1) (var result_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d9, d11, d15, d0ul, #2" c30f329b 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d9 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d14, d5, d2, d5ul, #0" c35230e5 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d13, d6, d4, d1ul, #2" c31432d6 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d13 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d1, d4, d8, d3lu, #3" c3383714 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d12, d9, d15, d0lu, #2" c30f36c9 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d12 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d14, d9, d8, d9lu, #3" c39837e9 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d7, d2, d2, d11ll, #2" c3b23a72 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d3, d6, d1, d5ll, #2" c3513a36 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d3 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d5, d8, d14, d0ll, #2" c30e3a58 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d5 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d0, d15, d11, d9uu, #2" c39b3e0f 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d1, d13, d0, d15uu, #2" c3f03e1d 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsur.h d9, d8, d1, d12uu, #0" c3c13c98 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d9 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d0, d3, d8, d15ul, #2" c3f8b203 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d12, d13, d7, d7ul, #1" c377b1cd 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (<< (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword0 (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d12 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d11, d11, d9, d12ul, #0" c3c9b0bb 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d11 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d10, d2, d8, d7lu, #2" c378b6a2 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d10 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d13, d2, d12, d4lu, #3" c34cb7d2 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d13 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d5, d12, d6, d10lu, #2" c3a6b65c 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (<< (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword0 (+ (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d5 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d15, d12, d8, d12ll, #3" c3c8bbfc 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d15 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d10, d2, d8, d7ll, #3" c378bba2 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d10 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d5, d14, d12, d8ll, #0" c38cb85e 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d5 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d4, d9, d11, d9uu, #0" c39bbc49 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d4 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d6, d15, d10, d9uu, #3" c39abf6f 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword0 (+ (<< (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsurs.h d7, d13, d3, d7uu, #0" c373bc7d 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res1) (bv 32 0x8000)))) (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword0 (+ (<< (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)) (bv 32 0x10) false) (+ (var mul_res0) (bv 32 0x8000)))) (set d7 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e8, e10, d10, d2ul, #1" c32ae18a 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (+ (var d11) (var mul_res1))) (set result_word0 (+ (var d10) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e6, e10, d4, d10ul, #1" c3a4e16b 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (+ (var d11) (var mul_res1))) (set result_word0 (+ (var d10) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e0, e2, d1, d1ul, #1" c311e103 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (+ (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e8, e6, d11, d3lu, #0" c33be486 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d7) (var mul_res1))) (set result_word0 (+ (var d6) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e0, e2, d6, d2lu, #2" c326e602 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e6, e6, d6, d13lu, #3" c3d6e766 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d7) (var mul_res1))) (set result_word0 (+ (var d6) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e4, e12, d14, d3ll, #1" c33ee94c 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (+ (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e12, e10, d3, d0ll, #3" c303ebda 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d11) (var mul_res1))) (set result_word0 (+ (var d10) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e8, e8, d4, d7ll, #3" c374eb89 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (+ (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e8, e0, d9, d3uu, #0" c339ec90 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (+ (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e6, e12, d5, d3uu, #2" c335ee6d 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "maddsus.h e14, e8, d8, d15uu, #2" c3f8eee8 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (+ (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "max d8, d14, d8" 0b8ea081 0x000000 (set d8 (ite (! (sle (var d14) (var d8))) (var d14) (var d8)))
+d "max d3, d0, d7" 0b70a031 0x000000 (set d3 (ite (! (sle (var d0) (var d7))) (var d0) (var d7)))
+d "max d8, d4, d5" 0b54a081 0x000000 (set d8 (ite (! (sle (var d4) (var d5))) (var d4) (var d5)))
+d "max d8, d3, #-0xb9" 8b735483 0x000000 (set d8 (ite (! (sle (var d3) (bv 32 0xffffff47))) (var d3) (bv 32 0xffffff47)))
+d "max d15, d15, #0x24" 8b4f42f3 0x000000 (set d15 (ite (! (sle (var d15) (bv 32 0x24))) (var d15) (bv 32 0x24)))
+d "max d4, d14, #-0x14" 8bce5e43 0x000000 (set d4 (ite (! (sle (var d14) (bv 32 0xffffffec))) (var d14) (bv 32 0xffffffec)))
+d "max.b d0, d5, d2" 0b25a005 0x000000 (seq (set result_byte3 (let a (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d2) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)))
+d "max.b d4, d13, d14" 0beda045 0x000000 (seq (set result_byte3 (let a (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d4 (var result)))
+d "max.b d4, d9, d8" 0b89a045 0x000000 (seq (set result_byte3 (let a (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d8) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d8) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d4 (var result)))
+d "max.bu d14, d6, d1" 0b16b0e5 0x000000 (seq (set result_byte3 (let a (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "max.bu d14, d1, d0" 0b01b0e5 0x000000 (seq (set result_byte3 (let a (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "max.bu d14, d9, d0" 0b09b0e5 0x000000 (seq (set result_byte3 (let a (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "max.h d10, d15, d8" 0b8fa0a7 0x000000 (seq (set result_hw1 (let a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d10 (var result)))
+d "max.h d8, d6, d6" 0b66a087 0x000000 (seq (set result_hw1 (let a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d8 (var result)))
+d "max.h d0, d6, d4" 0b46a007 0x000000 (seq (set result_hw1 (let a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d0 (var result)))
+d "max.hu d7, d15, d2" 0b2fb077 0x000000 (seq (set result_hw1 (let a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d7 (var result)))
+d "max.hu d4, d12, d9" 0b9cb047 0x000000 (seq (set result_hw1 (let a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d4 (var result)))
+d "max.hu d7, d9, d13" 0bd9b077 0x000000 (seq (set result_hw1 (let a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (ule (var a) (var b))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d7 (var result)))
+d "max.u d1, d8, d2" 0b28b011 0x000000 (set d1 (ite (! (ule (var d8) (var d2))) (var d8) (var d2)))
+d "max.u d7, d14, d13" 0bdeb071 0x000000 (set d7 (ite (! (ule (var d14) (var d13))) (var d14) (var d13)))
+d "max.u d4, d8, d3" 0b38b041 0x000000 (set d4 (ite (! (ule (var d8) (var d3))) (var d8) (var d3)))
+d "max.u d15, d13, #4" 8b4d60f3 0x000000 (set d15 (ite (! (ule (var d13) (bv 32 0x4))) (var d13) (bv 32 0x4)))
+d "max.u d0, d14, #0xa0" 8b0e6a03 0x000000 (set d0 (ite (! (ule (var d14) (bv 32 0xa0))) (var d14) (bv 32 0xa0)))
+d "max.u d15, d6, #-0x3e" 8b267cf3 0x000000 (set d15 (ite (! (ule (var d6) (bv 32 0xffffffc2))) (var d6) (bv 32 0xffffffc2)))
+d "min d5, d2, d5" 0b528051 0x000000 (set d5 (ite (&& (sle (var d2) (var d5)) (! (== (var d2) (var d5)))) (var d2) (var d5)))
+d "min d4, d15, d14" 0bef8041 0x000000 (set d4 (ite (&& (sle (var d15) (var d14)) (! (== (var d15) (var d14)))) (var d15) (var d14)))
+d "min d11, d7, d10" 0ba780b1 0x000000 (set d11 (ite (&& (sle (var d7) (var d10)) (! (== (var d7) (var d10)))) (var d7) (var d10)))
+d "min d6, d5, #-0xf7" 8b951063 0x000000 (set d6 (ite (&& (sle (var d5) (bv 32 0xffffff09)) (! (== (var d5) (bv 32 0xffffff09)))) (var d5) (bv 32 0xffffff09)))
+d "min d13, d12, #0xe4" 8b4c0ed3 0x000000 (set d13 (ite (&& (sle (var d12) (bv 32 0xe4)) (! (== (var d12) (bv 32 0xe4)))) (var d12) (bv 32 0xe4)))
+d "min d0, d8, #0xe8" 8b880e03 0x000000 (set d0 (ite (&& (sle (var d8) (bv 32 0xe8)) (! (== (var d8) (bv 32 0xe8)))) (var d8) (bv 32 0xe8)))
+d "min.b d14, d13, d5" 0b5d80e5 0x000000 (seq (set result_byte3 (let a (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d14 (var result)))
+d "min.b d3, d14, d7" 0b7e8035 0x000000 (seq (set result_byte3 (let a (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d3 (var result)))
+d "min.b d11, d1, d7" 0b7180b5 0x000000 (seq (set result_byte3 (let a (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d11 (var result)))
+d "min.bu d10, d4, d5" 0b5490a5 0x000000 (seq (set result_byte3 (let a (& (>> (var d4) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d10 (var result)))
+d "min.bu d10, d10, d13" 0bda90a5 0x000000 (seq (set result_byte3 (let a (& (>> (var d10) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d10) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d10 (var result)))
+d "min.bu d1, d0, d13" 0bd09015 0x000000 (seq (set result_byte3 (let a (& (>> (var d0) (bv 32 0x18) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x18) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte2 (let a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte1 (let a (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x8) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_byte0 (let a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (let b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d1 (var result)))
+d "min.h d8, d4, d4" 0b448087 0x000000 (seq (set result_hw1 (let a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d8 (var result)))
+d "min.h d13, d5, d0" 0b0580d7 0x000000 (seq (set result_hw1 (let a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d13 (var result)))
+d "min.h d6, d1, d6" 0b618067 0x000000 (seq (set result_hw1 (let a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (sle (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d6 (var result)))
+d "min.hu d13, d1, d2" 0b2190d7 0x000000 (seq (set result_hw1 (let a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d13 (var result)))
+d "min.hu d14, d10, d0" 0b0a90e7 0x000000 (seq (set result_hw1 (let a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d14 (var result)))
+d "min.hu d11, d4, d7" 0b7490b7 0x000000 (seq (set result_hw1 (let a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (let b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result_hw0 (let a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (let b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (ite (&& (ule (var a) (var b)) (! (== (var a) (var b)))) (var a) (var b))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d11 (var result)))
+d "min.u d12, d15, d1" 0b1f90c1 0x000000 (set d12 (ite (&& (ule (var d15) (var d1)) (! (== (var d15) (var d1)))) (var d15) (var d1)))
+d "min.u d3, d9, d3" 0b399031 0x000000 (set d3 (ite (&& (ule (var d9) (var d3)) (! (== (var d9) (var d3)))) (var d9) (var d3)))
+d "min.u d10, d2, d3" 0b3290a1 0x000000 (set d10 (ite (&& (ule (var d2) (var d3)) (! (== (var d2) (var d3)))) (var d2) (var d3)))
+d "min.u d12, d15, #-0x21" 8bff3dc3 0x000000 (set d12 (ite (&& (ule (var d15) (bv 32 0xffffffdf)) (! (== (var d15) (bv 32 0xffffffdf)))) (var d15) (bv 32 0xffffffdf)))
+d "min.u d5, d2, #-0x12" 8be23e53 0x000000 (set d5 (ite (&& (ule (var d2) (bv 32 0xffffffee)) (! (== (var d2) (bv 32 0xffffffee)))) (var d2) (bv 32 0xffffffee)))
+d "min.u d5, d2, #-0x55" 8bb23a53 0x000000 (set d5 (ite (&& (ule (var d2) (bv 32 0xffffffab)) (! (== (var d2) (bv 32 0xffffffab)))) (var d2) (bv 32 0xffffffab)))
+d "mov d0, #1" 8210 0x000000 (set d0 (bv 32 0x1))
+d "mov d3, #-0x61fe" 3b23e039 0x000000 (set d3 (bv 32 0xffff9e02))
+d "mov d3, d4" 0243 0x000000 (set d3 (var d4))
+d "mov d13, d8" 028d 0x000000 (set d13 (var d8))
+d "mov d12, d1" 021c 0x000000 (set d12 (var d1))
+d "mov d6, #3" 8236 0x000000 (set d6 (bv 32 0x3))
+d "mov d6, #-2" 82e6 0x000000 (set d6 (bv 32 0xfffffffe))
+d "mov d3, #-7" 8293 0x000000 (set d3 (bv 32 0xfffffff9))
+d "mov e10, #1" d21a 0x000000 (seq (set temp (bv 64 0x1)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e0, #-5" d2b1 0x000000 (seq (set temp (bv 64 0xfffffffffffffffb)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e10, #2" d22b 0x000000 (seq (set temp (bv 64 0x2)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov d15, #0xfa" dafa 0x000000 (set d15 (bv 32 0xfa))
+d "mov d15, #0xa5" daa5 0x000000 (set d15 (bv 32 0xa5))
+d "mov d15, #0x94" da94 0x000000 (set d15 (bv 32 0x94))
+d "mov d14, #-0x7889" 3b7077e8 0x000000 (set d14 (bv 32 0xffff8777))
+d "mov d12, #-0x7883" 3bd077c8 0x000000 (set d12 (bv 32 0xffff877d))
+d "mov d5, #-0x741" 3bf08b5f 0x000000 (set d5 (bv 32 0xfffff8bf))
+d "mov d7, d11" 0bb0f071 0x000000 (set d7 (var d11))
+d "mov d0, d3" 0b30f001 0x000000 (set d0 (var d3))
+d "mov d11, d3" 0b30f0b1 0x000000 (set d11 (var d3))
+d "mov e10, #0xf79b" fbb079af 0x000000 (seq (set temp (bv 64 0xfffffffffffff79b)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e0, #0xfd8c" fbc0d81f 0x000000 (seq (set temp (bv 64 0xfffffffffffffd8c)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e6, #0xbb10" fb00b17b 0x000000 (seq (set temp (bv 64 0xffffffffffffbb10)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e4, d11" 0bb00058 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (cast 64 false (var d11))) (cast 64 false (var d11))) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e6, d10" 0ba00078 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (cast 64 false (var d10))) (cast 64 false (var d10))) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e4, d1" 0b100048 0x000000 (seq (set temp (let _sext_val (cast 32 (msb (cast 64 false (var d1))) (cast 64 false (var d1))) (>> (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)) (- (bv 32 0x40) (bv 32 0x20)) (msb (cast 64 false (<< (var _sext_val) (- (- (bv 32 0x40) (bv 32 0x20)) (bv 32 0x0)) false)))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e4, d9, d12" 0bc91048 0x000000 (seq (set temp (append (var d9) (var d12))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e4, d2, d3" 0b321058 0x000000 (seq (set temp (append (var d2) (var d3))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e2, d1, d0" 0b011028 0x000000 (seq (set temp (append (var d1) (var d0))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov d6, #-4" 82c6 0x000000 (set d6 (bv 32 0xfffffffc))
+d "mov e10, #-7" d29b 0x000000 (seq (set temp (bv 64 0xfffffffffffffff9)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov e2, #2" d222 0x000000 (seq (set temp (bv 64 0x2)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "mov d15, #0x22" da22 0x000000 (set d15 (bv 32 0x22))
+d "mov.a a9, #0xc" a0c9 0x000000 (set a9 (bv 32 0xc))
+d "mov.a a2, #4" a042 0x000000 (set a2 (bv 32 0x4))
+d "mov.a a2, #4" a042 0x000000 (set a2 (bv 32 0x4))
+d "mov.a sp, d10" 60aa 0x000000 (set a10 (var d10))
+d "mov.a a2, d4" 6042 0x000000 (set a2 (var d4))
+d "mov.a a3, d1" 6013 0x000000 (set a3 (var d1))
+d "mov.a a4, d1" 01103046 0x000000 (set a4 (var d1))
+d "mov.a a13, d2" 012030d6 0x000000 (set a13 (var d2))
+d "mov.a a1, d11" 01b03016 0x000000 (set a1 (var d11))
+d "mov.a a4, d4" 6044 0x000000 (set a4 (var d4))
+d "mov.a a6, d15" 60f6 0x000000 (set a6 (var d15))
+d "mov.a a4, d15" 60f4 0x000000 (set a4 (var d15))
+d "mov.a a4, d11" 60b4 0x000000 (set a4 (var d11))
+d "mov.aa sp, a7" 407a 0x000000 (set a10 (var a7))
+d "mov.aa a15, a11" 40bf 0x000000 (set a15 (var a11))
+d "mov.aa a14, a14" 40ee 0x000000 (set a14 (var a14))
+d "mov.aa a5, a12" 01c00050 0x000000 (set a5 (var a12))
+d "mov.aa sp, a2" 012000a0 0x000000 (set a10 (var a2))
+d "mov.aa a9, a5" 01500090 0x000000 (set a9 (var a5))
+d "mov.aa a9, a14" 40e9 0x000000 (set a9 (var a14))
+d "mov.aa a3, a14" 40e3 0x000000 (set a3 (var a14))
+d "mov.aa a3, a7" 4073 0x000000 (set a3 (var a7))
+d "mov.aa a0, a9" 4090 0x000000 (set a0 (var a9))
+d "mov.aa a1, a5" 4051 0x000000 (set a1 (var a5))
+d "mov.d d7, a8" 8087 0x000000 (set d7 (var a8))
+d "mov.d d9, sp" 80a9 0x000000 (set d9 (var a10))
+d "mov.d d2, a3" 8032 0x000000 (set d2 (var a3))
+d "mov.d d0, a0" 0100c004 0x000000 (set d0 (var a0))
+d "mov.d d1, a5" 0150c014 0x000000 (set d1 (var a5))
+d "mov.d d12, a7" 0170c0c4 0x000000 (set d12 (var a7))
+d "mov.d d12, a9" 809c 0x000000 (set d12 (var a9))
+d "mov.d d10, a14" 80ea 0x000000 (set d10 (var a14))
+d "mov.d d3, a9" 8093 0x000000 (set d3 (var a9))
+d "mov.d d3, a9" 8093 0x000000 (set d3 (var a9))
+d "mov.d d1, a9" 8091 0x000000 (set d1 (var a9))
+d "mov.u d5, #0xaa16" bb60a15a 0x000000 (set d5 (bv 32 0xaa16))
+d "mov.u d0, #0x4a3" bb304a00 0x000000 (set d0 (bv 32 0x4a3))
+d "mov.u d1, #0x7a3" bb307a10 0x000000 (set d1 (bv 32 0x7a3))
+d "mov.u d0, #0x9429" bb9f4209 0x000000 (set d0 (bv 32 0x9429))
+d "movh d3, #0x37" 7b700330 0x000000 (set d3 (<< (bv 32 0x37) (bv 32 0x10) false))
+d "movh d4, #0x7d98" 7b80d947 0x000000 (set d4 (<< (bv 32 0x7d98) (bv 32 0x10) false))
+d "movh d6, #0xb74a" 7ba0746b 0x000000 (set d6 (<< (bv 32 0xb74a) (bv 32 0x10) false))
+d "movh.a a6, #0xfc08" 9180c06f 0x000000 (set a6 (<< (bv 32 0xfc08) (bv 32 0x10) false))
+d "movh.a a6, #0x45a7" 91705a64 0x000000 (set a6 (<< (bv 32 0x45a7) (bv 32 0x10) false))
+d "movh.a a13, #0xbd15" 9150d1db 0x000000 (set a13 (<< (bv 32 0xbd15) (bv 32 0x10) false))
+d "msub d12, d11, d5, d8" 23850acb 0x000000 (seq (set result (- (var d11) (* (var d5) (var d8)))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub d12, d12, d12, d10" 23ac0acc 0x000000 (seq (set result (- (var d12) (* (var d12) (var d10)))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub d1, d1, d3, d3" 23330a11 0x000000 (seq (set result (- (var d1) (* (var d3) (var d3)))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub d9, d15, d9, #0xe" 33e9209f 0x000000 (seq (set result (- (var d15) (* (var d9) (bv 32 0xe)))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub d15, d13, d0, #0xdf" 33f02dfd 0x000000 (seq (set result (- (var d13) (* (var d0) (bv 32 0xdf)))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub d5, d7, d15, #0x70" 330f2757 0x000000 (seq (set result (- (var d7) (* (var d15) (bv 32 0x70)))) (set d5 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e10, e14, d14, #-0x1f" 331e7ebf 0x000000 (seq (set result (- (append (var d15) (var d14)) (* (cast 64 (msb (var d14)) (var d14)) (bv 64 0xffffffffffffffe1)))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e8, e10, d12, #-0x5b" 335c7a9a 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 (msb (var d12)) (var d12)) (bv 64 0xffffffffffffffa5)))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e14, e12, d12, #-0xa2" 33ec75ed 0x000000 (seq (set result (- (append (var d13) (var d12)) (* (cast 64 (msb (var d12)) (var d12)) (bv 64 0xffffffffffffff5e)))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e2, e10, d1, d10" 23a16a3a 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 (msb (var d1)) (var d1)) (cast 64 (msb (var d10)) (var d10))))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e8, e10, d6, d2" 23266a8b 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 (msb (var d6)) (var d6)) (cast 64 (msb (var d2)) (var d2))))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub e14, e2, d9, d10" 23a96af3 0x000000 (seq (set result (- (append (var d3) (var d2)) (* (cast 64 (msb (var d9)) (var d9)) (cast 64 (msb (var d10)) (var d10))))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.f d6, d2, d2, d10" 6ba27162 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d2) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d2) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d10) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (fneg (var _precise_mul_result)) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d6 (fbits (var _result))))
+d "msub.f d2, d12, d15, d4" 6b4f712c 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d12) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d15) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d4) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (fneg (var _precise_mul_result)) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d2 (fbits (var _result))))
+d "msub.f d7, d7, d1, d14" 6be17177 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d7) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d14) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (fneg (var _precise_mul_result)) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d7 (fbits (var _result))))
+d "msub.f d8, d0, d15, d8" 6b8f7180 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d0) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d15) ))) (set _fc (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_c (let tmp (var _fc) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_mul_result (*. rne (var _arg_a) (var _arg_b))) (set _precise_result (+. rne (fneg (var _precise_mul_result)) (var _arg_c))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _fc))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (&& (&& (is_inf (var _fa)) (is_inf (var _fa))) (is_inf (var _fc)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d8 (fbits (var _result))))
+d "msub.h e8, e12, d7, d3ul, #1" a337618d 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (- (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e8, e8, d3, d15ul, #3" a3f36389 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d9) (var mul_res1))) (set result_word0 (- (var d8) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e8, e6, d14, d10ul, #2" a3ae6287 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (- (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e12, e14, d12, d1lu, #1" a31c65df 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (- (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e4, e4, d2, d7lu, #2" a3726655 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e4, e4, d15, d12lu, #3" a3cf6755 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e0, e12, d1, d10ll, #0" a3a1680d 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (- (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e2, e6, d2, d8ll, #3" a3826b36 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (- (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e10, e2, d8, d0ll, #2" a3086ab3 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d3) (var mul_res1))) (set result_word0 (- (var d2) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e0, e6, d12, d4uu, #1" a34c6d16 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (- (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e8, e14, d8, d10uu, #2" a3a86e8f 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (- (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.h e2, e4, d2, d11uu, #1" a3b26d24 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d15, d12, d7u, d7u, #3" 637713fc 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d12) (var mul_res))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d9, d4, d13u, d1u, #0" 631d1094 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d4) (var mul_res))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d1, d1, d13u, d3u, #3" 633d1311 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d1) (var mul_res))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d15, d1, d12, d7u, #3" 637c03f1 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d1)) (bv 32 0x10) false) (<< (* (cast 64 false (var d12)) (cast 64 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x3) false)) (bv 32 0x10) false))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d1, d15, d8, d12u, #1" 63c8011f 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d15)) (bv 32 0x10) false) (<< (* (cast 64 false (var d8)) (cast 64 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x1) false)) (bv 32 0x10) false))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d14, d4, d6, d15u, #1" 63f601e4 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d4)) (bv 32 0x10) false) (<< (* (cast 64 false (var d6)) (cast 64 false (& (>> (var d15) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x1) false)) (bv 32 0x10) false))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d4, d8, d7, d10l, #1" 63a70548 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d8)) (bv 32 0x10) false) (<< (* (cast 64 false (var d7)) (cast 64 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x1) false)) (bv 32 0x10) false))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d5, d11, d7, d2l, #0" 6327045b 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d11)) (bv 32 0x10) false) (<< (* (cast 64 false (var d7)) (cast 64 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d5 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d12, d10, d4, d14l, #3" 63e407ca 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d10)) (bv 32 0x10) false) (<< (* (cast 64 false (var d4)) (cast 64 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false)) (bv 32 0x10) false))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d3, d9, d3, d11, #3" 63b30b39 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d9)) (bv 32 0x20) false) (<< (* (cast 64 false (var d3)) (cast 64 false (var d11))) (bv 32 0x3) false)) (bv 32 0x20) false))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d10, d7, d11, d10, #0" 63ab08a7 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d7)) (bv 32 0x20) false) (<< (* (cast 64 false (var d11)) (cast 64 false (var d10))) (bv 32 0x0) false)) (bv 32 0x20) false))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d6, d14, d0, d3, #1" 6330096e 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d14)) (bv 32 0x20) false) (<< (* (cast 64 false (var d0)) (cast 64 false (var d3))) (bv 32 0x1) false)) (bv 32 0x20) false))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d9, d6, d9l, d5l, #1" 63591596 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (var d6) (var mul_res))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d15, d15, d0l, d13l, #3" 63d017ff 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d15) (var mul_res))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q d13, d1, d6l, d11l, #3" 63b617d1 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d1) (var mul_res))) (set d13 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e12, e10, d3, d9u, #0" 639360ca 0x000000 (seq (set result (- (append (var d11) (var d10)) (<< (* (cast 64 false (var d3)) (cast 64 false (& (>> (var d9) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e8, e8, d6, d0u, #0" 63066099 0x000000 (seq (set result (- (append (var d9) (var d8)) (<< (* (cast 64 false (var d6)) (cast 64 false (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e14, e10, d12, d0u, #1" 630c61fb 0x000000 (seq (set result (- (append (var d11) (var d10)) (<< (* (cast 64 false (var d12)) (cast 64 false (& (>> (var d0) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x1) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e14, e4, d0, d10l, #3" 63a067e4 0x000000 (seq (set result (- (append (var d5) (var d4)) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e10, e0, d1, d10l, #3" 63a167b1 0x000000 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d1)) (cast 64 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e2, e12, d6, d8l, #3" 6386673c 0x000000 (seq (set result (- (append (var d13) (var d12)) (<< (* (cast 64 false (var d6)) (cast 64 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e10, e2, d7, d12, #3" 63c76fb3 0x000000 (seq (set result (- (append (var d3) (var d2)) (<< (* (cast 64 false (var d7)) (cast 64 false (var d12))) (bv 32 0x3) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e8, e12, d3, d10, #3" 63a36f9d 0x000000 (seq (set result (- (append (var d13) (var d12)) (<< (* (cast 64 false (var d3)) (cast 64 false (var d10))) (bv 32 0x3) false))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e4, e0, d5, d1, #2" 63156e50 0x000000 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d5)) (cast 64 false (var d1))) (bv 32 0x2) false))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e6, e12, d8u, d6u, #2" 6368727d 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d13) (var d12)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e6, e10, d5u, d5u, #3" 6355737b 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d11) (var d10)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e12, e0, d3u, d11u, #0" 63b370d0 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e8, e0, d6l, d10l, #0" 63a67480 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e0, e10, d4l, d7l, #1" 6374751b 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d11) (var d10)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.q e4, e10, d11l, d3l, #2" 633b764a 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d11) (var d10)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e0, e10, d4, #0x1e4" 33445e0a 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 false (var d4)) (bv 64 0x1e4)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e10, e12, d13, #0x1f3" 333d5fac 0x000000 (seq (set result (- (append (var d13) (var d12)) (* (cast 64 false (var d13)) (bv 64 0x1f3)))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e0, e4, d5, #0xf" 33f54015 0x000000 (seq (set result (- (append (var d5) (var d4)) (* (cast 64 false (var d5)) (bv 64 0xf)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e4, e6, d11, d8" 238b6857 0x000000 (seq (set result (- (append (var d7) (var d6)) (* (cast 64 false (var d11)) (cast 64 false (var d8))))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e12, e8, d15, d14" 23ef68d8 0x000000 (seq (set result (- (append (var d9) (var d8)) (* (cast 64 false (var d15)) (cast 64 false (var d14))))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msub.u e12, e8, d11, d3" 233b68d8 0x000000 (seq (set result (- (append (var d9) (var d8)) (* (cast 64 false (var d11)) (cast 64 false (var d3))))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e14, e14, d8, d14ul, #0" e3e860ee 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e10, e12, d12, d0ul, #0" e30c60ac 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e8, e8, d1, d13ul, #2" e3d16298 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e6, e8, d15, d2lu, #1" e32f6569 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e14, e12, d3, d5lu, #3" e35367ec 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e8, e12, d11, d13lu, #3" e3db678c 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e12, e12, d1, d9ll, #3" e3916bdd 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e14, e6, d12, d0ll, #0" e30c68f6 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (+ (var d6) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e12, e14, d11, d8ll, #3" e38b6bcf 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e4, e4, d7, d0uu, #0" e3076c45 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e4, e0, d13, d13uu, #3" e3dd6f40 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (+ (var d0) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubad.h e0, e4, d2, d0uu, #3" e3026f05 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (| (cast 64 false (<< (var result_word1) (bv 32 0x20) false)) (cast 64 false (var result_word0)))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e4, e2, d11, d4ul, #0" e34b7043 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e12, e4, d9, d2ul, #0" e32970c4 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e14, e12, d8, d2ul, #1" e32871ed 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e12, e14, d9, d6lu, #2" e36976df 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d15) (var d14)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e14, e12, d12, d15lu, #2" e3fc76ed 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e14, e2, d13, d0lu, #3" e30d77f2 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e14, e0, d6, d1ll, #0" e31678e0 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e6, e0, d11, d7ll, #2" e37b7a71 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e14, e2, d7, d13ll, #0" e3d778e2 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e0, e12, d3, d8uu, #1" e3837d0c 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e6, e8, d0, d9uu, #1" e3907d78 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d9) (var d8)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadm.h e2, e12, d13, d6uu, #0" e36d7c2c 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e10, e4, d7, d13ul, #0" e3d7f0b4 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e12, e4, d5, d14ul, #0" e3e5f0d5 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e12, e0, d10, d2ul, #2" e32af2c1 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e14, e10, d14, d3lu, #3" e33ef7fb 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d11) (var d10)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e6, e6, d0, d9lu, #2" e390f667 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d7) (var d6)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e6, e14, d14, d2lu, #2" e32ef67f 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d15) (var d14)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e12, e8, d3, d14ll, #1" e3e3f9d9 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d9) (var d8)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e12, e14, d8, d3ll, #0" e338f8ce 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d15) (var d14)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e8, e10, d9, d11ll, #0" e3b9f88a 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d11) (var d10)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e8, e4, d0, d1uu, #1" e310fd84 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e10, e0, d0, d2uu, #3" e320ffa1 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadms.h e0, e0, d15, d13uu, #1" e3dffd11 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (- (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d14, d5, d11, d14ul, #1" e3eb31e5 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d5) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d6, d14, d3, d3ul, #2" e333326e 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d14) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d6 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d11, d10, d7, d12ul, #0" e3c730ba 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d10) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d11 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d14, d2, d9, d6lu, #0" e36934e2 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d2) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d5, d0, d15, d11lu, #2" e3bf3650 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d5 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d4, d15, d12, d15lu, #0" e3fc344f 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d15) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d4 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d1, d1, d7, d5ll, #2" e3573a11 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d1) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d14, d11, d7, d4ll, #2" e3473aeb 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d11) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d8, d8, d4, d2ll, #3" e3243b88 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d8) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d8 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d12, d11, d1, d8uu, #0" e3813ccb 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d11) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d12 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d2, d14, d7, d2uu, #2" e3273e2e 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d14) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d2 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadr.h d14, d11, d8, d9uu, #3" e3983feb 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d11) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d14 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d8, d8, d6, d0ul, #3" e306b388 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d8) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d8 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d10, d7, d4, d3ul, #0" e334b0a7 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d7) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d10 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d11, d4, d10, d12ul, #2" e3cab2b4 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d4) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d11 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d9, d2, d15, d5lu, #1" e35fb592 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d2) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d9 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d3, d3, d4, d4lu, #2" e344b633 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d3) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d3 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d2, d2, d4, d7lu, #3" e374b722 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d2) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d2 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d8, d0, d9, d0ll, #1" e309b980 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d8 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d15, d0, d2, d0ll, #2" e302baf0 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d15 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d6, d13, d7, d2ll, #1" e327b96d 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d13) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d1, d9, d6, d10uu, #3" e3a6bf19 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d9) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d1 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d2, d5, d8, d5uu, #2" e358be25 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d5) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d2 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubadrs.h d6, d0, d1, d13uu, #1" e3d1bd60 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d0) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (+ (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e14, e4, d9, d2ul, #2" e329e2f5 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e14, e14, d13, d15ul, #2" e3fde2ef 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e4, e4, d12, d13ul, #3" e3dce354 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (+ (var d4) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e4, e8, d7, d15lu, #3" e3f7e758 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e10, e2, d15, d7lu, #0" e37fe4a3 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e2, e14, d9, d0lu, #1" e309e52e 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e0, e12, d0, d1ll, #2" e310ea1d 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (+ (var d12) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e0, e2, d9, d12ll, #3" e3c9eb03 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e2, e2, d8, d11ll, #3" e3b8eb23 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d3) (var mul_res1))) (set result_word0 (+ (var d2) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e12, e14, d0, d5uu, #1" e350edce 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e10, e14, d3, d6uu, #1" e363edaf 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (+ (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubads.h e10, e8, d15, d8uu, #1" e38fedb9 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d9) (var mul_res1))) (set result_word0 (+ (var d8) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e0, e12, d2, d10ul, #0" a3a2701c 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e14, e2, d2, d3ul, #2" a33272f3 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e8, e2, d2, d3ul, #2" a3327293 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e8, e2, d0, d12lu, #1" a3c07583 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e14, e8, d9, d1lu, #0" a31974f8 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d9) (var d8)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e10, e14, d15, d5lu, #0" a35f74bf 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d15) (var d14)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e6, e0, d12, d5ll, #3" a35c7b70 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e10, e6, d5, d12ll, #2" a3c57aa7 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d7) (var d6)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e12, e6, d15, d0ll, #3" a30f7bc6 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d7) (var d6)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e8, e6, d12, d15uu, #2" a3fc7e96 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d7) (var d6)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e2, e10, d11, d1uu, #3" a31b7f2a 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d11) (var d10)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubm.h e10, e12, d1, d8uu, #1" a3817dac 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d13) (var d12)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e6, e0, d1, d12ul, #3" a3c1f371 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e4, e8, d13, d5ul, #1" a35df149 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d9) (var d8)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e10, e0, d2, d12ul, #1" a3c2f1a0 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e2, e4, d5, d4lu, #2" a345f624 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e6, e2, d13, d9lu, #2" a39df672 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e0, e10, d4, d7lu, #0" a374f40a 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d11) (var d10)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e0, e8, d11, d0ll, #0" a30bf809 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (append (var d9) (var d8)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e10, e4, d9, d5ll, #2" a359fab4 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d5) (var d4)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e14, e10, d0, d10ll, #1" a3a0f9fa 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d11) (var d10)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e6, e14, d8, d13uu, #3" a3d8ff6f 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d15) (var d14)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e6, e2, d9, d12uu, #1" a3c9fd62 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d3) (var d2)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubms.h e10, e0, d6, d13uu, #2" a3d6fea0 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d1) (var d0)) (<< (cast 64 false (+ (var mul_word1) (var mul_word0))) (bv 32 0x10) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d8, e14, d4, d14ul, #0" 63e4788f 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (var d15) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d14) (var mul_res0)) (bv 32 0x8000))) (set d8 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d10, e6, d1, d1ul, #1" 631179a6 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (var d7) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d6) (var mul_res0)) (bv 32 0x8000))) (set d10 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d10, e14, d6, d14ul, #2" 63e67aaf 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (var d15) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d14) (var mul_res0)) (bv 32 0x8000))) (set d10 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d10, d3, d12, d11ul, #1" a3bc31a3 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d3) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d10 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d8, d12, d15, d7ul, #1" a37f318c 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d12) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d8 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d13, d15, d9, d1ul, #3" a31933df 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d15) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d13 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d3, d13, d3, d4lu, #2" a343363d 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d13) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d3 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d2, d11, d14, d6lu, #2" a36e362b 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d11) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d2 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d12, d6, d7, d3lu, #3" a33737c6 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d6) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d12 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d3, d4, d8, d3ll, #2" a3383a34 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d4) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d3 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d1, d6, d2, d13ll, #2" a3d23a16 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d6) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d1 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d5, d15, d10, d3ll, #3" a33a3b5f 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d15) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d5 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d0, d3, d6, d3uu, #2" a3363e03 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d3) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d5, d1, d0, d4uu, #2" a3403e51 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d1) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d5 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.h d4, d6, d10, d10uu, #2" a3aa3e46 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d6) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d4 (append (cast 16 false (& (>> (var result_halfword1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_halfword0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d4, d8, d2u, d12u, #1" 63c21948 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (- (var d8) (var mul_res)) (bv 32 0x8000))) (set d4 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d13, d15, d10u, d5u, #0" 635a18df 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (+ (- (var d15) (var mul_res)) (bv 32 0x8000))) (set d13 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d3, d8, d12u, d9u, #2" 639c1a38 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (- (var d8) (var mul_res)) (bv 32 0x8000))) (set d3 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d8, d3, d10l, d0l, #1" 630a1d83 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (- (var d3) (var mul_res)) (bv 32 0x8000))) (set d8 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d7, d4, d9l, d11l, #1" 63b91d74 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (- (var d4) (var mul_res)) (bv 32 0x8000))) (set d7 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubr.q d14, d7, d10l, d11l, #1" 63ba1de7 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (- (var d7) (var mul_res)) (bv 32 0x8000))) (set d14 (& (var result) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d12, e0, d8, d2ul, #2" 6328fac0 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (var d1) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d0) (var mul_res0)) (bv 32 0x8000))) (set d12 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d6, e2, d12, d8ul, #2" 638cfa62 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (var d3) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d2) (var mul_res0)) (bv 32 0x8000))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d8, e14, d4, d10ul, #0" 63a4f88f 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (var d15) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d14) (var mul_res0)) (bv 32 0x8000))) (set d8 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d6, e0, d12, d3ul, #1" 633cf961 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (var d1) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (var d0) (var mul_res0)) (bv 32 0x8000))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d10, d1, d13, d1ul, #2" a31db2a1 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d1) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d10 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d0, d15, d14, d3ul, #3" a33eb30f 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d15) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d8, d10, d15, d13ul, #0" a3dfb08a 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d10) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d8 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d4, d7, d7, d4lu, #0" a347b447 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d7) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d4 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d12, d14, d5, d12lu, #0" a3c5b4ce 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d14) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d12 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d12, d8, d14, d5lu, #1" a35eb5c8 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d8) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d12 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d2, d4, d5, d7ll, #2" a375ba24 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d4) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d2 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d6, d1, d15, d4ll, #2" a34fba61 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_halfword1 (+ (- (& (var d1) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d6 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d14, d3, d9, d6ll, #3" a369bbe3 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_halfword1 (+ (- (& (var d3) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d14 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d9, d8, d2, d1uu, #1" a312bd98 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d8) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d9 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d10, d12, d2, d15uu, #1" a3f2bdac 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_halfword1 (+ (- (& (var d12) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d10 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.h d0, d11, d12, d7uu, #0" a37cbc0b 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_halfword1 (+ (- (& (var d11) (bv 32 0xffff0000)) (var mul_res1)) (bv 32 0x8000))) (set result_halfword0 (+ (- (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (bv 32 0x10) false) (var mul_res0)) (bv 32 0x8000))) (set d0 (let _a (cast 16 false (& (>> (let x (var result_halfword1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (let _b (cast 16 false (& (>> (let x (var result_halfword0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0x10) false) (bv 32 0xffff))) (append (var _a) (var _b))))) (set ov1 (|| (! (ule (var result_halfword1) (bv 32 0x7fffffff))) (&& (sle (var result_halfword1) (bv 32 0x80000000)) (! (== (var result_halfword1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_halfword0) (bv 32 0x7fffffff))) (&& (sle (var result_halfword0) (bv 32 0x80000000)) (! (== (var result_halfword0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_halfword0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d12, d4, d11u, d9u, #2" 639b9ac4 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (- (var d4) (var mul_res)) (bv 32 0x8000))) (set d12 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d7, d6, d0u, d4u, #2" 63409a76 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (- (var d6) (var mul_res)) (bv 32 0x8000))) (set d7 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d15, d3, d3u, d1u, #1" 631399f3 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (+ (- (var d3) (var mul_res)) (bv 32 0x8000))) (set d15 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d14, d4, d12l, d1l, #2" 631c9ee4 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (- (var d4) (var mul_res)) (bv 32 0x8000))) (set d14 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d11, d8, d13l, d14l, #2" 63ed9eb8 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (+ (- (var d8) (var mul_res)) (bv 32 0x8000))) (set d11 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubrs.q d10, d6, d11l, d3l, #3" 633b9fa6 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (+ (- (var d6) (var mul_res)) (bv 32 0x8000))) (set d10 (& (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (bv 32 0xffff0000))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d9, d15, d1, d1" 23118a9f 0x000000 (seq (set result (- (var d15) (* (var d1) (var d1)))) (set d9 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d2, d5, d5, d2" 23258a25 0x000000 (seq (set result (- (var d5) (* (var d5) (var d2)))) (set d2 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d14, d3, d14, d12" 23ce8ae3 0x000000 (seq (set result (- (var d3) (* (var d14) (var d12)))) (set d14 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d7, d6, d13, #0xaa" 33adaa76 0x000000 (seq (set result (- (var d6) (* (var d13) (bv 32 0xaa)))) (set d7 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d1, d12, d1, #-0xfd" 3331b01c 0x000000 (seq (set result (- (var d12) (* (var d1) (bv 32 0xffffff03)))) (set d1 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs d4, d5, d15, #0x7d" 33dfa745 0x000000 (seq (set result (- (var d5) (* (var d15) (bv 32 0x7d)))) (set d4 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e6, e10, d5, #2" 3325e06b 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 (msb (var d5)) (var d5)) (bv 64 0x2)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e6, e2, d15, #-0xae" 332ff573 0x000000 (seq (set result (- (append (var d3) (var d2)) (* (cast 64 (msb (var d15)) (var d15)) (bv 64 0xffffffffffffff52)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e4, e0, d2, #0xd2" 3322ed50 0x000000 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 (msb (var d2)) (var d2)) (bv 64 0xd2)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e4, e4, d1, d11" 23b1ea54 0x000000 (seq (set result (- (append (var d5) (var d4)) (* (cast 64 (msb (var d1)) (var d1)) (cast 64 (msb (var d11)) (var d11))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e0, e14, d3, d0" 2303ea1f 0x000000 (seq (set result (- (append (var d15) (var d14)) (* (cast 64 (msb (var d3)) (var d3)) (cast 64 (msb (var d0)) (var d0))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs e8, e2, d5, d9" 2395ea83 0x000000 (seq (set result (- (append (var d3) (var d2)) (* (cast 64 (msb (var d5)) (var d5)) (cast 64 (msb (var d9)) (var d9))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e2, e4, d15, d0ul, #0" a30fe035 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e4, e6, d4, d3ul, #1" a334e146 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (- (var d6) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e4, e4, d5, d7ul, #3" a375e345 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e2, e12, d10, d2lu, #2" a32ae63c 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (- (var d12) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e6, e0, d10, d11lu, #3" a3bae771 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e0, e4, d8, d13lu, #1" a3d8e504 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d5) (var mul_res1))) (set result_word0 (- (var d4) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e2, e10, d4, d13ll, #0" a3d4e83b 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d11) (var mul_res1))) (set result_word0 (- (var d10) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e12, e14, d2, d5ll, #1" a352e9ce 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (- (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e10, e14, d14, d7ll, #3" a37eebbf 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d15) (var mul_res1))) (set result_word0 (- (var d14) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e14, e0, d12, d6uu, #0" a36cecf1 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d1) (var mul_res1))) (set result_word0 (- (var d0) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e6, e6, d15, d11uu, #3" a3bfef77 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result_word1 (- (var d7) (var mul_res1))) (set result_word0 (- (var d6) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.h e0, e12, d8, d4uu, #0" a348ec1c 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result_word1 (- (var d13) (var mul_res1))) (set result_word0 (- (var d12) (var mul_res0))) (set temp (let _a (let x (var result_word1) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (let _b (let x (var result_word0) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))) (append (var _a) (var _b))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d9, d15, d11u, d5u, #3" 635b939f 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d15) (var mul_res))) (set d9 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d5, d0, d4u, d9u, #3" 63949350 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d0) (var mul_res))) (set d5 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d14, d8, d10u, d9u, #0" 639a90e8 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d8) (var mul_res))) (set d14 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d4, d0, d5, d0u, #1" 63058140 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d0)) (bv 32 0x10) false) (<< (* (cast 64 false (var d5)) (cast 64 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x1) false)) (bv 32 0x10) false))) (set d4 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d13, d14, d0, d9u, #2" 639082de 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d14)) (bv 32 0x10) false) (<< (* (cast 64 false (var d0)) (cast 64 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x2) false)) (bv 32 0x10) false))) (set d13 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d7, d10, d7, d2u, #2" 6327827a 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d10)) (bv 32 0x10) false) (<< (* (cast 64 false (var d7)) (cast 64 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0x0)))) (bv 32 0x2) false)) (bv 32 0x10) false))) (set d7 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d8, d1, d11, d4l, #2" 634b8681 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d1)) (bv 32 0x10) false) (<< (* (cast 64 false (var d11)) (cast 64 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x2) false)) (bv 32 0x10) false))) (set d8 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d9, d7, d8, d15l, #0" 63f88497 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d7)) (bv 32 0x10) false) (<< (* (cast 64 false (var d8)) (cast 64 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d9 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d14, d15, d12, d7l, #0" 637c84ef 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d15)) (bv 32 0x10) false) (<< (* (cast 64 false (var d12)) (cast 64 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (bv 32 0x10) false))) (set d14 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d0, d10, d8, d5, #1" 6358890a 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d10)) (bv 32 0x20) false) (<< (* (cast 64 false (var d8)) (cast 64 false (var d5))) (bv 32 0x1) false)) (bv 32 0x20) false))) (set d0 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d12, d14, d14, d13, #2" 63de8ace 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d14)) (bv 32 0x20) false) (<< (* (cast 64 false (var d14)) (cast 64 false (var d13))) (bv 32 0x2) false)) (bv 32 0x20) false))) (set d12 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d4, d2, d12, d0, #0" 630c8842 0x000000 (seq (set result (cast 32 false (>> (- (<< (cast 64 false (var d2)) (bv 32 0x20) false) (<< (* (cast 64 false (var d12)) (cast 64 false (var d0))) (bv 32 0x0) false)) (bv 32 0x20) false))) (set d4 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d1, d2, d9l, d9l, #0" 63999412 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set result (- (var d2) (var mul_res))) (set d1 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d11, d4, d8l, d10l, #2" 63a896b4 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (var d4) (var mul_res))) (set d11 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q d11, d5, d1l, d6l, #3" 636197b5 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (var d5) (var mul_res))) (set d11 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e10, e14, d3, d4u, #0" 6343e0be 0x000000 (seq (set result (- (append (var d15) (var d14)) (<< (* (cast 64 false (var d3)) (cast 64 false (& (>> (var d4) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e12, e10, d11, d6u, #2" 636be2cb 0x000000 (seq (set result (- (append (var d11) (var d10)) (<< (* (cast 64 false (var d11)) (cast 64 false (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x2) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e4, e0, d1, d6u, #2" 6361e241 0x000000 (seq (set result (- (append (var d1) (var d0)) (<< (* (cast 64 false (var d1)) (cast 64 false (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0xffff)))) (bv 32 0x2) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e2, e10, d14, d5l, #2" 635ee63b 0x000000 (seq (set result (- (append (var d11) (var d10)) (<< (* (cast 64 false (var d14)) (cast 64 false (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x2) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e0, e8, d14, d1l, #0" 631ee409 0x000000 (seq (set result (- (append (var d9) (var d8)) (<< (* (cast 64 false (var d14)) (cast 64 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x0) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e8, e2, d6, d11l, #1" 63b6e583 0x000000 (seq (set result (- (append (var d3) (var d2)) (<< (* (cast 64 false (var d6)) (cast 64 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x1) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e8, e8, d7, d12, #3" 63c7ef98 0x000000 (seq (set result (- (append (var d9) (var d8)) (<< (* (cast 64 false (var d7)) (cast 64 false (var d12))) (bv 32 0x3) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e12, e12, d5, d0, #2" 6305eedc 0x000000 (seq (set result (- (append (var d13) (var d12)) (<< (* (cast 64 false (var d5)) (cast 64 false (var d0))) (bv 32 0x2) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e6, e2, d12, d11, #2" 63bcee72 0x000000 (seq (set result (- (append (var d3) (var d2)) (<< (* (cast 64 false (var d12)) (cast 64 false (var d11))) (bv 32 0x2) false))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e2, e0, d1u, d9u, #3" 6391f331 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e8, e0, d14u, d6u, #3" 636ef380 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d1) (var d0)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e0, e8, d6u, d7u, #1" 6376f108 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set result (- (append (var d9) (var d8)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e0, e4, d4l, d13l, #2" 63d4f604 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set result (- (append (var d5) (var d4)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e8, e8, d15l, d12l, #3" 63cff798 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d9) (var d8)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.q e6, e12, d3l, d13l, #3" 63d3f77c 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set mul_res (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set result (- (append (var d13) (var d12)) (cast 64 false (<< (var mul_res) (bv 32 0x10) false)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false) (bv 64 0x1)) (let max_neg (~- (<< (bv 64 0x1) (- (var y) (bv 64 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d11, d9, d4, #-0x30" 33049db9 0x000000 (seq (set result (- (var d9) (* (var d4) (bv 32 0xffffffd0)))) (set d11 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d8, d4, d5, #-0xe6" 33a59184 0x000000 (seq (set result (- (var d4) (* (var d5) (bv 32 0xffffff1a)))) (set d8 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d14, d12, d9, #-0x2d" 33399dec 0x000000 (seq (set result (- (var d12) (* (var d9) (bv 32 0xffffffd3)))) (set d14 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d5, d15, d7, d1" 2317885f 0x000000 (seq (set result (- (var d15) (* (var d7) (var d1)))) (set d5 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d11, d12, d9, d12" 23c988bc 0x000000 (seq (set result (- (var d12) (* (var d9) (var d12)))) (set d11 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u d9, d6, d0, d7" 23708896 0x000000 (seq (set result (- (var d6) (* (var d0) (var d7)))) (set d9 (let x (var result) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e6, e10, d2, #0x3f" 33f2c37b 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 false (var d2)) (bv 64 0x3f)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e4, e0, d12, #0x2a" 33acc251 0x000000 (seq (set result (- (append (var d1) (var d0)) (* (cast 64 false (var d12)) (bv 64 0x2a)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e12, e2, d15, #-0x85" 33bfd7d3 0x000000 (seq (set result (- (append (var d3) (var d2)) (* (cast 64 false (var d15)) (bv 64 0xffffffffffffff7b)))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e10, e14, d2, d15" 23f2e8bf 0x000000 (seq (set result (- (append (var d15) (var d14)) (* (cast 64 false (var d2)) (cast 64 false (var d15))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e0, e4, d12, d9" 239ce805 0x000000 (seq (set result (- (append (var d5) (var d4)) (* (cast 64 false (var d12)) (cast 64 false (var d9))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "msubs.u e8, e10, d5, d15" 23f5e89b 0x000000 (seq (set result (- (append (var d11) (var d10)) (* (cast 64 false (var d5)) (cast 64 false (var d15))))) (set temp (let x (var result) (let y (bv 64 0x40) (let max_pos (- (<< (bv 64 0x1) (var y) false) (bv 64 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 64 0x0)) (! (== (var x) (bv 64 0x0)))) (bv 64 0x0) (var x))))))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d15, d9" e29f 0x000000 (seq (set result (* (var d15) (var d9))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d2, d7" e272 0x000000 (seq (set result (* (var d2) (var d7))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d11, d15" e2fb 0x000000 (seq (set result (* (var d11) (var d15))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d10, d8, #-0xd" 53383fa0 0x000000 (seq (set result (* (var d8) (bv 32 0xfffffff3))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d7, d1, #0x75" 53512770 0x000000 (seq (set result (* (var d1) (bv 32 0x75))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d3, d6, #0xa8" 53862a30 0x000000 (seq (set result (* (var d6) (bv 32 0xa8))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d7, d2, d2" 73220a70 0x000000 (seq (set result (* (var d2) (var d2))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d14, d12, d4" 734c0ae0 0x000000 (seq (set result (* (var d12) (var d4))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul d15, d8, d2" 73280af0 0x000000 (seq (set result (* (var d8) (var d2))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e12, d10, #-0x81" 53fa77d0 0x000000 (seq (set result (* (cast 64 (msb (var d10)) (var d10)) (bv 64 0xffffffffffffff7f))) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e2, d5, #0x92" 53256920 0x000000 (seq (set result (* (cast 64 (msb (var d5)) (var d5)) (bv 64 0x92))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e8, d4, #-0xd6" 53a47280 0x000000 (seq (set result (* (cast 64 (msb (var d4)) (var d4)) (bv 64 0xffffffffffffff2a))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e10, d15, d12" 73cf6ab0 0x000000 (seq (set result (* (cast 64 (msb (var d15)) (var d15)) (cast 64 (msb (var d12)) (var d12)))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e14, d9, d15" 73f96ae0 0x000000 (seq (set result (* (cast 64 (msb (var d9)) (var d9)) (cast 64 (msb (var d15)) (var d15)))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul e2, d1, d2" 73216a20 0x000000 (seq (set result (* (cast 64 (msb (var d1)) (var d1)) (cast 64 (msb (var d2)) (var d2)))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.f d7, d9, d1" 4b194170 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d9) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (*. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d7 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "mul.f d1, d10, d11" 4bba4110 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d10) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d11) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (*. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d1 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "mul.f d1, d13, d2" 4b2d4110 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d13) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d2) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (*. rne (var _arg_a) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (|| (&& (is_inf (var _fa)) (is_fzero (var _fb))) (&& (is_fzero (var _fa)) (is_inf (var _fb)))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d1 (fbits (var _result))) (set set_FI (|| (|| (is_nan (var _fa)) (is_nan (var _fb))) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "mul.h e6, d11, d9ul, #1" b39b6160 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set temp (append (var result_word1) (var result_word0))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e10, d0, d7ul, #0" b37060a0 0x000000 (seq (set mul_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e2, d14, d13ul, #2" b3de6230 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e8, d4, d15lu, #2" b3f46680 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e4, d10, d0lu, #2" b30a6650 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e10, d3, d9lu, #2" b39366b0 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e14, d3, d10ll, #2" b3a36ae0 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e2, d6, d6ll, #0" b3666830 0x000000 (seq (set mul_a (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e12, d13, d12ll, #0" b3cd68c0 0x000000 (seq (set mul_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e2, d8, d3uu, #3" b3386f30 0x000000 (seq (set mul_a (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set temp (append (var result_word1) (var result_word0))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e0, d7, d5uu, #2" b3576e00 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (append (var result_word1) (var result_word0))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.h e4, d9, d0uu, #0" b3096c50 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (append (var result_word1) (var result_word0))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d11, d13, d9u, #1" 939d01b0 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d13)) (var d13)) (cast 64 (msb (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x1) false) (bv 32 0x10) false))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d2, d3, d13u, #3" 93d30320 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d3)) (var d3)) (cast 64 (msb (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x3) false) (bv 32 0x10) false))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d3, d7, d13u, #0" 93d70030 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d7)) (var d7)) (cast 64 (msb (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false) (bv 32 0x10) false))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d10, d15, d8l, #1" 938f05a0 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d15)) (var d15)) (cast 64 (msb (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x1) false) (bv 32 0x10) false))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d6, d9, d13l, #3" 93d90760 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d9)) (var d9)) (cast 64 (msb (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false) (bv 32 0x10) false))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d6, d1, d9l, #3" 93910760 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d1)) (var d1)) (cast 64 (msb (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false) (bv 32 0x10) false))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d0, d14, d10, #0" 93ae0800 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d14)) (var d14)) (cast 64 (msb (var d10)) (var d10))) (bv 32 0x0) false) (bv 32 0x20) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d3, d8, d6, #1" 93680930 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d8)) (var d8)) (cast 64 (msb (var d6)) (var d6))) (bv 32 0x1) false) (bv 32 0x20) false))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d0, d2, d9, #0" 93920800 0x000000 (seq (set result (cast 32 false (>> (<< (* (cast 64 (msb (var d2)) (var d2)) (cast 64 (msb (var d9)) (var d9))) (bv 32 0x0) false) (bv 32 0x20) false))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d14, d1u, d12u, #1" 93c111e0 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d9, d9u, d0u, #1" 93091190 0x000000 (seq (set mul_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d1, d11u, d11u, #3" 93bb1310 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d6, d11l, d14l, #0" 93eb1460 0x000000 (seq (set mul_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d13, d4l, d11l, #1" 93b415d0 0x000000 (seq (set mul_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set d13 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q d9, d5l, d3l, #3" 93351790 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e4, d6, d9u, #0" 93966050 0x000000 (seq (set result (<< (* (cast 64 (msb (var d6)) (var d6)) (cast 64 (msb (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e0, d8, d0u, #0" 93086000 0x000000 (seq (set result (<< (* (cast 64 (msb (var d8)) (var d8)) (cast 64 (msb (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e0, d3, d6u, #0" 93636000 0x000000 (seq (set result (<< (* (cast 64 (msb (var d3)) (var d3)) (cast 64 (msb (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)))) (bv 32 0x0) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e8, d10, d3l, #2" 933a6680 0x000000 (seq (set result (<< (* (cast 64 (msb (var d10)) (var d10)) (cast 64 (msb (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x2) false)) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e14, d1, d13l, #3" 93d167f0 0x000000 (seq (set result (<< (* (cast 64 (msb (var d1)) (var d1)) (cast 64 (msb (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x3) false)) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e0, d11, d11l, #2" 93bb6610 0x000000 (seq (set result (<< (* (cast 64 (msb (var d11)) (var d11)) (cast 64 (msb (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)))) (bv 32 0x2) false)) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e12, d10, d8, #1" 938a6dd0 0x000000 (seq (set result (<< (* (cast 64 (msb (var d10)) (var d10)) (cast 64 (msb (var d8)) (var d8))) (bv 32 0x1) false)) (set temp (var result)) (set d12 (cast 32 false (var temp))) (set d13 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e10, d5, d6, #1" 93656db0 0x000000 (seq (set result (<< (* (cast 64 (msb (var d5)) (var d5)) (cast 64 (msb (var d6)) (var d6))) (bv 32 0x1) false)) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.q e6, d6, d8, #2" 93866e70 0x000000 (seq (set result (<< (* (cast 64 (msb (var d6)) (var d6)) (cast 64 (msb (var d8)) (var d8))) (bv 32 0x2) false)) (set temp (var result)) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e10, d8, #0x42" 532844a0 0x000000 (seq (set result (* (cast 64 false (var d8)) (bv 64 0x42))) (set temp (var result)) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e2, d8, #-0xff" 53185030 0x000000 (seq (set result (* (cast 64 false (var d8)) (bv 64 0xffffffffffffff01))) (set temp (var result)) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e8, d0, #-0xaf" 53105580 0x000000 (seq (set result (* (cast 64 false (var d0)) (bv 64 0xffffffffffffff51))) (set temp (var result)) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e4, d13, d14" 73ed6850 0x000000 (seq (set result (* (cast 64 false (var d13)) (cast 64 false (var d14)))) (set temp (var result)) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e0, d14, d1" 731e6810 0x000000 (seq (set result (* (cast 64 false (var d14)) (cast 64 false (var d1)))) (set temp (var result)) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mul.u e14, d4, d3" 733468e0 0x000000 (seq (set result (* (cast 64 false (var d4)) (cast 64 false (var d3)))) (set temp (var result)) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set overflow (|| (! (ule (var result) (bv 64 0x7fffffffffffffff))) (&& (sle (var result) (bv 64 0x8000000000000000)) (! (== (var result) (bv 64 0x8000000000000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 64 0x3f) false) (bv 64 0x1)))) (! (is_zero (& (>> (var result) (bv 64 0x3e) false) (bv 64 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e6, d10, d2ul, #1" b32a7160 0x000000 (seq (set mul_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e4, d12, d10ul, #0" b3ac7050 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e0, d2, d7ul, #0" b3727000 0x000000 (seq (set mul_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e6, d15, d8lu, #3" b38f7770 0x000000 (seq (set mul_a (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e14, d1, d14lu, #1" b3e175e0 0x000000 (seq (set mul_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set mul_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x1) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e0, d3, d4lu, #3" b3437710 0x000000 (seq (set mul_a (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d0 (cast 32 false (var temp))) (set d1 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e2, d5, d15ll, #0" b3f57820 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d2 (cast 32 false (var temp))) (set d3 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e4, d7, d5ll, #0" b3577850 0x000000 (seq (set mul_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e14, d14, d10ll, #2" b3ae7ae0 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d14 (cast 32 false (var temp))) (set d15 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e10, d12, d6uu, #3" b36c7fa0 0x000000 (seq (set mul_a (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set mul_a (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x3) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e10, d5, d13uu, #2" b3d57ea0 0x000000 (seq (set mul_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set mul_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x2) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d10 (cast 32 false (var temp))) (set d11 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulm.h e6, d14, d5uu, #0" b35e7c70 0x000000 (seq (set mul_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set mul_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mul_b (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mul_a) (bv 32 0x8000)) (&& (== (var mul_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (<< (* (var mul_a) (var mul_b)) (bv 32 0x0) false))) (set temp (cast 64 false (<< (+ (var result_word1) (var result_word0)) (bv 32 0x10) false))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d11, d10, d12ul, #0" b3ca30b0 0x000000 (seq (set mulr_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d11 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d6, d0, d13ul, #2" b3d03260 0x000000 (seq (set mulr_a (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set d6 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d9, d13, d9ul, #3" b39d3390 0x000000 (seq (set mulr_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set d9 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d5, d11, d9lu, #2" b39b3650 0x000000 (seq (set mulr_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set d5 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d8, d7, d1lu, #2" b3173680 0x000000 (seq (set mulr_a (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set d8 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d15, d10, d1lu, #2" b31a36f0 0x000000 (seq (set mulr_a (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set d15 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d8, d5, d11ll, #1" b3b53980 0x000000 (seq (set mulr_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set d8 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d8, d1, d15ll, #1" b3f13980 0x000000 (seq (set mulr_a (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set d8 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d9, d2, d11ll, #2" b3b23a90 0x000000 (seq (set mulr_a (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x2) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x2) false) (bv 32 0x8000)))) (set d9 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d11, d14, d10uu, #3" b3ae3fb0 0x000000 (seq (set mulr_a (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set d11 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d4, d5, d11uu, #1" b3b53d40 0x000000 (seq (set mulr_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set d4 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.h d4, d5, d10uu, #0" b3a53c40 0x000000 (seq (set mulr_a (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc1 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word1 (ite (var sc1) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set mulr_a (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc0 (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result_word0 (ite (var sc0) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d4 (append (cast 16 false (& (>> (var result_word1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var result_word0) (bv 32 0x10) false) (bv 32 0xffff))))) (set ov1 (|| (! (ule (var result_word1) (bv 32 0x7fffffff))) (&& (sle (var result_word1) (bv 32 0x80000000)) (! (== (var result_word1) (bv 32 0x80000000)))))) (set ov0 (|| (! (ule (var result_word0) (bv 32 0x7fffffff))) (&& (sle (var result_word0) (bv 32 0x80000000)) (! (== (var result_word0) (bv 32 0x80000000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_word1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word1) (bv 32 0x1e) false) (bv 32 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_word0) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result_word0) (bv 32 0x1e) false) (bv 32 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "mulr.q d7, d11u, d10u, #0" 93ab1870 0x000000 (seq (set mulr_a (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d7 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "mulr.q d13, d13u, d4u, #1" 934d19d0 0x000000 (seq (set mulr_a (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x1) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x1) false) (bv 32 0x8000)))) (set d13 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "mulr.q d15, d9u, d14u, #3" 93e91bf0 0x000000 (seq (set mulr_a (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set d15 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "mulr.q d3, d15l, d9l, #3" 939f1f30 0x000000 (seq (set mulr_a (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x3) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x3) false) (bv 32 0x8000)))) (set d3 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "mulr.q d5, d4l, d4l, #0" 93441c50 0x000000 (seq (set mulr_a (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d5 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "mulr.q d1, d11l, d11l, #0" 93bb1c10 0x000000 (seq (set mulr_a (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set mulr_b (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff))) (set sc (&& (== (var mulr_a) (bv 32 0x8000)) (&& (== (var mulr_b) (bv 32 0x8000)) (== (bv 32 0x0) (bv 32 0x1))))) (set result (ite (var sc) (bv 32 0x7fffffff) (+ (<< (* (var mulr_a) (var mulr_b)) (bv 32 0x0) false) (bv 32 0x8000)))) (set d1 (append (cast 16 false (& (>> (var result) (bv 32 0x10) false) (bv 32 0xffff))) (bv 16 0x0))))
+d "muls d6, d4, #0xe8" 5384ae60 0x000000 (seq (set result (let x (* (var d4) (bv 32 0xe8)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls d1, d3, #-0xf1" 53f3b010 0x000000 (seq (set result (let x (* (var d3) (bv 32 0xffffff0f)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls d9, d10, #-0xcc" 534ab390 0x000000 (seq (set result (let x (* (var d10) (bv 32 0xffffff34)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls d15, d12, d15" 73fc8af0 0x000000 (seq (set result (let x (* (var d12) (var d15)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls d11, d14, d14" 73ee8ab0 0x000000 (seq (set result (let x (* (var d14) (var d14)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls d10, d0, d9" 73908aa0 0x000000 (seq (set result (let x (* (var d0) (var d9)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d13, d0, #-0x18" 53809ed0 0x000000 (seq (set result (let x (* (var d0) (bv 32 0xffffffe8)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d13 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d0, d13, #0xc3" 533d8c00 0x000000 (seq (set result (let x (* (var d13) (bv 32 0xc3)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d8, d4, #0x69" 53948680 0x000000 (seq (set result (let x (* (var d4) (bv 32 0x69)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d6, d2, d9" 73928860 0x000000 (seq (set result (let x (* (var d2) (var d9)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d9, d13, d12" 73cd8890 0x000000 (seq (set result (let x (* (var d13) (var d12)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "muls.u d10, d1, d11" 73b188a0 0x000000 (seq (set result (let x (* (var d1) (var d11)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "nand d6, d14, d12" 0fce9060 0x000000 (set d6 (~ (& (var d14) (var d12))))
+d "nand d7, d7, d11" 0fb79070 0x000000 (set d7 (~ (& (var d7) (var d11))))
+d "nand d12, d9, d12" 0fc990c0 0x000000 (set d12 (~ (& (var d9) (var d12))))
+d "nand d9, d13, #-0x85" 8fbd3791 0x000000 (set d9 (~ (& (var d13) (bv 32 0xffffff7b))))
+d "nand d10, d13, #-0xe1" 8ffd31a1 0x000000 (set d10 (~ (& (var d13) (bv 32 0xffffff1f))))
+d "nand d12, d9, #0xbc" 8fc92bc1 0x000000 (set d12 (~ (& (var d9) (bv 32 0xbc))))
+d "nand.t d5, d3, #0x13, d7, #0x1f" 0773935f 0x000000 (set d5 (ite (! (&& (! (is_zero (& (>> (var d3) (bv 32 0x13) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d7) (bv 32 0x1f) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "nand.t d12, d11, #0x10, d0, #0x1e" 070b10cf 0x000000 (set d12 (ite (! (&& (! (is_zero (& (>> (var d11) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x1e) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "nand.t d11, d1, #0x10, d11, #0x17" 07b190bb 0x000000 (set d11 (ite (! (&& (! (is_zero (& (>> (var d1) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d11) (bv 32 0x17) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d11, d11, d5" 0b5b10b1 0x000000 (set d11 (ite (! (== (var d11) (var d5))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d2, d8, d10" 0ba81021 0x000000 (set d2 (ite (! (== (var d8) (var d10))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d4, d8, d1" 0b181041 0x000000 (set d4 (ite (! (== (var d8) (var d1))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d0, d9, #-0xa1" 8bf93502 0x000000 (set d0 (ite (! (== (var d9) (bv 32 0xffffff5f))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d8, d4, #-0xb9" 8b743482 0x000000 (set d8 (ite (! (== (var d4) (bv 32 0xffffff47))) (bv 32 0x1) (bv 32 0x0)))
+d "ne d13, d7, #-0x4c" 8b473bd2 0x000000 (set d13 (ite (! (== (var d7) (bv 32 0xffffffb4))) (bv 32 0x1) (bv 32 0x0)))
+d "ne.a d8, a7, a5" 01571084 0x000000 (set d8 (ite (! (== (var a7) (var a5))) (bv 32 0x1) (bv 32 0x0)))
+d "ne.a d9, a14, a5" 015e1094 0x000000 (set d9 (ite (! (== (var a14) (var a5))) (bv 32 0x1) (bv 32 0x0)))
+d "ne.a d15, a7, a4" 014710f4 0x000000 (set d15 (ite (! (== (var a7) (var a4))) (bv 32 0x1) (bv 32 0x0)))
+d "nez.a d14, a5" 010590e4 0x000000 (set d14 (ite (! (== (var a5) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
+d "nez.a d12, a6" 010690c4 0x000000 (set d12 (ite (! (== (var a6) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
+d "nez.a d3, a13" 010d9034 0x000000 (set d3 (ite (! (== (var a13) (bv 32 0x0))) (bv 32 0x1) (bv 32 0x0)))
+d "nop" 0000 0x000000 nop
+d "nop" 0000 0x000000 nop
+d "nop" 0000 0x000000 nop
+d "nop" 0d000000 0x000000 nop
+d "nop" 0d000000 0x000000 nop
+d "nop" 0d000000 0x000000 nop
+d "nop" 0000 0x000000 nop
+d "nop" 0000 0x000000 nop
+d "nop" 0000 0x000000 nop
+d "nor d6, d5, d6" 0f65b060 0x000000 (set d6 (~ (| (var d5) (var d6))))
+d "nor d11, d3, d14" 0fe3b0b0 0x000000 (set d11 (~ (| (var d3) (var d14))))
+d "nor d11, d12, d7" 0f7cb0b0 0x000000 (set d11 (~ (| (var d12) (var d7))))
+d "nor d15, d0, #0x2d" 8fd062f1 0x000000 (set d15 (~ (| (var d0) (bv 32 0x2d))))
+d "nor d3, d8, #0x5d" 8fd86531 0x000000 (set d3 (~ (| (var d8) (bv 32 0x5d))))
+d "nor d0, d10, #-0x29" 8f7a7d01 0x000000 (set d0 (~ (| (var d10) (bv 32 0xffffffd7))))
+d "nor.t d4, d15, #0x14, d3, #8" 873f5444 0x000000 (set d4 (ite (! (|| (! (is_zero (& (>> (var d15) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d3) (bv 32 0x8) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "nor.t d15, d9, #2, d13, #0x13" 87d9c2f9 0x000000 (set d15 (ite (! (|| (! (is_zero (& (>> (var d9) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d13) (bv 32 0x13) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "nor.t d6, d1, #0x1f, d10, #0x1f" 87a1df6f 0x000000 (set d6 (ite (! (|| (! (is_zero (& (>> (var d1) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1f) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "not d12" 460c 0x000000 (set d12 (~ (var d12)))
+d "not d5" 4605 0x000000 (set d5 (~ (var d5)))
+d "not d1" 4601 0x000000 (set d1 (~ (var d1)))
+d "or d7, d15" a6f7 0x000000 (set d7 (| (var d7) (var d15)))
+d "or d3, d15" a6f3 0x000000 (set d3 (| (var d3) (var d15)))
+d "or d0, d6" a660 0x000000 (set d0 (| (var d0) (var d6)))
+d "or d15, #0x2e" 962e 0x000000 (set d15 (| (var d15) (bv 32 0x2e)))
+d "or d15, #0x9f" 969f 0x000000 (set d15 (| (var d15) (bv 32 0x9f)))
+d "or d15, #0x3c" 963c 0x000000 (set d15 (| (var d15) (bv 32 0x3c)))
+d "or d11, d1, d0" 0f01a0b0 0x000000 (set d11 (| (var d1) (var d0)))
+d "or d8, d4, d2" 0f24a080 0x000000 (set d8 (| (var d4) (var d2)))
+d "or d12, d14, d1" 0f1ea0c0 0x000000 (set d12 (| (var d14) (var d1)))
+d "or d4, d1, #0x162" 8f215641 0x000000 (set d4 (| (var d1) (bv 32 0x162)))
+d "or d11, d12, #0x13c" 8fcc53b1 0x000000 (set d11 (| (var d12) (bv 32 0x13c)))
+d "or d5, d8, #0x13" 8f384151 0x000000 (set d5 (| (var d8) (bv 32 0x13)))
+d "or d15, #0x95" 9695 0x000000 (set d15 (| (var d15) (bv 32 0x95)))
+d "or.and.t d11, d9, #2, d3, #5" c73982b2 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d9) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d3) (bv 32 0x5) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.and.t d3, d3, #2, d4, #0xa" c7430235 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d3) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0xa) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.and.t d5, d13, #0xb, d15, #0x1c" c7fd0b5e 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d13) (bv 32 0xb) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d15) (bv 32 0x1c) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.andn.t d4, d1, #0x1b, d0, #0x11" c701fb48 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d1) (bv 32 0x1b) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d0) (bv 32 0x11) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.andn.t d15, d15, #0x19, d11, #5" c7bff9f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d15) (bv 32 0x19) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d11) (bv 32 0x5) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.andn.t d7, d6, #0x11, d4, #0x16" c746717b 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (&& (! (is_zero (& (>> (var d6) (bv 32 0x11) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d4) (bv 32 0x16) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d13, d3, d2" 0b2370d2 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d3) (var d2))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d1, d4, d7" 0b747012 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d4) (var d7))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d1, d0, d14" 0be07012 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d0) (var d14))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d14, d10, #-0x13" 8bdafee4 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d10) (bv 32 0xffffffed))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d8, d8, #-0x73" 8bd8f884 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d8) (bv 32 0xffffff8d))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.eq d7, d8, #0x25" 8b58e274 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d8) (bv 32 0x25))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d5, d4, d15" 0bf4b052 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d4) (var d15))) (== (var d4) (var d15)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d3, d9, d7" 0b79b032 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d9) (var d7))) (== (var d9) (var d7)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d13, d8, d4" 0b48b0d2 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d8) (var d4))) (== (var d8) (var d4)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d10, d7, #-0x60" 8b077aa5 0x000000 (set d10 (| (& (var d10) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d7) (bv 32 0xffffffa0))) (== (var d7) (bv 32 0xffffffa0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d10, d5, #-0x9d" 8b3576a5 0x000000 (set d10 (| (& (var d10) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d5) (bv 32 0xffffff63))) (== (var d5) (bv 32 0xffffff63)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge d4, d13, #-0x58" 8b8d7a45 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d13) (bv 32 0xffffffa8))) (== (var d13) (bv 32 0xffffffa8)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d11, d10, d6" 0b6ac0b2 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d10) (var d6))) (== (var d10) (var d6)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d1, d11, d15" 0bfbc012 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d11) (var d15))) (== (var d11) (var d15)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d13, d7, d15" 0bf7c0d2 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d7) (var d15))) (== (var d7) (var d15)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d13, d7, #-0xc2" 8be793d5 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d7) (bv 32 0xffffff3e))) (== (var d7) (bv 32 0xffffff3e)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d13, d4, #-0x48" 8b849bd5 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d4) (bv 32 0xffffffb8))) (== (var d4) (bv 32 0xffffffb8)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ge.u d13, d2, #-0x28" 8b829dd5 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d2) (bv 32 0xffffffd8))) (== (var d2) (bv 32 0xffffffd8)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d13, d7, d5" 0b5790d2 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d7) (var d5)) (! (== (var d7) (var d5))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d6, d13, d7" 0b7d9062 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d13) (var d7)) (! (== (var d13) (var d7))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d11, d7, d14" 0be790b2 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d7) (var d14)) (! (== (var d7) (var d14))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d1, d2, #-0xb7" 8b923415 0x000000 (set d1 (| (& (var d1) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d2) (bv 32 0xffffff49)) (! (== (var d2) (bv 32 0xffffff49))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d4, d9, #-0x76" 8ba93845 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d9) (bv 32 0xffffff8a)) (! (== (var d9) (bv 32 0xffffff8a))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt d7, d6, #-0xf3" 8bd63075 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d6) (bv 32 0xffffff0d)) (! (== (var d6) (bv 32 0xffffff0d))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d3, d8, d1" 0b18a032 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (var d1)) (! (== (var d8) (var d1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d0, d11, d1" 0b1ba002 0x000000 (set d0 (| (& (var d0) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d11) (var d1)) (! (== (var d11) (var d1))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d5, d0, d8" 0b80a052 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d0) (var d8)) (! (== (var d0) (var d8))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d5, d8, #-0xd0" 8b085355 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (bv 32 0xffffff30)) (! (== (var d8) (bv 32 0xffffff30))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d5, d2, #0x4c" 8bc24455 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d2) (bv 32 0x4c)) (! (== (var d2) (bv 32 0x4c))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.lt.u d12, d11, #-0x3e" 8b2b5cc5 0x000000 (set d12 (| (& (var d12) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d11) (bv 32 0xffffffc2)) (! (== (var d11) (bv 32 0xffffffc2))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d2, d14, d0" 0b0e8022 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d14) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d15, d12, d2" 0b2c80f2 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d12) (var d2)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d4, d9, d13" 0bd98042 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d9) (var d13)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d14, d10, #0xf5" 8b5a0fe5 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d10) (bv 32 0xf5)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d4, d8, #0x82" 8b280845 0x000000 (set d4 (| (& (var d4) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d8) (bv 32 0x82)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.ne d9, d8, #0xd7" 8b780d95 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d8) (bv 32 0xd7)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.nor.t d8, d10, #0x18, d4, #0xc" c74a5886 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d10) (bv 32 0x18) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0xc) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.nor.t d13, d7, #0x1f, d8, #0x1d" c787dfde 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d7) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0x1d) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.nor.t d10, d9, #0xe, d4, #0x15" c749ceaa 0x000000 (set d10 (| (& (var d10) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1)))) (! (|| (! (is_zero (& (>> (var d9) (bv 32 0xe) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x15) false) (bv 32 0x1))))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.or.t d12, d0, #0x18, d5, #4" c75038c2 0x000000 (set d12 (| (& (var d12) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d0) (bv 32 0x18) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d5) (bv 32 0x4) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.or.t d8, d4, #0x1f, d5, #0x1d" c754bf8e 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d4) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d5) (bv 32 0x1d) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.or.t d8, d11, #0x14, d0, #5" c70bb482 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (|| (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var d11) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x5) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "or.t d7, d0, #0x1b, d10, #0x1d" 87a0bb7e 0x000000 (set d7 (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x1b) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1d) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "or.t d6, d8, #0, d10, #0x1e" 87a8206f 0x000000 (set d6 (ite (|| (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1e) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "or.t d15, d6, #0x10, d14, #0x13" 87e6b0f9 0x000000 (set d15 (ite (|| (! (is_zero (& (>> (var d6) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d14) (bv 32 0x13) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "or.t d9, d3, #6, d12, #0" 87c32690 0x000000 (set d9 (ite (|| (! (is_zero (& (>> (var d3) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "orn d5, d7, d7" 0f77f050 0x000000 (set d5 (| (var d7) (~ (var d7))))
+d "orn d12, d13, d11" 0fbdf0c0 0x000000 (set d12 (| (var d13) (~ (var d11))))
+d "orn d13, d11, d6" 0f6bf0d0 0x000000 (set d13 (| (var d11) (~ (var d6))))
+d "orn d14, d15, #-0x73" 8fdff8e1 0x000000 (set d14 (| (var d15) (~ (bv 32 0xffffff8d))))
+d "orn d14, d15, #0x6a" 8fafe6e1 0x000000 (set d14 (| (var d15) (~ (bv 32 0x6a))))
+d "orn d7, d10, #-0xdb" 8f5af271 0x000000 (set d7 (| (var d10) (~ (bv 32 0xffffff25))))
+d "orn.t d3, d5, #2, d9, #2" 07952231 0x000000 (set d3 (ite (|| (! (is_zero (& (>> (var d5) (bv 32 0x2) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d9) (bv 32 0x2) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "orn.t d4, d13, #0x17, d9, #0x13" 079db749 0x000000 (set d4 (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x17) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d9) (bv 32 0x13) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "orn.t d9, d12, #0x10, d3, #0x1d" 073cb09e 0x000000 (set d9 (ite (|| (! (is_zero (& (>> (var d12) (bv 32 0x10) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d3) (bv 32 0x1d) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "pack d13, e4, d11" 6b0b00d5 0x000000 (seq (set int_exp (var d5)) (set int_mant (var d4)) (set flag_rnd (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x7) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x0) false) (bv 32 0x7f)))) (! (is_zero (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1)))))))) (set fp_exp (ite (|| (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f))))) (bv 32 0xff) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x17) false) (bv 32 0xff))))))) (set fp_frac (ite (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff)) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f)))) (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0)))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x0) false) (bv 32 0x7fffff))))))) (set d13 (| (<< (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x1f) false) (| (<< (var fp_exp) (bv 32 0x17) false) (var fp_frac)))))
+d "pack d12, e12, d6" 6b0600cc 0x000000 (seq (set int_exp (var d13)) (set int_mant (var d12)) (set flag_rnd (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x7) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x0) false) (bv 32 0x7f)))) (! (is_zero (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1)))))))) (set fp_exp (ite (|| (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f))))) (bv 32 0xff) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x17) false) (bv 32 0xff))))))) (set fp_frac (ite (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff)) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f)))) (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0)))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x0) false) (bv 32 0x7fffff))))))) (set d12 (| (<< (& (>> (var d6) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x1f) false) (| (<< (var fp_exp) (bv 32 0x17) false) (var fp_frac)))))
+d "pack d3, e0, d7" 6b070031 0x000000 (seq (set int_exp (var d1)) (set int_mant (var d0)) (set flag_rnd (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x7) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x1)))) (|| (! (is_zero (& (>> (var int_mant) (bv 32 0x0) false) (bv 32 0x7f)))) (! (is_zero (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1)))))))) (set fp_exp (ite (|| (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f))))) (bv 32 0xff) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x17) false) (bv 32 0xff))))))) (set fp_frac (ite (&& (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (== (bv 32 0xff) (var int_exp))) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff)) (ite (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (|| (! (sle (var int_exp) (bv 32 0x7f))) (== (var int_exp) (bv 32 0x7f)))) (|| (&& (! (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1)))) (sle (var int_exp) (bv 32 0xffffff80))) (== (var int_mant) (bv 32 0x0)))) (bv 32 0x0) (let temp_exp (ite (is_zero (& (>> (var int_mant) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) (+ (var int_exp) (bv 32 0x80))) (let fp_exp_frac (+ (| (<< (& (>> (var temp_exp) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0x17) false) (& (>> (var int_mant) (bv 32 0x8) false) (bv 32 0x7fffff))) (ite (var flag_rnd) (bv 32 0x1) (bv 32 0x0))) (& (>> (var fp_exp_frac) (bv 32 0x0) false) (bv 32 0x7fffff))))))) (set d3 (| (<< (& (>> (var d7) (bv 32 0x1f) false) (bv 32 0x1)) (bv 32 0x1f) false) (| (<< (var fp_exp) (bv 32 0x17) false) (var fp_frac)))))
+d "parity d13, d10" 4b0a20d0 0x000000 (set d13 (let _31_24 (ite (^^ (^^ (! (is_zero (& (>> (var d10) (bv 32 0x18) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x19) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x1a) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1b) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x1c) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x1d) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1f) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _23_16 (ite (^^ (^^ (! (is_zero (& (>> (var d10) (bv 32 0x10) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x11) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x12) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x13) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x14) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x15) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x17) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _15_8 (ite (^^ (^^ (! (is_zero (& (>> (var d10) (bv 32 0x8) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x9) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0xa) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0xb) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0xc) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0xd) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0xe) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0xf) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _7_0 (ite (^^ (^^ (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x1) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x3) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x4) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x5) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d10) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x7) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (append (append (var _31_24) (var _23_16)) (append (var _15_8) (var _7_0))))))))
+d "parity d0, d12" 4b0c2000 0x000000 (set d0 (let _31_24 (ite (^^ (^^ (! (is_zero (& (>> (var d12) (bv 32 0x18) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x19) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x1a) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x1b) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x1c) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x1d) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x1f) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _23_16 (ite (^^ (^^ (! (is_zero (& (>> (var d12) (bv 32 0x10) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x11) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x12) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x13) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x14) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x15) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x17) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _15_8 (ite (^^ (^^ (! (is_zero (& (>> (var d12) (bv 32 0x8) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x9) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0xa) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0xb) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0xc) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0xd) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0xe) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0xf) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _7_0 (ite (^^ (^^ (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x1) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x3) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x4) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x5) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d12) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d12) (bv 32 0x7) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (append (append (var _31_24) (var _23_16)) (append (var _15_8) (var _7_0))))))))
+d "parity d14, d4" 4b0420e0 0x000000 (set d14 (let _31_24 (ite (^^ (^^ (! (is_zero (& (>> (var d4) (bv 32 0x18) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x19) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x1a) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x1b) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x1c) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x1d) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x1f) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _23_16 (ite (^^ (^^ (! (is_zero (& (>> (var d4) (bv 32 0x10) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x11) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x12) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x13) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x14) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x15) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x17) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _15_8 (ite (^^ (^^ (! (is_zero (& (>> (var d4) (bv 32 0x8) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x9) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0xa) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0xb) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0xc) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0xd) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0xe) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0xf) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (let _7_0 (ite (^^ (^^ (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x1) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x2) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x3) false) (bv 32 0x1))))))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x4) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x5) false) (bv 32 0x1)))) (^^ (! (is_zero (& (>> (var d4) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0x7) false) (bv 32 0x1)))))))) (bv 8 0x1) (bv 8 0x0)) (append (append (var _31_24) (var _23_16)) (append (var _15_8) (var _7_0))))))))
+d "q31tof d12, d4, d10" 4ba451c1 0x000000 (seq (set _a (var d4)) (set _qa (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _qa (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _qa (+. rne (var _qa) (var _b))) nop))) (set _precise_result (*. rne (var _qa) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d10) (bv 32 0x1ff)) )))) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d12 (fbits (var _result))) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (var _result))) (|| (<. (var _precise_result) (var _result)) (<. (var _result) (var _precise_result))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 0 (bv 32 0x400000) )))) (<. (fpos (var _precise_result)) (float 0 (bv 32 0x400000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "q31tof d14, d13, d13" 4bdd51e1 0x000000 (seq (set _a (var d13)) (set _qa (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _qa (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _qa (+. rne (var _qa) (var _b))) nop))) (set _precise_result (*. rne (var _qa) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d13) (bv 32 0x1ff)) )))) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d14 (fbits (var _result))) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (var _result))) (|| (<. (var _precise_result) (var _result)) (<. (var _result) (var _precise_result))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 0 (bv 32 0x400000) )))) (<. (fpos (var _precise_result)) (float 0 (bv 32 0x400000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "q31tof d6, d11, d12" 4bcb5161 0x000000 (seq (set _a (var d11)) (set _qa (float 0 (bv 32 0x0) )) (set _x (var _a)) (set _i (bv 32 0x0)) (set _qa (ite (msb (var _x)) (float 0 (bv 32 0xbf800000) ) (float 0 (bv 32 0x0) ))) (repeat (&& (ule (var _i) (bv 32 0x1f)) (! (== (var _i) (bv 32 0x1f)))) (seq (set _i (+ (var _i) (bv 32 0x1))) (set _m (<< (bv 32 0x1) (- (bv 32 0x1e) (var _i)) false)) (set _b (/. rne (float 0 (bv 32 0x3f800000) ) (float 0 (<< (bv 32 0x2) (var _i) false) ))) (branch (! (is_zero (& (var _x) (var _m)))) (set _qa (+. rne (var _qa) (var _b))) nop))) (set _precise_result (*. rne (var _qa) (pow rne (float 0 (bv 32 0x40000000) ) (float 0 (& (var d12) (bv 32 0x1ff)) )))) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _precise_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d6 (fbits (var _result))) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (var _result))) (|| (<. (var _precise_result) (var _result)) (<. (var _result) (var _precise_result))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 0 (bv 32 0x400000) )))) (<. (fpos (var _precise_result)) (float 0 (bv 32 0x400000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "qseed.f d3, d9" 4b099131 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d9) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _normal_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (frsqrt rne (var _arg_a)) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (is_fzero (var _arg_a)) (float 0 (bv 32 0x0) ) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) ))) (float 0 (bv 32 0x7f800001) ) (var _normal_result)))) (set d3 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FI) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "qseed.f d0, d11" 4b0b9101 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d11) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _normal_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (frsqrt rne (var _arg_a)) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (is_fzero (var _arg_a)) (float 0 (bv 32 0x0) ) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) ))) (float 0 (bv 32 0x7f800001) ) (var _normal_result)))) (set d0 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FI) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "qseed.f d5, d1" 4b019151 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d1) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _normal_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (frsqrt rne (var _arg_a)) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (is_fzero (var _arg_a)) (float 0 (bv 32 0x0) ) (ite (&& (! (|| (is_nan (var _fa)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var _fa) (float 1 (bv 64 0x0) ))) (float 0 (bv 32 0x7f800001) ) (var _normal_result)))) (set d5 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _result)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FI) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "restore d2" 0d028003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false)))
+d "restore d5" 0d058003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false)))
+d "restore d15" 0d0f8003 0x000000 (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false)))
+d "ret" 0090 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0090 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0090 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0d008001 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0d008001 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0d008001 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0092 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "ret" 0091 0x000000 (seq (branch (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1)))) (branch (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (seq (set CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f))) (set CDC_COUNT (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0))))))))) (set CDC_i (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (bv 32 0x6) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (bv 32 0x5) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (bv 32 0x4) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (bv 32 0x3) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (bv 32 0x2) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (bv 32 0x1) (bv 32 0x0))))))))) (set PSW (| (& (var PSW) (~ (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false))) (& (<< (- (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x1)) (bv 32 0x0) false) (<< (>> (bv 32 0xffffffff) (- (bv 32 0x20) (var CDC_i)) false) (bv 32 0x0) false)))) (branch (== (var CDC_COUNT) (bv 32 0x0)) nop nop)) nop) nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set new_PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (set PSW (| (& (>> (var new_PSW) (bv 32 0x1a) false) (bv 32 0x3f)) (| (& (>> (var new_PSW) (bv 32 0x0) false) (bv 32 0xffffff)) (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))))) (jmp (var PC)))
+d "rfe" 0080 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfe" 0080 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfe" 0080 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfe" 0d00c001 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfe" 0d00c001 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfe" 0d00c001 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (is_zero (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1))) nop nop) (branch (&& (! (|| (== (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (bv 32 0x7f)) (== (let CDC (& (>> (var PSW) (bv 32 0x0) false) (bv 32 0x7f)) (ite (== (& (>> (var CDC) (bv 32 0x6) false) (bv 32 0x1)) (bv 32 0x0)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3f)) (ite (== (& (>> (var CDC) (bv 32 0x5) false) (bv 32 0x3)) (bv 32 0x2)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1f)) (ite (== (& (>> (var CDC) (bv 32 0x4) false) (bv 32 0x7)) (bv 32 0x6)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0xf)) (ite (== (& (>> (var CDC) (bv 32 0x3) false) (bv 32 0xf)) (bv 32 0xe)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x7)) (ite (== (& (>> (var CDC) (bv 32 0x2) false) (bv 32 0x1f)) (bv 32 0x1e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x3)) (ite (== (& (>> (var CDC) (bv 32 0x1) false) (bv 32 0x3f)) (bv 32 0x3e)) (& (>> (var CDC) (bv 32 0x0) false) (bv 32 0x1)) (bv 32 0x0)))))))) (bv 32 0x0)))) (! (is_zero (& (>> (var PSW) (bv 32 0x7) false) (bv 32 0x1))))) nop nop) (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (let _pcxi_pcxs (& (>> (var PCXI) (bv 32 0x10) false) (bv 32 0xf)) (let _pcxi_pcxo (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xffff)) (| (<< (var _pcxi_pcxo) (bv 32 0x6) false) (<< (var _pcxi_pcxs) (bv 32 0x1c) false))))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set d8 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set d9 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d10 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d11 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set a12 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set a13 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a14 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a15 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set d12 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set d13 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d14 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d15 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)) (jmp (var PC)))
+d "rfm" 0d004001 0x000000 (seq (branch (! (== (& (>> (var PSW) (bv 32 0xa) false) (bv 32 0x3)) (bv 32 0x2))) nop nop) (branch (! (is_zero (& (>> (var DBGSR) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (var DCX)) (set PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x2)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x1)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (set DBGTCR (| (& (var DBGTCR) (bv 32 0xfffffffe)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x0) false)))) nop))
+d "rfm" 0d004001 0x000000 (seq (branch (! (== (& (>> (var PSW) (bv 32 0xa) false) (bv 32 0x3)) (bv 32 0x2))) nop nop) (branch (! (is_zero (& (>> (var DBGSR) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (var DCX)) (set PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x2)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x1)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (set DBGTCR (| (& (var DBGTCR) (bv 32 0xfffffffe)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x0) false)))) nop))
+d "rfm" 0d004001 0x000000 (seq (branch (! (== (& (>> (var PSW) (bv 32 0xa) false) (bv 32 0x3)) (bv 32 0x2))) nop nop) (branch (! (is_zero (& (>> (var DBGSR) (bv 32 0x0) false) (bv 32 0x1)))) (seq (set PC (& (var a11) (bv 32 0xfffffffe))) (set ICR (| (& (var ICR) (bv 32 0xfffffeff)) (<< (& (& (>> (var PCXI) (bv 32 0x15) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x8) false))) (set ICR (| (& (var ICR) (bv 32 0xffffff00)) (<< (& (& (>> (var PCXI) (bv 32 0x16) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x0) false))) (set EA (var DCX)) (set PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3)))) (set PSW (loadw 0 32 (+ (var EA) (bv 32 0x2)))) (set a10 (loadw 0 32 (+ (var EA) (bv 32 0x1)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x0)))) (set DBGTCR (| (& (var DBGTCR) (bv 32 0xfffffffe)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x0) false)))) nop))
+d "rslcx" 0d004002 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (== (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x1)) nop nop) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set d7 (loadw 0 32 (var EA))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d4 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)))
+d "rslcx" 0d004002 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (== (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x1)) nop nop) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set d7 (loadw 0 32 (var EA))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d4 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)))
+d "rslcx" 0d004002 0x000000 (seq (branch (is_zero (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff))) nop nop) (branch (== (& (>> (var PCXI) (bv 32 0x14) false) (bv 32 0x1)) (bv 32 0x1)) nop nop) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set d7 (loadw 0 32 (var EA))) (set d6 (loadw 0 32 (+ (var EA) (bv 32 0x4)))) (set d5 (loadw 0 32 (+ (var EA) (bv 32 0x8)))) (set d4 (loadw 0 32 (+ (var EA) (bv 32 0xc)))) (set a7 (loadw 0 32 (+ (var EA) (bv 32 0x10)))) (set a6 (loadw 0 32 (+ (var EA) (bv 32 0x14)))) (set a5 (loadw 0 32 (+ (var EA) (bv 32 0x18)))) (set a4 (loadw 0 32 (+ (var EA) (bv 32 0x1c)))) (set d3 (loadw 0 32 (+ (var EA) (bv 32 0x20)))) (set d2 (loadw 0 32 (+ (var EA) (bv 32 0x24)))) (set d1 (loadw 0 32 (+ (var EA) (bv 32 0x28)))) (set d0 (loadw 0 32 (+ (var EA) (bv 32 0x2c)))) (set a3 (loadw 0 32 (+ (var EA) (bv 32 0x30)))) (set a2 (loadw 0 32 (+ (var EA) (bv 32 0x34)))) (set a11 (loadw 0 32 (+ (var EA) (bv 32 0x38)))) (set new_PCXI (loadw 0 32 (+ (var EA) (bv 32 0x3c)))) (storew 0 (var EA) (var FCX)) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var PCXI) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set PCXI (var new_PCXI)))
+d "rstv" 2f000000 0x000000 (seq (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1d) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1b) false))))
+d "rstv" 2f000000 0x000000 (seq (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1d) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1b) false))))
+d "rstv" 2f000000 0x000000 (seq (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1d) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1c) false))) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x1b) false))))
+d "rsub d9, d11, #0xea" 8bab0e91 0x000000 (set d9 (- (bv 32 0xea) (var d11)))
+d "rsub d2, d7, #0xf6" 8b670f21 0x000000 (set d2 (- (bv 32 0xf6) (var d7)))
+d "rsub d3, d3, #-0x98" 8b831631 0x000000 (set d3 (- (bv 32 0xffffff68) (var d3)))
+d "rsubs d12, d3, #-0x5b" 8b535ac1 0x000000 (set d12 (let x (- (bv 32 0xffffffa5) (var d3)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "rsubs d14, d12, #-0x81" 8bfc57e1 0x000000 (set d14 (let x (- (bv 32 0xffffff7f) (var d12)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "rsubs d3, d6, #-0x3b" 8b565c31 0x000000 (set d3 (let x (- (bv 32 0xffffffc5) (var d6)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x))))))))
+d "rsubs.u d7, d4, #0x51" 8b146571 0x000000 (set d7 (let x (- (bv 32 0x51) (var d4)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x)))))))
+d "rsubs.u d6, d14, #-0x30" 8b0e7d61 0x000000 (set d6 (let x (- (bv 32 0xffffffd0) (var d14)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x)))))))
+d "rsubs.u d0, d14, #0xa" 8bae6001 0x000000 (set d0 (let x (- (bv 32 0xa) (var d14)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x)))))))
+d "sat.b d7" 3207 0x000000 (set d7 (let sat_neg (ite (&& (sle (var d7) (bv 32 0xffffff80)) (! (== (var d7) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d7)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.b d11" 320b 0x000000 (set d11 (let sat_neg (ite (&& (sle (var d11) (bv 32 0xffffff80)) (! (== (var d11) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d11)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.b d6" 3206 0x000000 (set d6 (let sat_neg (ite (&& (sle (var d6) (bv 32 0xffffff80)) (! (== (var d6) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d6)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.b d13, d10" 0b0ae0d5 0x000000 (set d13 (let sat_neg (ite (&& (sle (var d10) (bv 32 0xffffff80)) (! (== (var d10) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d10)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.b d10, d12" 0b0ce0a5 0x000000 (set d10 (let sat_neg (ite (&& (sle (var d12) (bv 32 0xffffff80)) (! (== (var d12) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d12)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.b d3, d8" 0b08e035 0x000000 (set d3 (let sat_neg (ite (&& (sle (var d8) (bv 32 0xffffff80)) (! (== (var d8) (bv 32 0xffffff80)))) (bv 32 0xffffff80) (var d8)) (ite (! (sle (var sat_neg) (bv 32 0x7f))) (bv 32 0x7f) (var sat_neg))))
+d "sat.bu d0" 3210 0x000000 (set d0 (ite (! (sle (var d0) (bv 32 0xff))) (bv 32 0xff) (var d0)))
+d "sat.bu d0" 3210 0x000000 (set d0 (ite (! (sle (var d0) (bv 32 0xff))) (bv 32 0xff) (var d0)))
+d "sat.bu d3" 3213 0x000000 (set d3 (ite (! (sle (var d3) (bv 32 0xff))) (bv 32 0xff) (var d3)))
+d "sat.bu d15, d0" 0b00f0f5 0x000000 (set d15 (ite (! (sle (var d0) (bv 32 0xff))) (bv 32 0xff) (var d0)))
+d "sat.bu d3, d4" 0b04f035 0x000000 (set d3 (ite (! (sle (var d4) (bv 32 0xff))) (bv 32 0xff) (var d4)))
+d "sat.bu d5, d10" 0b0af055 0x000000 (set d5 (ite (! (sle (var d10) (bv 32 0xff))) (bv 32 0xff) (var d10)))
+d "sat.h d1" 3221 0x000000 (set d1 (let sat_neg (ite (&& (sle (var d1) (bv 32 0xffff8000)) (! (== (var d1) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d1)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.h d10" 322a 0x000000 (set d10 (let sat_neg (ite (&& (sle (var d10) (bv 32 0xffff8000)) (! (== (var d10) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d10)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.h d8" 3228 0x000000 (set d8 (let sat_neg (ite (&& (sle (var d8) (bv 32 0xffff8000)) (! (== (var d8) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d8)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.h d1, d5" 0b05e017 0x000000 (set d1 (let sat_neg (ite (&& (sle (var d5) (bv 32 0xffff8000)) (! (== (var d5) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d5)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.h d12, d12" 0b0ce0c7 0x000000 (set d12 (let sat_neg (ite (&& (sle (var d12) (bv 32 0xffff8000)) (! (== (var d12) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d12)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.h d8, d1" 0b01e087 0x000000 (set d8 (let sat_neg (ite (&& (sle (var d1) (bv 32 0xffff8000)) (! (== (var d1) (bv 32 0xffff8000)))) (bv 32 0xffff8000) (var d1)) (ite (! (sle (var sat_neg) (bv 32 0x7fff))) (bv 32 0x7fff) (var sat_neg))))
+d "sat.hu d3" 3233 0x000000 (set d3 (ite (! (sle (var d3) (bv 32 0xffff))) (bv 32 0xffff) (var d3)))
+d "sat.hu d8" 3238 0x000000 (set d8 (ite (! (sle (var d8) (bv 32 0xffff))) (bv 32 0xffff) (var d8)))
+d "sat.hu d3" 3233 0x000000 (set d3 (ite (! (sle (var d3) (bv 32 0xffff))) (bv 32 0xffff) (var d3)))
+d "sat.hu d5, d11" 0b0bf057 0x000000 (set d5 (ite (! (sle (var d11) (bv 32 0xffff))) (bv 32 0xffff) (var d11)))
+d "sat.hu d7, d2" 0b02f077 0x000000 (set d7 (ite (! (sle (var d2) (bv 32 0xffff))) (bv 32 0xffff) (var d2)))
+d "sat.hu d13, d15" 0b0ff0d7 0x000000 (set d13 (ite (! (sle (var d15) (bv 32 0xffff))) (bv 32 0xffff) (var d15)))
+d "sel d15, d7, d5, d4" 2b4540f7 0x000000 (set d15 (ite (! (is_zero (var d7))) (var d5) (var d4)))
+d "sel d10, d7, d13, d6" 2b6d40a7 0x000000 (set d10 (ite (! (is_zero (var d7))) (var d13) (var d6)))
+d "sel d13, d3, d13, d14" 2bed40d3 0x000000 (set d13 (ite (! (is_zero (var d3))) (var d13) (var d14)))
+d "sel d9, d5, d7, #-0xd6" aba79295 0x000000 (set d9 (ite (! (is_zero (var d5))) (var d7) (bv 32 0xffffff2a)))
+d "sel d0, d2, d12, #0x9b" abbc8902 0x000000 (set d0 (ite (! (is_zero (var d2))) (var d12) (bv 32 0x9b)))
+d "sel d3, d13, d11, #-0x81" abfb973d 0x000000 (set d3 (ite (! (is_zero (var d13))) (var d11) (bv 32 0xffffff7f)))
+d "seln d12, d6, d14, d11" 2bbe50c6 0x000000 (set d12 (ite (is_zero (var d6)) (var d14) (var d11)))
+d "seln d11, d0, d3, d6" 2b6350b0 0x000000 (set d11 (ite (is_zero (var d0)) (var d3) (var d6)))
+d "seln d0, d4, d10, d2" 2b2a5004 0x000000 (set d0 (ite (is_zero (var d4)) (var d10) (var d2)))
+d "seln d5, d7, d5, #0x68" ab85a657 0x000000 (set d5 (ite (is_zero (var d7)) (var d5) (bv 32 0x68)))
+d "seln d3, d4, d6, #0x17" ab76a134 0x000000 (set d3 (ite (is_zero (var d4)) (var d6) (bv 32 0x17)))
+d "seln d3, d6, d2, #0x58" ab82a536 0x000000 (set d3 (ite (is_zero (var d6)) (var d2) (bv 32 0x58)))
+d "sh d8, #-2" 06e8 0x000000 (set d8 (let sh_c (bv 32 0xfffffffe) (let sh_x (var d8) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d10, #-6" 06aa 0x000000 (set d10 (let sh_c (bv 32 0xfffffffa) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d11, #-4" 06cb 0x000000 (set d11 (let sh_c (bv 32 0xfffffffc) (let sh_x (var d11) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d12, #0" 060c 0x000000 (set d12 (let sh_c (bv 32 0x0) (let sh_x (var d12) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d2, #4" 0642 0x000000 (set d2 (let sh_c (bv 32 0x4) (let sh_x (var d2) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d8, #7" 0678 0x000000 (set d8 (let sh_c (bv 32 0x7) (let sh_x (var d8) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d6, d13, d5" 0f5d0060 0x000000 (set d6 (let sh_c (let _sext_val (cast 32 (msb (var d5)) (var d5)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d13) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d14, d5, d6" 0f6500e0 0x000000 (set d14 (let sh_c (let _sext_val (cast 32 (msb (var d6)) (var d6)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d5) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d0, d11, d2" 0f2b0000 0x000000 (set d0 (let sh_c (let _sext_val (cast 32 (msb (var d2)) (var d2)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d11) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d4, d7, #-0xa7" 8f971540 0x000000 (set d4 (let sh_c (bv 32 0x19) (let sh_x (var d7) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d6, d2, #-0xb4" 8fc21460 0x000000 (set d6 (let sh_c (bv 32 0xc) (let sh_x (var d2) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d7, d0, #-0x66" 8fa01970 0x000000 (set d7 (let sh_c (bv 32 0x1a) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d5, d14, #0xee" 8fee0e50 0x000000 (set d5 (let sh_c (bv 32 0xffffffee) (let sh_x (var d14) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d15, d10, #0xe0" 8f0a0ef0 0x000000 (set d15 (let sh_c (bv 32 0xffffffe0) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d5, d10, #0x3a" 8faa0350 0x000000 (set d5 (let sh_c (bv 32 0xfffffffa) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh d10, #7" 067a 0x000000 (set d10 (let sh_c (bv 32 0x7) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false)))))
+d "sh.and.t d2, d6, #0x10, d14, #0x18" 27e6102c 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d6) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d14) (bv 32 0x18) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.and.t d15, d14, #0x14, d2, #0x1f" 272e94ff 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d14) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d2) (bv 32 0x1f) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.and.t d1, d12, #6, d6, #1" 276c8610 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d12) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d6) (bv 32 0x1) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.andn.t d8, d11, #0x1f, d8, #0xe" 278b7f87 0x000000 (set d8 (| (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d11) (bv 32 0x1f) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d8) (bv 32 0xe) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.andn.t d1, d2, #0xf, d3, #7" 2732ef13 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d2) (bv 32 0xf) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d3) (bv 32 0x7) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.andn.t d15, d5, #0xb, d2, #0x19" 2725ebfc 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (! (is_zero (& (>> (var d5) (bv 32 0xb) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d2) (bv 32 0x19) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d2, d11, d3" 0b3b7023 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d11) (var d3)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d3, d12, d6" 0b6c7033 0x000000 (set d3 (| (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d12) (var d6)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d1, d14, d5" 0b5e7013 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d14) (var d5)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d9, d7, #0xcd" 8bd7ec96 0x000000 (set d9 (| (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d7) (bv 32 0xcd)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d3, d3, #-0xbf" 8b13f436 0x000000 (set d3 (| (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d3) (bv 32 0xffffff41)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.eq d2, d0, #-0x100" 8b00f026 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (== (var d0) (bv 32 0xffffff00)) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d15, d7, d6" 0b67b0f3 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d7) (var d6))) (== (var d7) (var d6))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d6, d6, d4" 0b46b063 0x000000 (set d6 (| (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d6) (var d4))) (== (var d6) (var d4))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d9, d2, d9" 0b92b093 0x000000 (set d9 (| (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d2) (var d9))) (== (var d2) (var d9))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d1, d4, #0x44" 8b446417 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d4) (bv 32 0x44))) (== (var d4) (bv 32 0x44))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d10, d8, #0x4c" 8bc864a7 0x000000 (set d10 (| (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d8) (bv 32 0x4c))) (== (var d8) (bv 32 0x4c))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge d12, d6, #0x52" 8b2665c7 0x000000 (set d12 (| (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (sle (var d6) (bv 32 0x52))) (== (var d6) (bv 32 0x52))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d1, d4, d5" 0b54c013 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d4) (var d5))) (== (var d4) (var d5))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d13, d7, d2" 0b27c0d3 0x000000 (set d13 (| (<< (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d7) (var d2))) (== (var d7) (var d2))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d7, d1, d6" 0b61c073 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d1) (var d6))) (== (var d1) (var d6))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d1, d2, #0x5a" 8ba28517 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d2) (bv 32 0x5a))) (== (var d2) (bv 32 0x5a))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d7, d15, #-7" 8b9f9f77 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d15) (bv 32 0xfffffff9))) (== (var d15) (bv 32 0xfffffff9))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ge.u d5, d1, #0xea" 8ba18e57 0x000000 (set d5 (| (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (ule (var d1) (bv 32 0xea))) (== (var d1) (bv 32 0xea))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.h d6, d3, d14" 0fe30064 0x000000 (set d6 (let shift_count (let _sext_val (cast 32 (msb (var d14)) (var d14)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.h d14, d12, d1" 0f1c00e4 0x000000 (set d14 (let shift_count (let _sext_val (cast 32 (msb (var d1)) (var d1)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.h d4, d1, d3" 0f310044 0x000000 (set d4 (let shift_count (let _sext_val (cast 32 (msb (var d3)) (var d3)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.h d9, d4, #0xb8" 8f840b98 0x000000 (set d9 (let shift_count (bv 32 0xfffffff8) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.h d2, d15, #-0xd1" 8fff1228 0x000000 (set d2 (let shift_count (bv 32 0xffffffef) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.h d14, d11, #-0x78" 8f8b18e8 0x000000 (set d14 (let shift_count (bv 32 0x8) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) false))))))))
+d "sh.lt d11, d3, d13" 0bd390b3 0x000000 (set d11 (| (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d3) (var d13)) (! (== (var d3) (var d13)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt d8, d8, d6" 0b689083 0x000000 (set d8 (| (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d8) (var d6)) (! (== (var d8) (var d6)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt d2, d2, d3" 0b329023 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d2) (var d3)) (! (== (var d2) (var d3)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt d12, d3, #0x98" 8b8329c7 0x000000 (set d12 (| (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d3) (bv 32 0x98)) (! (== (var d3) (bv 32 0x98)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt d5, d15, #0x6d" 8bdf2657 0x000000 (set d5 (| (<< (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d15) (bv 32 0x6d)) (! (== (var d15) (bv 32 0x6d)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt d7, d1, #-0xc9" 8b713377 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (sle (var d1) (bv 32 0xffffff37)) (! (== (var d1) (bv 32 0xffffff37)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d10, d12, d1" 0b1ca0a3 0x000000 (set d10 (| (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d12) (var d1)) (! (== (var d12) (var d1)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d14, d2, d12" 0bc2a0e3 0x000000 (set d14 (| (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d2) (var d12)) (! (== (var d2) (var d12)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d8, d13, d11" 0bbda083 0x000000 (set d8 (| (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d13) (var d11)) (! (== (var d13) (var d11)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d10, d7, #-0x46" 8ba75ba7 0x000000 (set d10 (| (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d7) (bv 32 0xffffffba)) (! (== (var d7) (bv 32 0xffffffba)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d7, d13, #-0x54" 8bcd5a77 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d13) (bv 32 0xffffffac)) (! (== (var d13) (bv 32 0xffffffac)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.lt.u d3, d0, #0xe5" 8b504e37 0x000000 (set d3 (| (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (&& (ule (var d0) (bv 32 0xe5)) (! (== (var d0) (bv 32 0xe5)))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nand.t d7, d11, #0x17, d8, #7" a78b9773 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (&& (! (is_zero (& (>> (var d11) (bv 32 0x17) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0x7) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nand.t d0, d13, #8, d10, #7" a7ad8803 0x000000 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (&& (! (is_zero (& (>> (var d13) (bv 32 0x8) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x7) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nand.t d15, d9, #7, d2, #0" a72907f0 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (&& (! (is_zero (& (>> (var d9) (bv 32 0x7) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d3, d13, d5" 0b5d8033 0x000000 (set d3 (| (<< (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d13) (var d5))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d11, d9, d14" 0be980b3 0x000000 (set d11 (| (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d9) (var d14))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d9, d9, d7" 0b798093 0x000000 (set d9 (| (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d9) (var d7))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d2, d10, #-0x99" 8b7a1627 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d10) (bv 32 0xffffff67))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d9, d15, #-2" 8bef1f97 0x000000 (set d9 (| (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d15) (bv 32 0xfffffffe))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.ne d6, d8, #0xec" 8bc80e67 0x000000 (set d6 (| (<< (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (== (var d8) (bv 32 0xec))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nor.t d10, d15, #0x1e, d11, #4" 27bf5ea2 0x000000 (set d10 (| (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (|| (! (is_zero (& (>> (var d15) (bv 32 0x1e) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d11) (bv 32 0x4) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nor.t d15, d5, #6, d0, #3" 2705c6f1 0x000000 (set d15 (| (<< (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (|| (! (is_zero (& (>> (var d5) (bv 32 0x6) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x3) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.nor.t d12, d1, #0xb, d8, #1" 2781cbc0 0x000000 (set d12 (| (<< (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (|| (! (is_zero (& (>> (var d1) (bv 32 0xb) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0x1) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.or.t d4, d12, #0x15, d4, #0xe" 274c3547 0x000000 (set d4 (| (<< (& (>> (var d4) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d12) (bv 32 0x15) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d4) (bv 32 0xe) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.or.t d1, d13, #0x17, d1, #0x10" 271d3718 0x000000 (set d1 (| (<< (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x17) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d1) (bv 32 0x10) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.or.t d7, d9, #0x10, d1, #0xd" 2719b076 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d9) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d1) (bv 32 0xd) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.orn.t d11, d6, #0x1e, d6, #5" a766beb2 0x000000 (set d11 (| (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d6) (bv 32 0x1e) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d6) (bv 32 0x5) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.orn.t d10, d0, #0x13, d5, #0x1c" a75033ae 0x000000 (set d10 (| (<< (& (>> (var d10) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d0) (bv 32 0x13) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d5) (bv 32 0x1c) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.orn.t d11, d13, #3, d1, #9" a71da3b4 0x000000 (set d11 (| (<< (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (|| (! (is_zero (& (>> (var d13) (bv 32 0x3) false) (bv 32 0x1)))) (! (! (is_zero (& (>> (var d1) (bv 32 0x9) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xnor.t d14, d1, #0x10, d10, #0x19" a7a1d0ec 0x000000 (set d14 (| (<< (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (^^ (! (is_zero (& (>> (var d1) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x19) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xnor.t d9, d8, #7, d14, #0x19" a7e8c79c 0x000000 (set d9 (| (<< (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (^^ (! (is_zero (& (>> (var d8) (bv 32 0x7) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d14) (bv 32 0x19) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xnor.t d8, d5, #0x14, d8, #0xb" a785d485 0x000000 (set d8 (| (<< (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (! (^^ (! (is_zero (& (>> (var d5) (bv 32 0x14) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0xb) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xor.t d0, d8, #9, d11, #7" a7b8e903 0x000000 (set d0 (| (<< (& (>> (var d0) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (^^ (! (is_zero (& (>> (var d8) (bv 32 0x9) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d11) (bv 32 0x7) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xor.t d7, d12, #0x16, d2, #0xb" a72cf675 0x000000 (set d7 (| (<< (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (^^ (! (is_zero (& (>> (var d12) (bv 32 0x16) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d2) (bv 32 0xb) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sh.xor.t d2, d13, #0xd, d5, #0xf" a75ded27 0x000000 (set d2 (| (<< (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x3fffffff)) (bv 32 0x1) false) (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0xd) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d5) (bv 32 0xf) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0))))
+d "sha d13, #-6" 86ad 0x000000 (seq (set carry_out (let shift_count (bv 32 0xfffffffa) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d13) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0xfffffffa) (let sh_x (var d13) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d13 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d4, #-5" 86b4 0x000000 (seq (set carry_out (let shift_count (bv 32 0xfffffffb) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d4) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d4) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0xfffffffb) (let sh_x (var d4) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d4 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d14, #2" 862e 0x000000 (seq (set carry_out (let shift_count (bv 32 0x2) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d14) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0x2) (let sh_x (var d14) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d14 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d13, d10, d1" 0f1a10d0 0x000000 (seq (set carry_out (let shift_count (let _sext_val (cast 32 (msb (var d1)) (var d1)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d10) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d10) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (let _sext_val (cast 32 (msb (var d1)) (var d1)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d13 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d14, d13, d15" 0ffd10e0 0x000000 (seq (set carry_out (let shift_count (let _sext_val (cast 32 (msb (var d15)) (var d15)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d13) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (let _sext_val (cast 32 (msb (var d15)) (var d15)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d13) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d14 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d5, d15, d11" 0fbf1050 0x000000 (seq (set carry_out (let shift_count (let _sext_val (cast 32 (msb (var d11)) (var d11)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d15) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (let _sext_val (cast 32 (msb (var d11)) (var d11)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d15) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d5 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d12, d5, #-0x20" 8f053ec0 0x000000 (seq (set carry_out (let shift_count (bv 32 0xffffffe0) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d5) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0xffffffe0) (let sh_x (var d5) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d12 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d7, d3, #9" 8f932070 0x000000 (seq (set carry_out (let shift_count (bv 32 0x9) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d3) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0x9) (let sh_x (var d3) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d7 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha d0, d1, #0x94" 8f412900 0x000000 (seq (set carry_out (let shift_count (bv 32 0x14) (ite (|| (! (sle (var shift_count) (bv 32 0x0))) (== (var shift_count) (bv 32 0x0))) (&& (! (is_zero (var shift_count))) (! (is_zero (& (>> (var d1) (- (bv 32 0x20) (var shift_count)) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (+ (var shift_count) (bv 32 0x1))) false))))) (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (>> (bv 32 0xffffffff) (- (bv 32 0x20) (~- (var shift_count))) false))))))) (set result (let sh_c (bv 32 0x14) (let sh_x (var d1) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (set d0 (var result)) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var carry_out) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sha.h d7, d15, d7" 0f7f1074 0x000000 (set d7 (let shift_count (let _sext_val (cast 32 (msb (var d7)) (var d7)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "sha.h d5, d5, d15" 0ff51054 0x000000 (set d5 (let shift_count (let _sext_val (cast 32 (msb (var d15)) (var d15)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d5) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d5) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "sha.h d10, d3, d1" 0f1310a4 0x000000 (set d10 (let shift_count (let _sext_val (cast 32 (msb (var d1)) (var d1)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d3) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d3) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "sha.h d14, d7, #-0x5e" 8f273ae8 0x000000 (set d14 (let shift_count (bv 32 0xffffffe2) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "sha.h d9, d15, #-0xc8" 8f8f3398 0x000000 (set d9 (let shift_count (bv 32 0xfffffff8) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "sha.h d9, d4, #-0x33" 8fd43c98 0x000000 (set d9 (let shift_count (bv 32 0xd) (append (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))) (cast 16 false (let sh_c (var shift_count) (let sh_x (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xffff)) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x))))))))))
+d "shas d9, d0, d11" 0fb02090 0x000000 (seq (set result (let x (let sh_c (let _sext_val (cast 32 (msb (var d11)) (var d11)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d0) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "shas d6, d2, d8" 0f822060 0x000000 (seq (set result (let x (let sh_c (let _sext_val (cast 32 (msb (var d8)) (var d8)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d2) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d6 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "shas d7, d2, d14" 0fe22070 0x000000 (seq (set result (let x (let sh_c (let _sext_val (cast 32 (msb (var d14)) (var d14)) (>> (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false)) (- (bv 32 0x20) (bv 32 0x6)) (msb (cast 32 false (<< (var _sext_val) (- (- (bv 32 0x20) (bv 32 0x6)) (bv 32 0x0)) false))))) (let sh_x (var d2) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "shas d14, d14, #0x4e" 8fee44e0 0x000000 (seq (set result (let x (let sh_c (bv 32 0xe) (let sh_x (var d14) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "shas d4, d2, #-0xb8" 8f825440 0x000000 (seq (set result (let x (let sh_c (bv 32 0x8) (let sh_x (var d2) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d4 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "shas d1, d10, #-0x35" 8fba5c10 0x000000 (seq (set result (let x (let sh_c (bv 32 0xb) (let sh_x (var d10) (ite (! (sle (var sh_c) (bv 32 0x0))) (<< (var sh_x) (var sh_c) false) (>> (var sh_x) (~- (var sh_c)) (msb (var sh_x)))))) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d1 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "st.a [a12+], a0" e4c0 0x000000 (seq (storew 0 (var a12) (cast 32 false (var a0))) (set a12 (+ (var a12) (bv 32 0x4))))
+d "st.a [sp]#0x3cc, a15" f8f3 0x000000 (storew 0 (+ (var a10) (bv 32 0xf30)) (cast 32 false (var a15)))
+d "st.a [sp]#0xcc, a15" f833 0x000000 (storew 0 (+ (var a10) (bv 32 0x330)) (cast 32 false (var a15)))
+d "st.a [sp]#0x144, a15" f851 0x000000 (storew 0 (+ (var a10) (bv 32 0x510)) (cast 32 false (var a15)))
+d "st.a [a6]#8, a15" ec62 0x000000 (storew 0 (+ (var a6) (bv 32 0x20)) (cast 32 false (var a15)))
+d "st.a [sp]#0xc, a15" eca3 0x000000 (storew 0 (+ (var a10) (bv 32 0x30)) (cast 32 false (var a15)))
+d "st.a [sp]#0, a15" eca0 0x000000 (storew 0 (+ (var a10) (bv 32 0x0)) (cast 32 false (var a15)))
+d "st.a [a15]#0x28, a6" e8a6 0x000000 (storew 0 (+ (var a15) (bv 32 0xa0)) (cast 32 false (var a6)))
+d "st.a [a15]#8, sp" e82a 0x000000 (storew 0 (+ (var a15) (bv 32 0x20)) (cast 32 false (var a10)))
+d "st.a [a15]#0x1c, a11" e87b 0x000000 (storew 0 (+ (var a15) (bv 32 0x70)) (cast 32 false (var a11)))
+d "st.a [sp]#0xd8, a15" f836 0x000000 (storew 0 (+ (var a10) (bv 32 0x360)) (cast 32 false (var a15)))
+d "st.a [p14+c]#-0xc6, a14" a9eebac5 0x000000 (seq (set index (& (>> (var a15) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a15) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a14) (var index))) (storew 0 (var EA) (var a14)) (set new_index (+ (var index) (bv 32 0xffffff3a))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a15 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.a [p10+c]#-0x152, a5" a9a5aea5 0x000000 (seq (set index (& (>> (var a11) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a11) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a10) (var index))) (storew 0 (var EA) (var a5)) (set new_index (+ (var index) (bv 32 0xfffffeae))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a11 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.a [p14+c]#0x9d, a15" a9ef9d25 0x000000 (seq (set index (& (>> (var a15) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a15) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a14) (var index))) (storew 0 (var EA) (var a15)) (set new_index (+ (var index) (bv 32 0x9d))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a15 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.a #0x900000b3, a14" a59e3328 0x000000 (storew 0 (bv 32 0x900000b3) (var a14))
+d "st.a #0x8000071b, a11" a58b5bc8 0x000000 (storew 0 (bv 32 0x8000071b) (var a11))
+d "st.a #0x90000dbd, a2" a592fd68 0x000000 (storew 0 (bv 32 0x90000dbd) (var a2))
+d "st.a [a9]#0x6af6, a7" b597b6b6 0x000000 (storew 0 (+ (var a9) (bv 32 0x6af6)) (cast 32 false (var a7)))
+d "st.a [a15]#-0x4a7e, a15" b5ff426b 0x000000 (storew 0 (+ (var a15) (bv 32 0xffffb582)) (cast 32 false (var a15)))
+d "st.a [a15]#0xa43, a1" b5f18390 0x000000 (storew 0 (+ (var a15) (bv 32 0xa43)) (cast 32 false (var a1)))
+d "st.a [a15]#0x30, a3" e8c3 0x000000 (storew 0 (+ (var a15) (bv 32 0xc0)) (cast 32 false (var a3)))
+d "st.a [sp]#0x320, a15" f8c8 0x000000 (storew 0 (+ (var a10) (bv 32 0xc80)) (cast 32 false (var a15)))
+d "st.b [a2]#0xc, d15" 2c2c 0x000000 (storew 0 (+ (var a2) (bv 32 0xc)) (cast 8 false (var a15)))
+d "st.b [a4], d4" 3444 0x000000 (storew 0 (var a4) (cast 8 false (var d4)))
+d "st.b [a15]#0xe, d10" 28ea 0x000000 (storew 0 (+ (var a15) (bv 32 0xe)) (cast 8 false (var d10)))
+d "st.b [a15]#0, d13" 280d 0x000000 (storew 0 (+ (var a15) (bv 32 0x0)) (cast 8 false (var d13)))
+d "st.b [a15]#9, d0" 2890 0x000000 (storew 0 (+ (var a15) (bv 32 0x9)) (cast 8 false (var d0)))
+d "st.b [a15]#7, d8" 2878 0x000000 (storew 0 (+ (var a15) (bv 32 0x7)) (cast 8 false (var d8)))
+d "st.b [a12]#4, d15" 2cc4 0x000000 (storew 0 (+ (var a12) (bv 32 0x4)) (cast 8 false (var a15)))
+d "st.b [a13]#0xe, d15" 2cde 0x000000 (storew 0 (+ (var a13) (bv 32 0xe)) (cast 8 false (var a15)))
+d "st.b [a12]#4, d15" 2cc4 0x000000 (storew 0 (+ (var a12) (bv 32 0x4)) (cast 8 false (var a15)))
+d "st.b #0xa0001f53, d14" 25aed3d1 0x000000 (storew 0 (bv 32 0xa0001f53) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))))
+d "st.b #0xd000231a, d15" 25df1ac2 0x000000 (storew 0 (bv 32 0xd000231a) (cast 8 false (& (>> (var d15) (bv 32 0x0) false) (bv 32 0xff))))
+d "st.b #0x50000e86, d4" 2554c6a0 0x000000 (storew 0 (bv 32 0x50000e86) (cast 8 false (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff))))
+d "st.b [a11]#0x6d7f, d7" e9b7ff56 0x000000 (storew 0 (+ (var a11) (bv 32 0x6d7f)) (cast 8 false (var d7)))
+d "st.b [a7]#-0x40fb, d4" e974c5cb 0x000000 (storew 0 (+ (var a7) (bv 32 0xffffbf05)) (cast 8 false (var d4)))
+d "st.b [a7]#-0x3105, d10" e97afbbc 0x000000 (storew 0 (+ (var a7) (bv 32 0xffffcefb)) (cast 8 false (var d10)))
+d "st.b [p2+c]#0x19c, d12" a92c1c64 0x000000 (seq (set index (& (>> (var a3) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a3) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a2) (var index))) (storew 0 (var EA) (cast 8 false (var d12))) (set new_index (+ (var index) (bv 32 0x19c))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a3 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.b [p14+c]#0xe1, d5" a9f52134 0x000000 (seq (set index (& (>> (var a15) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a15) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a14) (var index))) (storew 0 (var EA) (cast 8 false (var d5))) (set new_index (+ (var index) (bv 32 0xe1))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a15 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.b [p8+c]#0x101, d4" a9940144 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a8) (var index))) (storew 0 (var EA) (cast 8 false (var d4))) (set new_index (+ (var index) (bv 32 0x101))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.b [a15]#8, d4" 2884 0x000000 (storew 0 (+ (var a15) (bv 32 0x8)) (cast 8 false (var d4)))
+d "st.b [a15]#7, d0" 2870 0x000000 (storew 0 (+ (var a15) (bv 32 0x7)) (cast 8 false (var d0)))
+d "st.d #0xc00021a3, e0" a5c02366 0x000000 (storew 0 (bv 32 0xc00021a3) (append (var d1) (var d0)))
+d "st.d #0x40003021, e8" a5482107 0x000000 (storew 0 (bv 32 0x40003021) (append (var d9) (var d8)))
+d "st.d #0xb00024c5, e14" a5bf4536 0x000000 (storew 0 (bv 32 0xb00024c5) (append (var d15) (var d14)))
+d "st.d [p0+c]#-0x187, e0" a9117995 0x000000 (seq (set index (& (>> (var a1) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a1) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a0) (var index))) (set EA2 (+ (var a0) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a0) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a0) (mod (+ (var index) (bv 32 0x6)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d0))) (storew 0 (var EA2) (cast 16 false (& (>> (var d0) (bv 32 0x10) false) (bv 32 0xffff)))) (storew 0 (var EA4) (cast 16 false (var d1))) (storew 0 (var EA6) (cast 16 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0xfffffe79))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a1 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.d [p14+c]#0xe7, e6" a9f66735 0x000000 (seq (set index (& (>> (var a15) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a15) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a14) (var index))) (set EA2 (+ (var a14) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a14) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a14) (mod (+ (var index) (bv 32 0x6)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d6))) (storew 0 (var EA2) (cast 16 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)))) (storew 0 (var EA4) (cast 16 false (var d7))) (storew 0 (var EA6) (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0xe7))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a15 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.d [p8+c]#-0xf3, e12" a98c4dc5 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a8) (var index))) (set EA2 (+ (var a8) (mod (+ (var index) (bv 32 0x2)) (var length)))) (set EA4 (+ (var a8) (mod (+ (var index) (bv 32 0x4)) (var length)))) (set EA6 (+ (var a8) (mod (+ (var index) (bv 32 0x6)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d12))) (storew 0 (var EA2) (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)))) (storew 0 (var EA4) (cast 16 false (var d13))) (storew 0 (var EA6) (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0xffffff0d))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.da [p4+c]#0x6e, p12" a95cee15 0x000000 (seq (set index (& (>> (var a5) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a5) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a4) (var index))) (set EA4 (+ (var a4) (mod (+ (var index) (bv 32 0x4)) (var length)))) (storew 0 (var EA0) (var a12)) (storew 0 (var EA4) (var a13)) (set new_index (+ (var index) (bv 32 0x6e))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a5 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.da [p12+c]#-0xf6, p2" a9d3cac5 0x000000 (seq (set index (& (>> (var a13) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a13) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a12) (var index))) (set EA4 (+ (var a12) (mod (+ (var index) (bv 32 0x4)) (var length)))) (storew 0 (var EA0) (var a2)) (storew 0 (var EA4) (var a3)) (set new_index (+ (var index) (bv 32 0xffffff0a))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a13 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.da [p10+c]#-0xfe, p4" a9b4c2c5 0x000000 (seq (set index (& (>> (var a11) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a11) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a10) (var index))) (set EA4 (+ (var a10) (mod (+ (var index) (bv 32 0x4)) (var length)))) (storew 0 (var EA0) (var a4)) (storew 0 (var EA4) (var a5)) (set new_index (+ (var index) (bv 32 0xffffff02))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a11 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.da #0x70000004, p4" a575040c 0x000000 (storew 0 (bv 32 0x70000004) (append (var a5) (var a4)))
+d "st.da #0xd0003542, p8" a5d8425f 0x000000 (storew 0 (bv 32 0xd0003542) (append (var a9) (var a8)))
+d "st.da #0x40002c18, p4" a544d80e 0x000000 (storew 0 (bv 32 0x40002c18) (append (var a5) (var a4)))
+d "st.h [a15]#0xc, d11" a86b 0x000000 (storew 0 (+ (var a15) (bv 32 0x30)) (cast 32 false (var d11)))
+d "st.h [a15]#0x1e, d1" a8f1 0x000000 (storew 0 (+ (var a15) (bv 32 0x78)) (cast 32 false (var d1)))
+d "st.h [a15]#0x16, d8" a8b8 0x000000 (storew 0 (+ (var a15) (bv 32 0x58)) (cast 32 false (var d8)))
+d "st.h [sp]#0x18, d15" acac 0x000000 (storew 0 (+ (var a10) (bv 32 0x60)) (cast 32 false (var a15)))
+d "st.h [a11]#0x1a, d15" acbd 0x000000 (storew 0 (+ (var a11) (bv 32 0x68)) (cast 32 false (var a15)))
+d "st.h [a8]#0x1a, d15" ac8d 0x000000 (storew 0 (+ (var a8) (bv 32 0x68)) (cast 32 false (var a15)))
+d "st.h [a0]#0xa8f, d9" f9098fa0 0x000000 (storew 0 (+ (var a0) (bv 32 0xa8f)) (cast 16 false (var d9)))
+d "st.h [a11]#0x5315, d0" f9b015c5 0x000000 (storew 0 (+ (var a11) (bv 32 0x5315)) (cast 16 false (var d0)))
+d "st.h [a1]#-0x2506, d15" f91fbabd 0x000000 (storew 0 (+ (var a1) (bv 32 0xffffdafa)) (cast 16 false (var d15)))
+d "st.h [p14+c]#-0x18, d5" a9f5a8f4 0x000000 (seq (set index (& (>> (var a15) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a15) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a14) (var index))) (storew 0 (var EA) (cast 16 false (var d5))) (set new_index (+ (var index) (bv 32 0xffffffe8))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a15 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.h [p8+c]#0x1e5, d11" a99ba574 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a8) (var index))) (storew 0 (var EA) (cast 16 false (var d11))) (set new_index (+ (var index) (bv 32 0x1e5))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.h [p6+c]#-0xf3, d14" a96e8dc4 0x000000 (seq (set index (& (>> (var a7) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a7) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a6) (var index))) (storew 0 (var EA) (cast 16 false (var d14))) (set new_index (+ (var index) (bv 32 0xffffff0d))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a7 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.h #0x90001b5d, d6" 25969dd9 0x000000 (storew 0 (bv 32 0x90001b5d) (cast 16 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff))))
+d "st.h #0x2000198d, d10" 252a8d69 0x000000 (storew 0 (bv 32 0x2000198d) (cast 16 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff))))
+d "st.h #0xc0002fc7, d2" 25c2c7fa 0x000000 (storew 0 (bv 32 0xc0002fc7) (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))))
+d "st.h [a1]#0x14, d15" ac1a 0x000000 (storew 0 (+ (var a1) (bv 32 0x50)) (cast 32 false (var a15)))
+d "st.h [a11], d0" b4b0 0x000000 (storew 0 (var a11) (cast 32 false (var d0)))
+d "st.h [a15]#0x18, d5" a8c5 0x000000 (storew 0 (+ (var a15) (bv 32 0x60)) (cast 32 false (var d5)))
+d "st.q #0x30002587, d11" 653b4762 0x000000 (storew 0 (bv 32 0x30002587) (cast 16 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xffff))))
+d "st.q #0x20003ebe, d4" 6524fea3 0x000000 (storew 0 (bv 32 0x20003ebe) (cast 16 false (& (>> (var d4) (bv 32 0x10) false) (bv 32 0xffff))))
+d "st.q #0x50002cef, d9" 6559ef32 0x000000 (storew 0 (bv 32 0x50002cef) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))))
+d "st.q [p4+c]#0x1dc, d8" a9581c76 0x000000 (seq (set index (& (>> (var a5) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a5) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a4) (var index))) (storew 0 (var EA) (cast 16 false (>> (var d8) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x1dc))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a5 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.q [p6+c]#0x18e, d4" a9740e66 0x000000 (seq (set index (& (>> (var a7) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a7) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a6) (var index))) (storew 0 (var EA) (cast 16 false (>> (var d4) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x18e))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a7 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.q [p6+c]#0x191, d1" a9711166 0x000000 (seq (set index (& (>> (var a7) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a7) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a6) (var index))) (storew 0 (var EA) (cast 16 false (>> (var d1) (bv 32 0x10) false))) (set new_index (+ (var index) (bv 32 0x191))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a7 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.t #0xc00028d5, #5, #0" d5cd9532 0x000000 (store 0 (bv 32 0xc00028d5) (| (& (load 0 (bv 32 0xc00028d5)) (bv 8 0xdf)) (bv 8 0x0)))
+d "st.t #0x90000c7d, #2, #1" d59afd10 0x000000 (store 0 (bv 32 0x90000c7d) (| (& (load 0 (bv 32 0x90000c7d)) (bv 8 0xfb)) (bv 8 0x4)))
+d "st.t #0xf000320a, #6, #1" d5f60a83 0x000000 (store 0 (bv 32 0xf000320a) (| (& (load 0 (bv 32 0xf000320a)) (bv 8 0xbf)) (bv 8 0x40)))
+d "st.w [a2+], d9" 6429 0x000000 (seq (storew 0 (var a2) (cast 32 false (var d9))) (set a2 (+ (var a2) (bv 32 0x4))))
+d "st.w [sp]#0x310, d15" 78c4 0x000000 (storew 0 (+ (var a10) (bv 32 0xc40)) (cast 32 false (var d15)))
+d "st.w [sp]#0x360, d15" 78d8 0x000000 (storew 0 (+ (var a10) (bv 32 0xd80)) (cast 32 false (var d15)))
+d "st.w [sp]#0x3a8, d15" 78ea 0x000000 (storew 0 (+ (var a10) (bv 32 0xea0)) (cast 32 false (var d15)))
+d "st.w [a15]#0x10, d15" 684f 0x000000 (storew 0 (+ (var a15) (bv 32 0x40)) (cast 32 false (var d15)))
+d "st.w [a15]#0x1c, d1" 6871 0x000000 (storew 0 (+ (var a15) (bv 32 0x70)) (cast 32 false (var d1)))
+d "st.w [a15]#0x3c, d10" 68fa 0x000000 (storew 0 (+ (var a15) (bv 32 0xf0)) (cast 32 false (var d10)))
+d "st.w [a3]#0x38, d15" 6c3e 0x000000 (storew 0 (+ (var a3) (bv 32 0xe0)) (cast 32 false (var a15)))
+d "st.w [a9]#0x10, d15" 6c94 0x000000 (storew 0 (+ (var a9) (bv 32 0x40)) (cast 32 false (var a15)))
+d "st.w [a4]#0x38, d15" 6c4e 0x000000 (storew 0 (+ (var a4) (bv 32 0xe0)) (cast 32 false (var a15)))
+d "st.w [a2]#0x5eb5, d13" 592df5a5 0x000000 (storew 0 (+ (var a2) (bv 32 0x5eb5)) (cast 32 false (var d13)))
+d "st.w [a12]#0x55b6, d15" 59cf7665 0x000000 (storew 0 (+ (var a12) (bv 32 0x55b6)) (cast 32 false (var d15)))
+d "st.w [a12]#0x4ef0, d12" 59ccf0b4 0x000000 (storew 0 (+ (var a12) (bv 32 0x4ef0)) (cast 32 false (var d12)))
+d "st.w #0xd0003b7f, d14" a5debfd3 0x000000 (storew 0 (bv 32 0xd0003b7f) (var d14))
+d "st.w #0x8000243a, d10" a58a7a02 0x000000 (storew 0 (bv 32 0x8000243a) (var d10))
+d "st.w #0xf00037c3, d6" a5f643f3 0x000000 (storew 0 (bv 32 0xf00037c3) (var d6))
+d "st.w [p8+c]#0x128, d7" a9972845 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a8) (var index))) (set EA2 (+ (var a8) (mod (+ (var index) (bv 32 0x2)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d7))) (storew 0 (var EA2) (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0x128))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.w [p12+c]#-0x18a, d12" a9cc3695 0x000000 (seq (set index (& (>> (var a13) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a13) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a12) (var index))) (set EA2 (+ (var a12) (mod (+ (var index) (bv 32 0x2)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d12))) (storew 0 (var EA2) (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0xfffffe76))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a13 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.w [p8+c]#-0xc8, d2" a99238c5 0x000000 (seq (set index (& (>> (var a9) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a9) (bv 32 0x10) false) (bv 32 0xffff))) (set EA0 (+ (var a8) (var index))) (set EA2 (+ (var a8) (mod (+ (var index) (bv 32 0x2)) (var length)))) (storew 0 (var EA0) (cast 16 false (var d2))) (storew 0 (var EA2) (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)))) (set new_index (+ (var index) (bv 32 0xffffff38))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a9 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "st.w [a15]#0x30, d2" 68c2 0x000000 (storew 0 (+ (var a15) (bv 32 0xc0)) (cast 32 false (var d2)))
+d "st.w [sp]#0x324, d15" 78c9 0x000000 (storew 0 (+ (var a10) (bv 32 0xc90)) (cast 32 false (var d15)))
+d "stlcx #0x90003c4f" 1590cf13 0x000000 (seq (set EA (bv 32 0x90003c4f)) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stlcx #0x40001421" 15406101 0x000000 (seq (set EA (bv 32 0x40001421)) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stlcx #0x600033e0" 156020f3 0x000000 (seq (set EA (bv 32 0x600033e0)) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stlcx [a4]#0xcb" 49408b39 0x000000 (seq (set EA (+ (var a4) (bv 32 0xcb))) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stlcx [a12]#-0x19a" 49c0a699 0x000000 (seq (set EA (+ (var a12) (bv 32 0xfffffe66))) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stlcx [a8]#-0x1a9" 49809799 0x000000 (seq (set EA (+ (var a8) (bv 32 0xfffffe57))) (storew 0 (var EA) (var d12)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d13)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d14)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d15)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a12)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a13)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a14)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a15)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d8)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d9)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d10)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d11)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a10)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x38)) (var PSW)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx #0xe0001b6d" 15e0add5 0x000000 (seq (set EA (bv 32 0xe0001b6d)) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx #0x90003db2" 1590f267 0x000000 (seq (set EA (bv 32 0x90003db2)) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx #0x70001bb7" 1570b7e5 0x000000 (seq (set EA (bv 32 0x70001bb7)) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx [a14]#0x80" 49e0c029 0x000000 (seq (set EA (+ (var a14) (bv 32 0x80))) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx [sp]#0x74" 49a0f419 0x000000 (seq (set EA (+ (var a10) (bv 32 0x74))) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "stucx [a15]#0x162" 49f0e259 0x000000 (seq (set EA (+ (var a15) (bv 32 0x162))) (storew 0 (var EA) (var d4)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d5)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d6)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d7)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a4)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x4)) (var a5)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0x8)) (var a6)) (storew 0 (+ (+ (var EA) (bv 32 0x10)) (bv 32 0xc)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d0)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x4)) (var d1)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0x8)) (var d2)) (storew 0 (+ (+ (var EA) (bv 32 0x20)) (bv 32 0xc)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a2)) (storew 0 (+ (+ (var EA) (bv 32 0x30)) (bv 32 0x4)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (+ (var EA) (bv 32 0x38)) (bv 32 0x4)) (var PCXI)))
+d "sub d12, d3" a23c 0x000000 (seq (set result (- (var d12) (var d3))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d7, d15, d14" 52e7 0x000000 (seq (set result (- (var d15) (var d14))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d9, d15, d15" 52f9 0x000000 (seq (set result (- (var d15) (var d15))) (set d9 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d14, d15, d12" 52ce 0x000000 (seq (set result (- (var d15) (var d12))) (set d14 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d0, d10" 5aa0 0x000000 (seq (set result (- (var d0) (var d10))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d4, d6" 5a64 0x000000 (seq (set result (- (var d4) (var d6))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d4, d14" 5ae4 0x000000 (seq (set result (- (var d4) (var d14))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d13, d13" a2dd 0x000000 (seq (set result (- (var d13) (var d13))) (set d13 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d11, d6" a26b 0x000000 (seq (set result (- (var d11) (var d6))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d2, d4" a242 0x000000 (seq (set result (- (var d2) (var d4))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d8, d12, d2" 0b2c8080 0x000000 (seq (set result (- (var d12) (var d2))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d5, d7, d9" 0b978050 0x000000 (seq (set result (- (var d7) (var d9))) (set d5 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d2, d12, d1" 0b1c8020 0x000000 (seq (set result (- (var d12) (var d1))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d11, d4" 5a4b 0x000000 (seq (set result (- (var d11) (var d4))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d11, d15, d6" 526b 0x000000 (seq (set result (- (var d15) (var d6))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d10, d15, d2" 522a 0x000000 (seq (set result (- (var d15) (var d2))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d13, d10" 5aad 0x000000 (seq (set result (- (var d13) (var d10))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub d15, d0, d3" 5a30 0x000000 (seq (set result (- (var d0) (var d3))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.a sp, #0x5f" 205f 0x000000 (set a10 (- (var a10) (bv 32 0x5f)))
+d "sub.a sp, #0x17" 2017 0x000000 (set a10 (- (var a10) (bv 32 0x17)))
+d "sub.a sp, #0xc2" 20c2 0x000000 (set a10 (- (var a10) (bv 32 0xc2)))
+d "sub.a a7, a7, a4" 01472070 0x000000 (set a7 (- (var a7) (var a4)))
+d "sub.a a13, sp, a8" 018a20d0 0x000000 (set a13 (- (var a10) (var a8)))
+d "sub.a a14, a6, a13" 01d620e0 0x000000 (set a14 (- (var a6) (var a13)))
+d "sub.a sp, #0x99" 2099 0x000000 (set a10 (- (var a10) (bv 32 0x99)))
+d "sub.a sp, #0x75" 2075 0x000000 (set a10 (- (var a10) (bv 32 0x75)))
+d "sub.b d2, d11, d14" 0beb8024 0x000000 (seq (set result_byte3 (- (cast 8 false (& (>> (var d11) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (- (cast 8 false (& (>> (var d11) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (- (cast 8 false (& (>> (var d11) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (- (cast 8 false (& (>> (var d11) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d14) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d2 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.b d0, d1, d9" 0b918004 0x000000 (seq (set result_byte3 (- (cast 8 false (& (>> (var d1) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (- (cast 8 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (- (cast 8 false (& (>> (var d1) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (- (cast 8 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.b d0, d6, d6" 0b668004 0x000000 (seq (set result_byte3 (- (cast 8 false (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x18) false) (bv 32 0xff))))) (set result_byte2 (- (cast 8 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xff))))) (set result_byte1 (- (cast 8 false (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x8) false) (bv 32 0xff))))) (set result_byte0 (- (cast 8 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))) (cast 8 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xff))))) (set result (| (cast 32 false (<< (var result_byte3) (bv 32 0x18) false)) (| (cast 32 false (<< (var result_byte2) (bv 32 0x10) false)) (| (cast 32 false (<< (var result_byte1) (bv 32 0x8) false)) (cast 32 false (var result_byte0)))))) (set d0 (var result)) (set ov3 (|| (! (ule (var result_byte3) (bv 8 0x7f))) (&& (sle (var result_byte3) (bv 8 0x80)) (! (== (var result_byte3) (bv 8 0x80)))))) (set ov2 (|| (! (ule (var result_byte2) (bv 8 0x7f))) (&& (sle (var result_byte2) (bv 8 0x80)) (! (== (var result_byte2) (bv 8 0x80)))))) (set ov1 (|| (! (ule (var result_byte1) (bv 8 0x7f))) (&& (sle (var result_byte1) (bv 8 0x80)) (! (== (var result_byte1) (bv 8 0x80)))))) (set ov0 (|| (! (ule (var result_byte0) (bv 8 0x7f))) (&& (sle (var result_byte0) (bv 8 0x80)) (! (== (var result_byte0) (bv 8 0x80)))))) (set overflow (|| (|| (var ov1) (var ov0)) (|| (var ov3) (var ov2)))) (set aov3 (^^ (! (is_zero (& (>> (var result_byte3) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte3) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov2 (^^ (! (is_zero (& (>> (var result_byte2) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte2) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov1 (^^ (! (is_zero (& (>> (var result_byte1) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte1) (bv 8 0x6) false) (bv 8 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_byte0) (bv 8 0x7) false) (bv 8 0x1)))) (! (is_zero (& (>> (var result_byte0) (bv 8 0x6) false) (bv 8 0x1)))))) (set advanced_overflow (|| (|| (var aov1) (var aov0)) (|| (var aov3) (var aov2)))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.f d11, d12, d10" 6b0a31bc 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d12) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d10) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (fneg (var _arg_a)) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d11 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "sub.f d7, d13, d3" 6b03317d 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d13) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d3) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (fneg (var _arg_a)) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d7 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "sub.f d3, d6, d8" 6b083136 0x0 (seq (set _fa (fconvert ieee754-bin64 rne (float 0 (var d6) ))) (set _fb (fconvert ieee754-bin64 rne (float 0 (var d8) ))) (set _arg_a (let tmp (var _fa) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _arg_b (let tmp (var _fb) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _precise_result (+. rne (fneg (var _arg_a)) (var _arg_b))) (set _normal_result (let tmp (var _precise_result) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (var tmp) (float 1 (bv 64 0x0) ))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (float 1 (bv 64 0x3810000000000000) ) (var tmp)))) (fneg (float 1 (bv 64 0x0) )) (ite (&& (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x0) )))) (<. (float 1 (bv 64 0x0) ) (var tmp))) (&& (! (|| (is_nan (var tmp)) (is_nan (float 1 (bv 64 0x3810000000000000) )))) (<. (var tmp) (float 1 (bv 64 0x3810000000000000) )))) (float 1 (bv 64 0x0) ) (var tmp))))) (set _rounded_result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _normal_result) (ite (== (var _mode) (bv 8 0x0)) (fconvert ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fconvert ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fconvert ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fconvert ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fconvert ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set _result (ite (|| (is_nan (var _fa)) (is_nan (var _fb))) (float 0 (bv 32 0x7fc00001) ) (ite (&& (is_inf (var _fa)) (is_inf (var _fb))) (float 0 (bv 32 0x7f800001) ) (var _rounded_result)))) (set d3 (fbits (var _result))) (set set_FI (|| (is_nan (var _fa)) (is_nan (var _fb)))) (branch (var set_FI) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1e) false))) nop) (set set_FV (&& (! (|| (is_nan (var _rounded_result)) (is_nan (float 0 (bv 32 0x7f800000) )))) (! (<. (var _rounded_result) (float 0 (bv 32 0x7f800000) ))))) (branch (var set_FV) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (set set_FU (&& (! (|| (is_nan (fpos (var _precise_result))) (is_nan (float 1 (bv 64 0x3820000000000000) )))) (<. (fpos (var _precise_result)) (float 1 (bv 64 0x3820000000000000) )))) (branch (var set_FU) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop) (set set_FX (|| (|| (is_nan (var _precise_result)) (is_nan (fconvert ieee754-bin64 rne (var _result)))) (|| (<. (var _precise_result) (fconvert ieee754-bin64 rne (var _result))) (<. (fconvert ieee754-bin64 rne (var _result)) (var _precise_result))))) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (ite (&& (var set_FX) (! (var set_FI))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1a) false))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (|| (var set_FI) (|| (var set_FV) (|| (var set_FU) (var set_FX)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "sub.h d1, d9, d12" 0bc98016 0x000000 (seq (set result_hw1 (- (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (- (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d1 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.h d9, d9, d9" 0b998096 0x000000 (seq (set result_hw1 (- (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (- (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d9 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "sub.h d8, d7, d13" 0bd78086 0x000000 (seq (set result_hw1 (- (cast 16 false (& (>> (var d7) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d13) (bv 32 0x10) false) (bv 32 0xffff))))) (set result_hw0 (- (cast 16 false (& (>> (var d7) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d13) (bv 32 0x0) false) (bv 32 0xffff))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d8 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subc d1, d12, d0" 0b0cd010 0x000000 (seq (set result (- (+ (var d12) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (+ (var d0) (bv 32 0x1)))) (set d1 (var result)) (set carry_out (& (>> (+ (+ (var d12) (~- (var d0))) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "subc d11, d9, d2" 0b29d0b0 0x000000 (seq (set result (- (+ (var d9) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (+ (var d2) (bv 32 0x1)))) (set d11 (var result)) (set carry_out (& (>> (+ (+ (var d9) (~- (var d2))) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "subc d0, d12, d3" 0b3cd000 0x000000 (seq (set result (- (+ (var d12) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (+ (var d3) (bv 32 0x1)))) (set d0 (var result)) (set carry_out (& (>> (+ (+ (var d12) (~- (var d3))) (& (>> (var PSW) (bv 32 0x1f) false) (bv 32 0x1))) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "subs d11, d2" 622b 0x000000 (seq (set result (let x (- (var d11) (var d2)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d11, d8" 628b 0x000000 (seq (set result (let x (- (var d11) (var d8)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d8, d12" 62c8 0x000000 (seq (set result (let x (- (var d8) (var d12)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d8 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d10, d9" 629a 0x000000 (seq (set result (let x (- (var d10) (var d9)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d10 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d12, d5, d10" 0ba5a0c0 0x000000 (seq (set result (let x (- (var d5) (var d10)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d12 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d0, d0, d10" 0ba0a000 0x000000 (seq (set result (let x (- (var d0) (var d10)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d0 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d7, d1, d14" 0be1a070 0x000000 (seq (set result (let x (- (var d1) (var d14)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d7 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs d3, d3" 6233 0x000000 (seq (set result (let x (- (var d3) (var d3)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false) (bv 32 0x1)) (let max_neg (~- (<< (bv 32 0x1) (- (var y) (bv 32 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set d3 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.h d5, d9, d1" 0b19a056 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d5 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.h d7, d9, d10" 0ba9a076 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d10) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d10) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d7 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.h d13, d2, d9" 0b92a0d6 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d9) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false) (bv 16 0x1)) (let max_neg (~- (<< (bv 16 0x1) (- (var y) (bv 16 0x1)) false)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (var max_neg)) (! (== (var x) (var max_neg)))) (var max_neg) (var x)))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d13 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.hu d1, d12, d2" 0b2cb016 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d12) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d12) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d1 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.hu d5, d1, d8" 0b81b056 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d1) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d1) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d8) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d5 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.hu d8, d2, d6" 0b62b086 0x000000 (seq (set result_hw1 (let x (- (cast 16 false (& (>> (var d2) (bv 32 0x10) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d6) (bv 32 0x10) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result_hw0 (let x (- (cast 16 false (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xffff))) (cast 16 false (& (>> (var d6) (bv 32 0x0) false) (bv 32 0xffff)))) (let y (bv 16 0x10) (let max_pos (- (<< (bv 16 0x1) (var y) false) (bv 16 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 16 0x0)) (! (== (var x) (bv 16 0x0)))) (bv 16 0x0) (var x))))))) (set result (| (cast 32 false (<< (var result_hw1) (bv 32 0x10) false)) (cast 32 false (var result_hw0)))) (set d8 (var result)) (set ov1 (|| (! (ule (var result_hw1) (bv 16 0x7fff))) (&& (sle (var result_hw1) (bv 16 0x8000)) (! (== (var result_hw1) (bv 16 0x8000)))))) (set ov0 (|| (! (ule (var result_hw0) (bv 16 0x7fff))) (&& (sle (var result_hw0) (bv 16 0x8000)) (! (== (var result_hw0) (bv 16 0x8000)))))) (set overflow (|| (var ov1) (var ov0))) (set aov1 (^^ (! (is_zero (& (>> (var result_hw1) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw1) (bv 16 0xe) false) (bv 16 0x1)))))) (set aov0 (^^ (! (is_zero (& (>> (var result_hw0) (bv 16 0xf) false) (bv 16 0x1)))) (! (is_zero (& (>> (var result_hw0) (bv 16 0xe) false) (bv 16 0x1)))))) (set advanced_overflow (|| (var aov1) (var aov0))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.u d15, d11, d2" 0b2bb0f0 0x000000 (seq (set result (let x (- (var d11) (var d2)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d15 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.u d2, d0, d12" 0bc0b020 0x000000 (seq (set result (let x (- (var d0) (var d12)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d2 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subs.u d11, d5, d9" 0b95b0b0 0x000000 (seq (set result (let x (- (var d5) (var d9)) (let y (bv 32 0x20) (let max_pos (- (<< (bv 32 0x1) (var y) false) (bv 32 0x1)) (ite (! (sle (var x) (var max_pos))) (var max_pos) (ite (&& (sle (var x) (bv 32 0x0)) (! (== (var x) (bv 32 0x0)))) (bv 32 0x0) (var x))))))) (set d11 (var result)) (set overflow (|| (! (ule (var result) (bv 32 0x7fffffff))) (&& (sle (var result) (bv 32 0x80000000)) (! (== (var result) (bv 32 0x80000000)))))) (set advanced_overflow (^^ (! (is_zero (& (>> (var result) (bv 32 0x1f) false) (bv 32 0x1)))) (! (is_zero (& (>> (var result) (bv 32 0x1e) false) (bv 32 0x1)))))) (set PSW (| (& (var PSW) (bv 32 0xbfffffff)) (<< (& (ite (var overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1e) false))) (set PSW (| (& (var PSW) (bv 32 0xefffffff)) (<< (& (ite (var advanced_overflow) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1c) false))) (branch (var overflow) (set PSW (| (& (var PSW) (bv 32 0xdfffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1d) false))) nop) (branch (var advanced_overflow) (set PSW (| (& (var PSW) (bv 32 0xf7ffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1b) false))) nop))
+d "subx d3, d8, d6" 0b68c030 0x000000 (seq (set result (- (var d8) (var d6))) (set d3 (var result)) (set carry_out (& (>> (+ (+ (var d8) (~- (var d6))) (bv 32 0x1)) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "subx d4, d11, d13" 0bdbc040 0x000000 (seq (set result (- (var d11) (var d13))) (set d4 (var result)) (set carry_out (& (>> (+ (+ (var d11) (~- (var d13))) (bv 32 0x1)) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "subx d13, d14, d14" 0beec0d0 0x000000 (seq (set result (- (var d14) (var d14))) (set d13 (var result)) (set carry_out (& (>> (+ (+ (var d14) (~- (var d14))) (bv 32 0x1)) (bv 32 0x0) false) (bv 32 0x1))) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (var carry_out) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "svlcx" 0d000002 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "svlcx" 0d000002 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "svlcx" 0d000002 0x000000 (seq (branch (is_zero (var FCX)) nop nop) (set tmp_FCX (var FCX)) (set EA (| (<< (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0x7fff)) (bv 32 0x6) false) (<< (& (>> (var FCX) (bv 32 0x10) false) (bv 32 0xf)) (bv 32 0x1b) false))) (set new_FCX (loadw 0 32 (var EA))) (storew 0 (var EA) (var d7)) (storew 0 (+ (var EA) (bv 32 0x4)) (var d6)) (storew 0 (+ (var EA) (bv 32 0x8)) (var d5)) (storew 0 (+ (var EA) (bv 32 0xc)) (var d4)) (storew 0 (+ (var EA) (bv 32 0x10)) (var a7)) (storew 0 (+ (var EA) (bv 32 0x14)) (var a6)) (storew 0 (+ (var EA) (bv 32 0x18)) (var a5)) (storew 0 (+ (var EA) (bv 32 0x1c)) (var a4)) (storew 0 (+ (var EA) (bv 32 0x20)) (var d3)) (storew 0 (+ (var EA) (bv 32 0x24)) (var d2)) (storew 0 (+ (var EA) (bv 32 0x28)) (var d1)) (storew 0 (+ (var EA) (bv 32 0x2c)) (var d0)) (storew 0 (+ (var EA) (bv 32 0x30)) (var a3)) (storew 0 (+ (var EA) (bv 32 0x34)) (var a2)) (storew 0 (+ (var EA) (bv 32 0x38)) (var a11)) (storew 0 (+ (var EA) (bv 32 0x3c)) (var PCXI)) (set PCXI (| (& (var PCXI) (bv 32 0xc03fffff)) (<< (& (& (>> (var ICR) (bv 32 0x0) false) (bv 32 0xff)) (bv 32 0xff)) (bv 32 0x16) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffdfffff)) (<< (& (& (>> (var ICR) (bv 32 0x8) false) (bv 32 0x1)) (bv 32 0x1)) (bv 32 0x15) false))) (set PCXI (| (& (var PCXI) (bv 32 0xffefffff)) (<< (& (bv 32 0x0) (bv 32 0x1)) (bv 32 0x14) false))) (set PCXI (| (& (var PCXI) (bv 32 0xfff00000)) (<< (& (& (>> (var FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (set FCX (| (& (var FCX) (bv 32 0xfff00000)) (<< (& (& (>> (var new_FCX) (bv 32 0x0) false) (bv 32 0xfffff)) (bv 32 0xfffff)) (bv 32 0x0) false))) (branch (== (var tmp_FCX) (var LCX)) nop nop))
+d "swap.w #0x80002487, d2" e5824722 0x000000 (seq (set EA (bv 32 0x80002487)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d2)) (set d2 (var tmp)))
+d "swap.w #0x40001a4b, d15" e54f8b91 0x000000 (seq (set EA (bv 32 0x40001a4b)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d15)) (set d15 (var tmp)))
+d "swap.w #0xa0000bae, d3" e5a3aee0 0x000000 (seq (set EA (bv 32 0xa0000bae)) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d3)) (set d3 (var tmp)))
+d "swap.w [p8+c]#0x1e5, d4" 69842574 0x000000 (seq (set index (& (>> (var a8) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a8) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a8) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d4)) (set d4 (var tmp)) (set new_index (+ (var index) (bv 32 0x1e5))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a8 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "swap.w [p0+c]#-0x19c, d0" 69002494 0x000000 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d0)) (set d0 (var tmp)) (set new_index (+ (var index) (bv 32 0xfffffe64))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "swap.w [p12+c]#-0x1e0, d6" 69c62084 0x000000 (seq (set index (& (>> (var a12) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a12) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a12) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (var d6)) (set d6 (var tmp)) (set new_index (+ (var index) (bv 32 0xfffffe20))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a12 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "swapmsk.w [p14+c]#0x1c5, e2" 69e38574 0x000000 (seq (set index (& (>> (var a14) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a14) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a14) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d3))) (& (var d2) (var d3)))) (set d2 (var tmp)) (set new_index (+ (var index) (bv 32 0x1c5))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a14 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "swapmsk.w [p0+c]#0x109, e8" 69098944 0x000000 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d9))) (& (var d8) (var d9)))) (set d8 (var tmp)) (set new_index (+ (var index) (bv 32 0x109))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "swapmsk.w [p0+c]#-0x5d, e12" 690da3e4 0x000000 (seq (set index (& (>> (var a0) (bv 32 0x0) false) (bv 32 0xffff))) (set length (& (>> (var a0) (bv 32 0x10) false) (bv 32 0xffff))) (set EA (+ (var a0) (var index))) (set tmp (loadw 0 32 (var EA))) (storew 0 (var EA) (| (& (var tmp) (~ (var d13))) (& (var d12) (var d13)))) (set d12 (var tmp)) (set new_index (+ (var index) (bv 32 0xffffffa3))) (set new_index (ite (sle (var new_index) (bv 32 0x0)) (+ (var new_index) (var length)) (mod (var new_index) (var length)))) (set a0 (append (cast 16 false (var length)) (cast 16 false (var new_index)))))
+d "syscall #-0x62" ade09900 0x000000 nop
+d "syscall #0xc8" ad808c00 0x000000 nop
+d "syscall #-0x29" ad709d00 0x000000 nop
+d "trapsv" 0d004005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1d) false) (bv 32 0x1)))) nop nop)
+d "trapsv" 0d004005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1d) false) (bv 32 0x1)))) nop nop)
+d "trapsv" 0d004005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1d) false) (bv 32 0x1)))) nop nop)
+d "trapv" 0d000005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1e) false) (bv 32 0x1)))) nop nop)
+d "trapv" 0d000005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1e) false) (bv 32 0x1)))) nop nop)
+d "trapv" 0d000005 0x000000 (branch (! (is_zero (& (>> (var PSW) (bv 32 0x1e) false) (bv 32 0x1)))) nop nop)
+d "unpack e4, d13" 4b0d8050 0x000000 (seq (set fp_exp (& (>> (var d13) (bv 32 0x17) false) (bv 32 0xff))) (set fp_frac (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x7fffff))) (set int_exp (ite (== (var fp_exp) (bv 32 0xff)) (bv 32 0xff) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0xffffff81) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (bv 32 0xffffff82) (- (var fp_exp) (bv 32 0x7f)))))) (set int_mant (ite (== (var fp_exp) (bv 32 0xff)) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0x0) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (| (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (<< (bv 32 0x1) (bv 32 0x1e) false)))))) (set temp (append (var int_exp) (var int_mant))) (set d4 (cast 32 false (var temp))) (set d5 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "unpack e6, d3" 4b038070 0x000000 (seq (set fp_exp (& (>> (var d3) (bv 32 0x17) false) (bv 32 0xff))) (set fp_frac (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x7fffff))) (set int_exp (ite (== (var fp_exp) (bv 32 0xff)) (bv 32 0xff) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0xffffff81) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (bv 32 0xffffff82) (- (var fp_exp) (bv 32 0x7f)))))) (set int_mant (ite (== (var fp_exp) (bv 32 0xff)) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0x0) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (| (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (<< (bv 32 0x1) (bv 32 0x1e) false)))))) (set temp (append (var int_exp) (var int_mant))) (set d6 (cast 32 false (var temp))) (set d7 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "unpack e8, d8" 4b088090 0x000000 (seq (set fp_exp (& (>> (var d8) (bv 32 0x17) false) (bv 32 0xff))) (set fp_frac (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x7fffff))) (set int_exp (ite (== (var fp_exp) (bv 32 0xff)) (bv 32 0xff) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0xffffff81) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (bv 32 0xffffff82) (- (var fp_exp) (bv 32 0x7f)))))) (set int_mant (ite (== (var fp_exp) (bv 32 0xff)) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (ite (&& (is_zero (var fp_exp)) (is_zero (var fp_frac))) (bv 32 0x0) (ite (&& (is_zero (var fp_exp)) (! (is_zero (var fp_frac)))) (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (| (<< (& (>> (var fp_frac) (bv 32 0x0) false) (bv 32 0x7fffff)) (bv 32 0x7) false) (<< (bv 32 0x1) (bv 32 0x1e) false)))))) (set temp (append (var int_exp) (var int_mant))) (set d8 (cast 32 false (var temp))) (set d9 (cast 32 false (& (>> (var temp) (bv 64 0x20) false) (bv 64 0xffffffff)))))
+d "updfl d4" 4b04c100 0x000000 (set PSW (| (& (var PSW) (bv 32 0xffffff)) (<< (& (| (& (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0xff)) (~ (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff)))) (& (& (>> (var d4) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var d4) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff)) (bv 32 0x18) false)))
+d "updfl d0" 4b00c100 0x000000 (set PSW (| (& (var PSW) (bv 32 0xffffff)) (<< (& (| (& (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0xff)) (~ (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (& (& (>> (var d0) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var d0) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff)) (bv 32 0x18) false)))
+d "updfl d2" 4b02c100 0x000000 (set PSW (| (& (var PSW) (bv 32 0xffffff)) (<< (& (| (& (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0xff)) (~ (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff)))) (& (& (>> (var d2) (bv 32 0x0) false) (bv 32 0xff)) (& (>> (var d2) (bv 32 0x8) false) (bv 32 0xff)))) (bv 32 0xff)) (bv 32 0x18) false)))
+d "utof d2, d2" 4b026121 0x0 (seq (set _a (var d2)) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_float ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_float ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_float ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_float ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_float ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d2 (fbits (var _result))) (set set_FX (|| (|| (is_nan (fcast_sfloat ieee754-bin32 rne (var _a))) (is_nan (var _result))) (|| (<. (fcast_sfloat ieee754-bin32 rne (var _a)) (var _result)) (<. (var _result) (fcast_sfloat ieee754-bin32 rne (var _a)))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "utof d5, d9" 4b096151 0x0 (seq (set _a (var d9)) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_float ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_float ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_float ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_float ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_float ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d5 (fbits (var _result))) (set set_FX (|| (|| (is_nan (fcast_sfloat ieee754-bin32 rne (var _a))) (is_nan (var _result))) (|| (<. (fcast_sfloat ieee754-bin32 rne (var _a)) (var _result)) (<. (var _result) (fcast_sfloat ieee754-bin32 rne (var _a)))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "utof d2, d3" 4b036121 0x0 (seq (set _a (var d3)) (set _result (let _mode (cast 8 false (& (>> (var PSW) (bv 32 0x18) false) (bv 32 0x3))) (let _x (var _a) (ite (== (var _mode) (bv 8 0x0)) (fcast_float ieee754-bin32 rne (var _x)) (ite (== (var _mode) (bv 8 0x1)) (fcast_float ieee754-bin32 rna (var _x)) (ite (== (var _mode) (bv 8 0x2)) (fcast_float ieee754-bin32 rtn (var _x)) (ite (== (var _mode) (bv 8 0x3)) (fcast_float ieee754-bin32 rtp (var _x)) (ite (== (var _mode) (bv 8 0x4)) (fcast_float ieee754-bin32 rtz (var _x)) (float 0 (bv 32 0x0) ))))))))) (set d2 (fbits (var _result))) (set set_FX (|| (|| (is_nan (fcast_sfloat ieee754-bin32 rne (var _a))) (is_nan (var _result))) (|| (<. (fcast_sfloat ieee754-bin32 rne (var _a)) (var _result)) (<. (var _result) (fcast_sfloat ieee754-bin32 rne (var _a)))))) (branch (var set_FX) (set PSW (| (& (var PSW) (bv 32 0xfbffffff)) (<< (& (bv 32 0x1) (bv 32 0x1)) (bv 32 0x1a) false))) nop) (set PSW (| (& (var PSW) (bv 32 0x7fffffff)) (<< (& (ite (var set_FX) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x1f) false))))
+d "wait" 0d008005 0x000000 nop
+d "wait" 0d008005 0x000000 nop
+d "wait" 0d008005 0x000000 nop
+d "xnor d14, d12, d2" 0f2cd0e0 0x000000 (set d14 (~ (^ (var d12) (var d2))))
+d "xnor d5, d7, d13" 0fd7d050 0x000000 (set d5 (~ (^ (var d7) (var d13))))
+d "xnor d8, d14, d11" 0fbed080 0x000000 (set d8 (~ (^ (var d14) (var d11))))
+d "xnor d2, d9, #0xf0" 8f09af21 0x000000 (set d2 (~ (^ (var d9) (bv 32 0xf0))))
+d "xnor d15, d10, #-0xab" 8f5ab5f1 0x000000 (set d15 (~ (^ (var d10) (bv 32 0xffffff55))))
+d "xnor d11, d15, #-0x93" 8fdfb6b1 0x000000 (set d11 (~ (^ (var d15) (bv 32 0xffffff6d))))
+d "xnor.t d7, d4, #4, d8, #0xb" 0784c475 0x000000 (set d7 (ite (! (^^ (! (is_zero (& (>> (var d4) (bv 32 0x4) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d8) (bv 32 0xb) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "xnor.t d2, d10, #0xd, d1, #0" 071a4d20 0x000000 (set d2 (ite (! (^^ (! (is_zero (& (>> (var d10) (bv 32 0xd) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d1) (bv 32 0x0) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "xnor.t d10, d8, #0x10, d10, #0x12" 07a850a9 0x000000 (set d10 (ite (! (^^ (! (is_zero (& (>> (var d8) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x12) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "xnor.t d7, d9, #0x10, d3, #1" 0739d070 0x000000 (set d7 (ite (! (^^ (! (is_zero (& (>> (var d9) (bv 32 0x10) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d3) (bv 32 0x1) false) (bv 32 0x1)))))) (bv 32 0x1) (bv 32 0x0)))
+d "xor d6, d14" c6e6 0x000000 (set d6 (^ (var d6) (var d14)))
+d "xor d12, d3" c63c 0x000000 (set d12 (^ (var d12) (var d3)))
+d "xor d10, d13" c6da 0x000000 (set d10 (^ (var d10) (var d13)))
+d "xor d15, d5, d1" 0f15c0f0 0x000000 (set d15 (^ (var d5) (var d1)))
+d "xor d11, d0, d15" 0ff0c0b0 0x000000 (set d11 (^ (var d0) (var d15)))
+d "xor d15, d5, d14" 0fe5c0f0 0x000000 (set d15 (^ (var d5) (var d14)))
+d "xor d0, d7, #-0x85" 8fb79701 0x000000 (set d0 (^ (var d7) (bv 32 0xffffff7b)))
+d "xor d13, d1, #0xf" 8ff180d1 0x000000 (set d13 (^ (var d1) (bv 32 0xf)))
+d "xor d13, d6, #0xfb" 8fb68fd1 0x000000 (set d13 (^ (var d6) (bv 32 0xfb)))
+d "xor d15, d6" c66f 0x000000 (set d15 (^ (var d15) (var d6)))
+d "xor.eq d9, d13, d14" 0bedf092 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d13) (var d14))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.eq d6, d12, d9" 0b9cf062 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d12) (var d9))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.eq d12, d12, d12" 0bccf0c2 0x000000 (set d12 (| (& (var d12) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d12) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d12) (var d12))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.eq d2, d9, #0x74" 8b49e725 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d9) (bv 32 0x74))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.eq d2, d1, #0xa2" 8b21ea25 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d1) (bv 32 0xa2))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.eq d9, d3, #0xe" 8be3e095 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (== (var d3) (bv 32 0xe))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d3, d5, d3" 0b353033 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d5) (var d3))) (== (var d5) (var d3)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d8, d3, d5" 0b533083 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d3) (var d5))) (== (var d3) (var d5)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d5, d0, d11" 0bb03053 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d0) (var d11))) (== (var d0) (var d11)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d3, d4, #0xac" 8bc46a36 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d4) (bv 32 0xac))) (== (var d4) (bv 32 0xac)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d2, d3, #0x79" 8b936726 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d3) (bv 32 0x79))) (== (var d3) (bv 32 0x79)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge d13, d10, #0x49" 8b9a64d6 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (sle (var d10) (bv 32 0x49))) (== (var d10) (bv 32 0x49)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d5, d11, d13" 0bdb4053 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d11) (var d13))) (== (var d11) (var d13)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d14, d2, d0" 0b0240e3 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d2) (var d0))) (== (var d2) (var d0)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d7, d2, d14" 0be24073 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d2) (var d14))) (== (var d2) (var d14)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d3, d8, #-0xb0" 8b089536 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d8) (bv 32 0xffffff50))) (== (var d8) (bv 32 0xffffff50)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d9, d2, #0xc6" 8b628c96 0x000000 (set d9 (| (& (var d9) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d9) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d2) (bv 32 0xc6))) (== (var d2) (bv 32 0xc6)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ge.u d11, d15, #-0x29" 8b7f9db6 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (|| (! (ule (var d15) (bv 32 0xffffffd7))) (== (var d15) (bv 32 0xffffffd7)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d14, d6, d0" 0b0610e3 0x000000 (set d14 (| (& (var d14) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d14) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d6) (var d0)) (! (== (var d6) (var d0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d8, d4, d3" 0b341083 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d4) (var d3)) (! (== (var d4) (var d3))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d15, d2, d12" 0bc210f3 0x000000 (set d15 (| (& (var d15) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d15) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d2) (var d12)) (! (== (var d2) (var d12))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d5, d7, #-0x70" 8b073956 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d7) (bv 32 0xffffff90)) (! (== (var d7) (bv 32 0xffffff90))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d13, d4, #0x32" 8b2423d6 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d4) (bv 32 0x32)) (! (== (var d4) (bv 32 0x32))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt d2, d3, #-0x31" 8bf33c26 0x000000 (set d2 (| (& (var d2) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d2) (bv 32 0x0) false) (bv 32 0x1)))) (&& (sle (var d3) (bv 32 0xffffffcf)) (! (== (var d3) (bv 32 0xffffffcf))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d3, d7, d3" 0b372033 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d7) (var d3)) (! (== (var d7) (var d3))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d13, d4, d8" 0b8420d3 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d4) (var d8)) (! (== (var d4) (var d8))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d6, d8, d13" 0bd82063 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (var d13)) (! (== (var d8) (var d13))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d11, d14, #0xe0" 8b0e4eb6 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d14) (bv 32 0xe0)) (! (== (var d14) (bv 32 0xe0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d7, d12, #0xf0" 8b0c4f76 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d12) (bv 32 0xf0)) (! (== (var d12) (bv 32 0xf0))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.lt.u d7, d8, #0xd4" 8b484d76 0x000000 (set d7 (| (& (var d7) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d7) (bv 32 0x0) false) (bv 32 0x1)))) (&& (ule (var d8) (bv 32 0xd4)) (! (== (var d8) (bv 32 0xd4))))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d6, d12, d13" 0bdc0063 0x000000 (set d6 (| (& (var d6) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d6) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d12) (var d13)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d8, d14, d6" 0b6e0083 0x000000 (set d8 (| (& (var d8) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d8) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d14) (var d6)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d13, d7, d6" 0b6700d3 0x000000 (set d13 (| (& (var d13) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d7) (var d6)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d5, d4, #-0x34" 8bc41c56 0x000000 (set d5 (| (& (var d5) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d5) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d4) (bv 32 0xffffffcc)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d11, d9, #-0xf5" 8bb910b6 0x000000 (set d11 (| (& (var d11) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d11) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d9) (bv 32 0xffffff0b)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.ne d3, d10, #-0x22" 8bea1d36 0x000000 (set d3 (| (& (var d3) (bv 32 0xfffffffe)) (<< (& (ite (^^ (! (is_zero (& (>> (var d3) (bv 32 0x0) false) (bv 32 0x1)))) (! (== (var d10) (bv 32 0xffffffde)))) (bv 32 0x1) (bv 32 0x0)) (bv 32 0x1)) (bv 32 0x0) false)))
+d "xor.t d0, d8, #0xc, d10, #0x1b" 07a8ec0d 0x000000 (set d0 (ite (^^ (! (is_zero (& (>> (var d8) (bv 32 0xc) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d10) (bv 32 0x1b) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "xor.t d10, d9, #0xc, d0, #0x18" 07096cac 0x000000 (set d10 (ite (^^ (! (is_zero (& (>> (var d9) (bv 32 0xc) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d0) (bv 32 0x18) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
+d "xor.t d0, d13, #0xb, d15, #0xc" 07fd6b06 0x000000 (set d0 (ite (^^ (! (is_zero (& (>> (var d13) (bv 32 0xb) false) (bv 32 0x1)))) (! (is_zero (& (>> (var d15) (bv 32 0xc) false) (bv 32 0x1))))) (bv 32 0x1) (bv 32 0x0)))
diff --git a/test/db/rzil/tricore b/test/db/rzil/tricore
index a87f7d50842..40ea2914874 100644
--- a/test/db/rzil/tricore
+++ b/test/db/rzil/tricore
@@ -15,3 +15,33 @@ FCX = 0x1
 Hello from RzIL!
 EOF
 RUN
+
+NAME=Testing the decryption in emulateme
+FILE=bins/tricore/emulateme-fp.tricore.elf
+TIMEOUT=30
+CMDS=<<EOF
+e io.cache=1
+aezi
+aezsu 0x80000450 # add.f
+ar d2
+aezsu 0x80000460 # sub.f
+ar d2
+aezsu 0x80000470 # mul.f
+ar d2
+aezsu 0x80000480 # div.f
+ar d2
+aezsu 0x80000498 # madd.f
+ar d2
+aezsu 0x800004b0 # msub.f
+ar d2
+EOF
+EXPECT=<<EOF
+d2 = 0x47157f3b
+d2 = 0x47157f3b
+d2 = 0x47157f3b
+d2 = 0x47157f3b
+d2 = 0x47e03ed8
+d2 = 0x489d1884
+EOF
+RUN
+