From f7192a642242a718290524a77797b11fcf6783b6 Mon Sep 17 00:00:00 2001
From: guan jian <148229859+rez5427@users.noreply.github.com>
Date: Fri, 11 Oct 2024 00:29:40 +0800
Subject: [PATCH] Don't clear vcsr.vxsat

Hardware should only set this bit. Clearing it is software's responsibility.

> then saturates the result to fit into SEW bits. If the result causes saturation, the vxsat bit is set.

Co-authored-by: Yui5427 <785369607@qq.com>
---
 model/riscv_insts_vext_utils.sail | 2 --
 1 file changed, 2 deletions(-)

diff --git a/model/riscv_insts_vext_utils.sail b/model/riscv_insts_vext_utils.sail
index 78c445bb7..ce2f1995a 100755
--- a/model/riscv_insts_vext_utils.sail
+++ b/model/riscv_insts_vext_utils.sail
@@ -418,7 +418,6 @@ function unsigned_saturation(len, elem) = {
     vcsr[vxsat] = 0b1;
     ones('m)
   } else {
-    vcsr[vxsat] = 0b0;
     elem['m - 1 .. 0]
   }
 }
@@ -433,7 +432,6 @@ function signed_saturation(len, elem) = {
     vcsr[vxsat] = 0b1;
     0b1 @ zeros('m - 1)
   } else {
-    vcsr[vxsat] = 0b0;
     elem['m - 1 .. 0]
   };
 }