From 922aecc452c73d6e4421d58d0c6329284e940247 Mon Sep 17 00:00:00 2001 From: Tim Hutt Date: Fri, 8 Sep 2023 08:59:58 +0100 Subject: [PATCH] Add OCaml emulator flag --- ocaml_emulator/platform.ml | 3 ++- ocaml_emulator/riscv_ocaml_sim.ml | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/ocaml_emulator/platform.ml b/ocaml_emulator/platform.ml index 902a0bc68..6bc93723b 100644 --- a/ocaml_emulator/platform.ml +++ b/ocaml_emulator/platform.ml @@ -11,6 +11,7 @@ let config_enable_dirty_update = ref false let config_enable_misaligned_access = ref false let config_mtval_has_illegal_inst_bits = ref false let config_enable_pmp = ref false +let config_enable_fiom = ref true let platform_arch = ref P.RV64 @@ -83,7 +84,7 @@ let enable_misaligned_access () = !config_enable_misaligned_access let mtval_has_illegal_inst_bits () = !config_mtval_has_illegal_inst_bits let enable_pmp () = !config_enable_pmp let enable_zfinx () = false -let enable_fiom () = true +let enable_fiom () = !config_enable_fiom let rom_base () = arch_bits_of_int64 P.rom_base let rom_size () = arch_bits_of_int !rom_size_ref diff --git a/ocaml_emulator/riscv_ocaml_sim.ml b/ocaml_emulator/riscv_ocaml_sim.ml index 6e612ad26..c5b427dd4 100644 --- a/ocaml_emulator/riscv_ocaml_sim.ml +++ b/ocaml_emulator/riscv_ocaml_sim.ml @@ -50,6 +50,9 @@ let options = Arg.align ([("-dump-dts", ("-mtval-has-illegal-inst-bits", Arg.Set P.config_mtval_has_illegal_inst_bits, " mtval stores instruction bits on an illegal instruction exception"); + ("-enable-fiom", + Arg.Set P.config_enable_fiom, + " enable FIOM (Fence of I/O implies Memory) bit in menvcfg"); ("-disable-rvc", Arg.Clear P.config_enable_rvc, " disable the RVC extension on boot");