From 12f72cfbd92dd973f4696bd03d919a98db0c9ab3 Mon Sep 17 00:00:00 2001 From: Christian Herber Date: Tue, 17 Sep 2024 09:53:11 +0200 Subject: [PATCH] Improved clarity regarding xcause when switching between CLIC and CLINT modes (#408) --- src/clic.adoc | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/clic.adoc b/src/clic.adoc index bdc1175..5a9dceb 100644 --- a/src/clic.adoc +++ b/src/clic.adoc @@ -908,13 +908,13 @@ through the trap handling process. 11:0 exccode[11:0] Exception/interrupt code ---- -The `mcause.mpp` and `mcause.mpie` fields typically mirror the `mstatus.mpp` and -`mstatus.mpie` fields, and are aliased into `mcause` to reduce context -save/restore code. For backwards compatibility in implementations supporting both CLINT and CLIC modes, when -switching to CLINT mode the new CLIC {cause} state field -({pil}) is zeroed. The other new CLIC {cause} fields, -{pp} and {pie}, appear as zero in the {cause} CSR but the corresponding -state bits in the `mstatus` register are not cleared. +The `mcause.mpp` and `mcause.mpie` fields mirror the `mstatus.mpp` and +`mstatus.mpie` fields when in CLIC mode to reduce context +save/restore code. +Else, these fields read as zero. +For backwards compatibility in implementations supporting both CLINT and CLIC modes, when +switching to CLINT mode the new CLIC {cause}.{pil} state field +is zeroed. If the hart is currently running at some privilege mode (`pp`) at some interrupt level (`pil`) and an enabled interrupt becomes pending at