From fd7523f49c12c335edb3d7c499786324697cb8e9 Mon Sep 17 00:00:00 2001 From: Joshua Wong Date: Sun, 22 Sep 2024 00:18:11 -0400 Subject: [PATCH] re-added reset override without check --- pyocd/target/family/target_ama3b.py | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/pyocd/target/family/target_ama3b.py b/pyocd/target/family/target_ama3b.py index 6afd92266..68bef181c 100644 --- a/pyocd/target/family/target_ama3b.py +++ b/pyocd/target/family/target_ama3b.py @@ -66,3 +66,15 @@ def reset_and_halt(self, reset_type=None): # restore reset vector catch setting self.write_memory(CortexM.DEMCR, demcr) + + def reset(self, reset_type=None): + # Save CortexM.DEMCR + demcr = self.read_memory(CortexM.DEMCR) + + # Clear the reset vector catch and make sure DWT and ITM blocks are enabled. + self.write32(CortexM.DEMCR, (demcr & ~CortexM.DEMCR_VC_CORERESET) | CortexM.DEMCR_TRCENA) + + super().reset(reset_type) + + # restore reset vector catch setting + self.write_memory(CortexM.DEMCR, demcr)