From 39b48ff4e9fe560f57ea996c840d79b031e80646 Mon Sep 17 00:00:00 2001 From: Francesco Conti Date: Fri, 26 Jul 2024 15:45:39 +0200 Subject: [PATCH] Add synthesis dependencies --- Bender.lock | 50 +++++++++++++++++++++++++++++++------------------- Bender.yml | 13 ++++--------- Makefile | 1 + 3 files changed, 36 insertions(+), 28 deletions(-) diff --git a/Bender.lock b/Bender.lock index ef42c996..36e46857 100644 --- a/Bender.lock +++ b/Bender.lock @@ -41,8 +41,8 @@ packages: - apb - common_cells axi: - revision: 9402c8a9ce0a7b5253c3c29e788612d771e8b5d6 - version: 0.39.3 + revision: 587355b77b8ce94dcd600efbd5d5bd118ff913a7 + version: 0.39.4 source: Git: https://github.com/pulp-platform/axi.git dependencies: @@ -57,8 +57,8 @@ packages: dependencies: - common_cells common_cells: - revision: 0d67563b6b592549542544f1abc0f43e5d4ee8b4 - version: 1.35.0 + revision: c27bce39ebb2e6bae52f60960814a2afca7bd4cb + version: 1.37.0 source: Git: https://github.com/pulp-platform/common_cells.git dependencies: @@ -80,28 +80,28 @@ packages: - fpnew - tech_cells_generic cv32e40x: - revision: fe5e7f41ad284b5aee583a727503bb6f1097daab + revision: null version: null source: - Git: https://github.com/pulp-platform/cv32e40x.git + Path: working_dir/cv32e40x dependencies: [] + decimate-xifu: + revision: null + version: null + source: + Path: working_dir/decimate-xifu + dependencies: + - cv32e40x fir-hwpe: - revision: b59edc4daf6fc44b4c0b3bb8a494351299c0423a - version: 2.0.0 + revision: null + version: null source: - Git: https://github.com/pulp-platform/fir-hwpe.git + Path: working_dir/fir-hwpe dependencies: - hci - hwpe-ctrl - hwpe-stream - zeroriscy - fir-xifu: - revision: 2b1a71fa7310c20ae0824b93669766713ebcec88 - version: 0.1.3 - source: - Git: https://github.com/pulp-platform/fir-xifu.git - dependencies: - - cv32e40x fpnew: revision: a8e0cba6dd50f357ece73c2c955d96efc3c6c315 version: null @@ -196,10 +196,10 @@ packages: - udma_sdio - udma_uart pulp_soc: - revision: c339e2ea69ad6d22daefe19a9140c48f72a5d46b + revision: null version: null source: - Git: https://github.com/pulp-platform/pulp_soc.git + Path: working_dir/pulp_soc dependencies: - adv_dbg_if - apb @@ -211,8 +211,8 @@ packages: - common_cells - cv32e40p - cv32e40x + - decimate-xifu - fir-hwpe - - fir-xifu - fpnew - ibex - jtag_pulp @@ -222,6 +222,12 @@ packages: - scm - tech_cells_generic - timer_unit + pulpissimo_essentials: + revision: null + version: null + source: + Path: working_dir/pulpissimo_essentials + dependencies: [] pulpissimo_optional_vips: revision: null version: null @@ -281,6 +287,12 @@ packages: Git: https://github.com/pulp-platform/tech_cells_generic.git dependencies: - common_verification + tech_cells_gf22fdx: + revision: a1e4e0485afeefb905d8120b27503bf691c45725 + version: null + source: + Git: git@iis-git.ee.ethz.ch:pulp-restricted/tech_cells_GF22FDX.git + dependencies: [] timer_unit: revision: 4c69615c89db9397a9747d6f6d6a36727854f0bc version: 1.0.3 diff --git a/Bender.yml b/Bender.yml index e5e198f1..fa23cb92 100644 --- a/Bender.yml +++ b/Bender.yml @@ -19,6 +19,8 @@ dependencies: pulp_soc: { git: "https://github.com/pulp-platform/pulp_soc.git", rev: efcl_ss-v0.2.2 } # branch fc/cv32e40x tbtools: { git: "https://github.com/pulp-platform/tbtools.git", version: 0.2.1 } tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.3 } + tech_cells_synthesis: { path: "target/gf22fdx/bender/tech_cells" } + pulpissimo_essentials: { path: "target/gf22fdx/bender/pulpissimo_essentials" } pulpissimo_padframe_rtl_sim: { path: "hw/padframe/pulpissimo_padframe_rtl_sim_autogen" } pulpissimo_padframe_fpga: { path: "hw/padframe/pulpissimo_padframe_fpga_autogen" } register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.1 } @@ -49,8 +51,8 @@ sources: - target: not(any(fpga, xilinx)) files: - hw/asic_autogen_rom.sv - - hw/soc_domain.sv - - hw/pulpissimo.sv + - hw/soc_domain.sv + - hw/pulpissimo.sv # rtl_sim - Generic version of pulpissimo used for non-verilator RTL simulation @@ -78,13 +80,6 @@ sources: - target/sim/tb/tb_pulp.sv - target/sim/tb/tb_pulp_simple.sv -workspace: - package_links: - deps/cv32e40x: cv32e40x - deps/fir-hwpe: fir-hwpe - deps/pulp_soc: pulp_soc - deps/fir-xifu: fir-xifu - vendor_package: # Import the GPIO repository directly. Since we have to regenerate the RTL # when we change the number GPIOs we cannot just depend on it as a regular diff --git a/Makefile b/Makefile index bb73cea0..133e9020 100644 --- a/Makefile +++ b/Makefile @@ -25,6 +25,7 @@ endif include target/sim/questasim/Makefile include target/lint/spyglass/Makefile include target/fpga/Makefile +include target/gf22fdx/synopsys/Makefile include $(PULPISSIMO_ROOT)/utils/utils.mk .PHONY: checkout