diff --git a/src/backend/idma_error_handler.sv b/src/backend/idma_error_handler.sv
index 3ef9f586..c8eb8968 100644
--- a/src/backend/idma_error_handler.sv
+++ b/src/backend/idma_error_handler.sv
@@ -136,7 +136,7 @@ module idma_error_handler #(
     // FIFO: read address
     // the read address FIFO is synchronized with the `i_w_last` FIFO in the backend. So at this
     // point now full handshaking is required.
-    idma_stream_fifo #(
+    stream_fifo_optimal_wrap #(
         .Depth        ( MetaFifoDepth ),
         .type_t       ( addr_t        ),
         .PrintInfo    ( PrintFifoInfo )
@@ -157,7 +157,7 @@ module idma_error_handler #(
     // FIFO: w address
     // the read address FIFO is synchronized with the `i_w_last` FIFO in the backend. So at this
     // point now full handshaking is required.
-    idma_stream_fifo #(
+    stream_fifo_optimal_wrap #(
         .Depth        ( MetaFifoDepth ),
         .type_t       ( addr_t        ),
         .PrintInfo    ( PrintFifoInfo )
diff --git a/src/backend/tpl/idma_transport_layer.sv.tpl b/src/backend/tpl/idma_transport_layer.sv.tpl
index a249a0b0..9c77ee7c 100644
--- a/src/backend/tpl/idma_transport_layer.sv.tpl
+++ b/src/backend/tpl/idma_transport_layer.sv.tpl
@@ -479,7 +479,7 @@ ${rendered_write_ports[write_port]}
     // Insert when data write happens
     // Remove when write response comes
 
-    idma_stream_fifo #(
+    stream_fifo_optimal_wrap #(
         .Depth        ( NumAxInFlight        ),
         .type_t       ( idma_pkg::protocol_e ),
         .PrintInfo    ( PrintFifoInfo        )