{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":344804443,"defaultBranch":"pulp-v1","name":"cva6","ownerLogin":"pulp-platform","currentUserCanPush":false,"isFork":true,"isEmpty":false,"createdAt":"2021-03-05T12:29:55.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/14332106?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1726849444.0","currentOid":""},"activityList":{"items":[{"before":"9ead29b9b0093f20b19cc89be4d333f9a49b3883","after":"af117d1687aab5cd3065d3ad900117adb3d771b9","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T21:35:53.000Z","pushType":"push","commitsCount":7,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)\n\nAssert `busy_o` whenever there is any outstanding AW transaction to\r\nprevent protocol violations (microreset during an inflight transaction).\r\n\r\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)"}},{"before":"1fd9d53747c02e509d626553773097934b176d68","after":"9ead29b9b0093f20b19cc89be4d333f9a49b3883","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T21:14:38.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"coherence: Pack Valid/Dirty SRAM (#36)\n\n* sram: Replace by sram_pulp\n\nDoes not introduce cuts and allows for parametric byte width\n\nSigned-off-by: Nils Wistoff \n\n* std_cache: Pack valid/dirty SRAM\n\nSigned-off-by: Nils Wistoff \n\n* std_cache: Decouple Valid/Dirty WE from Data WE\n\nSigned-off-by: Nils Wistoff \n\n---------\n\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"coherence: Pack Valid/Dirty SRAM (#36)"}},{"before":"acbf07105b3949800868c7601c839dad0510ade5","after":"1fd9d53747c02e509d626553773097934b176d68","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T20:55:17.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"Add self-invalidation coherence\n\nadded files required for compilation\n\nAdded target to test litmus tests\n\nPer byte dirty bit added to std dcache and tested\n\nbasic support for dual core instantiation\n\nSome automation added to the multi-core testing process\n\nminor changes\n\ntemporary ci modifications for working without sudo permissions\n\nbranch prova\n\nprova modified\n\nMulti core instantiation made generic\n\nTransition between WAIT_CRITICAL_WORD and WAIT_TAG removed if there is a flush - feature tested\n\nChanged repo with master branch and added masks for reservation at cacheline granularity because burst not supported\n\nFix the never return problem for non boot cores and dt modified for 2 cores\n\nAdded master branch of common_cells and compilation of new file in Makefile\n\nAdded transition between FLUSHING and FLUSHING to avoid multiple flushs during atomics\n\nUnused code removed and code commented\n\nAdded support to use the master branch of the axi_riscv_atomics repository\n\nAdded support for multiple ariane instances for fpga synthesis\n\nIncreased stack for big applications and reduced number of harts\n\nPheripherals configured to use multiple cores\n\nList of issues not solved encountered during the master thesis\n\nCo-authored-by: msc22h2 \nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"Add self-invalidation coherence"}},{"before":"8074d45670304328fbc599adabd839b78a743429","after":"acbf07105b3949800868c7601c839dad0510ade5","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T20:25:27.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"FPU: Bump to pulp-v0.1.1 (#25)\n\n* Bump FPU to pulp-v0.1.1\n\n* Remove vendor folder in CVFPU\n\n* Update Bender.lock\n\n* cvfpu: Exclude util directory\n\nSigned-off-by: Nils Wistoff \n\n* Bender.lock: Revert unrelated changes\n\nSigned-off-by: Nils Wistoff \n\n---------\n\nSigned-off-by: Nils Wistoff \nCo-authored-by: Nils Wistoff \nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"FPU: Bump to pulp-v0.1.1 (#25)"}},{"before":"84c5185476fab702aff75ce77f3b304307c34b4e","after":"8074d45670304328fbc599adabd839b78a743429","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T19:44:45.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"`tc_sram_wrapper`: Remove `translate_off` directive (#22)\n\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"tc_sram_wrapper: Remove translate_off directive (#22)"}},{"before":"b252df53154dbe9fbb893b11e0ee338a5569d0b7","after":"84c5185476fab702aff75ce77f3b304307c34b4e","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T19:43:39.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"Add CLIC support (#10)\n\n* Add initial CLIC support\n\nCo-authored-by: aottaviano \n\n* core: Fix propagation of CLIC configuration\n\n* clic: Fix syntax, preserve old irq signals\n\n* clic/ariane_testharness: Fix CVA6 portlist\n\n* fixup! clic/ariane_testharness: Fix CVA6 portlist\n\n* fixup! fixup! clic/ariane_testharness: Fix CVA6 portlist\n\n* clic/ariane_testharness: Define `meip` and `seip`\n\n* csr_regfile: Update `stvec` for CLIC\n\n* csr_regfile: Write CLIC mode to `mtvec` only if en\n\nSigned-off-by: Nils Wistoff \n\n* ci: Disable CLIC test\n\n* csr_regfile: Add `sintstatus` and `sintthresh` CSR\n\n* clic/id_stage: Add lower priv irq accept logic\n\n* fixup! clic/id_stage: Add lower priv irq accept logic\n\n* ariane_testharness: Unify CLIC and CLINT versions\n\n* Makefile: Add missing rv_plic dependency for clic\n\n* ariane_soc_pkg: Enable CLIC\n\n* Revert \"ci: Disable CLIC test\"\n\nThis reverts commit 4195d3f56b0eb60359b6120b835c21cd0afed4a5.\n\n* sram: Tie unused user signal to `0`\n\nto avoid undriven user signals in the AXI interconnect\n\n* id_stage: Ignore mie CSR when taking interrupts\n\nmstatus.mie is checked via `global_enable` within the decoder\n\n* ariane_tetsharness: Connect mtip and msip to CLIC\n\n* cva6_config_pkg: Disable CVXIF\n\n* ci: Use clic branch of riscv-tests\n\n* clic: Change one-hot to ID irq\n\n* clic: Aggregate core's CLIC logic in new module\n\n* clic: Add kill handshake\n\n* fixup! clic: Add kill handshake\n\n* decoder: Remove unused block\n\n* clic: Guard additions with param\n\n* ariane_xilinx: Unify CLIC and CLINT modes\n\n* clic: Remove mclicbase\n\nAccording to the updated spec\n\n* csr_regfile: Read 0, ignore writes from CLINT mode\n\n* clic: Stilistic fixes\n\n* csr_regfile: Add mtvt disclaimer\n\n* ci: Point to pulp branch\n\n* Revert \"sram: Tie unused user signal to `0`\"\n\nThis reverts commit add8320ee241b2c21713474cd04c98e445aadb36.\nWill be merged separately\n\n* ariane_pkg: Change struct param to pkg param\n\n* clic: Bump\n\n* Makefile: Update for clic\n\n* ariane_testharness: Connect handshake kill logic\n\n* ariane_xilinx: Connect handshake kill logic\n\n* ariane_soc_pkg: Reduce clic interrupts to 64\n\n* clic: Bump\n\n* ariane_testharness: Fix zero fill size for irqs\n\n* ariane_testharness/xilinx: Add unused cva6 ports\n\n* clic: Update CI\n\n* clic: Save/restore sil to/from scause\n\n* ci: Align clic testcase naming\n\n---------\n\nSigned-off-by: Nils Wistoff \nCo-authored-by: aottaviano \nCo-authored-by: bluew \nCo-authored-by: Enrico Zelioli \nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"Add CLIC support (#10)"}},{"before":null,"after":"b252df53154dbe9fbb893b11e0ee338a5569d0b7","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T16:24:04.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"Add fence.t (#14)\n\nExperimental feature for some security research\n\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"Add fence.t (#14)"}},{"before":"99ae53bde1a94b90c1d9bbbe7fe272a9336200a6","after":null,"ref":"refs/heads/paulsc/update","pushedAt":"2024-09-20T12:45:39.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"}},{"before":null,"after":"99ae53bde1a94b90c1d9bbbe7fe272a9336200a6","ref":"refs/heads/paulsc/update","pushedAt":"2024-09-19T20:27:57.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)\n\nAssert `busy_o` whenever there is any outstanding AW transaction to\r\nprevent protocol violations (microreset during an inflight transaction).\r\n\r\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)"}},{"before":"add40637878004159d3bb6cd93fab82cfbc460cb","after":"2c63d18610ac2fdd0588a642196a83850e7a2cb2","ref":"refs/heads/mc/zdl/exp-path","pushedAt":"2024-09-19T13:45:46.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"maicolciani","name":"Maicol Ciani","path":"/maicolciani","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/81198882?s=80&v=4"},"commit":{"message":"Further rebase fixes","shortMessageHtmlLink":"Further rebase fixes"}},{"before":"5388ad77554385215116809d1d7ced9e8f0ec5b2","after":"9a8849113373c6014330554429af45fcf52e95b6","ref":"refs/heads/mp/xif","pushedAt":"2024-09-16T17:11:18.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"mp-17","name":"Matteo Perotti","path":"/mp-17","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/39128909?s=80&v=4"},"commit":{"message":"[id_stage] Push to register on effective xif issue handshake","shortMessageHtmlLink":"[id_stage] Push to register on effective xif issue handshake"}},{"before":"99ae53bde1a94b90c1d9bbbe7fe272a9336200a6","after":null,"ref":"refs/heads/zx/cheshire_syn","pushedAt":"2024-09-10T16:09:27.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"Aquaticfuller","name":"zexinfu","path":"/Aquaticfuller","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/59481680?s=80&v=4"}},{"before":null,"after":"7e72ff5ca9bca1777d669385cd3c8cb44217a163","ref":"refs/heads/zx/cheshire_synth","pushedAt":"2024-09-10T16:08:49.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"Aquaticfuller","name":"zexinfu","path":"/Aquaticfuller","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/59481680?s=80&v=4"},"commit":{"message":"Add parameters for cva6 synthesis inside cheshire","shortMessageHtmlLink":"Add parameters for cva6 synthesis inside cheshire"}},{"before":null,"after":"99ae53bde1a94b90c1d9bbbe7fe272a9336200a6","ref":"refs/heads/zx/cheshire_syn","pushedAt":"2024-09-10T16:04:34.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"Aquaticfuller","name":"zexinfu","path":"/Aquaticfuller","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/59481680?s=80&v=4"},"commit":{"message":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)\n\nAssert `busy_o` whenever there is any outstanding AW transaction to\r\nprevent protocol violations (microreset during an inflight transaction).\r\n\r\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)"}},{"before":"b7a10dc75326b2108c1be61204eed223438ea929","after":"3ad3c176b556c8d12b9ead62cb9fb228b32aac78","ref":"refs/heads/paulsc/chs-hpdcache","pushedAt":"2024-09-10T15:54:03.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"paulsc96","name":"Paul Scheffler","path":"/paulsc96","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/49639136?s=80&v=4"},"commit":{"message":"hpdcache: Start work on autonomous prefetcher","shortMessageHtmlLink":"hpdcache: Start work on autonomous prefetcher"}},{"before":"b47df0291bc4a1104dd4d48b3c7bd9e9655faecc","after":"add40637878004159d3bb6cd93fab82cfbc460cb","ref":"refs/heads/mc/zdl/exp-path","pushedAt":"2024-09-10T14:32:46.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"maicolciani","name":"Maicol Ciani","path":"/maicolciani","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/81198882?s=80&v=4"},"commit":{"message":"Fix typo left from rebase","shortMessageHtmlLink":"Fix typo left from rebase"}},{"before":null,"after":"b47df0291bc4a1104dd4d48b3c7bd9e9655faecc","ref":"refs/heads/mc/zdl/exp-path","pushedAt":"2024-09-10T13:59:58.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"maicolciani","name":"Maicol Ciani","path":"/maicolciani","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/81198882?s=80&v=4"},"commit":{"message":"Updating correct package with AIA ext","shortMessageHtmlLink":"Updating correct package with AIA ext"}},{"before":null,"after":"5388ad77554385215116809d1d7ced9e8f0ec5b2","ref":"refs/heads/mp/xif","pushedAt":"2024-09-06T13:40:05.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"mp-17","name":"Matteo Perotti","path":"/mp-17","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/39128909?s=80&v=4"},"commit":{"message":"Update acc_dispatcher.sv","shortMessageHtmlLink":"Update acc_dispatcher.sv"}},{"before":null,"after":"d37459113680ee15d79f92860e244959cf94d95c","ref":"refs/heads/fix-upstream/fence","pushedAt":"2024-09-03T09:32:49.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"mp-17","name":"Matteo Perotti","path":"/mp-17","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/39128909?s=80&v=4"},"commit":{"message":"acc_dispatcher: don't issue instruction from buffer if flushing\n\nInstructions with side effects flush the unissued instructions from\nthe controller. The accelerator dispatcher buffer is flushed when\nthis happens and avoids accepting a new instruction, but was not\npreventing the actual issue during a flush cycle.","shortMessageHtmlLink":"acc_dispatcher: don't issue instruction from buffer if flushing"}},{"before":"986497311ede12dd6f9f86b010026172a66f6afc","after":null,"ref":"refs/heads/nw/axi-adapter-busy","pushedAt":"2024-09-03T09:13:40.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"niwis","name":"Nils Wistoff","path":"/niwis","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/6498078?s=80&v=4"}},{"before":"ee89dcc00e6c1a1f4cf97ee1835e950fcfdeebb5","after":"99ae53bde1a94b90c1d9bbbe7fe272a9336200a6","ref":"refs/heads/pulp-v1","pushedAt":"2024-09-03T09:13:27.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"niwis","name":"Nils Wistoff","path":"/niwis","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/6498078?s=80&v=4"},"commit":{"message":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)\n\nAssert `busy_o` whenever there is any outstanding AW transaction to\r\nprevent protocol violations (microreset during an inflight transaction).\r\n\r\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"axi_adapter/fence.t: Assert busy_o when any outstanding AW (#52)"}},{"before":"d666186c976a997a67e3e9ebad30292e048d1892","after":"cad74228b425fa11b7fdfa16ebe9995097e9db73","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-09-02T08:33:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Restored ECC version of the TLB","shortMessageHtmlLink":"Restored ECC version of the TLB"}},{"before":"584cd9479745886152309982c44dcc7ab98bf487","after":"d666186c976a997a67e3e9ebad30292e048d1892","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-28T12:05:53.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Added redundant MMU, (WIP: SPLIT signal for synthesis exploration)","shortMessageHtmlLink":"Added redundant MMU, (WIP: SPLIT signal for synthesis exploration)"}},{"before":"6ead2d9e411129ea2634349827b8b22ba4bef401","after":"584cd9479745886152309982c44dcc7ab98bf487","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-28T10:06:26.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"MMU TLB changed from ECC to redundancy","shortMessageHtmlLink":"MMU TLB changed from ECC to redundancy"}},{"before":null,"after":"694e59f99c7f8464d68ceef420c5f98a9fd48e87","ref":"refs/heads/nw/test-bender","pushedAt":"2024-08-27T17:54:19.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"niwis","name":"Nils Wistoff","path":"/niwis","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/6498078?s=80&v=4"},"commit":{"message":"[test] Use local bender version for integration CI\n\nSigned-off-by: Nils Wistoff ","shortMessageHtmlLink":"[test] Use local bender version for integration CI"}},{"before":"b620f5a3be74e201f33d7a806c97415c1b70b5ba","after":"6ead2d9e411129ea2634349827b8b22ba4bef401","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-27T16:10:27.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Added ECC to btb and ras. Fixed comb loop","shortMessageHtmlLink":"Added ECC to btb and ras. Fixed comb loop"}},{"before":"847cfe81e3ad050a73277f40fe3b2ac5d134dfbb","after":"b620f5a3be74e201f33d7a806c97415c1b70b5ba","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-27T07:49:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Propagated ecc_enable parameter to the bht","shortMessageHtmlLink":"Propagated ecc_enable parameter to the bht"}},{"before":"536eab569a3921aebc053c01849985775e5a7a9d","after":"847cfe81e3ad050a73277f40fe3b2ac5d134dfbb","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-26T15:30:13.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Fixed EccEnable parameter","shortMessageHtmlLink":"Fixed EccEnable parameter"}},{"before":null,"after":"536eab569a3921aebc053c01849985775e5a7a9d","ref":"refs/heads/og/bht_ecc","pushedAt":"2024-08-26T14:14:59.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"OttG","name":"Gianmarco Ottavi","path":"/OttG","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/35836648?s=80&v=4"},"commit":{"message":"Added ECC for BHT","shortMessageHtmlLink":"Added ECC for BHT"}},{"before":null,"after":"125c68eeb1a64c20db652be15491c19e03730b70","ref":"refs/heads/rt/astral-culsans/add-aw-lock","pushedAt":"2024-08-24T09:10:28.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"ricted98","name":"Riccardo Tedeschi","path":"/ricted98","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/58978462?s=80&v=4"},"commit":{"message":"Implement AW lock to handle W FIFO push","shortMessageHtmlLink":"Implement AW lock to handle W FIFO push"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOS0yMFQyMTozNTo1My4wMDAwMDBazwAAAAS8Yy1t","startCursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOS0yMFQyMTozNTo1My4wMDAwMDBazwAAAAS8Yy1t","endCursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOC0yNFQwOToxMDoyOC4wMDAwMDBazwAAAASi-dL2"}},"title":"Activity ยท pulp-platform/cva6"}