v0.23.2

Changes since 0.23.1

Fixed

• ips_list.yml: Add missing common_verification dependency.

v0.23.1

Changes since 0.23.0

Fixed

• axi_lite_demux_intf: Fix passing of req_t and resp_t parameters to axi_lite_demux.
• axi_lite_xbar: Add missing slv_a{w,r}_cache_i connections on axi_lite_to_axi instance.

v0.23.0

Changes since 0.22.1

Added

• axi_lite_regs: Add memory-mapped registers with AXI4-Lite slave port and the option to make individual bytes read-only.

Changed

• Interfaces AXI_LITE and AXI_LITE_DV: add aw_prot and ar_prot signals.
  • The AXI_LITE_ASSIGN* and AXI_LITE_SET* macros (in include/axi/assign.svh) have been updated to include the two new interface signals.
  • axi_test::axi_lite_driver: A new prot function argument has been added to the send_aw, send_ar, recv_aw, and recv_ar functions.
  • axi_test::rand_axi_lite_master:
    • A new w_prot and r_prot function argument has been added to the write and read function, respectively. The new arguments have a default value of '0.
    • The send_aws and the send_ars function now randomizes the prot signal of each AW and AR, respectively.
  • axi_test::rand_axi_slave: Display prot signal (but otherwise still ignore it).

Fixed

• rand_axi_master (in axi_test): Another fix to respect burst type restrictions when emitting ATOPs.

v0.22.1

Changes since 0.22.0

Fixed

• rand_axi_master (in axi_test): Respect burst type restrictions when emitting ATOPs.

v0.22.0

Changes since 0.21.0

Added

• axi_pkg: Add bufferable and modifiable helper functions.
• axi_dw_converter: Add support for single-beat fixed bursts in the downsizer and for fixed bursts of any length in the upsizer.

Changed

• axi_dw_downsizer (part of axi_dw_converter): Downsize regardless of the modifiable bit of incoming transactions. Previously, non-modifiable transactions whose attributes would have to be modified for downsizing were rejected with a slave error. As of this change, transactions are downsized and their attributes modified even if their modifiable bit is not set. This is permitted by a note in the AXI specification (page A4-65 of IHI0022H).

Fixed

• axi_dw_downsizer (part of axi_dw_converter): Fix condition for keeping transactions that have a smaller size than the master/downstream port unmodified.

v0.21.0

Changes since 0.20.0

Added

• axi_serializer: serialize transactions with different IDs to the same ID.

Changed

• axi_modify_address:
  • Simplify redundant slv_resp_t and mst_resp_t parameters to single axi_resp_t parameter.
  • Remove unnecessary slv_a{r,w}_addr_o outputs, which were fed back from the slv_req_i inputs.
    Those signals can instead be derived outside axi_modify_address.
• axi_modify_address_intf:
  • Change name of slave port to slv and master port to mst and change name of associated
    parameters to align them with repository conventions.
  • Change type of parameters to int unsigned because their values are unsigned.
  • Add parameters for data, ID, and user width to avoid derivation from interface, which is
    incompatible with many tools.
  • Add missing I/O suffixes to port names and align them with axi_modify_address.

Fixed

• axi_modify_address_intf: Fix type parameters passed to actual implementation.

v0.20.0

Changes since 0.19.0

Added

• axi_pkg: Add wrap_boundary function to calculate the boundary of a wrapping burst.
• axi_test: The random AXI master rand_axi_master can now emit wrapping bursts (but does not do
  so by default). Three new parameters control the burst types of the emitted transactions; not
  setting those parameters means the random master behaves as it did before this change.
• Interface AXI_BUS_DV: Add Monitor modport, in which all signals are inputs.
• axi/assign.svh: Add AXI_ASSIGN_MONITOR macro, which assigns an AXI_BUS to an
  AXI_BUS_DV.Monitor.
• Package axi_test: Add axi_scoreboard class, which checks that data read from a memory address
  matches data written to that address.

Changed

• axi_pkg:
  • The beat_addr function now supports all burst types. Due to this, the function has two new
    arguments (the length and type of the burst).
  • The beat_upper_byte and beat_lower_byte functions internally call beat_addr, so they have
    two new arguments as well.

v0.19.0

Changes since 0.18.1

Changed

• axi_lite_to_axi: Expose AxCACHE signals. It is now possible to define the cache signal of
  AXI transactions coming out of this module by driving the added slv_aw_cache_i and
  slv_ar_cache_i inputs. To retain the behavior prior to this change, tie those two inputs to
  zero.

v0.18.1

Changes since 0.18.0

Fixed

• axi_modify_address: Fix unconnected w_valid.
• axi_dw_converter: Fix internal inversion of up- and downconversion, which led to incorrect lane
  steering and serialization.
• rand_axi_master (in axi_test): In ATOP mode, this module could get stuck receiving an R beat
  when only writes (without ATOP read responses) were left to complete. This has been fixed.
• assign.svh: Remove spurious semicolons.
• axi_lite_to_apb: Fix message of assertion checking the strobe width.

v0.18.0

Changes since 0.17.0

Added

• axi_dw_converter: a data width converter between AXI interfaces of any data width. Depending on
  its parametrization, this module instantiates one of the following:
  • axi_dw_downsizer: a data width converter between a wide AXI master and a narrower slave.
  • axi_dw_upsizer: a data width converter between a narrow AXI master and a wider slave.