From f4a691a2c787fbab593eba4b37893cf494eb312f Mon Sep 17 00:00:00 2001 From: Andrew Scheller Date: Tue, 13 Aug 2024 00:01:07 +0100 Subject: [PATCH] Update doxygen group for clock functions (#1808) Fixes #1806 --- .../hardware_clocks/include/hardware/clocks.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/rp2_common/hardware_clocks/include/hardware/clocks.h b/src/rp2_common/hardware_clocks/include/hardware/clocks.h index b626c3825..bde83e0a9 100644 --- a/src/rp2_common/hardware_clocks/include/hardware/clocks.h +++ b/src/rp2_common/hardware_clocks/include/hardware/clocks.h @@ -383,14 +383,14 @@ static inline void clock_gpio_init(uint gpio, uint src, float div) bool clock_configure_gpin(clock_handle_t clock, uint gpio, uint32_t src_freq, uint32_t freq); /*! \brief Initialise the system clock to 48MHz - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * Set the system clock to 48MHz, and set the peripheral clock to match. */ void set_sys_clock_48mhz(void); /*! \brief Initialise the system clock - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * \param vco_freq The voltage controller oscillator frequency to be used by the SYS PLL * \param post_div1 The first post divider for the SYS PLL @@ -401,7 +401,7 @@ void set_sys_clock_48mhz(void); void set_sys_clock_pll(uint32_t vco_freq, uint post_div1, uint post_div2); /*! \brief Check if a given system clock frequency is valid/attainable - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * \param freq_hz Requested frequency * \param vco_freq_out On success, the voltage controlled oscillator frequency to be used by the SYS PLL @@ -412,7 +412,7 @@ void set_sys_clock_pll(uint32_t vco_freq, uint post_div1, uint post_div2); bool check_sys_clock_hz(uint32_t freq_hz, uint *vco_freq_out, uint *post_div1_out, uint *post_div2_out); /*! \brief Check if a given system clock frequency is valid/attainable - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * \param freq_khz Requested frequency * \param vco_freq_out On success, the voltage controlled oscillator frequency to be used by the SYS PLL @@ -423,7 +423,7 @@ bool check_sys_clock_hz(uint32_t freq_hz, uint *vco_freq_out, uint *post_div1_ou bool check_sys_clock_khz(uint32_t freq_khz, uint *vco_freq_out, uint *post_div1_out, uint *post_div2_out); /*! \brief Attempt to set a system clock frequency in hz - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * Note that not all clock frequencies are possible; it is preferred that you * use src/rp2_common/hardware_clocks/scripts/vcocalc.py to calculate the parameters @@ -445,7 +445,7 @@ static inline bool set_sys_clock_hz(uint32_t freq_hz, bool required) { } /*! \brief Attempt to set a system clock frequency in khz - * \ingroup pico_stdlib + * \ingroup hardware_clocks * * Note that not all clock frequencies are possible; it is preferred that you * use src/rp2_common/hardware_clocks/scripts/vcocalc.py to calculate the parameters