diff --git a/cpu/or32/insnset.c b/cpu/or32/insnset.c index 35c096c..4b29b73 100755 --- a/cpu/or32/insnset.c +++ b/cpu/or32/insnset.c @@ -904,7 +904,8 @@ INSTRUCTION (l_mtspr) { uint16_t regno = PARAM0 | PARAM2; uorreg_t value = PARAM1; - if (cpu_state.sprs[SPR_SR] & SPR_SR_SM) + if ((regno == SPR_FPCSR) || + (cpu_state.sprs[SPR_SR] & SPR_SR_SM)) mtspr(regno, value); else { PRINTF("WARNING: trying to write SPR while SR[SUPV] is cleared.\n"); @@ -915,10 +916,11 @@ INSTRUCTION (l_mfspr) { uint16_t regno = PARAM1 | PARAM2; uorreg_t value = mfspr(regno); - if ((cpu_state.sprs[SPR_SR] & SPR_SR_SM) || + if ((regno == SPR_FPCSR) || + (cpu_state.sprs[SPR_SR] & SPR_SR_SM) || // TODO: Check if this SPR should actually be allowed to be read with // SR's SM==0 and SUMRA==1 - (!(cpu_state.sprs[SPR_SR] & SPR_SR_SM) && + (!(cpu_state.sprs[SPR_SR] & SPR_SR_SM) && (cpu_state.sprs[SPR_SR] & SPR_SR_SUMRA))) SET_PARAM0(value); else diff --git a/testsuite/or1ksim.tests/Makefile.am b/testsuite/or1ksim.tests/Makefile.am index 82608f0..5adb752 100644 --- a/testsuite/or1ksim.tests/Makefile.am +++ b/testsuite/or1ksim.tests/Makefile.am @@ -52,6 +52,7 @@ EXTRA_DIST = cfg/or1k/acv-gpio.cfg \ cfg/or1k/fp.cfg \ cfg/or1knd/fp.cfg \ fp.exp \ + fpee.exp \ functest.exp \ int-test.exp \ cfg/or1k/inst-set-test.cfg \ diff --git a/testsuite/or1ksim.tests/Makefile.in b/testsuite/or1ksim.tests/Makefile.in index ab3724b..8dd9e1a 100644 --- a/testsuite/or1ksim.tests/Makefile.in +++ b/testsuite/or1ksim.tests/Makefile.in @@ -317,6 +317,7 @@ EXTRA_DIST = cfg/or1k/acv-gpio.cfg \ cfg/or1k/fp.cfg \ cfg/or1knd/fp.cfg \ fp.exp \ + fpee.exp \ functest.exp \ int-test.exp \ cfg/or1k/inst-set-test.cfg \ diff --git a/testsuite/or1ksim.tests/fpee.exp b/testsuite/or1ksim.tests/fpee.exp new file mode 100644 index 0000000..138b4ef --- /dev/null +++ b/testsuite/or1ksim.tests/fpee.exp @@ -0,0 +1,40 @@ +# fpee.exp. Floating point exception DejaGNU tests + +# Copyright (C) 2023 OpenRISC Developers + +# Contributor Stafford Horne + +# This file is part of OpenRISC 1000 Architectural Simulator. + +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 3 of the License, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. + +# You should have received a copy of the GNU General Public License along +# with this program. If not, see . */ + +# ----------------------------------------------------------------------------- +# This code is commented throughout for use with Doxygen. +# ----------------------------------------------------------------------------- + + +# Run the floating point test +run_or1ksim "fpee" \ + [list "Switching to User Mode" \ + "Enabling FPU Exceptions" \ + "Exceptions enabled, now DIV 3.14 / 0" \ + "Got fpe: " \ + "report(0x7f800000);" \ + "report(0x00000801);" \ + "One more, now MUL 3.14 * MAX" \ + "Got fpe: " \ + "report(0x7f800000);" \ + "report(0x00000109);" \ + "exit(0)"] \ + "fp.cfg" "fpee/fpee" diff --git a/testsuite/test-code-or1k/Makefile.am b/testsuite/test-code-or1k/Makefile.am index b2b5d87..d14af71 100644 --- a/testsuite/test-code-or1k/Makefile.am +++ b/testsuite/test-code-or1k/Makefile.am @@ -55,6 +55,7 @@ SUBDIRS = support \ ext \ fbtest \ fp \ + fpee \ testfloat \ functest \ flag \ diff --git a/testsuite/test-code-or1k/Makefile.in b/testsuite/test-code-or1k/Makefile.in index 1865610..cbfec1a 100644 --- a/testsuite/test-code-or1k/Makefile.in +++ b/testsuite/test-code-or1k/Makefile.in @@ -386,6 +386,7 @@ SUBDIRS = support \ ext \ fbtest \ fp \ + fpee \ testfloat \ functest \ flag \ diff --git a/testsuite/test-code-or1k/configure b/testsuite/test-code-or1k/configure index 14444d7..a25ad9c 100755 --- a/testsuite/test-code-or1k/configure +++ b/testsuite/test-code-or1k/configure @@ -13246,7 +13246,7 @@ printf "%s\n" "#define SIZEOF_INT 4" >>confdefs.h printf "%s\n" "#define SIZEOF_LONG 4" >>confdefs.h -ac_config_files="$ac_config_files Makefile acv-gpio/Makefile acv-uart/Makefile atomic/Makefile basic/Makefile cache/Makefile cbasic/Makefile cfg/Makefile dhry/Makefile dmatest/Makefile eth/Makefile except/Makefile except-test/Makefile exit/Makefile ext/Makefile fbtest/Makefile fp/Makefile testfloat/Makefile functest/Makefile flag/Makefile int-test/Makefile int-logger/Makefile inst-set-test/Makefile kbdtest/Makefile local-global/Makefile loop/Makefile mc-async/Makefile mc-dram/Makefile mc-ssram/Makefile mc-sync/Makefile mc-common/Makefile mem-test/Makefile mmu/Makefile mul/Makefile mycompress/Makefile support/Makefile tick/Makefile uos/Makefile upcalls/Makefile pcu/Makefile" +ac_config_files="$ac_config_files Makefile acv-gpio/Makefile acv-uart/Makefile atomic/Makefile basic/Makefile cache/Makefile cbasic/Makefile cfg/Makefile dhry/Makefile dmatest/Makefile eth/Makefile except/Makefile except-test/Makefile exit/Makefile ext/Makefile fbtest/Makefile fp/Makefile fpee/Makefile testfloat/Makefile functest/Makefile flag/Makefile int-test/Makefile int-logger/Makefile inst-set-test/Makefile kbdtest/Makefile local-global/Makefile loop/Makefile mc-async/Makefile mc-dram/Makefile mc-ssram/Makefile mc-sync/Makefile mc-common/Makefile mem-test/Makefile mmu/Makefile mul/Makefile mycompress/Makefile support/Makefile tick/Makefile uos/Makefile upcalls/Makefile pcu/Makefile" cat >confcache <<\_ACEOF @@ -14282,6 +14282,7 @@ do "ext/Makefile") CONFIG_FILES="$CONFIG_FILES ext/Makefile" ;; "fbtest/Makefile") CONFIG_FILES="$CONFIG_FILES fbtest/Makefile" ;; "fp/Makefile") CONFIG_FILES="$CONFIG_FILES fp/Makefile" ;; + "fpee/Makefile") CONFIG_FILES="$CONFIG_FILES fpee/Makefile" ;; "testfloat/Makefile") CONFIG_FILES="$CONFIG_FILES testfloat/Makefile" ;; "functest/Makefile") CONFIG_FILES="$CONFIG_FILES functest/Makefile" ;; "flag/Makefile") CONFIG_FILES="$CONFIG_FILES flag/Makefile" ;; diff --git a/testsuite/test-code-or1k/configure.ac b/testsuite/test-code-or1k/configure.ac index b5c7c9a..662124c 100644 --- a/testsuite/test-code-or1k/configure.ac +++ b/testsuite/test-code-or1k/configure.ac @@ -148,6 +148,7 @@ AC_CONFIG_FILES([Makefile \ ext/Makefile \ fbtest/Makefile \ fp/Makefile \ + fpee/Makefile \ testfloat/Makefile \ functest/Makefile \ flag/Makefile \ diff --git a/testsuite/test-code-or1k/except-test/except-test-s.S b/testsuite/test-code-or1k/except-test/except-test-s.S index 7e22592..cc062f8 100644 --- a/testsuite/test-code-or1k/except-test/except-test-s.S +++ b/testsuite/test-code-or1k/except-test/except-test-s.S @@ -66,7 +66,7 @@ stack: .extern excpt_itlbmiss .extern excpt_range .extern excpt_syscall - .extern excpt_break + .extern excpt_fpu .extern excpt_trap /* Our special text section is used to guarantee this code goes first @@ -334,14 +334,14 @@ syscall_vector: l.addi r3,r3,8 .org 0xd00 -break_vector: +fpu_vector: l.addi r1,r1,-120 l.sw 0x1c(r1),r9 l.sw 0x20(r1),r10 l.movhi r9,hi(store_regs) l.ori r9,r9,lo(store_regs) - l.movhi r10,hi(excpt_break) - l.ori r10,r10,lo(excpt_break) + l.movhi r10,hi(excpt_fpu) + l.ori r10,r10,lo(excpt_fpu) l.jr r9 l.nop l.nop diff --git a/testsuite/test-code-or1k/except-test/except-test.c b/testsuite/test-code-or1k/except-test/except-test.c index 71e6669..25aa2d6 100644 --- a/testsuite/test-code-or1k/except-test/except-test.c +++ b/testsuite/test-code-or1k/except-test/except-test.c @@ -143,7 +143,7 @@ extern unsigned long excpt_dtlbmiss; extern unsigned long excpt_itlbmiss; extern unsigned long excpt_range; extern unsigned long excpt_syscall; -extern unsigned long excpt_break; +extern unsigned long excpt_fpu; extern unsigned long excpt_trap; diff --git a/testsuite/test-code-or1k/except/except.S b/testsuite/test-code-or1k/except/except.S index 2eeed76..10abcad 100644 --- a/testsuite/test-code-or1k/except/except.S +++ b/testsuite/test-code-or1k/except/except.S @@ -51,7 +51,7 @@ stack: .extern excpt_itlbmiss .extern excpt_range .extern excpt_syscall - .extern excpt_break + .extern excpt_fpu .extern excpt_trap .section .except,"ax" @@ -235,15 +235,15 @@ syscall_vector: OR1K_DELAYED_NOP(OR1K_INST(l.jr r10)) .org 0xd00 -break_vector: +fpu_vector: l.addi r1,r1,-EXCEPT_STACK_SIZE l.sw 0x18(r1),r9 OR1K_DELAYED_NOP(OR1K_INST(l.jal store_regs)) l.nop l.movhi r9,hi(end_except) l.ori r9,r9,lo(end_except) - l.movhi r10,hi(excpt_break) - l.ori r10,r10,lo(excpt_break) + l.movhi r10,hi(excpt_fpu) + l.ori r10,r10,lo(excpt_fpu) l.lwz r10,0(r10) OR1K_DELAYED_NOP(OR1K_INST(l.jr r10)) diff --git a/testsuite/test-code-or1k/fpee/Makefile.am b/testsuite/test-code-or1k/fpee/Makefile.am new file mode 100644 index 0000000..6417090 --- /dev/null +++ b/testsuite/test-code-or1k/fpee/Makefile.am @@ -0,0 +1,34 @@ +# Makefile.am for or1ksim testsuite CPU test program: fpee + +# Copyright (C) OpenRISC Developers, 2023 + +# Contributor Stafford Horne + +# This file is part of OpenRISC 1000 Architectural Simulator. + +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 3 of the License, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. + +# You should have received a copy of the GNU General Public License along +# with this program. If not, see . */ + +# ----------------------------------------------------------------------------- +# This code is commented throughout for use with Doxygen. +# ----------------------------------------------------------------------------- + +# A test program of the floating point exceptions test +check_PROGRAMS = fpee + +fpee_SOURCES = fpee.c + +fpee_LDFLAGS = -T$(srcdir)/../default.ld + +fpee_LDADD = ../except/except.lo \ + ../support/libsupport.la diff --git a/testsuite/test-code-or1k/fpee/Makefile.in b/testsuite/test-code-or1k/fpee/Makefile.in new file mode 100644 index 0000000..c6e631f --- /dev/null +++ b/testsuite/test-code-or1k/fpee/Makefile.in @@ -0,0 +1,628 @@ +# Makefile.in generated by automake 1.16.5 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2021 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Makefile.am for or1ksim testsuite CPU test program: fpee + +# Copyright (C) OpenRISC Developers, 2023 + +# Contributor Stafford Horne + +# This file is part of OpenRISC 1000 Architectural Simulator. + +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 3 of the License, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. 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Test of Or1ksim floating point exceptions + + Copyright (C) 2023 OpenRISC Developers + + Contributor Stafford Horne + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +#include +#include + +#include "spr-defs.h" +#include "support.h" + +static void enter_user_mode() +{ + int32_t sr; + + sr = mfspr(SPR_SR); + sr &= ~SPR_SR_SM; + mtspr(SPR_SR, sr); +} + +void enable_fpe() +{ + unsigned long fpcsr = SPR_FPCSR_FPEE; + mtspr(SPR_FPCSR, fpcsr); +} + +/* A divide routine using the or1k FPU, this ensures the result + does not overwrite the inputs in case we have looping + as we saw with a bug in QEMU. + + Return uint32_t to avoid having to link to floating point + routines. + */ +static uint32_t fpu_div(float a, float b) +{ + uint32_t c = 0; + asm volatile("lf.div.s %0, %1, %2" + : "+r" (c) + : "r" (a), "r" (b)); + return c; +} + +/* A multiply routine using the or1k FPU, this ensure the result + does not overwrite the inputs in case we have looping as we + with a bug in QEMU. + + Return uint32_t to avoid having to link to floating point + routines, + */ +static uint32_t fpu_mul(float a, float b) +{ + uint32_t c = 0; + asm volatile("lf.mul.s %0, %1, %2" : "+r" (c) : "r" (a), "r" (b)); + return c; +} + +static int handle_count = 0; + +static void fpe_handler() +{ + uint32_t epcr = mfspr(SPR_EPCR_BASE); + + printf("Got fpe: %lx\n", epcr); + + if (handle_count++ > 0) + { + printf("Oh no, multiple exceptions, abort QEMU/Kernel/normal?!\n"); + exit(1); + } +} + +int main() +{ + uint32_t result; + + /* Setup FPU exception handler. */ + excpt_fpu = (unsigned long) fpe_handler; + + printf("Switching to User Mode\n"); + enter_user_mode(); + + printf("Enabling FPU Exceptions\n"); + enable_fpe(); + + printf("Exceptions enabled, now DIV 3.14 / 0!\n"); + result = fpu_div(3.14f, 0.0f); + /* Verify we see infinity. */ + report((unsigned long) result); + /* Verify we see DZF set. */ + report(mfspr(SPR_FPCSR)); + mtspr(SPR_FPCSR, mfspr(SPR_FPCSR) & ~SPR_FPCSR_ALLF); + + handle_count = 0; + printf("One more, now MUL 3.14 * MAX!\n"); + result = fpu_mul(3.14f, FLT_MAX); + /* Verify we see infinity. */ + report((unsigned long) result); + /* Verify we see Inexact and Overflow flags set. */ + report(mfspr(SPR_FPCSR)); + mtspr(SPR_FPCSR, mfspr(SPR_FPCSR) & ~SPR_FPCSR_ALLF); +} diff --git a/testsuite/test-code-or1k/mc-common/except-mc.S b/testsuite/test-code-or1k/mc-common/except-mc.S index 7ad98f5..db03beb 100644 --- a/testsuite/test-code-or1k/mc-common/except-mc.S +++ b/testsuite/test-code-or1k/mc-common/except-mc.S @@ -48,7 +48,7 @@ stack: .extern excpt_itlbmiss .extern excpt_range .extern excpt_syscall - .extern excpt_break + .extern excpt_fpu .extern excpt_trap .section .except,"ax" @@ -264,14 +264,14 @@ syscall_vector: OR1K_DELAYED_NOP(OR1K_INST(l.jr r10)) .org 0xd00 -break_vector: +fpu_vector: l.addi r1,r1,-116 l.sw 0x18(r1),r9 OR1K_DELAYED_NOP(OR1K_INST(l.jal store_regs)) l.movhi r9,hi(end_except) l.ori r9,r9,lo(end_except) - l.movhi r10,hi(excpt_break) - l.ori r10,r10,lo(excpt_break) + l.movhi r10,hi(excpt_fpu) + l.ori r10,r10,lo(excpt_fpu) l.lwz r10,0(r10) OR1K_DELAYED_NOP(OR1K_INST(l.jr r10)) diff --git a/testsuite/test-code-or1k/support/support.c b/testsuite/test-code-or1k/support/support.c index 29b2b97..7535a3a 100644 --- a/testsuite/test-code-or1k/support/support.c +++ b/testsuite/test-code-or1k/support/support.c @@ -48,7 +48,7 @@ unsigned long excpt_dtlbmiss = (unsigned long) excpt_dummy; unsigned long excpt_itlbmiss = (unsigned long) excpt_dummy; unsigned long excpt_range = (unsigned long) excpt_dummy; unsigned long excpt_syscall = (unsigned long) excpt_dummy; -unsigned long excpt_break = (unsigned long) excpt_dummy; +unsigned long excpt_fpu = (unsigned long) excpt_dummy; unsigned long excpt_trap = (unsigned long) excpt_dummy; diff --git a/testsuite/test-code-or1k/support/support.h b/testsuite/test-code-or1k/support/support.h index 62affd6..83626e0 100644 --- a/testsuite/test-code-or1k/support/support.h +++ b/testsuite/test-code-or1k/support/support.h @@ -90,7 +90,7 @@ extern unsigned long int excpt_dtlbmiss; extern unsigned long int excpt_itlbmiss; extern unsigned long int excpt_range; extern unsigned long int excpt_syscall; -extern unsigned long int excpt_break; +extern unsigned long int excpt_fpu; extern unsigned long int excpt_trap; #endif