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sim.cfg
executable file
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sim.cfg
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/* sim.cfg -- Simulator configuration script file
Copyright (C) 2001-2002, Marko Mlinar, [email protected]
Copyright (C) 2010, Embecosm Limited
Contributor Jeremy Bennett <[email protected]>
This file is part of OpenRISC 1000 Architectural Simulator.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3 of the License, or (at your option)
any later version.
This program is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
You should have received a copy of the GNU General Public License along
with this program. If not, see <http://www.gnu.org/licenses/>. */
/* -------------------------------------------------------------------------- */
/* The Ork1sim has various parameters, that can be set in configuration files
like this one. The user can specify a configuration file at startu[ with
the -f <filename.cfg> option.
The user guide (see the 'doc' directory) gives full details on
configuration files. This is a reference configuration, which may be used
as a starting point for customization.
A number of peripherals are mapped at standard addresses (above 0x80000000)
in the Verilog RTL of ORPSoC standard sitribution. The same values should
be used in Or1ksim section definitions to match the behavior of the Verilog
0x90000000 UART
0x91000000 GPIO
0x92000000 Ethernet
0x93000000 Memory controller
0x94000000 PS2 keyboard
0x97000000 Frame buffer
0x97100000 VGA
0x9a000000 DMA controller
0x9e000000 ATA disc
Section ordering matches that in the user guide. All optional peripherals
and functionality is disabled. Comments only list the possible entries and
values. Consult the user guide for their meaning.
Unless otherwise indicated, the first named option is the default. */
/* -------------------------------------------------------------------------- */
/* Simulator section
verbose = 0|1
debug = 0-9
profile = 0|1
prof_file = "<filename>" (default: "sim.profile")
mprofile = 0|1
mprof_file = "<filename>" (default: "sim.mprofile")
history = 0|1
exe_log = 0|1
exe_log_type = hardware|simple|software|default
exe_log_start = <value> (default: 0)
exe_log_end = <value> (default: never end)
exe_log_marker = <value> (default: no markers)
exe_log_file = "<filename>" (default: "executed.log")
exe_bin_insn_log = 0|1
exe_bin_insn_log_file = "<filename>" (default: "exe-insn.bin")
clkcycle = <value>[ps|ns|us|ms]
*/
section sim
clkcycle = 100ns
end
/* VAPI section
enabled = 0|1
server_port = <value> (default: 50000)
log_enabled = 0|1
hide_device_id = 0|1
vapi_log_file = "<filename>" (default "vapi.log")
*/
section VAPI
server_port = 50000
log_enabled = 0
vapi_log_file = "vapi.log"
end
/* CUC section
memory_order = none|weak|strong|exact (default: strong)
calling_convention = 0|1
enable_bursts = 0|1
no_multicycle = 0|1
timings_file = "<filename>" (default: virtex.tim)
*/
section cuc
memory_order = weak
calling_convention = 1
enable_bursts = 1
no_multicycle = 1
end
/* CPU section
ver = <value> (default: 0)
cfg = <value> (default: 0)
rev = <value> (default: 0)
upr = <value> (see user manual for default settings)
cfgr = <value> (default: 0x00000020)
sr = <value> (default: 0x00008001)
superscalar = 0|1
hazards = 0|1
dependstats = 0|1
sbuf_len = <value> (default: 0)
hardfloat = 0|1
*/
section cpu
ver = 0x12
cfgr = 0x20
rev = 0x0001
end
/* Memory section
type = unknown|random|unknown|pattern
random_seed = <value> (default: -1)
pattern = <value> (default: 0)
baseaddr = <hex_value> (default: 0)
size = <hex_value> (default: 1024)
name = "<string>" (default: "anonymous memory block")
ce = <value> (default: -1)
mc = <value> (default: 0)
delayr = <value> (default: 1)
delayw = <value> (default: 1)
log = "<filename>" (default: NULL)
*/
section memory
name = "RAM"
type = unknown
baseaddr = 0x00000000
size = 0x00800000
delayr = 1
delayw = 2
end
/* Data MMU section
enabled = 0|1
nsets = <value> (default: 1)
nways = <value> (default: 1)
pagesize = <value> (default: 8192)
entrysize = <value> (default: 1)
ustates = <value> (default: 1)
hitdelay = <value> (default: 1)
missdelay = <value> (default: 1)
*/
section dmmu
enabled = 0
nsets = 64
nways = 1
pagesize = 8192
hitdelay = 0
missdelay = 0
end
/* Instruction MMU section
enabled = 0|1
nsets = <value> (default: 1)
nways = <value> (default: 1)
pagesize = <value> (default: 8192)
entrysize = <value> (default: 1)
ustates = <value> (default: 1)
hitdelay = <value> (default: 1)
missdelay = <value> (default: 1)
*/
section immu
enabled = 0
nsets = 64
nways = 1
pagesize = 8192
hitdelay = 0
missdelay = 0
end
/* Data cache section
enabled = 0|1
nsets = <value> (default: 1)
nways = <value> (default: 1)
blocksize = <value> (default: 16)
ustates = <value> (default: 2)
load_hitdelay = <value> (default: 2)
load_missdelay = <value> (default: 2)
store_hitdelay = <value> (default: 0)
store_missdelay = <value> (default: 0)
*/
section dc
enabled = 0
nsets = 256
nways = 1
blocksize = 16
load_hitdelay = 0
load_missdelay = 0
store_hitdelay = 0
store_missdelay = 0
end
/* Instruction cache section
enabled = 0|1
nsets = <value> (default: 1)
nways = <value> (default: 1)
blocksize = <value> (default: 16)
ustates = <value> (default: 2)
hitdelay = <value> (default: 1)
missdelay = <value> (default: 1)
*/
section ic
enabled = 0
nsets = 256
nways = 1
blocksize = 16
hitdelay = 0
missdelay = 0
end
/* Programmable interrupt controller section
enabled = 0|1
edge_trigger = 0|1 (default: 1)
*/
section pic
enabled = 0
end
/* Power management section
enabled = 0|1
*/
section pm
enabled = 0
end
/* Branch prediction section
enabled = 0|1
btic = 0|1
sbp_bf_fwd = 0|1
sbp_bnf_fwd = 0|1
hitdelay = <value> (default: 0)
missdelay = <value> (default: 0)
*/
section bpb
enabled = 0
end
/* Debug unit section
enabled = 0|1
rsp_enabled = 0|1
rsp_port = <value> (default: 51000)
vapi_id = <value> (default: 0)
*/
section debug
enabled = 0
end
/* Memory controller section
enabled = 0|1
baseaddr = <value> (default: 0)
POC = <value> (default: 0)
index = <value> (default: 0)
*/
section mc
enabled = 0
baseaddr = 0x93000000
POC = 0x0000000a /* 32 bit SSRAM */
index = 0
end
/* UART section
enabled = 0|1
baseaddr = <value> (default: 0)
channel = "value>" (default: "xterm:")
irq = <value> (default: 0)
16550 = 0|1
jitter = <value> (default: 0)
vapi_id = <value> (default: 0)
*/
section uart
enabled = 0
baseaddr = 0x90000000
irq = 2
16550 = 1
end
/* DMA section
enabled = 0|1
baseaddr = <value> (default: 0)
irq = <value> (default: 0)
vapi_id = <value> (default: 0)
*/
section dma
enabled = 0
baseaddr = 0x9a000000
irq = 11
end
/* Ethernet section
enabled = 0|1
baseaddr = <value> (default: 0)
dma = <value> (default: 0)
irq = <value> (default: 0)
rtx_type = 0|1
rx_channel = <value> (default: 0)
tx_channel = <value> (default: 0)
rxfile = "<filename>" (default: "eth_rx")
txfile = "<filename>" (default: "eth_rx")
sockif = "<service>" (default: "or1ksim_eth")
vapi_id = <value> (default: 0)
*/
section ethernet
enabled = 0
baseaddr = 0x92000000
irq = 4
rtx_type = 0
end
/* GPIO section
enabled = 0|1
baseaddr = <value> (default: 0)
irq = <value> (default: 0)
base_vapi_id = <value> (default: 0)
*/
section gpio
enabled = 0
baseaddr = 0x91000000
irq = 3
base_vapi_id = 0x0200
end
/* VGA section
enabled = 0|1
baseaddr = <value> (default: 0)
irq = <value> (default: 0)
refresh_rate = <value> (default: cycles equivalent to 50Hz)
filename = "<filename>" (default: "vga_out))
*/
section vga
enabled = 0
baseaddr = 0x97100000
irq = 8
end
/* Frame buffer section
enabled = 0|1
baseaddr = <value> (default: 0)
refresh_rate = <value> (default: cycles equivalent to 50Hz)
filename = "<filename>" (default: "fb_out))
*/
section fb
enabled = 0
baseaddr = 0x97000000
end
/* PS2 keyboard section
This section configures the PS/2 compatible keyboard
enabled = 0|1
baseaddr = <value> (default: 0)
irq = <value> (default: 0)
rxfile = "<filename>" (default: "kbd_in")
*/
section kbd
enabled = 1
baseaddr = 0x94000000
irq = 5
end
/* ATA disc section
enabled = 0|1
baseaddr = <value> (default: 0)
irq = <value> (default: 0)
dev_id = 1|2|3
rev = 0-15 (default: 1)
pio_mode0_t1 = 0-255 (default: 6)
pio_mode0_t2 = 0-255 (default: 28)
pio_mode0_t4 = 0-255 (default: 2)
pio_mode0_teoc = 0-255 (default: 23)
dma_mode0_tm = 0-255 (default: 4)
dma_mode0_td = 0-255 (default: 21)
dma_mode0_teoc = 0-255 (default: 21)
device = 0|1
Device specific:
type = 0|1|2
file = "<filename>" (default: "ata_file<type>")
size = <value> (default: 0)
packet = 0|1
firmware = "<string>" (default: "02207031")
heads = <value> (default: 7)
sectors = <value> (default: 32)
mwdma = 2|1|0|-1
pio = 4|3|2|1|0
*/
section ata
enabled = 0
baseaddr = 0x9e000000
irq = 15
device 0
type = 1
size = 1
enddevice
end
/* Generic peripheral section
enabled = 0|1
baseaddr = <value> (default: 0)
size = <value> (default: 0)
name = "<string>" (default: "anonymous external peripheral")
byte_enabled = 1|0
hw_enabled = 1|0
word_enabled = 1|0
*/
section generic
enabled = 0
end