From 96874d1ccbfa1f8373be1f3b2b49611c5229b5ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bruno=20S=C3=A1?= <36567874+ninolomata@users.noreply.github.com> Date: Mon, 29 Apr 2024 13:58:18 +0100 Subject: [PATCH] fix hypervisor configs (#2083) --- core/include/cv64a6_imafdch_sv39_config_pkg.sv | 13 +++++++++++++ core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/core/include/cv64a6_imafdch_sv39_config_pkg.sv b/core/include/cv64a6_imafdch_sv39_config_pkg.sv index 0c13873ef3..d0234321f8 100644 --- a/core/include/cv64a6_imafdch_sv39_config_pkg.sv +++ b/core/include/cv64a6_imafdch_sv39_config_pkg.sv @@ -78,6 +78,8 @@ package cva6_config_pkg; localparam CVA6ConfigRvfiTrace = 1; localparam config_pkg::cva6_user_cfg_t cva6_cfg = '{ + XLEN: unsigned'(CVA6ConfigXlen), + FpgaEn: bit'(CVA6ConfigFpgaEn), NrCommitPorts: unsigned'(CVA6ConfigNrCommitPorts), AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth), AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth), @@ -99,6 +101,7 @@ package cva6_config_pkg; XFVec: bit'(CVA6ConfigFVecEn), CvxifEn: bit'(CVA6ConfigCvxifEn), RVZiCond: bit'(CVA6ConfigRVZiCond), + NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries), PerfCounterEn: bit'(CVA6ConfigPerfCounterEn), MmuPresent: bit'(CVA6ConfigMmuPresent), RVS: bit'(1), @@ -127,7 +130,17 @@ package cva6_config_pkg; MaxOutstandingStores: unsigned'(7), DebugEn: bit'(1), AxiBurstWriteEn: bit'(0), + IcacheByteSize: unsigned'(CVA6ConfigIcacheByteSize), + IcacheSetAssoc: unsigned'(CVA6ConfigIcacheSetAssoc), + IcacheLineWidth: unsigned'(CVA6ConfigIcacheLineWidth), DCacheType: CVA6ConfigDcacheType, + DcacheByteSize: unsigned'(CVA6ConfigDcacheByteSize), + DcacheSetAssoc: unsigned'(CVA6ConfigDcacheSetAssoc), + DcacheLineWidth: unsigned'(CVA6ConfigDcacheLineWidth), + DataUserEn: unsigned'(CVA6ConfigDataUserEn), + WtDcacheWbufDepth: int'(CVA6ConfigWtDcacheWbufDepth), + FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth), + FetchUserEn: unsigned'(CVA6ConfigFetchUserEn), InstrTlbEntries: int'(CVA6ConfigInstrTlbEntries), DataTlbEntries: int'(CVA6ConfigDataTlbEntries), NrLoadPipeRegs: int'(CVA6ConfigNrLoadPipeRegs), diff --git a/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv b/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv index 4571008005..09f6dd430f 100644 --- a/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv +++ b/core/include/cv64a6_imafdch_sv39_wb_config_pkg.sv @@ -78,6 +78,8 @@ package cva6_config_pkg; localparam CVA6ConfigRvfiTrace = 1; localparam config_pkg::cva6_user_cfg_t cva6_cfg = '{ + XLEN: unsigned'(CVA6ConfigXlen), + FpgaEn: bit'(CVA6ConfigFpgaEn), NrCommitPorts: unsigned'(CVA6ConfigNrCommitPorts), AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth), AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth), @@ -99,6 +101,7 @@ package cva6_config_pkg; XFVec: bit'(CVA6ConfigFVecEn), CvxifEn: bit'(CVA6ConfigCvxifEn), RVZiCond: bit'(CVA6ConfigRVZiCond), + NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries), PerfCounterEn: bit'(CVA6ConfigPerfCounterEn), MmuPresent: bit'(CVA6ConfigMmuPresent), RVS: bit'(1), @@ -127,7 +130,17 @@ package cva6_config_pkg; MaxOutstandingStores: unsigned'(7), DebugEn: bit'(1), AxiBurstWriteEn: bit'(0), + IcacheByteSize: unsigned'(CVA6ConfigIcacheByteSize), + IcacheSetAssoc: unsigned'(CVA6ConfigIcacheSetAssoc), + IcacheLineWidth: unsigned'(CVA6ConfigIcacheLineWidth), DCacheType: CVA6ConfigDcacheType, + DcacheByteSize: unsigned'(CVA6ConfigDcacheByteSize), + DcacheSetAssoc: unsigned'(CVA6ConfigDcacheSetAssoc), + DcacheLineWidth: unsigned'(CVA6ConfigDcacheLineWidth), + DataUserEn: unsigned'(CVA6ConfigDataUserEn), + WtDcacheWbufDepth: int'(CVA6ConfigWtDcacheWbufDepth), + FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth), + FetchUserEn: unsigned'(CVA6ConfigFetchUserEn), InstrTlbEntries: int'(CVA6ConfigInstrTlbEntries), DataTlbEntries: int'(CVA6ConfigDataTlbEntries), NrLoadPipeRegs: int'(CVA6ConfigNrLoadPipeRegs),