From 2b3a82f2ccde1e10e306430c26e43cf0097017d8 Mon Sep 17 00:00:00 2001
From: Zbigniew Chamski <zbigniew.chamski@thalesgroup.com>
Date: Tue, 1 Oct 2024 17:40:00 +0200
Subject: [PATCH] Fix CVV#2531: Make mie.MSIE and mip.MSIP RO-zero, prevent SW
 writes to mip.

---
 config/gen_from_riscv_config/cv32a65x/spike/spike.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml b/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml
index 5ec2866d07..3d9646a554 100644
--- a/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml
+++ b/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml
@@ -29,6 +29,12 @@ spike_param_tree:
       status_vs_field_we_enable: false
       mstatus_write_mask: 136
       mstatus_override_mask: 6144
+      mie_write_mask: 0x00000880
+      mie_override_mask: 0xfffff77f
+      mie_override_value: 0x00000000
+      mip_write_mask: 0x00000000
+      mip_override_mask: 0xfffff77f
+      mip_override_value: 0x00000000
       mtval_write_mask: 0
       tinfo_accessible: 0
       mscontext_accessible: 0