From 2ac676d931f1d848c81460d76dd90f1ed823e1f1 Mon Sep 17 00:00:00 2001 From: Fatima Saleem <63645133+fatimasaleem@users.noreply.github.com> Date: Fri, 15 Sep 2023 11:19:50 +0500 Subject: [PATCH] Add Zicond Extension support in CVA6 (#1405) --- core/alu.sv | 7 ++++++ core/cva6.sv | 1 + core/decoder.sv | 23 +++++++++++++++---- core/include/ariane_pkg.sv | 4 +++- core/include/config_pkg.sv | 3 +++ core/include/cv32a60x_config_pkg.sv | 2 ++ core/include/cv32a6_embedded_config_pkg.sv | 3 +++ .../cv32a6_ima_sv32_fpga_config_pkg.sv | 2 ++ core/include/cv32a6_imac_sv0_config_pkg.sv | 2 ++ core/include/cv32a6_imac_sv32_config_pkg.sv | 2 ++ core/include/cv32a6_imafc_sv32_config_pkg.sv | 2 ++ .../cv64a6_imadfcv_sv39_polara_config_pkg.sv | 1 + core/include/cv64a6_imafdc_sv39_config_pkg.sv | 2 ++ ...cv64a6_imafdc_sv39_openpiton_config_pkg.sv | 2 ++ .../include/cv64a6_imafdcv_sv39_config_pkg.sv | 1 + 15 files changed, 52 insertions(+), 5 deletions(-) diff --git a/core/alu.sv b/core/alu.sv index 90cdf9396d..a26d188d06 100644 --- a/core/alu.sv +++ b/core/alu.sv @@ -302,6 +302,13 @@ module alu import ariane_pkg::*; #( default: ; // default case to suppress unique warning endcase end + if (CVA6Cfg.RCONDEXT) begin + unique case (fu_data_i.operation) + CZERO_EQZ : result_o = (|fu_data_i.operand_b) ? fu_data_i.operand_a : '0; // move zero to rd if rs2 is equal to zero else rs1 + CZERO_NEZ : result_o = (|fu_data_i.operand_b) ? '0 : fu_data_i.operand_a; // move zero to rd if rs2 is nonzero else rs1 + default: ; // default case to suppress unique warning + endcase + end //VCS coverage on end endmodule diff --git a/core/cva6.sv b/core/cva6.sv index 818d7459c2..216018f2f2 100644 --- a/core/cva6.sv +++ b/core/cva6.sv @@ -178,6 +178,7 @@ module cva6 import ariane_pkg::*; #( CVA6Cfg.RVC, CVA6Cfg.XFVec, CVA6Cfg.CvxifEn, + CVA6Cfg.RCONDEXT, // Extended bit'(RVF), bit'(RVD), diff --git a/core/decoder.sv b/core/decoder.sv index b55158e2ca..392b305f65 100644 --- a/core/decoder.sv +++ b/core/decoder.sv @@ -46,6 +46,7 @@ module decoder import ariane_pkg::*; #( ); logic illegal_instr; logic illegal_instr_bm; + logic illegal_instr_zic; logic illegal_instr_non_bm; // this instruction is an environment call (ecall), it is handled like an exception logic ecall; @@ -104,6 +105,7 @@ module decoder import ariane_pkg::*; #( illegal_instr = 1'b0; illegal_instr_non_bm = 1'b0; illegal_instr_bm = 1'b0; + illegal_instr_zic = 1'b0; instruction_o.pc = pc_i; instruction_o.trans_id = '0; instruction_o.fu = NONE; @@ -577,11 +579,24 @@ module decoder import ariane_pkg::*; #( illegal_instr_bm = 1'b1; end endcase - illegal_instr = illegal_instr_non_bm & illegal_instr_bm; - //VCS coverage on - end else begin - illegal_instr = illegal_instr_non_bm; end + if (CVA6Cfg.RCONDEXT) begin + unique case ({instr.rtype.funct7, instr.rtype.funct3}) + //Conditional move + {7'b000_0111, 3'b101}: instruction_o.op = ariane_pkg::CZERO_EQZ; // czero.eqz + {7'b000_0111, 3'b111}: instruction_o.op = ariane_pkg::CZERO_NEZ; // czero.nez + default: begin + illegal_instr_zic = 1'b1; + end + endcase + end + //VCS coverage on + unique case ({ariane_pkg::BITMANIP, CVA6Cfg.RCONDEXT}) + 2'b00 : illegal_instr = illegal_instr_non_bm; + 2'b01 : illegal_instr = illegal_instr_non_bm & illegal_instr_zic; + 2'b10 : illegal_instr = illegal_instr_non_bm & illegal_instr_bm; + 2'b11 : illegal_instr = illegal_instr_non_bm & illegal_instr_bm & illegal_instr_zic; + endcase end end diff --git a/core/include/ariane_pkg.sv b/core/include/ariane_pkg.sv index 6abfe48a29..2d7e2b330d 100644 --- a/core/include/ariane_pkg.sv +++ b/core/include/ariane_pkg.sv @@ -503,7 +503,9 @@ package ariane_pkg; // Bitmanip Logical with negate op (Bitmanip) ANDN, ORN, XNOR, // Accelerator operations - ACCEL_OP, ACCEL_OP_FS1, ACCEL_OP_FD, ACCEL_OP_LOAD, ACCEL_OP_STORE + ACCEL_OP, ACCEL_OP_FS1, ACCEL_OP_FD, ACCEL_OP_LOAD, ACCEL_OP_STORE, + // Zicond instruction + CZERO_EQZ, CZERO_NEZ } fu_op; typedef struct packed { diff --git a/core/include/config_pkg.sv b/core/include/config_pkg.sv index 3be517913b..76b62ea4b9 100644 --- a/core/include/config_pkg.sv +++ b/core/include/config_pkg.sv @@ -31,6 +31,7 @@ package config_pkg; bit RVC; bit XFVec; bit CvxifEn; + bit RCONDEXT; // Calculated bit RVF; bit RVD; @@ -66,6 +67,7 @@ package config_pkg; bit'(1), // RVC bit'(0), // XFVec bit'(1), // CvxifEn + bit'(0), // EnableZiCond // Extended bit'(0), // RVF bit'(0), // RVD @@ -99,6 +101,7 @@ package config_pkg; bit'(0), // RVC bit'(0), // XFVec bit'(0), // CvxifEn + bit'(0), // EnableZiCond // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a60x_config_pkg.sv b/core/include/cv32a60x_config_pkg.sv index 2d2660cb9f..4b4669ec7e 100644 --- a/core/include/cv32a60x_config_pkg.sv +++ b/core/include/cv32a60x_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 1; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a6_embedded_config_pkg.sv b/core/include/cv32a6_embedded_config_pkg.sv index f52645a02a..5330428948 100644 --- a/core/include/cv32a6_embedded_config_pkg.sv +++ b/core/include/cv32a6_embedded_config_pkg.sv @@ -27,6 +27,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 0; localparam CVA6ConfigBExtEn = 1; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 1; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -90,6 +91,8 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn + // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv index 8ed9997614..40ad1d8d07 100644 --- a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv +++ b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 0; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a6_imac_sv0_config_pkg.sv b/core/include/cv32a6_imac_sv0_config_pkg.sv index fd4b55b45e..000167f5bf 100644 --- a/core/include/cv32a6_imac_sv0_config_pkg.sv +++ b/core/include/cv32a6_imac_sv0_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 0; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a6_imac_sv32_config_pkg.sv b/core/include/cv32a6_imac_sv32_config_pkg.sv index eabb27793c..2aaf4c0893 100644 --- a/core/include/cv32a6_imac_sv32_config_pkg.sv +++ b/core/include/cv32a6_imac_sv32_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 0; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv32a6_imafc_sv32_config_pkg.sv b/core/include/cv32a6_imafc_sv32_config_pkg.sv index da9d356572..d8c7620a43 100644 --- a/core/include/cv32a6_imafc_sv32_config_pkg.sv +++ b/core/include/cv32a6_imafc_sv32_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 0; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv b/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv index 167d501a6a..5ce2282442 100644 --- a/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv +++ b/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv @@ -91,6 +91,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv64a6_imafdc_sv39_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_config_pkg.sv index ea06072ef2..cec05737c5 100644 --- a/core/include/cv64a6_imafdc_sv39_config_pkg.sv +++ b/core/include/cv64a6_imafdc_sv39_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 1; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 1; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // RCONDEXT // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv index 0a8546a6c4..069d628ea4 100644 --- a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv +++ b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv @@ -28,6 +28,7 @@ package cva6_config_pkg; localparam CVA6ConfigAExtEn = 1; localparam CVA6ConfigBExtEn = 0; localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 0; localparam CVA6ConfigAxiIdWidth = 4; localparam CVA6ConfigAxiAddrWidth = 64; @@ -91,6 +92,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD diff --git a/core/include/cv64a6_imafdcv_sv39_config_pkg.sv b/core/include/cv64a6_imafdcv_sv39_config_pkg.sv index d32c1818fa..3a5ed2784c 100644 --- a/core/include/cv64a6_imafdcv_sv39_config_pkg.sv +++ b/core/include/cv64a6_imafdcv_sv39_config_pkg.sv @@ -91,6 +91,7 @@ package cva6_config_pkg; bit'(CVA6ConfigCExtEn), // RVC bit'(CVA6ConfigFVecEn), // XFVec bit'(CVA6ConfigCvxifEn), // CvxifEn + bit'(CVA6ConfigZiCondExtEn), // ZiCondExtEn // Extended bit'(0), // RVF bit'(0), // RVD