diff --git a/Makefile b/Makefile
index c4105cbcde..5c40b242ff 100644
--- a/Makefile
+++ b/Makefile
@@ -47,8 +47,6 @@ $(warning must set CVA6_REPO_DIR to point at the root of CVA6 sources -- doing i
 export CVA6_REPO_DIR = $(abspath $(root-dir))
 endif
 
-export HPDCACHE_DIR ?= $(CVA6_REPO_DIR)/core/cache_subsystem/hpdcache
-
 support_verilator_4 := $(shell ($(verilator) --version | grep '4\.') > /dev/null 2>&1 ; echo $$?)
 ifeq ($(support_verilator_4), 0)
 	verilator_threads := 1
@@ -96,6 +94,16 @@ ifndef TARGET_CFG
 	export TARGET_CFG = $(target)
 endif
 
+# HPDcache directory
+HPDCACHE_DIR ?= $(CVA6_REPO_DIR)/core/cache_subsystem/hpdcache
+export HPDCACHE_DIR
+
+# Target HPDcache configuration package.
+#   The HPDCACHE_TARGET_CFG variable contains the path (relative or absolute)
+#   to your target configuration package
+HPDCACHE_TARGET_CFG ?= ${CVA6_REPO_DIR}/core/include/cva6_hpdcache_default_config_pkg.sv
+export HPDCACHE_TARGET_CFG
+
 # Sources
 # Package files -> compile first
 ariane_pkg := \
diff --git a/core/Flist.cva6 b/core/Flist.cva6
index 711cd2a3c4..46a541603e 100644
--- a/core/Flist.cva6
+++ b/core/Flist.cva6
@@ -155,7 +155,7 @@ ${CVA6_REPO_DIR}/core/cache_subsystem/cache_ctrl.sv
 ${CVA6_REPO_DIR}/core/cache_subsystem/cva6_icache_axi_wrapper.sv
 ${CVA6_REPO_DIR}/core/cache_subsystem/std_cache_subsystem.sv
 ${CVA6_REPO_DIR}/core/cache_subsystem/std_nbdcache.sv
-${CVA6_REPO_DIR}/core/cache_subsystem/cva6_hpdcache_params_pkg.sv
+${HPDCACHE_TARGET_CFG}
 -F ${HPDCACHE_DIR}/rtl/hpdcache.Flist
 ${CVA6_REPO_DIR}/core/cache_subsystem/cva6_hpdcache_subsystem.sv
 ${CVA6_REPO_DIR}/core/cache_subsystem/cva6_hpdcache_subsystem_axi_arbiter.sv
diff --git a/core/cache_subsystem/cva6_hpdcache_params_pkg.sv b/core/cache_subsystem/cva6_hpdcache_params_pkg.sv
deleted file mode 100644
index f236e13c66..0000000000
--- a/core/cache_subsystem/cva6_hpdcache_params_pkg.sv
+++ /dev/null
@@ -1,163 +0,0 @@
-// Copyright 2023 Commissariat a l'Energie Atomique et aux Energies
-//                Alternatives (CEA)
-//
-// Licensed under the Solderpad Hardware License, Version 2.1 (the “License”);
-// you may not use this file except in compliance with the License.
-// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
-// You may obtain a copy of the License at https://solderpad.org/licenses/
-//
-// Authors: Cesar Fuguet
-// Date: February, 2023
-// Description: Package with parameters for the HPDcache in a CVA6 platform
-
-package hpdcache_params_pkg;
-    //  Imports from the CVA6 configuration package
-    //  {{{
-    import cva6_config_pkg::CVA6ConfigXlen;
-    import cva6_config_pkg::CVA6ConfigDcacheByteSize;
-    import cva6_config_pkg::CVA6ConfigDcacheSetAssoc;
-    import cva6_config_pkg::CVA6ConfigDcacheLineWidth;
-    import cva6_config_pkg::CVA6ConfigDcacheIdWidth;
-    import cva6_config_pkg::CVA6ConfigWtDcacheWbufDepth;
-    //  }}}
-
-    //  Definition of constants used only in this file
-    //  {{{
-    localparam int unsigned __BYTES_PER_WAY =
-        CVA6ConfigDcacheByteSize/CVA6ConfigDcacheSetAssoc;
-
-    localparam int unsigned __BYTES_PER_CACHELINE =
-        CVA6ConfigDcacheLineWidth/8;
-    //  }}}
-
-    //  Definition of global constants for the HPDcache data and directory
-    //  {{{
-    //  HPDcache physical address width (in bits)
-    localparam int unsigned PARAM_PA_WIDTH = riscv::PLEN;
-
-    //  HPDcache number of sets
-    localparam int unsigned PARAM_SETS = __BYTES_PER_WAY/__BYTES_PER_CACHELINE;
-
-    //  HPDcache number of ways
-    localparam int unsigned PARAM_WAYS = CVA6ConfigDcacheSetAssoc;
-
-    //  HPDcache word width (bits)
-    localparam int unsigned PARAM_WORD_WIDTH = CVA6ConfigXlen;
-
-    //  HPDcache cache-line width (bits)
-    localparam int unsigned PARAM_CL_WORDS = CVA6ConfigDcacheLineWidth/PARAM_WORD_WIDTH;
-
-    //  HPDcache number of words in the request data channels (request and response)
-    `ifndef CONF_HPDCACHE_REQ_WORDS
-        `define CONF_HPDCACHE_REQ_WORDS 1
-    `endif
-    localparam int unsigned PARAM_REQ_WORDS = `CONF_HPDCACHE_REQ_WORDS;
-
-    //  HPDcache request transaction ID width (bits)
-    localparam int unsigned PARAM_REQ_TRANS_ID_WIDTH = CVA6ConfigDcacheIdWidth;
-
-    //  HPDcache request source ID width (bits)
-    `ifndef CONF_HPDCACHE_REQ_SRC_ID_WIDTH
-        `define CONF_HPDCACHE_REQ_SRC_ID_WIDTH 3
-    `endif
-    localparam int unsigned PARAM_REQ_SRC_ID_WIDTH = `CONF_HPDCACHE_REQ_SRC_ID_WIDTH;
-    //  }}}
-
-    //  Definition of constants and types for HPDcache data memory
-    //  {{{
-    `ifndef CONF_HPDCACHE_DATA_WAYS_PER_RAM_WORD
-        `define CONF_HPDCACHE_DATA_WAYS_PER_RAM_WORD 128/PARAM_WORD_WIDTH
-    `endif
-    localparam int unsigned PARAM_DATA_WAYS_PER_RAM_WORD = `CONF_HPDCACHE_DATA_WAYS_PER_RAM_WORD;
-
-    `ifndef CONF_HPDCACHE_DATA_SETS_PER_RAM
-        `define CONF_HPDCACHE_DATA_SETS_PER_RAM PARAM_SETS
-    `endif
-    localparam int unsigned PARAM_DATA_SETS_PER_RAM = `CONF_HPDCACHE_DATA_SETS_PER_RAM;
-
-    //  HPDcache DATA RAM implements write byte enable
-    `ifndef CONF_HPDCACHE_DATA_RAM_WBYTEENABLE
-        `define CONF_HPDCACHE_DATA_RAM_WBYTEENABLE 1'b0
-    `endif
-    localparam bit PARAM_DATA_RAM_WBYTEENABLE = `CONF_HPDCACHE_DATA_RAM_WBYTEENABLE;
-
-    //  Define the number of memory contiguous words that can be accessed
-    //  simultaneously from the cache.
-    //  -  This limits the maximum width for the data channel from requesters
-    //  -  This impacts the refill latency
-    `ifndef CONF_HPDCACHE_ACCESS_WORDS
-        `define CONF_HPDCACHE_ACCESS_WORDS PARAM_CL_WORDS/2
-    `endif
-    localparam int unsigned PARAM_ACCESS_WORDS = `CONF_HPDCACHE_ACCESS_WORDS;
-    //  }}}
-
-    //  Definition of constants and types for the Miss Status Holding Register (MSHR)
-    //  {{{
-    `ifndef CONF_HPDCACHE_MSHR_SETS
-        `define CONF_HPDCACHE_MSHR_SETS 2
-    `endif
-    localparam int unsigned PARAM_MSHR_SETS = `CONF_HPDCACHE_MSHR_SETS;
-
-    //  HPDcache MSHR number of ways
-    `ifndef CONF_HPDCACHE_MSHR_WAYS
-        `define CONF_HPDCACHE_MSHR_WAYS 4
-    `endif
-    localparam int unsigned PARAM_MSHR_WAYS = `CONF_HPDCACHE_MSHR_WAYS;
-
-    //  HPDcache MSHR number of ways in the same SRAM word
-    `ifndef CONF_HPDCACHE_MSHR_WAYS_PER_RAM_WORD
-        `define CONF_HPDCACHE_MSHR_WAYS_PER_RAM_WORD 2
-    `endif
-    localparam int unsigned PARAM_MSHR_WAYS_PER_RAM_WORD = `CONF_HPDCACHE_MSHR_WAYS_PER_RAM_WORD;
-
-    //  HPDcache MSHR number of sets in the same SRAM
-    `ifndef CONF_HPDCACHE_MSHR_SETS_PER_RAM
-        `define CONF_HPDCACHE_MSHR_SETS_PER_RAM PARAM_MSHR_SETS
-    `endif
-    localparam int unsigned PARAM_MSHR_SETS_PER_RAM = `CONF_HPDCACHE_MSHR_SETS_PER_RAM;
-
-    //  HPDcache MSHR implements write byte enable
-    `ifndef CONF_HPDCACHE_MSHR_RAM_WBYTEENABLE
-        `define CONF_HPDCACHE_MSHR_RAM_WBYTEENABLE 1'b0
-    `endif
-    localparam bit PARAM_MSHR_RAM_WBYTEENABLE = `CONF_HPDCACHE_MSHR_RAM_WBYTEENABLE;
-
-    `ifndef CONF_HPDCACHE_MSHR_USE_REGBANK
-        `define CONF_HPDCACHE_MSHR_USE_REGBANK 0
-    `endif
-    localparam bit PARAM_MSHR_USE_REGBANK = `CONF_HPDCACHE_MSHR_USE_REGBANK;
-    //  }}}
-
-    //  Definition of constants and types for the Write Buffer (WBUF)
-    //  {{{
-    `ifndef CONF_HPDCACHE_WBUF_DATA_ENTRIES
-        `define __WBUF_DATA_ENTRIES_DESIRED (CVA6ConfigWtDcacheWbufDepth/2)
-        `define __WBUF_DATA_ENTRIES_MAX     (CVA6ConfigWtDcacheWbufDepth)
-        `define CONF_HPDCACHE_WBUF_DATA_ENTRIES \
-              ((`__WBUF_DATA_ENTRIES_DESIRED) < 1 ? 1 : \
-              ((`__WBUF_DATA_ENTRIES_DESIRED) < (`__WBUF_DATA_ENTRIES_MAX) ? \
-               (`__WBUF_DATA_ENTRIES_DESIRED) : (`__WBUF_DATA_ENTRIES_MAX)))
-    `endif
-    localparam int unsigned PARAM_WBUF_DIR_ENTRIES = CVA6ConfigWtDcacheWbufDepth;
-    localparam int unsigned PARAM_WBUF_DATA_ENTRIES = `CONF_HPDCACHE_WBUF_DATA_ENTRIES;
-
-    `ifndef CONF_HPDCACHE_WBUF_WORDS
-        `define CONF_HPDCACHE_WBUF_WORDS PARAM_REQ_WORDS
-    `endif
-    localparam int unsigned PARAM_WBUF_WORDS = `CONF_HPDCACHE_WBUF_WORDS;
-
-    `ifndef CONF_HPDCACHE_WBUF_TIMECNT_WIDTH
-        `define CONF_HPDCACHE_WBUF_TIMECNT_WIDTH 4
-    `endif
-    localparam int unsigned PARAM_WBUF_TIMECNT_WIDTH = `CONF_HPDCACHE_WBUF_TIMECNT_WIDTH;
-    //  }}}
-
-    //  Definition of constants and types for the Replay Table (RTAB)
-    //  {{{
-    `ifndef CONF_HPDCACHE_RTAB_ENTRIES
-        `define CONF_HPDCACHE_RTAB_ENTRIES 4
-    `endif
-    localparam int PARAM_RTAB_ENTRIES = `CONF_HPDCACHE_RTAB_ENTRIES;
-    //  }}}
-
-endpackage
diff --git a/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv
index c2402ee101..4ddb5b46c2 100644
--- a/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv
+++ b/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv
@@ -33,7 +33,7 @@ package cva6_config_pkg;
     localparam CVA6ConfigVExtEn = 0;
     localparam CVA6ConfigZiCondExtEn = 1;
 
-    localparam CVA6ConfigAxiIdWidth = 8;
+    localparam CVA6ConfigAxiIdWidth = 4;
     localparam CVA6ConfigAxiAddrWidth = 64;
     localparam CVA6ConfigAxiDataWidth = 64;
     localparam CVA6ConfigFetchUserEn = 0;
@@ -43,13 +43,13 @@ package cva6_config_pkg;
 
     localparam CVA6ConfigIcacheByteSize = 16384;
     localparam CVA6ConfigIcacheSetAssoc = 4;
-    localparam CVA6ConfigIcacheLineWidth = 512;
+    localparam CVA6ConfigIcacheLineWidth = 128;
     localparam CVA6ConfigDcacheByteSize = 32768;
     localparam CVA6ConfigDcacheSetAssoc = 8;
-    localparam CVA6ConfigDcacheLineWidth = 512;
+    localparam CVA6ConfigDcacheLineWidth = 128;
 
     localparam CVA6ConfigDcacheIdWidth = 3;
-    localparam CVA6ConfigMemTidWidth = 8;
+    localparam CVA6ConfigMemTidWidth = CVA6ConfigAxiIdWidth;
 
     localparam CVA6ConfigWtDcacheWbufDepth = 8;
 
diff --git a/core/include/cva6_hpdcache_default_config_pkg.sv b/core/include/cva6_hpdcache_default_config_pkg.sv
new file mode 100644
index 0000000000..1d50c8b8cf
--- /dev/null
+++ b/core/include/cva6_hpdcache_default_config_pkg.sv
@@ -0,0 +1,123 @@
+// Copyright 2023 Commissariat a l'Energie Atomique et aux Energies
+//                Alternatives (CEA)
+//
+// Licensed under the Solderpad Hardware License, Version 2.1 (the “License”);
+// you may not use this file except in compliance with the License.
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+// You may obtain a copy of the License at https://solderpad.org/licenses/
+//
+// Authors: Cesar Fuguet
+// Date: February, 2023
+// Description:
+//   Default package with parameters for the HPDcache in a CVA6 platform.
+//   Users can copy this file, rename it, and adapt the configuration values as
+//   needed.
+
+package hpdcache_params_pkg;
+    //  Imports from the CVA6 configuration package
+    //  {{{
+    import cva6_config_pkg::CVA6ConfigXlen;
+    import cva6_config_pkg::CVA6ConfigDcacheByteSize;
+    import cva6_config_pkg::CVA6ConfigDcacheSetAssoc;
+    import cva6_config_pkg::CVA6ConfigDcacheLineWidth;
+    import cva6_config_pkg::CVA6ConfigDcacheIdWidth;
+    import cva6_config_pkg::CVA6ConfigWtDcacheWbufDepth;
+    import cva6_config_pkg::CVA6ConfigNrLoadBufEntries;
+    //  }}}
+
+    //  Definition of constants used only in this file
+    //  {{{
+    localparam int unsigned __BYTES_PER_WAY =
+        CVA6ConfigDcacheByteSize/CVA6ConfigDcacheSetAssoc;
+
+    localparam int unsigned __BYTES_PER_CACHELINE =
+        CVA6ConfigDcacheLineWidth/8;
+    //  }}}
+
+    //  Definition of global constants for the HPDcache data and directory
+    //  {{{
+    //  HPDcache physical address width (in bits)
+    localparam int unsigned PARAM_PA_WIDTH = riscv::PLEN;
+
+    //  HPDcache number of sets
+    localparam int unsigned PARAM_SETS = __BYTES_PER_WAY/__BYTES_PER_CACHELINE;
+
+    //  HPDcache number of ways
+    localparam int unsigned PARAM_WAYS = CVA6ConfigDcacheSetAssoc;
+
+    //  HPDcache word width (bits)
+    localparam int unsigned PARAM_WORD_WIDTH = CVA6ConfigXlen;
+
+    //  HPDcache cache-line width (bits)
+    localparam int unsigned PARAM_CL_WORDS = CVA6ConfigDcacheLineWidth/PARAM_WORD_WIDTH;
+
+    //  HPDcache number of words in the request data channels (request and response)
+    localparam int unsigned PARAM_REQ_WORDS = 1;
+
+    //  HPDcache request transaction ID width (bits)
+    localparam int unsigned PARAM_REQ_TRANS_ID_WIDTH = CVA6ConfigDcacheIdWidth;
+
+    //  HPDcache request source ID width (bits)
+    localparam int unsigned PARAM_REQ_SRC_ID_WIDTH = 3;
+    //  }}}
+
+    //  Definition of constants and types for HPDcache data memory
+    //  {{{
+    localparam int unsigned PARAM_DATA_WAYS_PER_RAM_WORD = 128/PARAM_WORD_WIDTH;
+    localparam int unsigned PARAM_DATA_SETS_PER_RAM = PARAM_SETS;
+
+    //  HPDcache DATA RAM macros whether implements:
+    //  -  Write byte enable (1'b1)
+    //  -  Write bit mask (1'b0)
+    localparam bit PARAM_DATA_RAM_WBYTEENABLE = 1'b1;
+
+    //  Define the number of memory contiguous words that can be accessed
+    //  simultaneously from the cache.
+    //  -  This limits the maximum width for the data channel from requesters
+    //  -  This impacts the refill latency (more ACCESS_WORDS -> less REFILL LATENCY)
+    localparam int unsigned PARAM_ACCESS_WORDS = PARAM_CL_WORDS/2;
+    //  }}}
+
+    //  Definition of constants and types for the Miss Status Holding Register (MSHR)
+    //  {{{
+    //  HPDcache MSHR number of sets
+    localparam int unsigned PARAM_MSHR_SETS = 2;
+
+    //  HPDcache MSHR number of ways
+    localparam int unsigned PARAM_MSHR_WAYS = (CVA6ConfigNrLoadBufEntries > 4) ? 4 : 2;
+
+    //  HPDcache MSHR number of ways in the same SRAM word
+    localparam int unsigned PARAM_MSHR_WAYS_PER_RAM_WORD = PARAM_MSHR_WAYS > 1 ? 2 : 1;
+
+    //  HPDcache MSHR number of sets in the same SRAM
+    localparam int unsigned PARAM_MSHR_SETS_PER_RAM = PARAM_MSHR_SETS;
+
+    //  HPDcache MSHR RAM whether implements:
+    //  -  Write byte enable (1'b1)
+    //  -  Write bit mask (1'b0)
+    localparam bit PARAM_MSHR_RAM_WBYTEENABLE = 1'b1;
+
+    //  HPDcache MSHR whether uses FFs or SRAM
+    localparam bit PARAM_MSHR_USE_REGBANK = (PARAM_MSHR_SETS*PARAM_MSHR_WAYS) <= 16;
+    //  }}}
+
+    //  Definition of constants and types for the Write Buffer (WBUF)
+    //  {{{
+    //  HPDcache Write-Buffer number of entries in the directory
+    localparam int unsigned PARAM_WBUF_DIR_ENTRIES = CVA6ConfigWtDcacheWbufDepth;
+
+    //  HPDcache Write-Buffer number of entries in the data buffer
+    localparam int unsigned PARAM_WBUF_DATA_ENTRIES = CVA6ConfigWtDcacheWbufDepth;
+
+    //  HPDcache Write-Buffer number of words per entry
+    localparam int unsigned PARAM_WBUF_WORDS = PARAM_REQ_WORDS;
+
+    //  HPDcache Write-Buffer threshold counter width (in bits)
+    localparam int unsigned PARAM_WBUF_TIMECNT_WIDTH = 3;
+    //  }}}
+
+    //  Definition of constants and types for the Replay Table (RTAB)
+    //  {{{
+    localparam int PARAM_RTAB_ENTRIES = 4;
+    //  }}}
+endpackage