diff --git a/core/controller.sv b/core/controller.sv index 1596a4f4fb6..babaeb39252 100644 --- a/core/controller.sv +++ b/core/controller.sv @@ -85,7 +85,7 @@ module controller import ariane_pkg::*; #( flush_ex_o = 1'b1; // this is not needed in the case since we // have a write-through cache in this case - if (DCACHE_TYPE == int'(cva6_config_pkg::WB)) begin + if (DCACHE_TYPE == int'(config_pkg::WB)) begin flush_dcache = 1'b1; fence_active_d = 1'b1; end @@ -103,7 +103,7 @@ module controller import ariane_pkg::*; #( flush_icache_o = 1'b1; // this is not needed in the case since we // have a write-through cache in this case - if (DCACHE_TYPE == int'(cva6_config_pkg::WB)) begin + if (DCACHE_TYPE == int'(config_pkg::WB)) begin flush_dcache = 1'b1; fence_active_d = 1'b1; end @@ -111,7 +111,7 @@ module controller import ariane_pkg::*; #( // this is not needed in the case since we // have a write-through cache in this case - if (DCACHE_TYPE == int'(cva6_config_pkg::WB)) begin + if (DCACHE_TYPE == int'(config_pkg::WB)) begin // wait for the acknowledge here if (flush_dcache_ack_i && fence_active_q) begin fence_active_d = 1'b0; diff --git a/core/cva6.sv b/core/cva6.sv index f1802f10f52..68009a01d04 100644 --- a/core/cva6.sv +++ b/core/cva6.sv @@ -929,7 +929,7 @@ module cva6 import ariane_pkg::*; #( dcache_req_ports_cache_acc[1].data_gnt &= !dcache_req_ports_ex_cache[2].data_req; end - if (DCACHE_TYPE == int'(cva6_config_pkg::WT)) begin : gen_cache_wt + if (DCACHE_TYPE == int'(config_pkg::WT)) begin : gen_cache_wt // this is a cache subsystem that is compatible with OpenPiton wt_cache_subsystem #( .CVA6Cfg ( CVA6ExtendCfg ), @@ -970,8 +970,59 @@ module cva6 import ariane_pkg::*; #( .inval_valid_i ( inval_valid ), .inval_ready_o ( inval_ready ) ); - end else begin : gen_cache_wb + end else if (DCACHE_TYPE == int'(config_pkg::HPDCACHE)) begin : hpdcache_subsystem_gen + cva6_hpdcache_subsystem #( + .CVA6Cfg ( CVA6ExtendCfg ), + .NumPorts ( NumPorts ), + .noc_req_t ( noc_req_t ), + .noc_resp_t ( noc_resp_t ), + .cmo_req_t ( logic /*FIXME*/ ), + .cmo_rsp_t ( logic /*FIXME*/ ) + ) i_cache_subsystem ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + + .icache_en_i ( icache_en_csr ), + .icache_flush_i ( icache_flush_ctrl_cache ), + .icache_miss_o ( icache_miss_cache_perf ), + .icache_areq_i ( icache_areq_ex_cache ), + .icache_areq_o ( icache_areq_cache_ex ), + .icache_dreq_i ( icache_dreq_if_cache ), + .icache_dreq_o ( icache_dreq_cache_if ), + + .dcache_enable_i ( dcache_en_csr_nbdcache ), + .dcache_flush_i ( dcache_flush_ctrl_cache ), + .dcache_flush_ack_o ( dcache_flush_ack_cache_ctrl ), + .dcache_miss_o ( dcache_miss_cache_perf ), + + .dcache_amo_req_i ( amo_req ), + .dcache_amo_resp_o ( amo_resp ), + .dcache_cmo_req_i ( '0/*FIXME*/ ), + .dcache_cmo_resp_o ( /*FIXME*/ ), + + .dcache_req_ports_i ( dcache_req_to_cache ), + .dcache_req_ports_o ( dcache_req_from_cache ), + + .wbuffer_empty_o ( dcache_commit_wbuffer_empty ), + .wbuffer_not_ni_o ( dcache_commit_wbuffer_not_ni ), + + .hwpf_base_set_i ( '0/*FIXME*/ ), + .hwpf_base_i ( '0/*FIXME*/ ), + .hwpf_base_o ( /*FIXME*/ ), + .hwpf_param_set_i ( '0/*FIXME*/ ), + .hwpf_param_i ( '0/*FIXME*/ ), + .hwpf_param_o ( /*FIXME*/ ), + .hwpf_throttle_set_i ( '0/*FIXME*/ ), + .hwpf_throttle_i ( '0/*FIXME*/ ), + .hwpf_throttle_o ( /*FIXME*/ ), + .hwpf_status_o ( /*FIXME*/ ), + + .noc_req_o ( noc_req_o ), + .noc_resp_i ( noc_resp_i ) + ); + assign inval_ready = 1'b1; + end else begin std_cache_subsystem #( // note: this only works with one cacheable region // not as important since this cache subsystem is about to be diff --git a/core/include/ariane_pkg.sv b/core/include/ariane_pkg.sv index 8a3af5a8b15..65a87bc6d10 100644 --- a/core/include/ariane_pkg.sv +++ b/core/include/ariane_pkg.sv @@ -47,7 +47,7 @@ package ariane_pkg; // to longer paths into the commit stage // if DCACHE_TYPE = cva6_config_pkg::WB // allocate more space for the commit buffer to be on the save side, this needs to be a power of two - localparam int unsigned DEPTH_COMMIT = (DCACHE_TYPE == int'(cva6_config_pkg::WT)) ? 4 : 8; + localparam int unsigned DEPTH_COMMIT = (DCACHE_TYPE == int'(config_pkg::WT)) ? 4 : 8; localparam bit FPGA_EN = cva6_config_pkg::CVA6ConfigFPGAEn; // Is FPGA optimization of CV32A6 diff --git a/core/include/config_pkg.sv b/core/include/config_pkg.sv index 16771de73f7..9946d8dda92 100644 --- a/core/include/config_pkg.sv +++ b/core/include/config_pkg.sv @@ -26,6 +26,13 @@ package config_pkg; NOC_TYPE_L15_LITTLE_ENDIAN } noc_type_e; + /// Cache type parameter + typedef enum logic [1:0] { + WB = 0, + WT = 1, + HPDCACHE = 2 + } cache_type_t ; + localparam NrMaxRules = 16; typedef struct packed { diff --git a/core/include/cv32a60x_config_pkg.sv b/core/include/cv32a60x_config_pkg.sv index 711947a4759..37d3ef80b62 100644 --- a/core/include/cv32a60x_config_pkg.sv +++ b/core/include/cv32a60x_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 0; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 0; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv32a6_embedded_config_pkg.sv b/core/include/cv32a6_embedded_config_pkg.sv index 155d9db22f4..a8b0b7c1f03 100644 --- a/core/include/cv32a6_embedded_config_pkg.sv +++ b/core/include/cv32a6_embedded_config_pkg.sv @@ -9,11 +9,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 0; @@ -70,7 +65,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 0; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 0; diff --git a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv index 35a51f5bf50..8c3b839e6f3 100644 --- a/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv +++ b/core/include/cv32a6_ima_sv32_fpga_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 0; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 0; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv32a6_imac_sv0_config_pkg.sv b/core/include/cv32a6_imac_sv0_config_pkg.sv index 20d4bde6a0b..a178260e29d 100644 --- a/core/include/cv32a6_imac_sv0_config_pkg.sv +++ b/core/include/cv32a6_imac_sv0_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 0; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv32a6_imac_sv32_config_pkg.sv b/core/include/cv32a6_imac_sv32_config_pkg.sv index ce8da998b12..8b8550184da 100644 --- a/core/include/cv32a6_imac_sv32_config_pkg.sv +++ b/core/include/cv32a6_imac_sv32_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 0; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv32a6_imafc_sv32_config_pkg.sv b/core/include/cv32a6_imafc_sv32_config_pkg.sv index 6d4cafdd494..9d8dea1967f 100644 --- a/core/include/cv32a6_imafc_sv32_config_pkg.sv +++ b/core/include/cv32a6_imafc_sv32_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 32; localparam CVA6ConfigFpuEn = 1; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam CVA6ConfigDcacheType = WB; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WB; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv b/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv index d3f2e40d9fe..217f3401957 100644 --- a/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv +++ b/core/include/cv64a6_imadfcv_sv39_polara_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 64; localparam CVA6ConfigFpuEn = 1; @@ -70,7 +65,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam cache_type_t CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv64a6_imafdc_sv39_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_config_pkg.sv index 510f643a972..ebdaac3dfc2 100644 --- a/core/include/cv64a6_imafdc_sv39_config_pkg.sv +++ b/core/include/cv64a6_imafdc_sv39_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 64; localparam CVA6ConfigFpuEn = 1; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv new file mode 100644 index 00000000000..20f0c30736c --- /dev/null +++ b/core/include/cv64a6_imafdc_sv39_hpdcache_config_pkg.sv @@ -0,0 +1,130 @@ +// Copyright 2023 CEA* +// *Commissariat a l'Energie Atomique et aux Energies Alternatives (CEA) +// +// Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0 +// You may obtain a copy of the License at https://solderpad.org/licenses/ +// +// Author: Cesar Fuguet - CEA +// Creation Date: August, 2023 + + +package cva6_config_pkg; + + localparam CVA6ConfigXlen = 64; + + localparam CVA6ConfigFpuEn = 1; + localparam CVA6ConfigF16En = 0; + localparam CVA6ConfigF16AltEn = 0; + localparam CVA6ConfigF8En = 0; + localparam CVA6ConfigFVecEn = 0; + + localparam CVA6ConfigCvxifEn = 0; + localparam CVA6ConfigCExtEn = 1; + localparam CVA6ConfigZcbExtEn = 1; + localparam CVA6ConfigAExtEn = 1; + localparam CVA6ConfigBExtEn = 1; + localparam CVA6ConfigVExtEn = 0; + localparam CVA6ConfigZiCondExtEn = 1; + + localparam CVA6ConfigAxiIdWidth = 8; + localparam CVA6ConfigAxiAddrWidth = 64; + localparam CVA6ConfigAxiDataWidth = 64; + localparam CVA6ConfigFetchUserEn = 0; + localparam CVA6ConfigFetchUserWidth = CVA6ConfigXlen; + localparam CVA6ConfigDataUserEn = 0; + localparam CVA6ConfigDataUserWidth = CVA6ConfigXlen; + + localparam CVA6ConfigIcacheByteSize = 16384; + localparam CVA6ConfigIcacheSetAssoc = 4; + localparam CVA6ConfigIcacheLineWidth = 512; + localparam CVA6ConfigDcacheByteSize = 32768; + localparam CVA6ConfigDcacheSetAssoc = 8; + localparam CVA6ConfigDcacheLineWidth = 512; + + localparam CVA6ConfigDcacheIdWidth = 3; + localparam CVA6ConfigMemTidWidth = 8; + + localparam CVA6ConfigWtDcacheWbufDepth = 8; + + localparam CVA6ConfigNrCommitPorts = 2; + localparam CVA6ConfigNrScoreboardEntries = 8; + + localparam CVA6ConfigFPGAEn = 0; + + localparam CVA6ConfigNrLoadPipeRegs = 1; + localparam CVA6ConfigNrStorePipeRegs = 0; + localparam CVA6ConfigNrLoadBufEntries = 8; + + localparam CVA6ConfigInstrTlbEntries = 16; + localparam CVA6ConfigDataTlbEntries = 16; + + localparam CVA6ConfigRASDepth = 2; + localparam CVA6ConfigBTBEntries = 32; + localparam CVA6ConfigBHTEntries = 128; + + localparam CVA6ConfigNrPMPEntries = 8; + + localparam CVA6ConfigPerfCounterEn = 1; + + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::HPDCACHE; + + localparam CVA6ConfigMmuPresent = 1; + + localparam CVA6ConfigRvfiTrace = 1; + + localparam config_pkg::cva6_cfg_t cva6_cfg = '{ + NrCommitPorts: unsigned'(CVA6ConfigNrCommitPorts), + AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth), + AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth), + AxiIdWidth: unsigned'(CVA6ConfigAxiIdWidth), + AxiUserWidth: unsigned'(CVA6ConfigDataUserWidth), + NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries), + FpuEn: bit'(CVA6ConfigFpuEn), + XF16: bit'(CVA6ConfigF16En), + XF16ALT: bit'(CVA6ConfigF16AltEn), + XF8: bit'(CVA6ConfigF8En), + RVA: bit'(CVA6ConfigAExtEn), + RVV: bit'(CVA6ConfigVExtEn), + RVC: bit'(CVA6ConfigCExtEn), + RVZCB: bit'(CVA6ConfigZcbExtEn), + XFVec: bit'(CVA6ConfigFVecEn), + CvxifEn: bit'(CVA6ConfigCvxifEn), + ZiCondExtEn: bit'(CVA6ConfigZiCondExtEn), + // Extended + RVF: bit'(0), + RVD: bit'(0), + FpPresent: bit'(0), + NSX: bit'(0), + FLen: unsigned'(0), + RVFVec: bit'(0), + XF16Vec: bit'(0), + XF16ALTVec: bit'(0), + XF8Vec: bit'(0), + NrRgprPorts: unsigned'(0), + NrWbPorts: unsigned'(0), + EnableAccelerator: bit'(0), + HaltAddress: 64'h800, + ExceptionAddress: 64'h808, + RASDepth: unsigned'(CVA6ConfigRASDepth), + BTBEntries: unsigned'(CVA6ConfigBTBEntries), + BHTEntries: unsigned'(CVA6ConfigBHTEntries), + DmBaseAddress: 64'h0, + NrPMPEntries: unsigned'(CVA6ConfigNrPMPEntries), + NOCType: config_pkg::NOC_TYPE_AXI4_ATOP, + // idempotent region + NrNonIdempotentRules: unsigned'(2), + NonIdempotentAddrBase: 1024'({64'b0, 64'b0}), + NonIdempotentLength: 1024'({64'b0, 64'b0}), + NrExecuteRegionRules: unsigned'(3), + // DRAM, Boot ROM, Debug Module + ExecuteRegionAddrBase: 1024'({64'h8000_0000, 64'h1_0000, 64'h0}), + ExecuteRegionLength: 1024'({64'h40000000, 64'h10000, 64'h1000}), + // cached region + NrCachedRegionRules: unsigned'(1), + CachedRegionAddrBase: 1024'({64'h8000_0000}), + CachedRegionLength: 1024'({64'h40000000}) + }; + +endpackage diff --git a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv index 1e4d66a0e17..dc275d40a3d 100644 --- a/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv +++ b/core/include/cv64a6_imafdc_sv39_openpiton_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 64; localparam CVA6ConfigFpuEn = 1; @@ -71,7 +66,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam cache_type_t CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1; diff --git a/core/include/cv64a6_imafdcv_sv39_config_pkg.sv b/core/include/cv64a6_imafdcv_sv39_config_pkg.sv index dc505c8a67b..7c8682f47f8 100644 --- a/core/include/cv64a6_imafdcv_sv39_config_pkg.sv +++ b/core/include/cv64a6_imafdcv_sv39_config_pkg.sv @@ -10,11 +10,6 @@ package cva6_config_pkg; - typedef enum logic { - WB = 0, - WT = 1 - } cache_type_t ; - localparam CVA6ConfigXlen = 64; localparam CVA6ConfigFpuEn = 1; @@ -70,7 +65,7 @@ package cva6_config_pkg; localparam CVA6ConfigPerfCounterEn = 1; - localparam CVA6ConfigDcacheType = WT; + localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::WT; localparam CVA6ConfigMmuPresent = 1;