diff --git a/bin/gen_csr_access_test.py b/bin/gen_csr_access_test.py index fd909a4e95..2dab110a2b 100755 --- a/bin/gen_csr_access_test.py +++ b/bin/gen_csr_access_test.py @@ -1,5 +1,34 @@ #!/usr/bin/env python3 + +# Copyright 2023 Silicon Labs, Inc. +# +# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +# +# Licensed under the Solderpad Hardware License v 2.1 (the "License"); you may +# not use this file except in compliance with the License, or, at your option, +# the Apache License version 2.0. +# +# You may obtain a copy of the License at +# https://solderpad.org/licenses/SHL-2.1/ +# +# Unless required by applicable law or agreed to in writing, any work +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# +# See the License for the specific language governing permissions and +# limitations under the License. + + +# Description: +# This script is for generating the CSR access test: +# `cv32e40(s|x)/tests/programs/custom/cv32e40x_csr_access_test/`. +# +# It calls a generation script within `riscv-dv`. +# A Yaml config as per `--input_yaml_path` is used as its input. +# See the README in the path mention above for additional usage info. + + import sys import os import argparse @@ -7,6 +36,7 @@ import yaml import shlex + if (sys.version_info < (3,5,0)): print ('Requires python 3.5') exit(1) @@ -139,6 +169,9 @@ def preprocess_yaml(): "dbg_num_triggers": 0, } + #TODO:silabs-robin refactor, own function + # "VERIF_HEADER" (Design-workaround for CSR field alternatives.) + enabled_features["verif_header"] = True # CLIC if (args.clic_enable): str_args = str_args + "_clic" @@ -225,7 +258,6 @@ def preprocess_yaml(): if (int(args.num_triggers) > 0): str_args = str_args + "_triggers" + args.num_triggers enabled_features["dbg_num_triggers"] = int(args.num_triggers) - # TODO:silabs-robin Any other "enabled_features"? print("enabled_features: {}".format(enabled_features))