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maskedarray/README.md

๐Ÿ’ซ About Me:

I am an experienced computer engineer specializing in hardware-software co-design, with a strong focus on developing and optimizing embedded systems and FPGA-based solutions. Currently pursuing a MASc in Computer Engineering at the University of Waterloo, I am deeply involved in the design and verification of advanced multicore RISC-V SoCs, with expertise in firmware development, memory subsystem optimization, and hypervisor integration. My professional journey has seen me lead critical projects, including the development of an Electric Vehicle Fleet Management Device and the design of a safety-critical medical ventilator. My skill set spans across a wide range of technologies, including RISCV and ARM assembly, SystemVerilog, RTOS, and AI frameworks, reflecting a commitment to precision and innovation in every project I undertake.

๐ŸŒ Socials:

LinkedIn

๐Ÿ’ป Tech Stack:

C C++ Python Shell Script AssemblyScript Rust Java TensorFlow PyTorch Git QEMU AMD LINUX ARMv8 ARMv7 LLVM GNU FreeRTOS OpenOCD UBoot Buildroot OpenCV


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  1. apmu-os apmu-os Public

    Custom Developed OS for APMU Core - Supporting IPC, Event Triggered Scheduling and Dynamic Component Installation

    C

  2. FreeRTOS-FAT-SDVB-CVA6 FreeRTOS-FAT-SDVB-CVA6 Public

    Port of FreeRTOS with FAT library and baremetal port of San Diego Vision Benchmark for RISCV CVA6

    C

  3. apmu-sw apmu-sw Public

    Software SDK for APMU

    C

  4. CVA6-Hypervisor-Platform CVA6-Hypervisor-Platform Public

    OpenSBI+Bao Hypervisor+Linux/Baremetal software stack for RISCV CVA6 based SoC

    C

  5. baremetal-dynamic-linker-riscv baremetal-dynamic-linker-riscv Public

    Baremetal Dynamic Linker for RISCV32 - Capable of processing some basic relocations

    C