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segbits_int_r.origin_info.db
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segbits_int_r.origin_info.db
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INT_R.CLK1.ER1END1 origin:052-pip-clkin !01_29 00_27 00_29 01_25 01_26
INT_R.CLK1.SR1END1 origin:052-pip-clkin !00_27 !00_29 !01_29 01_25 01_26
INT_R.CLK1.WR1END1 origin:052-pip-clkin !00_29 !01_26 !01_29 00_27 01_25
INT_R.CTRL0.BYP_BOUNCE4 origin:053-pip-ctrlin !00_35 !00_39 !01_40 01_37 01_38
INT_R.CTRL0.FAN_BOUNCE1 origin:053-pip-ctrlin !00_35 !01_38 !01_40 00_39 01_37
INT_R.CTRL0.EE4END2 origin:053-pip-ctrlin !00_35 !01_38 !01_40 00_38 00_39
INT_R.CTRL0.ER1END2 origin:053-pip-ctrlin !00_35 !00_39 !01_40 01_33 01_38
INT_R.CTRL0.GFAN0 origin:053-pip-ctrlin !01_40 00_35 00_39 01_37 01_38
INT_R.CTRL0.GFAN1 origin:053-pip-ctrlin !00_35 00_39 01_37 01_38 01_40
INT_R.CTRL0.NE6END2 origin:053-pip-ctrlin !00_35 00_39 01_33 01_38 01_40
INT_R.CTRL0.NN6END2 origin:053-pip-ctrlin !01_40 00_35 00_39 01_33 01_38
INT_R.CTRL0.NR1END2 origin:053-pip-ctrlin !00_35 00_34 00_39 01_38 01_40
INT_R.CTRL0.NW6END2 origin:053-pip-ctrlin !01_40 00_34 00_35 00_39 01_38
INT_R.CTRL0.SE6END2 origin:053-pip-ctrlin !00_35 !00_39 !01_40 00_38 01_38
INT_R.CTRL0.SR1END2 origin:053-pip-ctrlin !00_35 00_38 00_39 01_38 01_40
INT_R.CTRL0.SS6END2 origin:053-pip-ctrlin !01_40 00_35 00_38 00_39 01_38
INT_R.CTRL0.SW6END1 origin:053-pip-ctrlin !00_35 !00_39 !01_40 00_34 01_38
INT_R.CTRL0.WR1END2 origin:053-pip-ctrlin !00_35 !01_38 !01_40 00_34 00_39
INT_R.CTRL0.WW4END2 origin:053-pip-ctrlin !00_35 !01_38 !01_40 00_39 01_33
INT_R.CTRL1.BYP_BOUNCE4 origin:053-pip-ctrlin !00_37 !01_36 !01_41 00_42 01_32
INT_R.CTRL1.FAN_BOUNCE1 origin:053-pip-ctrlin !00_37 !00_42 !01_36 01_32 01_41
INT_R.CTRL1.EE4END2 origin:053-pip-ctrlin !00_37 !00_42 !01_36 00_41 01_41
INT_R.CTRL1.ER1END2 origin:053-pip-ctrlin !00_37 !01_36 !01_41 00_33 00_42
INT_R.CTRL1.GFAN0 origin:053-pip-ctrlin !00_37 00_42 01_32 01_36 01_41
INT_R.CTRL1.GFAN1 origin:053-pip-ctrlin !01_36 00_37 00_42 01_32 01_41
INT_R.CTRL1.NE6END2 origin:053-pip-ctrlin !01_36 00_33 00_37 00_42 01_41
INT_R.CTRL1.NN6END2 origin:053-pip-ctrlin !00_37 00_33 00_42 01_36 01_41
INT_R.CTRL1.NR1END2 origin:053-pip-ctrlin !01_36 00_37 00_42 01_34 01_41
INT_R.CTRL1.NW6END2 origin:053-pip-ctrlin !00_37 00_42 01_34 01_36 01_41
INT_R.CTRL1.SE6END2 origin:053-pip-ctrlin !00_37 !01_36 !01_41 00_41 00_42
INT_R.CTRL1.SR1END2 origin:053-pip-ctrlin !01_36 00_37 00_41 00_42 01_41
INT_R.CTRL1.SS6END2 origin:053-pip-ctrlin !00_37 00_41 00_42 01_36 01_41
INT_R.CTRL1.SW6END1 origin:053-pip-ctrlin !00_37 !01_36 !01_41 00_42 01_34
INT_R.CTRL1.WR1END2 origin:053-pip-ctrlin !00_37 !00_42 !01_36 01_34 01_41
INT_R.CTRL1.WW4END2 origin:053-pip-ctrlin !00_37 !00_42 !01_36 00_33 01_41
INT_R.EE2BEG0.LOGIC_OUTS0 origin:050-pip-seed 09_07 15_06
INT_R.EE2BEG0.LOGIC_OUTS4 origin:050-pip-seed 09_06 15_06
INT_R.EE2BEG0.LOGIC_OUTS8 origin:050-pip-seed 11_06 15_06
INT_R.EE2BEG0.LOGIC_OUTS12 origin:050-pip-seed 11_06 12_06
INT_R.EE2BEG0.LOGIC_OUTS18 origin:050-pip-seed 10_06 15_06
INT_R.EE2BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_07 15_06
INT_R.EE2BEG0.EE2END0 origin:050-pip-seed 11_06 14_06
INT_R.EE2BEG0.EE4END0 origin:050-pip-seed 11_06 13_06
INT_R.EE2BEG0.EL1END0 origin:050-pip-seed 09_06 12_06
INT_R.EE2BEG0.ER1END0 origin:050-pip-seed 09_07 12_06
INT_R.EE2BEG0.NE2END0 origin:050-pip-seed 06_07 14_06
INT_R.EE2BEG0.NE6END0 origin:050-pip-seed 06_07 13_06
INT_R.EE2BEG0.NL1END0 origin:050-pip-seed 06_07 12_06
INT_R.EE2BEG0.NN2END0 origin:050-pip-seed 10_06 14_06
INT_R.EE2BEG0.NN6END0 origin:050-pip-seed 10_06 13_06
INT_R.EE2BEG0.NR1END0 origin:050-pip-seed 10_06 12_06
INT_R.EE2BEG0.SE2END0 origin:050-pip-seed 09_06 14_06
INT_R.EE2BEG0.SE6END0 origin:050-pip-seed 09_06 13_06
INT_R.EE2BEG0.SS2END0 origin:050-pip-seed 09_07 14_06
INT_R.EE2BEG0.SS6END0 origin:050-pip-seed 09_07 13_06
INT_R.EE2BEG1.LOGIC_OUTS1 origin:050-pip-seed 09_22 15_22
INT_R.EE2BEG1.LOGIC_OUTS5 origin:050-pip-seed 09_23 15_22
INT_R.EE2BEG1.LOGIC_OUTS9 origin:050-pip-seed 11_22 12_22
INT_R.EE2BEG1.LOGIC_OUTS13 origin:050-pip-seed 11_22 15_22
INT_R.EE2BEG1.LOGIC_OUTS19 origin:050-pip-seed 06_23 15_22
INT_R.EE2BEG1.LOGIC_OUTS23 origin:050-pip-seed 10_22 15_22
INT_R.EE2BEG1.EE2END1 origin:050-pip-seed 11_22 14_22
INT_R.EE2BEG1.EE4END1 origin:050-pip-seed 11_22 13_22
INT_R.EE2BEG1.EL1END1 origin:050-pip-seed 09_22 12_22
INT_R.EE2BEG1.ER1END1 origin:050-pip-seed 09_23 12_22
INT_R.EE2BEG1.NE2END1 origin:050-pip-seed 06_23 14_22
INT_R.EE2BEG1.NE6END1 origin:050-pip-seed 06_23 13_22
INT_R.EE2BEG1.NL1END1 origin:050-pip-seed 06_23 12_22
INT_R.EE2BEG1.NN2END1 origin:050-pip-seed 10_22 14_22
INT_R.EE2BEG1.NN6END1 origin:050-pip-seed 10_22 13_22
INT_R.EE2BEG1.NR1END1 origin:050-pip-seed 10_22 12_22
INT_R.EE2BEG1.SE2END1 origin:050-pip-seed 09_22 14_22
INT_R.EE2BEG1.SE6END1 origin:050-pip-seed 09_22 13_22
INT_R.EE2BEG1.SS2END1 origin:050-pip-seed 09_23 14_22
INT_R.EE2BEG1.SS6END1 origin:050-pip-seed 09_23 13_22
INT_R.EE2BEG2.LOGIC_OUTS2 origin:050-pip-seed 09_39 15_38
INT_R.EE2BEG2.LOGIC_OUTS6 origin:050-pip-seed 09_38 15_38
INT_R.EE2BEG2.LOGIC_OUTS10 origin:050-pip-seed 11_38 15_38
INT_R.EE2BEG2.LOGIC_OUTS14 origin:050-pip-seed 11_38 12_38
INT_R.EE2BEG2.LOGIC_OUTS16 origin:050-pip-seed 10_38 15_38
INT_R.EE2BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_39 15_38
INT_R.EE2BEG2.EE2END2 origin:050-pip-seed 11_38 14_38
INT_R.EE2BEG2.EE4END2 origin:050-pip-seed 11_38 13_38
INT_R.EE2BEG2.EL1END2 origin:050-pip-seed 09_38 12_38
INT_R.EE2BEG2.ER1END2 origin:050-pip-seed 09_39 12_38
INT_R.EE2BEG2.NE2END2 origin:050-pip-seed 06_39 14_38
INT_R.EE2BEG2.NE6END2 origin:050-pip-seed 06_39 13_38
INT_R.EE2BEG2.NL1END2 origin:050-pip-seed 06_39 12_38
INT_R.EE2BEG2.NN2END2 origin:050-pip-seed 10_38 14_38
INT_R.EE2BEG2.NN6END2 origin:050-pip-seed 10_38 13_38
INT_R.EE2BEG2.NR1END2 origin:050-pip-seed 10_38 12_38
INT_R.EE2BEG2.SE2END2 origin:050-pip-seed 09_38 14_38
INT_R.EE2BEG2.SE6END2 origin:050-pip-seed 09_38 13_38
INT_R.EE2BEG2.SS2END2 origin:050-pip-seed 09_39 14_38
INT_R.EE2BEG2.SS6END2 origin:050-pip-seed 09_39 13_38
INT_R.EE2BEG3.LOGIC_OUTS3 origin:050-pip-seed 09_54 15_54
INT_R.EE2BEG3.LOGIC_OUTS7 origin:050-pip-seed 09_55 15_54
INT_R.EE2BEG3.LOGIC_OUTS11 origin:050-pip-seed 11_54 12_54
INT_R.EE2BEG3.LOGIC_OUTS15 origin:050-pip-seed 11_54 15_54
INT_R.EE2BEG3.LOGIC_OUTS17 origin:050-pip-seed 06_55 15_54
INT_R.EE2BEG3.LOGIC_OUTS21 origin:050-pip-seed 10_54 15_54
INT_R.EE2BEG3.NL1BEG_N3 origin:050-pip-seed 06_55 12_54
INT_R.EE2BEG3.EE2END3 origin:050-pip-seed 11_54 14_54
INT_R.EE2BEG3.EE4END3 origin:050-pip-seed 11_54 13_54
INT_R.EE2BEG3.EL1END3 origin:050-pip-seed 09_54 12_54
INT_R.EE2BEG3.ER1END3 origin:050-pip-seed 09_55 12_54
INT_R.EE2BEG3.NE2END3 origin:050-pip-seed 06_55 14_54
INT_R.EE2BEG3.NE6END3 origin:050-pip-seed 06_55 13_54
INT_R.EE2BEG3.NN2END3 origin:050-pip-seed 10_54 14_54
INT_R.EE2BEG3.NN6END3 origin:050-pip-seed 10_54 13_54
INT_R.EE2BEG3.NR1END3 origin:050-pip-seed 10_54 12_54
INT_R.EE2BEG3.SE2END3 origin:050-pip-seed 09_54 14_54
INT_R.EE2BEG3.SE6END3 origin:050-pip-seed 09_54 13_54
INT_R.EE2BEG3.SS2END3 origin:050-pip-seed 09_55 14_54
INT_R.EE2BEG3.SS6END3 origin:050-pip-seed 09_55 13_54
INT_R.EE4BEG0.LOGIC_OUTS0 origin:050-pip-seed 02_09 04_10
INT_R.EE4BEG0.LOGIC_OUTS4 origin:050-pip-seed 02_09 07_09
INT_R.EE4BEG0.LOGIC_OUTS8 origin:050-pip-seed 03_08 07_09
INT_R.EE4BEG0.LOGIC_OUTS12 origin:050-pip-seed 03_08 04_10
INT_R.EE4BEG0.LOGIC_OUTS18 origin:050-pip-seed 06_08 07_09
INT_R.EE4BEG0.LOGIC_OUTS22 origin:050-pip-seed 04_10 06_08
INT_R.EE4BEG0.EE2END0 origin:050-pip-seed 03_08 03_09
INT_R.EE4BEG0.EE4END0 origin:050-pip-seed 03_09 05_08
INT_R.EE4BEG0.LH12 origin:056-pip-rem 05_08 07_09
INT_R.EE4BEG0.LV0 origin:056-pip-rem 04_10 05_08
INT_R.EE4BEG0.NE2END0 origin:050-pip-seed 02_09 04_09
INT_R.EE4BEG0.NE6END0 origin:050-pip-seed 04_09 05_08
INT_R.EE4BEG0.NN2END0 origin:050-pip-seed 03_08 04_09
INT_R.EE4BEG0.NN6END0 origin:050-pip-seed 04_09 06_08
INT_R.EE4BEG0.SE2END0 origin:050-pip-seed 02_09 03_09
INT_R.EE4BEG0.SE6END0 origin:050-pip-seed 03_09 06_08
INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25
INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26
INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26
INT_R.EE4BEG1.LOGIC_OUTS13 origin:050-pip-seed 03_24 07_25
INT_R.EE4BEG1.LOGIC_OUTS19 origin:050-pip-seed 04_26 06_24
INT_R.EE4BEG1.LOGIC_OUTS23 origin:050-pip-seed 06_24 07_25
INT_R.EE4BEG1.EE2END1 origin:050-pip-seed 03_24 03_25
INT_R.EE4BEG1.EE4END1 origin:050-pip-seed 03_25 05_24
INT_R.EE4BEG1.LH6 origin:056-pip-rem 05_24 07_25
INT_R.EE4BEG1.LV9 origin:056-pip-rem 04_26 05_24
INT_R.EE4BEG1.NE2END1 origin:050-pip-seed 02_25 04_25
INT_R.EE4BEG1.NE6END1 origin:050-pip-seed 04_25 05_24
INT_R.EE4BEG1.NN2END1 origin:050-pip-seed 03_24 04_25
INT_R.EE4BEG1.NN6END1 origin:050-pip-seed 04_25 06_24
INT_R.EE4BEG1.SE2END1 origin:050-pip-seed 02_25 03_25
INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
INT_R.EE4BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_40 04_42
INT_R.EE4BEG2.LOGIC_OUTS16 origin:050-pip-seed 06_40 07_41
INT_R.EE4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_42 06_40
INT_R.EE4BEG2.EE2END2 origin:050-pip-seed 03_40 03_41
INT_R.EE4BEG2.EE4END2 origin:050-pip-seed 03_41 05_40
INT_R.EE4BEG2.LVB0 origin:056-pip-rem 04_42 05_40
INT_R.EE4BEG2.LVB12 origin:056-pip-rem 05_40 07_41
INT_R.EE4BEG2.NE2END2 origin:050-pip-seed 02_41 04_41
INT_R.EE4BEG2.NE6END2 origin:050-pip-seed 04_41 05_40
INT_R.EE4BEG2.NN2END2 origin:050-pip-seed 03_40 04_41
INT_R.EE4BEG2.NN6END2 origin:050-pip-seed 04_41 06_40
INT_R.EE4BEG2.SE2END2 origin:050-pip-seed 02_41 03_41
INT_R.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
INT_R.EE4BEG3.LOGIC_OUTS15 origin:050-pip-seed 03_56 07_57
INT_R.EE4BEG3.LOGIC_OUTS17 origin:050-pip-seed 04_58 06_56
INT_R.EE4BEG3.LOGIC_OUTS21 origin:050-pip-seed 06_56 07_57
INT_R.EE4BEG3.EE2END3 origin:050-pip-seed 03_56 03_57
INT_R.EE4BEG3.EE4END3 origin:050-pip-seed 03_57 05_56
INT_R.EE4BEG3.LH0 origin:056-pip-rem 04_58 05_56
INT_R.EE4BEG3.LV18 origin:056-pip-rem 05_56 07_57
INT_R.EE4BEG3.NE2END3 origin:050-pip-seed 02_57 04_57
INT_R.EE4BEG3.NE6END3 origin:050-pip-seed 04_57 05_56
INT_R.EE4BEG3.NN2END3 origin:050-pip-seed 03_56 04_57
INT_R.EE4BEG3.NN6END3 origin:050-pip-seed 04_57 06_56
INT_R.EE4BEG3.SE2END3 origin:050-pip-seed 02_57 03_57
INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
INT_R.EL1BEG0.LOGIC_OUTS13 origin:050-pip-seed 10_21 14_21
INT_R.EL1BEG0.LOGIC_OUTS19 origin:050-pip-seed 08_21 14_21
INT_R.EL1BEG0.LOGIC_OUTS23 origin:050-pip-seed 08_20 14_21
INT_R.EL1BEG0.EE2END1 origin:050-pip-seed 07_20 15_21
INT_R.EL1BEG0.EE4END1 origin:050-pip-seed 07_20 12_21
INT_R.EL1BEG0.EL1END1 origin:050-pip-seed 11_21 13_21
INT_R.EL1BEG0.ER1END1 origin:050-pip-seed 08_21 13_21
INT_R.EL1BEG0.NE2END1 origin:050-pip-seed 10_21 15_21
INT_R.EL1BEG0.NE6END1 origin:050-pip-seed 10_21 12_21
INT_R.EL1BEG0.NL1END1 origin:050-pip-seed 08_20 13_21
INT_R.EL1BEG0.NN2END1 origin:050-pip-seed 08_21 15_21
INT_R.EL1BEG0.NN6END1 origin:050-pip-seed 08_21 12_21
INT_R.EL1BEG0.NR1END1 origin:050-pip-seed 07_20 13_21
INT_R.EL1BEG0.NW2END1 origin:050-pip-seed 08_20 15_21
INT_R.EL1BEG0.NW6END1 origin:050-pip-seed 08_20 12_21
INT_R.EL1BEG0.SE2END1 origin:050-pip-seed 11_21 15_21
INT_R.EL1BEG0.SE6END1 origin:050-pip-seed 11_21 12_21
INT_R.EL1BEG1.LOGIC_OUTS2 origin:050-pip-seed 11_37 14_37
INT_R.EL1BEG1.LOGIC_OUTS6 origin:050-pip-seed 07_36 14_37
INT_R.EL1BEG1.LOGIC_OUTS10 origin:050-pip-seed 10_37 14_37
INT_R.EL1BEG1.LOGIC_OUTS14 origin:050-pip-seed 10_37 13_37
INT_R.EL1BEG1.LOGIC_OUTS16 origin:050-pip-seed 08_36 14_37
INT_R.EL1BEG1.LOGIC_OUTS20 origin:050-pip-seed 08_37 14_37
INT_R.EL1BEG1.EE2END2 origin:050-pip-seed 07_36 15_37
INT_R.EL1BEG1.EE4END2 origin:050-pip-seed 07_36 12_37
INT_R.EL1BEG1.EL1END2 origin:050-pip-seed 11_37 13_37
INT_R.EL1BEG1.ER1END2 origin:050-pip-seed 08_37 13_37
INT_R.EL1BEG1.NE2END2 origin:050-pip-seed 10_37 15_37
INT_R.EL1BEG1.NE6END2 origin:050-pip-seed 10_37 12_37
INT_R.EL1BEG1.NL1END2 origin:050-pip-seed 08_36 13_37
INT_R.EL1BEG1.NN2END2 origin:050-pip-seed 08_37 15_37
INT_R.EL1BEG1.NN6END2 origin:050-pip-seed 08_37 12_37
INT_R.EL1BEG1.NR1END2 origin:050-pip-seed 07_36 13_37
INT_R.EL1BEG1.NW2END2 origin:050-pip-seed 08_36 15_37
INT_R.EL1BEG1.NW6END2 origin:050-pip-seed 08_36 12_37
INT_R.EL1BEG1.SE2END2 origin:050-pip-seed 11_37 15_37
INT_R.EL1BEG1.SE6END2 origin:050-pip-seed 11_37 12_37
INT_R.EL1BEG2.LOGIC_OUTS3 origin:050-pip-seed 07_52 14_53
INT_R.EL1BEG2.LOGIC_OUTS7 origin:050-pip-seed 11_53 14_53
INT_R.EL1BEG2.LOGIC_OUTS11 origin:050-pip-seed 10_53 13_53
INT_R.EL1BEG2.LOGIC_OUTS15 origin:050-pip-seed 10_53 14_53
INT_R.EL1BEG2.LOGIC_OUTS17 origin:050-pip-seed 08_53 14_53
INT_R.EL1BEG2.LOGIC_OUTS21 origin:050-pip-seed 08_52 14_53
INT_R.EL1BEG2.NL1BEG_N3 origin:050-pip-seed 08_52 13_53
INT_R.EL1BEG2.EE2END3 origin:050-pip-seed 07_52 15_53
INT_R.EL1BEG2.EE4END3 origin:050-pip-seed 07_52 12_53
INT_R.EL1BEG2.EL1END3 origin:050-pip-seed 11_53 13_53
INT_R.EL1BEG2.ER1END3 origin:050-pip-seed 08_53 13_53
INT_R.EL1BEG2.NE2END3 origin:050-pip-seed 10_53 15_53
INT_R.EL1BEG2.NE6END3 origin:050-pip-seed 10_53 12_53
INT_R.EL1BEG2.NN2END3 origin:050-pip-seed 08_53 15_53
INT_R.EL1BEG2.NN6END3 origin:050-pip-seed 08_53 12_53
INT_R.EL1BEG2.NR1END3 origin:050-pip-seed 07_52 13_53
INT_R.EL1BEG2.NW2END3 origin:050-pip-seed 08_52 15_53
INT_R.EL1BEG2.NW6END3 origin:050-pip-seed 08_52 12_53
INT_R.EL1BEG2.SE2END3 origin:050-pip-seed 11_53 15_53
INT_R.EL1BEG2.SE6END3 origin:050-pip-seed 11_53 12_53
INT_R.ER1BEG1.LOGIC_OUTS0 origin:050-pip-seed 11_11 14_11
INT_R.ER1BEG1.LOGIC_OUTS4 origin:050-pip-seed 07_10 14_11
INT_R.ER1BEG1.LOGIC_OUTS8 origin:050-pip-seed 10_11 14_11
INT_R.ER1BEG1.LOGIC_OUTS12 origin:050-pip-seed 10_11 13_11
INT_R.ER1BEG1.LOGIC_OUTS18 origin:050-pip-seed 08_10 14_11
INT_R.ER1BEG1.LOGIC_OUTS22 origin:050-pip-seed 08_11 14_11
INT_R.ER1BEG1.SR1BEG_S0 origin:050-pip-seed 11_11 13_11
INT_R.ER1BEG1.EE2END0 origin:050-pip-seed 08_10 15_11
INT_R.ER1BEG1.EE4END0 origin:050-pip-seed 08_10 12_11
INT_R.ER1BEG1.EL1END0 origin:050-pip-seed 08_11 13_11
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INT_R.ER1BEG1.WW4END1 origin:050-pip-seed 11_11 12_11
INT_R.ER1BEG2.LOGIC_OUTS1 origin:050-pip-seed 07_26 14_27
INT_R.ER1BEG2.LOGIC_OUTS5 origin:050-pip-seed 11_27 14_27
INT_R.ER1BEG2.LOGIC_OUTS9 origin:050-pip-seed 10_27 13_27
INT_R.ER1BEG2.LOGIC_OUTS13 origin:050-pip-seed 10_27 14_27
INT_R.ER1BEG2.LOGIC_OUTS19 origin:050-pip-seed 08_27 14_27
INT_R.ER1BEG2.LOGIC_OUTS23 origin:050-pip-seed 08_26 14_27
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INT_R.ER1BEG2.SW2END1 origin:050-pip-seed 07_26 15_27
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INT_R.ER1BEG2.WW4END2 origin:050-pip-seed 11_27 12_27
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INT_R.ER1BEG3.LOGIC_OUTS6 origin:050-pip-seed 07_42 14_43
INT_R.ER1BEG3.LOGIC_OUTS10 origin:050-pip-seed 10_43 14_43
INT_R.ER1BEG3.LOGIC_OUTS14 origin:050-pip-seed 10_43 13_43
INT_R.ER1BEG3.LOGIC_OUTS16 origin:050-pip-seed 08_42 14_43
INT_R.ER1BEG3.LOGIC_OUTS20 origin:050-pip-seed 08_43 14_43
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INT_R.ER1BEG3.SS6END2 origin:050-pip-seed 10_43 12_43
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INT_R.ER1BEG3.WW4END3 origin:050-pip-seed 11_43 12_43
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INT_R.GFAN0.GCLK_B1_EAST origin:056-pip-rem !00_10 00_11 01_09 01_10 01_12
INT_R.GFAN0.GCLK_B2_EAST origin:056-pip-rem !00_10 !00_11 !01_09 01_10 01_12
INT_R.GFAN0.GCLK_B3_EAST origin:056-pip-rem !00_10 !01_09 !01_10 00_11 01_12
INT_R.GFAN0.GCLK_B4_EAST origin:056-pip-rem !01_09 00_10 00_11 01_10 01_18
INT_R.GFAN0.GCLK_B5_EAST origin:056-pip-rem !00_10 00_11 01_09 01_10 01_18
INT_R.GFAN0.GCLK_B6 origin:056-pip-rem !00_10 !00_11 !01_09 01_10 01_18
INT_R.GFAN0.GCLK_B7 origin:056-pip-rem !00_10 !01_09 !01_10 00_11 01_18
INT_R.GFAN0.GCLK_B8 origin:056-pip-rem !01_09 00_10 00_11 01_10 01_16
INT_R.GFAN0.GCLK_B9 origin:056-pip-rem !00_10 00_11 01_09 01_10 01_16
INT_R.GFAN0.GCLK_B10 origin:056-pip-rem !00_10 !00_11 !01_09 01_10 01_16
INT_R.GFAN0.GCLK_B11 origin:056-pip-rem !00_10 !01_09 !01_10 00_11 01_16
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INT_R.GFAN0.NR1END1 origin:056-pip-rem !00_10 00_11 01_09 01_10 01_14
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INT_R.GFAN1.GCLK_B1_EAST origin:056-pip-rem !00_18 00_13 00_14 00_19 01_13
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INT_R.GFAN1.GCLK_B3_EAST origin:056-pip-rem !00_14 !00_18 !00_19 00_13 01_13
INT_R.GFAN1.GCLK_B4_EAST origin:056-pip-rem !00_19 00_14 00_15 00_18 01_13
INT_R.GFAN1.GCLK_B5_EAST origin:056-pip-rem !00_18 00_14 00_15 00_19 01_13
INT_R.GFAN1.GCLK_B6 origin:056-pip-rem !00_18 !00_19 !01_13 00_14 00_15
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INT_R.GFAN1.GCLK_B8 origin:056-pip-rem !00_19 00_14 00_18 01_13 01_17
INT_R.GFAN1.GCLK_B9 origin:056-pip-rem !00_18 00_14 00_19 01_13 01_17
INT_R.GFAN1.GCLK_B10 origin:056-pip-rem !00_18 !00_19 !01_13 00_14 01_17
INT_R.GFAN1.GCLK_B11 origin:056-pip-rem !00_14 !00_18 !00_19 01_13 01_17
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INT_R.IMUX0.BYP_BOUNCE_N3_6 origin:050-pip-seed !22_01 !23_01 !25_01 21_01 24_01
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INT_R.IMUX0.FAN_BOUNCE7 origin:050-pip-seed !23_01 21_01 22_01 24_01 25_01
INT_R.IMUX0.LOGIC_OUTS0 origin:051-pip-imuxlout-bypalts !22_01 20_01 23_01 24_01 25_01
INT_R.IMUX0.LOGIC_OUTS12 origin:051-pip-imuxlout-bypalts !23_01 20_01 22_01 24_01 25_01
INT_R.IMUX0.LOGIC_OUTS22 origin:051-pip-imuxlout-bypalts !22_01 !23_01 !24_01 20_01 25_01
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INT_R.IMUX0.SW2END_N0_3 origin:050-pip-seed !22_01 !23_01 !24_01 19_00 25_01
INT_R.IMUX0.WL1END_N1_3 origin:050-pip-seed !23_01 18_00 22_01 24_01 25_01
INT_R.IMUX0.WW2END_N0_3 origin:050-pip-seed !22_01 !23_01 !25_01 18_00 24_01
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INT_R.IMUX0.EL1END0 origin:050-pip-seed !23_01 19_00 22_01 24_01 25_01
INT_R.IMUX0.GFAN0 origin:049-int-imux-gfan !22_01 !23_01 !25_01 20_01 24_01
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INT_R.IMUX0.WR1END0 origin:050-pip-seed !22_01 19_00 23_01 24_01 25_01
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INT_R.IMUX1.BYP_BOUNCE_N3_7 origin:050-pip-seed !22_09 !23_09 !24_09 21_09 25_09
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INT_R.IMUX1.FAN_BOUNCE6 origin:050-pip-seed !22_09 21_09 23_09 24_09 25_09
INT_R.IMUX1.LOGIC_OUTS4 origin:051-pip-imuxlout-bypalts !22_09 20_09 23_09 24_09 25_09
INT_R.IMUX1.LOGIC_OUTS8 origin:051-pip-imuxlout-bypalts !23_09 20_09 22_09 24_09 25_09
INT_R.IMUX1.LOGIC_OUTS18 origin:051-pip-imuxlout-bypalts !22_09 !23_09 !24_09 20_09 25_09
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INT_R.IMUX1.ER1END0 origin:050-pip-seed !22_09 19_08 23_09 24_09 25_09
INT_R.IMUX1.GFAN0 origin:049-int-imux-gfan !22_09 !23_09 !25_09 20_09 24_09
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INT_R.IMUX1.NL1END1 origin:050-pip-seed !23_09 17_09 22_09 24_09 25_09
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INT_R.IMUX1.SW2END0 origin:050-pip-seed !22_09 !23_09 !24_09 16_09 25_09
INT_R.IMUX1.WL1END0 origin:050-pip-seed !23_09 19_08 22_09 24_09 25_09
INT_R.IMUX1.WR1END0 origin:050-pip-seed !22_09 18_08 23_09 24_09 25_09
INT_R.IMUX1.WW2END0 origin:050-pip-seed !22_09 !23_09 !25_09 17_09 24_09
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INT_R.IMUX2.BYP_BOUNCE0 origin:050-pip-seed !22_17 !23_17 !25_17 21_17 24_17
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INT_R.IMUX2.FAN_BOUNCE7 origin:050-pip-seed !22_17 21_17 23_17 24_17 25_17
INT_R.IMUX2.LOGIC_OUTS5 origin:051-pip-imuxlout-bypalts !22_17 20_17 23_17 24_17 25_17
INT_R.IMUX2.LOGIC_OUTS9 origin:051-pip-imuxlout-bypalts !23_17 20_17 22_17 24_17 25_17
INT_R.IMUX2.LOGIC_OUTS19 origin:051-pip-imuxlout-bypalts !22_17 !23_17 !24_17 20_17 25_17
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INT_R.IMUX2.EL1END1 origin:050-pip-seed !23_17 19_16 22_17 24_17 25_17
INT_R.IMUX2.ER1END0 origin:050-pip-seed !22_17 18_16 23_17 24_17 25_17
INT_R.IMUX2.GFAN0 origin:049-int-imux-gfan !22_17 !23_17 !25_17 20_17 24_17
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INT_R.IMUX2.NN2END1 origin:050-pip-seed !22_17 !23_17 !25_17 16_17 24_17
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INT_R.IMUX2.NW2END1 origin:050-pip-seed !22_17 !23_17 !24_17 18_16 25_17
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INT_R.IMUX2.SW2END0 origin:050-pip-seed !22_17 !23_17 !24_17 19_16 25_17
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INT_R.IMUX2.WW2END0 origin:050-pip-seed !22_17 !23_17 !25_17 18_16 24_17
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INT_R.IMUX3.FAN_BOUNCE5 origin:050-pip-seed !22_25 21_25 23_25 24_25 25_25
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INT_R.IMUX3.LOGIC_OUTS13 origin:051-pip-imuxlout-bypalts !23_25 20_25 22_25 24_25 25_25
INT_R.IMUX3.LOGIC_OUTS23 origin:051-pip-imuxlout-bypalts !22_25 !23_25 !24_25 20_25 25_25
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INT_R.IMUX4.LOGIC_OUTS20 origin:051-pip-imuxlout-bypalts !22_33 !23_33 !24_33 20_33 25_33
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