From 9f25f578dec3c958b60d76e083a352fc353c3ad4 Mon Sep 17 00:00:00 2001 From: Marian Abuhazi Date: Sat, 27 Apr 2024 22:38:06 -0400 Subject: [PATCH] End-to-end run. First test. --- .github/workflows/regression-test.yaml | 6 +++- socs/xilinx-vc707-xc7vx485t/Makefile | 6 ++-- .../actions-pipeline/accelerators.json | 14 +++++--- .../actions-pipeline/get_hls_accelerators.sh | 5 +++ .../actions-pipeline/run_esp-config.sh | 32 ++++++++++++++++++- 5 files changed, 54 insertions(+), 9 deletions(-) diff --git a/.github/workflows/regression-test.yaml b/.github/workflows/regression-test.yaml index 98fdc3548a..c922ad0016 100644 --- a/.github/workflows/regression-test.yaml +++ b/.github/workflows/regression-test.yaml @@ -12,7 +12,11 @@ jobs: run: | cd $HOME/esp/utils/scripts/actions-pipeline ./get_modified_accelerators.sh - - name: Run behavioral simulations + - name: Run HLS run: | cd $HOME/esp/utils/scripts/actions-pipeline ./run_sims.sh + - name: Generate bitstream and program FPGA + run: | + cd $HOME/esp/utils/scripts/actions-pipeline + ./run_esp-config.sh diff --git a/socs/xilinx-vc707-xc7vx485t/Makefile b/socs/xilinx-vc707-xc7vx485t/Makefile index 74ffc502cc..9755b3e637 100644 --- a/socs/xilinx-vc707-xc7vx485t/Makefile +++ b/socs/xilinx-vc707-xc7vx485t/Makefile @@ -44,18 +44,18 @@ TOP_VLOG_SIM_SRCS += ### Xilinx Vivado hw_server ### -FPGA_HOST=goliah +FPGA_HOST=goliah.cs.columbia.edu XIL_HW_SERVER_PORT=3132 ### Network configuration ### # IP address or host name of the host connected to the FPGA -UART_IP=goliah +UART_IP=goliah.cs.columbia.edu UART_PORT=4332 # SSH IP address or host name of the ESP Linux instance or gateway -SSH_IP=espgate +SSH_IP=espgate.cs.columbia.edu SSH_PORT=5509 # ESPLink IP address or gateway (DO NOT USE HOST NAME) diff --git a/utils/scripts/actions-pipeline/accelerators.json b/utils/scripts/actions-pipeline/accelerators.json index 7ba1dd70d8..c2f39353ea 100644 --- a/utils/scripts/actions-pipeline/accelerators.json +++ b/utils/scripts/actions-pipeline/accelerators.json @@ -1,10 +1,16 @@ { "accelerators": [ { - "name": "dummy_stratus", - "path": "accelerators/stratus_hls/dummy_stratus", - "behavioral": "dummy_stratus-exe", - "hls": "dummy_stratus-hls" + "name": "cholesky_stratus", + "path": "accelerators/stratus_hls/cholesky_stratus", + "behavioral": "cholesky_stratus-exe", + "hls": "cholesky_stratus-hls" + }, + { + "name": "fft2_stratus", + "path": "accelerators/stratus_hls/fft2_stratus", + "behavioral": "fft2_stratus-exe", + "hls": "fft2_stratus-hls" } ] } diff --git a/utils/scripts/actions-pipeline/get_hls_accelerators.sh b/utils/scripts/actions-pipeline/get_hls_accelerators.sh index 0b221f741d..6670d243cd 100755 --- a/utils/scripts/actions-pipeline/get_hls_accelerators.sh +++ b/utils/scripts/actions-pipeline/get_hls_accelerators.sh @@ -24,4 +24,9 @@ for accelerator in "${accelerators[@]}"; do latest_version="${sorted_versions[-1]}" latest_versions["$accelerator"]="${latest_version#*_*_}" +done + +echo "Successful HLS work folders:" +for accelerator in "${!latest_versions[@]}"; do + echo "-- $accelerator: ${latest_versions[$accelerator]}" done \ No newline at end of file diff --git a/utils/scripts/actions-pipeline/run_esp-config.sh b/utils/scripts/actions-pipeline/run_esp-config.sh index 214679fb77..8fa146262c 100755 --- a/utils/scripts/actions-pipeline/run_esp-config.sh +++ b/utils/scripts/actions-pipeline/run_esp-config.sh @@ -2,14 +2,44 @@ source "get_hls_accelerators.sh" defconfig="$HOME/esp/socs/defconfig/esp_xilinx-vc707-xc7vx485t_defconfig" +fpga_program="$HOME/esp/utils/scripts/actions-pipeline/fpga_program.log" for accelerator in "${!latest_versions[@]}"; do accelerator_upper=$(echo "$accelerator" | tr '[:lower:]' '[:upper:]') - esp_config="$HOME/esp/utils/scripts/actions-pipeline/.esp_config_$accelerator" + esp_config="$HOME/esp/socs/xilinx-vc707-xc7vx485t/socgen/esp/.esp_config" + vivado_syn="$HOME/esp/utils/scripts/actions-pipeline/vivado_syn_$accelerator.log" cp "$defconfig" "$esp_config" sed -i "s/CONFIG_DSU_IP = C0A80107/CONGIG_DSU_IP = C0A8011C/" "$esp_config" sed -i "s/CONFIG_DSU_ETH = A6A7A0F8043D/CONGIG_DSU_ETH = A6A7A0F80445/" "$esp_config" sed -i "s/TILE_1_0 = 2 empty empty 0 0 0/TILE_1_0 = 2 acc $accelerator_upper 0 0 0 ${latest_versions[$accelerator]} 0 sld/" "$esp_config" sed -i "s/POWER_1_0 = empty 0 0 0 0 0 0 0 0 0 0 0 0/POWER_1_0 = $accelerator_upper 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0/" "$esp_config" + + cd "$HOME/esp/socs/xilinx-vc707-xc7vx485t" + rm top.bit + rm -r vivado + make clean + cat $esp_config + make esp-config + make vivado-syn &> "$vivado_syn" + if [ -s "top.bit" ]; then + make soft + make fpga-program &> "$fpga_program" + if grep -q ERROR "$fpga_program"; then + echo "FPGA PROGRAM FAILED: $accelerator" + else + echo "FPGA PROGRAM SUCCESS: $accelerator" + + fi + rm "$fpga_program" + else + echo "Bitstream generation failed: $accelerator" + fi + # Clean up + # fi + # delete vivado folder and bit file + # make clean + # if (top.bit exists, make vivado-syn) + # make fpga-program + # make uart done