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IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

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Documentation Status

See documentation on https://hwpe-doc.readthedocs.io.

This repository contains the IPs necessary to produce HWPE (HW Processing Engine) control registers, e.g. for the XNE, HWCE, etc.

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IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

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  • SystemVerilog 100.0%