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[test-triage] I2C - TLM FIFO not empty at end of test #24593

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martin-velay opened this issue Sep 18, 2024 · 0 comments
Open
2 tasks

[test-triage] I2C - TLM FIFO not empty at end of test #24593

martin-velay opened this issue Sep 18, 2024 · 0 comments
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Component:TestTriage IP:i2c Triage Priority Issue to be discussed with priority in the next triage meeting

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@martin-velay
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Hierarchy of regression failure

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Failure Description

The following error is raised for several seeds:
UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared

Steps to Reproduce

  • GitHub Revision: #25b1acb
  • dvsim invocation command to reproduce the failure, inclusive of build and run seeds:
    ./util/dvsim/dvsim.py hw/ip/i2c/dv/i2c_sim_cfg.hjson -i i2c_host_mode_toggle --fixed-seed 83642804746808679151779794570736594788640700329567191646850288550203524713046

Tests with similar or related failures

  • i2c_host_mode_toggle
  • i2c_host_stress_all -> probably because it calls the i2c_host_mode_toggle vseq
@hayleynewton hayleynewton added this to the Earlgrey-PROD.M7 milestone Sep 20, 2024
@hayleynewton hayleynewton added the Triage Priority Issue to be discussed with priority in the next triage meeting label Sep 20, 2024
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Labels
Component:TestTriage IP:i2c Triage Priority Issue to be discussed with priority in the next triage meeting
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